Commit | Line | Data |
---|---|---|
317a6104 PM |
1 | /* |
2 | * SuperH On-Chip RTC Support | |
3 | * | |
b420b1a7 | 4 | * Copyright (C) 2006, 2007, 2008 Paul Mundt |
1b73e6ae | 5 | * Copyright (C) 2006 Jamie Lenehan |
b420b1a7 | 6 | * Copyright (C) 2008 Angelo Castello |
317a6104 PM |
7 | * |
8 | * Based on the old arch/sh/kernel/cpu/rtc.c by: | |
9 | * | |
10 | * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> | |
11 | * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka | |
12 | * | |
13 | * This file is subject to the terms and conditions of the GNU General Public | |
14 | * License. See the file "COPYING" in the main directory of this archive | |
15 | * for more details. | |
16 | */ | |
17 | #include <linux/module.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/bcd.h> | |
20 | #include <linux/rtc.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/seq_file.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/spinlock.h> | |
31ccb081 | 26 | #include <linux/io.h> |
ad89f87a | 27 | #include <asm/rtc.h> |
317a6104 | 28 | |
1b73e6ae | 29 | #define DRV_NAME "sh-rtc" |
b420b1a7 | 30 | #define DRV_VERSION "0.2.0" |
317a6104 PM |
31 | |
32 | #define RTC_REG(r) ((r) * rtc_reg_size) | |
33 | ||
31ccb081 | 34 | #define R64CNT RTC_REG(0) |
1b73e6ae JL |
35 | |
36 | #define RSECCNT RTC_REG(1) /* RTC sec */ | |
37 | #define RMINCNT RTC_REG(2) /* RTC min */ | |
38 | #define RHRCNT RTC_REG(3) /* RTC hour */ | |
39 | #define RWKCNT RTC_REG(4) /* RTC week */ | |
40 | #define RDAYCNT RTC_REG(5) /* RTC day */ | |
41 | #define RMONCNT RTC_REG(6) /* RTC month */ | |
42 | #define RYRCNT RTC_REG(7) /* RTC year */ | |
43 | #define RSECAR RTC_REG(8) /* ALARM sec */ | |
44 | #define RMINAR RTC_REG(9) /* ALARM min */ | |
45 | #define RHRAR RTC_REG(10) /* ALARM hour */ | |
46 | #define RWKAR RTC_REG(11) /* ALARM week */ | |
47 | #define RDAYAR RTC_REG(12) /* ALARM day */ | |
48 | #define RMONAR RTC_REG(13) /* ALARM month */ | |
49 | #define RCR1 RTC_REG(14) /* Control */ | |
50 | #define RCR2 RTC_REG(15) /* Control */ | |
51 | ||
ff1b7506 PM |
52 | /* |
53 | * Note on RYRAR and RCR3: Up until this point most of the register | |
54 | * definitions are consistent across all of the available parts. However, | |
55 | * the placement of the optional RYRAR and RCR3 (the RYRAR control | |
56 | * register used to control RYRCNT/RYRAR compare) varies considerably | |
57 | * across various parts, occasionally being mapped in to a completely | |
58 | * unrelated address space. For proper RYRAR support a separate resource | |
59 | * would have to be handed off, but as this is purely optional in | |
60 | * practice, we simply opt not to support it, thereby keeping the code | |
61 | * quite a bit more simplified. | |
62 | */ | |
63 | ||
1b73e6ae JL |
64 | /* ALARM Bits - or with BCD encoded value */ |
65 | #define AR_ENB 0x80 /* Enable for alarm cmp */ | |
317a6104 | 66 | |
b420b1a7 AC |
67 | /* Period Bits */ |
68 | #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */ | |
69 | #define PF_COUNT 0x200 /* Half periodic counter */ | |
70 | #define PF_OXS 0x400 /* Periodic One x Second */ | |
71 | #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */ | |
72 | #define PF_MASK 0xf00 | |
73 | ||
317a6104 PM |
74 | /* RCR1 Bits */ |
75 | #define RCR1_CF 0x80 /* Carry Flag */ | |
76 | #define RCR1_CIE 0x10 /* Carry Interrupt Enable */ | |
77 | #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */ | |
78 | #define RCR1_AF 0x01 /* Alarm Flag */ | |
79 | ||
80 | /* RCR2 Bits */ | |
81 | #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */ | |
82 | #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */ | |
83 | #define RCR2_RTCEN 0x08 /* ENable RTC */ | |
84 | #define RCR2_ADJ 0x04 /* ADJustment (30-second) */ | |
85 | #define RCR2_RESET 0x02 /* Reset bit */ | |
86 | #define RCR2_START 0x01 /* Start bit */ | |
87 | ||
88 | struct sh_rtc { | |
89 | void __iomem *regbase; | |
90 | unsigned long regsize; | |
91 | struct resource *res; | |
92 | unsigned int alarm_irq, periodic_irq, carry_irq; | |
93 | struct rtc_device *rtc_dev; | |
94 | spinlock_t lock; | |
ad89f87a | 95 | unsigned long capabilities; /* See asm-sh/rtc.h for cap bits */ |
b420b1a7 | 96 | unsigned short periodic_freq; |
317a6104 PM |
97 | }; |
98 | ||
31ccb081 | 99 | static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id) |
317a6104 | 100 | { |
b420b1a7 AC |
101 | struct sh_rtc *rtc = dev_id; |
102 | unsigned int tmp; | |
317a6104 PM |
103 | |
104 | spin_lock(&rtc->lock); | |
105 | ||
106 | tmp = readb(rtc->regbase + RCR1); | |
1b73e6ae | 107 | tmp &= ~RCR1_CF; |
317a6104 PM |
108 | writeb(tmp, rtc->regbase + RCR1); |
109 | ||
b420b1a7 AC |
110 | /* Users have requested One x Second IRQ */ |
111 | if (rtc->periodic_freq & PF_OXS) | |
112 | rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF); | |
317a6104 PM |
113 | |
114 | spin_unlock(&rtc->lock); | |
115 | ||
116 | return IRQ_HANDLED; | |
117 | } | |
118 | ||
1b73e6ae JL |
119 | static irqreturn_t sh_rtc_alarm(int irq, void *dev_id) |
120 | { | |
b420b1a7 AC |
121 | struct sh_rtc *rtc = dev_id; |
122 | unsigned int tmp; | |
1b73e6ae JL |
123 | |
124 | spin_lock(&rtc->lock); | |
125 | ||
126 | tmp = readb(rtc->regbase + RCR1); | |
b420b1a7 | 127 | tmp &= ~(RCR1_AF | RCR1_AIE); |
1b73e6ae JL |
128 | writeb(tmp, rtc->regbase + RCR1); |
129 | ||
b420b1a7 | 130 | rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF); |
1b73e6ae JL |
131 | |
132 | spin_unlock(&rtc->lock); | |
b420b1a7 | 133 | |
1b73e6ae JL |
134 | return IRQ_HANDLED; |
135 | } | |
136 | ||
31ccb081 | 137 | static irqreturn_t sh_rtc_periodic(int irq, void *dev_id) |
317a6104 | 138 | { |
b420b1a7 AC |
139 | struct sh_rtc *rtc = dev_id; |
140 | struct rtc_device *rtc_dev = rtc->rtc_dev; | |
141 | unsigned int tmp; | |
317a6104 PM |
142 | |
143 | spin_lock(&rtc->lock); | |
144 | ||
b420b1a7 AC |
145 | tmp = readb(rtc->regbase + RCR2); |
146 | tmp &= ~RCR2_PEF; | |
147 | writeb(tmp, rtc->regbase + RCR2); | |
148 | ||
149 | /* Half period enabled than one skipped and the next notified */ | |
150 | if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT)) | |
151 | rtc->periodic_freq &= ~PF_COUNT; | |
152 | else { | |
153 | if (rtc->periodic_freq & PF_HP) | |
154 | rtc->periodic_freq |= PF_COUNT; | |
155 | if (rtc->periodic_freq & PF_KOU) { | |
156 | spin_lock(&rtc_dev->irq_task_lock); | |
157 | if (rtc_dev->irq_task) | |
158 | rtc_dev->irq_task->func(rtc_dev->irq_task->private_data); | |
159 | spin_unlock(&rtc_dev->irq_task_lock); | |
160 | } else | |
161 | rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF); | |
162 | } | |
317a6104 PM |
163 | |
164 | spin_unlock(&rtc->lock); | |
165 | ||
166 | return IRQ_HANDLED; | |
167 | } | |
168 | ||
169 | static inline void sh_rtc_setpie(struct device *dev, unsigned int enable) | |
170 | { | |
171 | struct sh_rtc *rtc = dev_get_drvdata(dev); | |
172 | unsigned int tmp; | |
173 | ||
174 | spin_lock_irq(&rtc->lock); | |
175 | ||
176 | tmp = readb(rtc->regbase + RCR2); | |
177 | ||
178 | if (enable) { | |
b420b1a7 AC |
179 | tmp &= ~RCR2_PEF; /* Clear PES bit */ |
180 | tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */ | |
317a6104 PM |
181 | } else |
182 | tmp &= ~(RCR2_PESMASK | RCR2_PEF); | |
183 | ||
184 | writeb(tmp, rtc->regbase + RCR2); | |
185 | ||
186 | spin_unlock_irq(&rtc->lock); | |
187 | } | |
188 | ||
b420b1a7 | 189 | static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq) |
317a6104 PM |
190 | { |
191 | struct sh_rtc *rtc = dev_get_drvdata(dev); | |
b420b1a7 | 192 | int tmp, ret = 0; |
317a6104 PM |
193 | |
194 | spin_lock_irq(&rtc->lock); | |
b420b1a7 | 195 | tmp = rtc->periodic_freq & PF_MASK; |
317a6104 | 196 | |
b420b1a7 AC |
197 | switch (freq) { |
198 | case 0: | |
199 | rtc->periodic_freq = 0x00; | |
200 | break; | |
201 | case 1: | |
202 | rtc->periodic_freq = 0x60; | |
203 | break; | |
204 | case 2: | |
205 | rtc->periodic_freq = 0x50; | |
206 | break; | |
207 | case 4: | |
208 | rtc->periodic_freq = 0x40; | |
209 | break; | |
210 | case 8: | |
211 | rtc->periodic_freq = 0x30 | PF_HP; | |
212 | break; | |
213 | case 16: | |
214 | rtc->periodic_freq = 0x30; | |
215 | break; | |
216 | case 32: | |
217 | rtc->periodic_freq = 0x20 | PF_HP; | |
218 | break; | |
219 | case 64: | |
220 | rtc->periodic_freq = 0x20; | |
221 | break; | |
222 | case 128: | |
223 | rtc->periodic_freq = 0x10 | PF_HP; | |
224 | break; | |
225 | case 256: | |
226 | rtc->periodic_freq = 0x10; | |
227 | break; | |
228 | default: | |
229 | ret = -ENOTSUPP; | |
230 | } | |
317a6104 | 231 | |
b420b1a7 AC |
232 | if (ret == 0) { |
233 | rtc->periodic_freq |= tmp; | |
234 | rtc->rtc_dev->irq_freq = freq; | |
235 | } | |
317a6104 PM |
236 | |
237 | spin_unlock_irq(&rtc->lock); | |
b420b1a7 | 238 | return ret; |
317a6104 PM |
239 | } |
240 | ||
b420b1a7 | 241 | static inline void sh_rtc_setaie(struct device *dev, unsigned int enable) |
317a6104 PM |
242 | { |
243 | struct sh_rtc *rtc = dev_get_drvdata(dev); | |
244 | unsigned int tmp; | |
317a6104 | 245 | |
b420b1a7 | 246 | spin_lock_irq(&rtc->lock); |
317a6104 | 247 | |
b420b1a7 | 248 | tmp = readb(rtc->regbase + RCR1); |
317a6104 | 249 | |
b420b1a7 AC |
250 | if (!enable) |
251 | tmp &= ~RCR1_AIE; | |
252 | else | |
253 | tmp |= RCR1_AIE; | |
317a6104 | 254 | |
b420b1a7 | 255 | writeb(tmp, rtc->regbase + RCR1); |
317a6104 | 256 | |
b420b1a7 | 257 | spin_unlock_irq(&rtc->lock); |
317a6104 PM |
258 | } |
259 | ||
317a6104 PM |
260 | static int sh_rtc_proc(struct device *dev, struct seq_file *seq) |
261 | { | |
262 | struct sh_rtc *rtc = dev_get_drvdata(dev); | |
263 | unsigned int tmp; | |
264 | ||
265 | tmp = readb(rtc->regbase + RCR1); | |
b420b1a7 | 266 | seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no"); |
317a6104 PM |
267 | |
268 | tmp = readb(rtc->regbase + RCR2); | |
269 | seq_printf(seq, "periodic_IRQ\t: %s\n", | |
b420b1a7 | 270 | (tmp & RCR2_PESMASK) ? "yes" : "no"); |
317a6104 PM |
271 | |
272 | return 0; | |
273 | } | |
274 | ||
275 | static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |
276 | { | |
b420b1a7 AC |
277 | struct sh_rtc *rtc = dev_get_drvdata(dev); |
278 | unsigned int ret = 0; | |
317a6104 PM |
279 | |
280 | switch (cmd) { | |
281 | case RTC_PIE_OFF: | |
282 | case RTC_PIE_ON: | |
283 | sh_rtc_setpie(dev, cmd == RTC_PIE_ON); | |
317a6104 PM |
284 | break; |
285 | case RTC_AIE_OFF: | |
286 | case RTC_AIE_ON: | |
287 | sh_rtc_setaie(dev, cmd == RTC_AIE_ON); | |
317a6104 | 288 | break; |
b420b1a7 AC |
289 | case RTC_UIE_OFF: |
290 | rtc->periodic_freq &= ~PF_OXS; | |
291 | break; | |
292 | case RTC_UIE_ON: | |
293 | rtc->periodic_freq |= PF_OXS; | |
294 | break; | |
295 | case RTC_IRQP_READ: | |
296 | ret = put_user(rtc->rtc_dev->irq_freq, | |
297 | (unsigned long __user *)arg); | |
298 | break; | |
299 | case RTC_IRQP_SET: | |
300 | ret = sh_rtc_setfreq(dev, arg); | |
301 | break; | |
302 | default: | |
303 | ret = -ENOIOCTLCMD; | |
317a6104 PM |
304 | } |
305 | ||
306 | return ret; | |
307 | } | |
308 | ||
309 | static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
310 | { | |
311 | struct platform_device *pdev = to_platform_device(dev); | |
312 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | |
313 | unsigned int sec128, sec2, yr, yr100, cf_bit; | |
314 | ||
315 | do { | |
316 | unsigned int tmp; | |
317 | ||
318 | spin_lock_irq(&rtc->lock); | |
319 | ||
320 | tmp = readb(rtc->regbase + RCR1); | |
321 | tmp &= ~RCR1_CF; /* Clear CF-bit */ | |
322 | tmp |= RCR1_CIE; | |
323 | writeb(tmp, rtc->regbase + RCR1); | |
324 | ||
325 | sec128 = readb(rtc->regbase + R64CNT); | |
326 | ||
fe20ba70 AB |
327 | tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT)); |
328 | tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT)); | |
329 | tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT)); | |
330 | tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT)); | |
331 | tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT)); | |
332 | tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1; | |
317a6104 | 333 | |
ad89f87a PM |
334 | if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) { |
335 | yr = readw(rtc->regbase + RYRCNT); | |
fe20ba70 | 336 | yr100 = bcd2bin(yr >> 8); |
ad89f87a PM |
337 | yr &= 0xff; |
338 | } else { | |
339 | yr = readb(rtc->regbase + RYRCNT); | |
fe20ba70 | 340 | yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20); |
ad89f87a | 341 | } |
317a6104 | 342 | |
fe20ba70 | 343 | tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900; |
317a6104 PM |
344 | |
345 | sec2 = readb(rtc->regbase + R64CNT); | |
346 | cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF; | |
347 | ||
348 | spin_unlock_irq(&rtc->lock); | |
349 | } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0); | |
350 | ||
351 | #if RTC_BIT_INVERTED != 0 | |
352 | if ((sec128 & RTC_BIT_INVERTED)) | |
353 | tm->tm_sec--; | |
354 | #endif | |
355 | ||
435c55d1 | 356 | dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, " |
317a6104 | 357 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
2a4e2b87 | 358 | __func__, |
317a6104 | 359 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
a1614796 | 360 | tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday); |
317a6104 | 361 | |
0ac554b9 | 362 | if (rtc_valid_tm(tm) < 0) { |
317a6104 | 363 | dev_err(dev, "invalid date\n"); |
0ac554b9 PM |
364 | rtc_time_to_tm(0, tm); |
365 | } | |
317a6104 PM |
366 | |
367 | return 0; | |
368 | } | |
369 | ||
370 | static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
371 | { | |
372 | struct platform_device *pdev = to_platform_device(dev); | |
373 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | |
374 | unsigned int tmp; | |
375 | int year; | |
376 | ||
377 | spin_lock_irq(&rtc->lock); | |
378 | ||
379 | /* Reset pre-scaler & stop RTC */ | |
380 | tmp = readb(rtc->regbase + RCR2); | |
381 | tmp |= RCR2_RESET; | |
699bc661 | 382 | tmp &= ~RCR2_START; |
317a6104 PM |
383 | writeb(tmp, rtc->regbase + RCR2); |
384 | ||
fe20ba70 AB |
385 | writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT); |
386 | writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT); | |
387 | writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT); | |
388 | writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT); | |
389 | writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT); | |
390 | writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT); | |
317a6104 | 391 | |
ad89f87a | 392 | if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) { |
fe20ba70 AB |
393 | year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) | |
394 | bin2bcd(tm->tm_year % 100); | |
ad89f87a PM |
395 | writew(year, rtc->regbase + RYRCNT); |
396 | } else { | |
397 | year = tm->tm_year % 100; | |
fe20ba70 | 398 | writeb(bin2bcd(year), rtc->regbase + RYRCNT); |
ad89f87a | 399 | } |
317a6104 PM |
400 | |
401 | /* Start RTC */ | |
402 | tmp = readb(rtc->regbase + RCR2); | |
403 | tmp &= ~RCR2_RESET; | |
404 | tmp |= RCR2_RTCEN | RCR2_START; | |
405 | writeb(tmp, rtc->regbase + RCR2); | |
406 | ||
407 | spin_unlock_irq(&rtc->lock); | |
408 | ||
409 | return 0; | |
410 | } | |
411 | ||
1b73e6ae JL |
412 | static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off) |
413 | { | |
414 | unsigned int byte; | |
415 | int value = 0xff; /* return 0xff for ignored values */ | |
416 | ||
417 | byte = readb(rtc->regbase + reg_off); | |
418 | if (byte & AR_ENB) { | |
419 | byte &= ~AR_ENB; /* strip the enable bit */ | |
fe20ba70 | 420 | value = bcd2bin(byte); |
1b73e6ae JL |
421 | } |
422 | ||
423 | return value; | |
424 | } | |
425 | ||
426 | static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) | |
427 | { | |
428 | struct platform_device *pdev = to_platform_device(dev); | |
429 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | |
b420b1a7 | 430 | struct rtc_time *tm = &wkalrm->time; |
1b73e6ae JL |
431 | |
432 | spin_lock_irq(&rtc->lock); | |
433 | ||
434 | tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR); | |
435 | tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR); | |
436 | tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR); | |
437 | tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR); | |
438 | tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR); | |
439 | tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR); | |
440 | if (tm->tm_mon > 0) | |
441 | tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */ | |
442 | tm->tm_year = 0xffff; | |
443 | ||
0d103e90 DB |
444 | wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0; |
445 | ||
1b73e6ae JL |
446 | spin_unlock_irq(&rtc->lock); |
447 | ||
448 | return 0; | |
449 | } | |
450 | ||
451 | static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc, | |
452 | int value, int reg_off) | |
453 | { | |
454 | /* < 0 for a value that is ignored */ | |
455 | if (value < 0) | |
456 | writeb(0, rtc->regbase + reg_off); | |
457 | else | |
fe20ba70 | 458 | writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off); |
1b73e6ae JL |
459 | } |
460 | ||
b420b1a7 | 461 | static int sh_rtc_check_alarm(struct rtc_time *tm) |
1b73e6ae JL |
462 | { |
463 | /* | |
464 | * The original rtc says anything > 0xc0 is "don't care" or "match | |
465 | * all" - most users use 0xff but rtc-dev uses -1 for the same thing. | |
466 | * The original rtc doesn't support years - some things use -1 and | |
467 | * some 0xffff. We use -1 to make out tests easier. | |
468 | */ | |
469 | if (tm->tm_year == 0xffff) | |
470 | tm->tm_year = -1; | |
471 | if (tm->tm_mon >= 0xff) | |
472 | tm->tm_mon = -1; | |
473 | if (tm->tm_mday >= 0xff) | |
474 | tm->tm_mday = -1; | |
475 | if (tm->tm_wday >= 0xff) | |
476 | tm->tm_wday = -1; | |
477 | if (tm->tm_hour >= 0xff) | |
478 | tm->tm_hour = -1; | |
479 | if (tm->tm_min >= 0xff) | |
480 | tm->tm_min = -1; | |
481 | if (tm->tm_sec >= 0xff) | |
482 | tm->tm_sec = -1; | |
483 | ||
484 | if (tm->tm_year > 9999 || | |
485 | tm->tm_mon >= 12 || | |
486 | tm->tm_mday == 0 || tm->tm_mday >= 32 || | |
487 | tm->tm_wday >= 7 || | |
488 | tm->tm_hour >= 24 || | |
489 | tm->tm_min >= 60 || | |
490 | tm->tm_sec >= 60) | |
491 | return -EINVAL; | |
492 | ||
493 | return 0; | |
494 | } | |
495 | ||
496 | static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) | |
497 | { | |
498 | struct platform_device *pdev = to_platform_device(dev); | |
499 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | |
500 | unsigned int rcr1; | |
501 | struct rtc_time *tm = &wkalrm->time; | |
502 | int mon, err; | |
503 | ||
504 | err = sh_rtc_check_alarm(tm); | |
505 | if (unlikely(err < 0)) | |
506 | return err; | |
507 | ||
508 | spin_lock_irq(&rtc->lock); | |
509 | ||
15c945c3 | 510 | /* disable alarm interrupt and clear the alarm flag */ |
1b73e6ae | 511 | rcr1 = readb(rtc->regbase + RCR1); |
b420b1a7 | 512 | rcr1 &= ~(RCR1_AF | RCR1_AIE); |
15c945c3 | 513 | writeb(rcr1, rtc->regbase + RCR1); |
1b73e6ae | 514 | |
1b73e6ae JL |
515 | /* set alarm time */ |
516 | sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR); | |
517 | sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR); | |
518 | sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR); | |
519 | sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR); | |
520 | sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR); | |
521 | mon = tm->tm_mon; | |
522 | if (mon >= 0) | |
523 | mon += 1; | |
524 | sh_rtc_write_alarm_value(rtc, mon, RMONAR); | |
525 | ||
15c945c3 JL |
526 | if (wkalrm->enabled) { |
527 | rcr1 |= RCR1_AIE; | |
528 | writeb(rcr1, rtc->regbase + RCR1); | |
529 | } | |
1b73e6ae JL |
530 | |
531 | spin_unlock_irq(&rtc->lock); | |
532 | ||
533 | return 0; | |
534 | } | |
535 | ||
b420b1a7 AC |
536 | static int sh_rtc_irq_set_state(struct device *dev, int enabled) |
537 | { | |
538 | struct platform_device *pdev = to_platform_device(dev); | |
539 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | |
540 | ||
541 | if (enabled) { | |
542 | rtc->periodic_freq |= PF_KOU; | |
543 | return sh_rtc_ioctl(dev, RTC_PIE_ON, 0); | |
544 | } else { | |
545 | rtc->periodic_freq &= ~PF_KOU; | |
546 | return sh_rtc_ioctl(dev, RTC_PIE_OFF, 0); | |
547 | } | |
548 | } | |
549 | ||
550 | static int sh_rtc_irq_set_freq(struct device *dev, int freq) | |
551 | { | |
552 | return sh_rtc_ioctl(dev, RTC_IRQP_SET, freq); | |
553 | } | |
554 | ||
317a6104 | 555 | static struct rtc_class_ops sh_rtc_ops = { |
317a6104 PM |
556 | .ioctl = sh_rtc_ioctl, |
557 | .read_time = sh_rtc_read_time, | |
558 | .set_time = sh_rtc_set_time, | |
1b73e6ae JL |
559 | .read_alarm = sh_rtc_read_alarm, |
560 | .set_alarm = sh_rtc_set_alarm, | |
b420b1a7 AC |
561 | .irq_set_state = sh_rtc_irq_set_state, |
562 | .irq_set_freq = sh_rtc_irq_set_freq, | |
317a6104 PM |
563 | .proc = sh_rtc_proc, |
564 | }; | |
565 | ||
566 | static int __devinit sh_rtc_probe(struct platform_device *pdev) | |
567 | { | |
568 | struct sh_rtc *rtc; | |
569 | struct resource *res; | |
b420b1a7 | 570 | unsigned int tmp; |
2641dc92 | 571 | int ret; |
317a6104 PM |
572 | |
573 | rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL); | |
574 | if (unlikely(!rtc)) | |
575 | return -ENOMEM; | |
576 | ||
577 | spin_lock_init(&rtc->lock); | |
578 | ||
b420b1a7 | 579 | /* get periodic/carry/alarm irqs */ |
2641dc92 | 580 | ret = platform_get_irq(pdev, 0); |
581 | if (unlikely(ret < 0)) { | |
582 | ret = -ENOENT; | |
317a6104 PM |
583 | dev_err(&pdev->dev, "No IRQ for period\n"); |
584 | goto err_badres; | |
585 | } | |
2641dc92 | 586 | rtc->periodic_irq = ret; |
317a6104 | 587 | |
2641dc92 | 588 | ret = platform_get_irq(pdev, 1); |
589 | if (unlikely(ret < 0)) { | |
590 | ret = -ENOENT; | |
317a6104 PM |
591 | dev_err(&pdev->dev, "No IRQ for carry\n"); |
592 | goto err_badres; | |
593 | } | |
2641dc92 | 594 | rtc->carry_irq = ret; |
317a6104 | 595 | |
2641dc92 | 596 | ret = platform_get_irq(pdev, 2); |
597 | if (unlikely(ret < 0)) { | |
598 | ret = -ENOENT; | |
317a6104 PM |
599 | dev_err(&pdev->dev, "No IRQ for alarm\n"); |
600 | goto err_badres; | |
601 | } | |
2641dc92 | 602 | rtc->alarm_irq = ret; |
317a6104 PM |
603 | |
604 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
605 | if (unlikely(res == NULL)) { | |
2641dc92 | 606 | ret = -ENOENT; |
317a6104 PM |
607 | dev_err(&pdev->dev, "No IO resource\n"); |
608 | goto err_badres; | |
609 | } | |
610 | ||
611 | rtc->regsize = res->end - res->start + 1; | |
612 | ||
613 | rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name); | |
614 | if (unlikely(!rtc->res)) { | |
615 | ret = -EBUSY; | |
616 | goto err_badres; | |
617 | } | |
618 | ||
0305794c | 619 | rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize); |
317a6104 PM |
620 | if (unlikely(!rtc->regbase)) { |
621 | ret = -EINVAL; | |
622 | goto err_badmap; | |
623 | } | |
624 | ||
625 | rtc->rtc_dev = rtc_device_register("sh", &pdev->dev, | |
626 | &sh_rtc_ops, THIS_MODULE); | |
29dd0dae | 627 | if (IS_ERR(rtc->rtc_dev)) { |
317a6104 | 628 | ret = PTR_ERR(rtc->rtc_dev); |
0305794c | 629 | goto err_unmap; |
317a6104 PM |
630 | } |
631 | ||
ad89f87a PM |
632 | rtc->capabilities = RTC_DEF_CAPABILITIES; |
633 | if (pdev->dev.platform_data) { | |
634 | struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data; | |
635 | ||
636 | /* | |
637 | * Some CPUs have special capabilities in addition to the | |
638 | * default set. Add those in here. | |
639 | */ | |
640 | rtc->capabilities |= pinfo->capabilities; | |
641 | } | |
642 | ||
b420b1a7 AC |
643 | rtc->rtc_dev->max_user_freq = 256; |
644 | rtc->rtc_dev->irq_freq = 1; | |
645 | rtc->periodic_freq = 0x60; | |
646 | ||
317a6104 PM |
647 | platform_set_drvdata(pdev, rtc); |
648 | ||
b420b1a7 AC |
649 | /* register periodic/carry/alarm irqs */ |
650 | ret = request_irq(rtc->periodic_irq, sh_rtc_periodic, IRQF_DISABLED, | |
651 | "sh-rtc period", rtc); | |
652 | if (unlikely(ret)) { | |
653 | dev_err(&pdev->dev, | |
654 | "request period IRQ failed with %d, IRQ %d\n", ret, | |
655 | rtc->periodic_irq); | |
0305794c | 656 | goto err_unmap; |
b420b1a7 AC |
657 | } |
658 | ||
659 | ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED, | |
660 | "sh-rtc carry", rtc); | |
661 | if (unlikely(ret)) { | |
662 | dev_err(&pdev->dev, | |
663 | "request carry IRQ failed with %d, IRQ %d\n", ret, | |
664 | rtc->carry_irq); | |
665 | free_irq(rtc->periodic_irq, rtc); | |
0305794c | 666 | goto err_unmap; |
b420b1a7 AC |
667 | } |
668 | ||
669 | ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED, | |
670 | "sh-rtc alarm", rtc); | |
671 | if (unlikely(ret)) { | |
672 | dev_err(&pdev->dev, | |
673 | "request alarm IRQ failed with %d, IRQ %d\n", ret, | |
674 | rtc->alarm_irq); | |
675 | free_irq(rtc->carry_irq, rtc); | |
676 | free_irq(rtc->periodic_irq, rtc); | |
0305794c | 677 | goto err_unmap; |
b420b1a7 AC |
678 | } |
679 | ||
680 | tmp = readb(rtc->regbase + RCR1); | |
681 | tmp &= ~RCR1_CF; | |
682 | tmp |= RCR1_CIE; | |
683 | writeb(tmp, rtc->regbase + RCR1); | |
684 | ||
317a6104 PM |
685 | return 0; |
686 | ||
0305794c PM |
687 | err_unmap: |
688 | iounmap(rtc->regbase); | |
317a6104 PM |
689 | err_badmap: |
690 | release_resource(rtc->res); | |
691 | err_badres: | |
692 | kfree(rtc); | |
693 | ||
694 | return ret; | |
695 | } | |
696 | ||
697 | static int __devexit sh_rtc_remove(struct platform_device *pdev) | |
698 | { | |
699 | struct sh_rtc *rtc = platform_get_drvdata(pdev); | |
700 | ||
701 | if (likely(rtc->rtc_dev)) | |
702 | rtc_device_unregister(rtc->rtc_dev); | |
703 | ||
704 | sh_rtc_setpie(&pdev->dev, 0); | |
705 | sh_rtc_setaie(&pdev->dev, 0); | |
706 | ||
b420b1a7 AC |
707 | free_irq(rtc->carry_irq, rtc); |
708 | free_irq(rtc->periodic_irq, rtc); | |
709 | free_irq(rtc->alarm_irq, rtc); | |
710 | ||
317a6104 PM |
711 | release_resource(rtc->res); |
712 | ||
0305794c PM |
713 | iounmap(rtc->regbase); |
714 | ||
317a6104 PM |
715 | platform_set_drvdata(pdev, NULL); |
716 | ||
717 | kfree(rtc); | |
718 | ||
719 | return 0; | |
720 | } | |
721 | static struct platform_driver sh_rtc_platform_driver = { | |
722 | .driver = { | |
1b73e6ae | 723 | .name = DRV_NAME, |
317a6104 PM |
724 | .owner = THIS_MODULE, |
725 | }, | |
726 | .probe = sh_rtc_probe, | |
727 | .remove = __devexit_p(sh_rtc_remove), | |
728 | }; | |
729 | ||
730 | static int __init sh_rtc_init(void) | |
731 | { | |
732 | return platform_driver_register(&sh_rtc_platform_driver); | |
733 | } | |
734 | ||
735 | static void __exit sh_rtc_exit(void) | |
736 | { | |
737 | platform_driver_unregister(&sh_rtc_platform_driver); | |
738 | } | |
739 | ||
740 | module_init(sh_rtc_init); | |
741 | module_exit(sh_rtc_exit); | |
742 | ||
743 | MODULE_DESCRIPTION("SuperH on-chip RTC driver"); | |
1b73e6ae | 744 | MODULE_VERSION(DRV_VERSION); |
b420b1a7 AC |
745 | MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, " |
746 | "Jamie Lenehan <lenehan@twibble.org>, " | |
747 | "Angelo Castello <angelo.castello@st.com>"); | |
317a6104 | 748 | MODULE_LICENSE("GPL"); |
ad28a07b | 749 | MODULE_ALIAS("platform:" DRV_NAME); |