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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
[linux-2.6-block.git] / drivers / rtc / rtc-sh.c
CommitLineData
317a6104
PM		 1/*
2 * SuperH On-Chip RTC Support
3 *
b420b1a7 4 * Copyright (C) 2006, 2007, 2008 Paul Mundt
1b73e6ae 5 * Copyright (C) 2006 Jamie Lenehan
b420b1a7 6 * Copyright (C) 2008 Angelo Castello
317a6104
PM		 7 *
8 * Based on the old arch/sh/kernel/cpu/rtc.c by:
9 *
10 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
11 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
12 *
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
15 * for more details.
16 */
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/bcd.h>
20#include <linux/rtc.h>
21#include <linux/init.h>
22#include <linux/platform_device.h>
23#include <linux/seq_file.h>
24#include <linux/interrupt.h>
25#include <linux/spinlock.h>
31ccb081 26#include <linux/io.h>
5d2a5037 27#include <linux/log2.h>
ad89f87a 28#include <asm/rtc.h>
317a6104 29
1b73e6ae 30#define DRV_NAME "sh-rtc"
e26b926a 31#define DRV_VERSION "0.2.1"
317a6104
PM		 32
33#define RTC_REG(r) ((r) * rtc_reg_size)
34
31ccb081 35#define R64CNT RTC_REG(0)
1b73e6ae
JL		 36
37#define RSECCNT RTC_REG(1) /* RTC sec */
38#define RMINCNT RTC_REG(2) /* RTC min */
39#define RHRCNT RTC_REG(3) /* RTC hour */
40#define RWKCNT RTC_REG(4) /* RTC week */
41#define RDAYCNT RTC_REG(5) /* RTC day */
42#define RMONCNT RTC_REG(6) /* RTC month */
43#define RYRCNT RTC_REG(7) /* RTC year */
44#define RSECAR RTC_REG(8) /* ALARM sec */
45#define RMINAR RTC_REG(9) /* ALARM min */
46#define RHRAR RTC_REG(10) /* ALARM hour */
47#define RWKAR RTC_REG(11) /* ALARM week */
48#define RDAYAR RTC_REG(12) /* ALARM day */
49#define RMONAR RTC_REG(13) /* ALARM month */
50#define RCR1 RTC_REG(14) /* Control */
51#define RCR2 RTC_REG(15) /* Control */
52
ff1b7506
PM		 53/*
54 * Note on RYRAR and RCR3: Up until this point most of the register
55 * definitions are consistent across all of the available parts. However,
56 * the placement of the optional RYRAR and RCR3 (the RYRAR control
57 * register used to control RYRCNT/RYRAR compare) varies considerably
58 * across various parts, occasionally being mapped in to a completely
59 * unrelated address space. For proper RYRAR support a separate resource
60 * would have to be handed off, but as this is purely optional in
61 * practice, we simply opt not to support it, thereby keeping the code
62 * quite a bit more simplified.
63 */
64
1b73e6ae
JL		 65/* ALARM Bits - or with BCD encoded value */
66#define AR_ENB 0x80 /* Enable for alarm cmp */
317a6104 67
b420b1a7
AC		 68/* Period Bits */
69#define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
70#define PF_COUNT 0x200 /* Half periodic counter */
71#define PF_OXS 0x400 /* Periodic One x Second */
72#define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
73#define PF_MASK 0xf00
74
317a6104
PM		 75/* RCR1 Bits */
76#define RCR1_CF 0x80 /* Carry Flag */
77#define RCR1_CIE 0x10 /* Carry Interrupt Enable */
78#define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
79#define RCR1_AF 0x01 /* Alarm Flag */
80
81/* RCR2 Bits */
82#define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
83#define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
84#define RCR2_RTCEN 0x08 /* ENable RTC */
85#define RCR2_ADJ 0x04 /* ADJustment (30-second) */
86#define RCR2_RESET 0x02 /* Reset bit */
87#define RCR2_START 0x01 /* Start bit */
88
89struct sh_rtc {
90 void __iomem *regbase;
91 unsigned long regsize;
92 struct resource *res;
2fac6674
AV		 93 int alarm_irq;
94 int periodic_irq;
95 int carry_irq;
317a6104
PM		 96 struct rtc_device *rtc_dev;
97 spinlock_t lock;
ad89f87a 98 unsigned long capabilities; /* See asm-sh/rtc.h for cap bits */
b420b1a7 99 unsigned short periodic_freq;
317a6104
PM		 100};
101
5e084a15 102static int __sh_rtc_interrupt(struct sh_rtc *rtc)
317a6104 103{
5e084a15 104 unsigned int tmp, pending;
317a6104
PM		 105
106 tmp = readb(rtc->regbase + RCR1);
5e084a15 107 pending = tmp & RCR1_CF;
1b73e6ae 108 tmp &= ~RCR1_CF;
317a6104
PM		 109 writeb(tmp, rtc->regbase + RCR1);
110
b420b1a7 111 /* Users have requested One x Second IRQ */
5e084a15 112 if (pending && rtc->periodic_freq & PF_OXS)
b420b1a7 113 rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
317a6104 114
5e084a15 115 return pending;
317a6104
PM		 116}
117
5e084a15 118static int __sh_rtc_alarm(struct sh_rtc *rtc)
1b73e6ae 119{
5e084a15 120 unsigned int tmp, pending;
1b73e6ae
JL		 121
122 tmp = readb(rtc->regbase + RCR1);
5e084a15 123 pending = tmp & RCR1_AF;
b420b1a7 124 tmp &= ~(RCR1_AF | RCR1_AIE);
5e084a15 125 writeb(tmp, rtc->regbase + RCR1);
1b73e6ae 126
5e084a15
MD		 127 if (pending)
128 rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
b420b1a7 129
5e084a15 130 return pending;
1b73e6ae
JL		 131}
132
5e084a15 133static int __sh_rtc_periodic(struct sh_rtc *rtc)
317a6104 134{
b420b1a7 135 struct rtc_device *rtc_dev = rtc->rtc_dev;
5e084a15
MD		 136 struct rtc_task *irq_task;
137 unsigned int tmp, pending;
317a6104 138
b420b1a7 139 tmp = readb(rtc->regbase + RCR2);
5e084a15 140 pending = tmp & RCR2_PEF;
b420b1a7
AC		 141 tmp &= ~RCR2_PEF;
142 writeb(tmp, rtc->regbase + RCR2);
143
5e084a15
MD		 144 if (!pending)
145 return 0;
146
b420b1a7
AC		 147 /* Half period enabled than one skipped and the next notified */
148 if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
149 rtc->periodic_freq &= ~PF_COUNT;
150 else {
151 if (rtc->periodic_freq & PF_HP)
152 rtc->periodic_freq |= PF_COUNT;
153 if (rtc->periodic_freq & PF_KOU) {
154 spin_lock(&rtc_dev->irq_task_lock);
5e084a15
MD		 155 irq_task = rtc_dev->irq_task;
156 if (irq_task)
157 irq_task->func(irq_task->private_data);
b420b1a7
AC		 158 spin_unlock(&rtc_dev->irq_task_lock);
159 } else
160 rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
161 }
317a6104 162
5e084a15
MD		 163 return pending;
164}
165
166static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
167{
168 struct sh_rtc *rtc = dev_id;
169 int ret;
170
171 spin_lock(&rtc->lock);
172 ret = __sh_rtc_interrupt(rtc);
173 spin_unlock(&rtc->lock);
174
175 return IRQ_RETVAL(ret);
176}
177
178static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
179{
180 struct sh_rtc *rtc = dev_id;
181 int ret;
182
183 spin_lock(&rtc->lock);
184 ret = __sh_rtc_alarm(rtc);
185 spin_unlock(&rtc->lock);
186
187 return IRQ_RETVAL(ret);
188}
189
190static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
191{
192 struct sh_rtc *rtc = dev_id;
193 int ret;
194
195 spin_lock(&rtc->lock);
196 ret = __sh_rtc_periodic(rtc);
317a6104
PM		 197 spin_unlock(&rtc->lock);
198
5e084a15
MD		 199 return IRQ_RETVAL(ret);
200}
201
202static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
203{
204 struct sh_rtc *rtc = dev_id;
205 int ret;
206
207 spin_lock(&rtc->lock);
208 ret = __sh_rtc_interrupt(rtc);
209 ret |= __sh_rtc_alarm(rtc);
210 ret |= __sh_rtc_periodic(rtc);
211 spin_unlock(&rtc->lock);
212
213 return IRQ_RETVAL(ret);
317a6104
PM		 214}
215
216static inline void sh_rtc_setpie(struct device *dev, unsigned int enable)
217{
218 struct sh_rtc *rtc = dev_get_drvdata(dev);
219 unsigned int tmp;
220
221 spin_lock_irq(&rtc->lock);
222
223 tmp = readb(rtc->regbase + RCR2);
224
225 if (enable) {
b420b1a7
AC		 226 tmp &= ~RCR2_PEF; /* Clear PES bit */
227 tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
317a6104
PM		 228 } else
229 tmp &= ~(RCR2_PESMASK | RCR2_PEF);
230
231 writeb(tmp, rtc->regbase + RCR2);
232
233 spin_unlock_irq(&rtc->lock);
234}
235
b420b1a7 236static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq)
317a6104
PM		 237{
238 struct sh_rtc *rtc = dev_get_drvdata(dev);
b420b1a7 239 int tmp, ret = 0;
317a6104
PM		 240
241 spin_lock_irq(&rtc->lock);
b420b1a7 242 tmp = rtc->periodic_freq & PF_MASK;
317a6104 243
b420b1a7
AC		 244 switch (freq) {
245 case 0:
246 rtc->periodic_freq = 0x00;
247 break;
248 case 1:
249 rtc->periodic_freq = 0x60;
250 break;
251 case 2:
252 rtc->periodic_freq = 0x50;
253 break;
254 case 4:
255 rtc->periodic_freq = 0x40;
256 break;
257 case 8:
258 rtc->periodic_freq = 0x30 | PF_HP;
259 break;
260 case 16:
261 rtc->periodic_freq = 0x30;
262 break;
263 case 32:
264 rtc->periodic_freq = 0x20 | PF_HP;
265 break;
266 case 64:
267 rtc->periodic_freq = 0x20;
268 break;
269 case 128:
270 rtc->periodic_freq = 0x10 | PF_HP;
271 break;
272 case 256:
273 rtc->periodic_freq = 0x10;
274 break;
275 default:
276 ret = -ENOTSUPP;
277 }
317a6104 278
b420b1a7
AC		 279 if (ret == 0) {
280 rtc->periodic_freq |= tmp;
281 rtc->rtc_dev->irq_freq = freq;
282 }
317a6104
PM		 283
284 spin_unlock_irq(&rtc->lock);
b420b1a7 285 return ret;
317a6104
PM		 286}
287
b420b1a7 288static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
317a6104
PM		 289{
290 struct sh_rtc *rtc = dev_get_drvdata(dev);
291 unsigned int tmp;
317a6104 292
b420b1a7 293 spin_lock_irq(&rtc->lock);
317a6104 294
b420b1a7 295 tmp = readb(rtc->regbase + RCR1);
317a6104 296
b420b1a7
AC		 297 if (!enable)
298 tmp &= ~RCR1_AIE;
299 else
300 tmp |= RCR1_AIE;
317a6104 301
b420b1a7 302 writeb(tmp, rtc->regbase + RCR1);
317a6104 303
b420b1a7 304 spin_unlock_irq(&rtc->lock);
317a6104
PM		 305}
306
317a6104
PM		 307static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
308{
309 struct sh_rtc *rtc = dev_get_drvdata(dev);
310 unsigned int tmp;
311
312 tmp = readb(rtc->regbase + RCR1);
b420b1a7 313 seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
317a6104
PM		 314
315 tmp = readb(rtc->regbase + RCR2);
316 seq_printf(seq, "periodic_IRQ\t: %s\n",
b420b1a7 317 (tmp & RCR2_PESMASK) ? "yes" : "no");
317a6104
PM		 318
319 return 0;
320}
321
9cd88b90
MD		 322static inline void sh_rtc_setcie(struct device *dev, unsigned int enable)
323{
324 struct sh_rtc *rtc = dev_get_drvdata(dev);
325 unsigned int tmp;
326
327 spin_lock_irq(&rtc->lock);
328
329 tmp = readb(rtc->regbase + RCR1);
330
331 if (!enable)
332 tmp &= ~RCR1_CIE;
333 else
334 tmp |= RCR1_CIE;
335
336 writeb(tmp, rtc->regbase + RCR1);
337
338 spin_unlock_irq(&rtc->lock);
339}
340
317a6104
PM		 341static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
342{
b420b1a7
AC		 343 struct sh_rtc *rtc = dev_get_drvdata(dev);
344 unsigned int ret = 0;
317a6104
PM		 345
346 switch (cmd) {
347 case RTC_PIE_OFF:
348 case RTC_PIE_ON:
349 sh_rtc_setpie(dev, cmd == RTC_PIE_ON);
317a6104
PM		 350 break;
351 case RTC_AIE_OFF:
352 case RTC_AIE_ON:
353 sh_rtc_setaie(dev, cmd == RTC_AIE_ON);
317a6104 354 break;
b420b1a7
AC		 355 case RTC_UIE_OFF:
356 rtc->periodic_freq &= ~PF_OXS;
9cd88b90 357 sh_rtc_setcie(dev, 0);
b420b1a7
AC		 358 break;
359 case RTC_UIE_ON:
360 rtc->periodic_freq |= PF_OXS;
9cd88b90 361 sh_rtc_setcie(dev, 1);
b420b1a7
AC		 362 break;
363 case RTC_IRQP_READ:
364 ret = put_user(rtc->rtc_dev->irq_freq,
365 (unsigned long __user *)arg);
366 break;
367 case RTC_IRQP_SET:
368 ret = sh_rtc_setfreq(dev, arg);
369 break;
370 default:
371 ret = -ENOIOCTLCMD;
317a6104
PM		 372 }
373
374 return ret;
375}
376
377static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
378{
379 struct platform_device *pdev = to_platform_device(dev);
380 struct sh_rtc *rtc = platform_get_drvdata(pdev);
381 unsigned int sec128, sec2, yr, yr100, cf_bit;
382
383 do {
384 unsigned int tmp;
385
386 spin_lock_irq(&rtc->lock);
387
388 tmp = readb(rtc->regbase + RCR1);
389 tmp &= ~RCR1_CF; /* Clear CF-bit */
390 tmp |= RCR1_CIE;
391 writeb(tmp, rtc->regbase + RCR1);
392
393 sec128 = readb(rtc->regbase + R64CNT);
394
fe20ba70
AB		 395 tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT));
396 tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT));
397 tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT));
398 tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT));
399 tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT));
400 tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
317a6104 401
ad89f87a
PM		 402 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
403 yr = readw(rtc->regbase + RYRCNT);
fe20ba70 404 yr100 = bcd2bin(yr >> 8);
ad89f87a
PM		 405 yr &= 0xff;
406 } else {
407 yr = readb(rtc->regbase + RYRCNT);
fe20ba70 408 yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
ad89f87a 409 }
317a6104 410
fe20ba70 411 tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
317a6104
PM		 412
413 sec2 = readb(rtc->regbase + R64CNT);
414 cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
415
416 spin_unlock_irq(&rtc->lock);
417 } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
418
419#if RTC_BIT_INVERTED != 0
420 if ((sec128 & RTC_BIT_INVERTED))
421 tm->tm_sec--;
422#endif
423
9cd88b90
MD		 424 /* only keep the carry interrupt enabled if UIE is on */
425 if (!(rtc->periodic_freq & PF_OXS))
426 sh_rtc_setcie(dev, 0);
427
435c55d1 428 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
317a6104 429 "mday=%d, mon=%d, year=%d, wday=%d\n",
2a4e2b87 430 __func__,
317a6104 431 tm->tm_sec, tm->tm_min, tm->tm_hour,
a1614796 432 tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
317a6104 433
edf22477 434 return rtc_valid_tm(tm);
317a6104
PM		 435}
436
437static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
438{
439 struct platform_device *pdev = to_platform_device(dev);
440 struct sh_rtc *rtc = platform_get_drvdata(pdev);
441 unsigned int tmp;
442 int year;
443
444 spin_lock_irq(&rtc->lock);
445
446 /* Reset pre-scaler & stop RTC */
447 tmp = readb(rtc->regbase + RCR2);
448 tmp |= RCR2_RESET;
699bc661 449 tmp &= ~RCR2_START;
317a6104
PM		 450 writeb(tmp, rtc->regbase + RCR2);
451
fe20ba70
AB		 452 writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT);
453 writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT);
454 writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
455 writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
456 writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
457 writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
317a6104 458
ad89f87a 459 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
fe20ba70
AB		 460 year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
461 bin2bcd(tm->tm_year % 100);
ad89f87a
PM		 462 writew(year, rtc->regbase + RYRCNT);
463 } else {
464 year = tm->tm_year % 100;
fe20ba70 465 writeb(bin2bcd(year), rtc->regbase + RYRCNT);
ad89f87a 466 }
317a6104
PM		 467
468 /* Start RTC */
469 tmp = readb(rtc->regbase + RCR2);
470 tmp &= ~RCR2_RESET;
471 tmp |= RCR2_RTCEN | RCR2_START;
472 writeb(tmp, rtc->regbase + RCR2);
473
474 spin_unlock_irq(&rtc->lock);
475
476 return 0;
477}
478
1b73e6ae
JL		 479static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
480{
481 unsigned int byte;
482 int value = 0xff; /* return 0xff for ignored values */
483
484 byte = readb(rtc->regbase + reg_off);
485 if (byte & AR_ENB) {
486 byte &= ~AR_ENB; /* strip the enable bit */
fe20ba70 487 value = bcd2bin(byte);
1b73e6ae
JL		 488 }
489
490 return value;
491}
492
493static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
494{
495 struct platform_device *pdev = to_platform_device(dev);
496 struct sh_rtc *rtc = platform_get_drvdata(pdev);
b420b1a7 497 struct rtc_time *tm = &wkalrm->time;
1b73e6ae
JL		 498
499 spin_lock_irq(&rtc->lock);
500
501 tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
502 tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
503 tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
504 tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
505 tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
506 tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
507 if (tm->tm_mon > 0)
508 tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
509 tm->tm_year = 0xffff;
510
0d103e90
DB		 511 wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
512
1b73e6ae
JL		 513 spin_unlock_irq(&rtc->lock);
514
515 return 0;
516}
517
518static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
519 int value, int reg_off)
520{
521 /* < 0 for a value that is ignored */
522 if (value < 0)
523 writeb(0, rtc->regbase + reg_off);
524 else
fe20ba70 525 writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
1b73e6ae
JL		 526}
527
b420b1a7 528static int sh_rtc_check_alarm(struct rtc_time *tm)
1b73e6ae
JL		 529{
530 /*
531 * The original rtc says anything > 0xc0 is "don't care" or "match
532 * all" - most users use 0xff but rtc-dev uses -1 for the same thing.
533 * The original rtc doesn't support years - some things use -1 and
534 * some 0xffff. We use -1 to make out tests easier.
535 */
536 if (tm->tm_year == 0xffff)
537 tm->tm_year = -1;
538 if (tm->tm_mon >= 0xff)
539 tm->tm_mon = -1;
540 if (tm->tm_mday >= 0xff)
541 tm->tm_mday = -1;
542 if (tm->tm_wday >= 0xff)
543 tm->tm_wday = -1;
544 if (tm->tm_hour >= 0xff)
545 tm->tm_hour = -1;
546 if (tm->tm_min >= 0xff)
547 tm->tm_min = -1;
548 if (tm->tm_sec >= 0xff)
549 tm->tm_sec = -1;
550
551 if (tm->tm_year > 9999 ||
552 tm->tm_mon >= 12 ||
553 tm->tm_mday == 0 || tm->tm_mday >= 32 ||
554 tm->tm_wday >= 7 ||
555 tm->tm_hour >= 24 ||
556 tm->tm_min >= 60 ||
557 tm->tm_sec >= 60)
558 return -EINVAL;
559
560 return 0;
561}
562
563static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
564{
565 struct platform_device *pdev = to_platform_device(dev);
566 struct sh_rtc *rtc = platform_get_drvdata(pdev);
567 unsigned int rcr1;
568 struct rtc_time *tm = &wkalrm->time;
569 int mon, err;
570
571 err = sh_rtc_check_alarm(tm);
572 if (unlikely(err < 0))
573 return err;
574
575 spin_lock_irq(&rtc->lock);
576
15c945c3 577 /* disable alarm interrupt and clear the alarm flag */
1b73e6ae 578 rcr1 = readb(rtc->regbase + RCR1);
b420b1a7 579 rcr1 &= ~(RCR1_AF | RCR1_AIE);
15c945c3 580 writeb(rcr1, rtc->regbase + RCR1);
1b73e6ae 581
1b73e6ae
JL		 582 /* set alarm time */
583 sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
584 sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
585 sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
586 sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
587 sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
588 mon = tm->tm_mon;
589 if (mon >= 0)
590 mon += 1;
591 sh_rtc_write_alarm_value(rtc, mon, RMONAR);
592
15c945c3
JL		 593 if (wkalrm->enabled) {
594 rcr1 |= RCR1_AIE;
595 writeb(rcr1, rtc->regbase + RCR1);
596 }
1b73e6ae
JL		 597
598 spin_unlock_irq(&rtc->lock);
599
600 return 0;
601}
602
b420b1a7
AC		 603static int sh_rtc_irq_set_state(struct device *dev, int enabled)
604{
605 struct platform_device *pdev = to_platform_device(dev);
606 struct sh_rtc *rtc = platform_get_drvdata(pdev);
607
608 if (enabled) {
609 rtc->periodic_freq |= PF_KOU;
610 return sh_rtc_ioctl(dev, RTC_PIE_ON, 0);
611 } else {
612 rtc->periodic_freq &= ~PF_KOU;
613 return sh_rtc_ioctl(dev, RTC_PIE_OFF, 0);
614 }
615}
616
617static int sh_rtc_irq_set_freq(struct device *dev, int freq)
618{
5d2a5037
JC		 619 if (!is_power_of_2(freq))
620 return -EINVAL;
b420b1a7
AC		 621 return sh_rtc_ioctl(dev, RTC_IRQP_SET, freq);
622}
623
317a6104 624static struct rtc_class_ops sh_rtc_ops = {
317a6104
PM		 625 .ioctl = sh_rtc_ioctl,
626 .read_time = sh_rtc_read_time,
627 .set_time = sh_rtc_set_time,
1b73e6ae
JL		 628 .read_alarm = sh_rtc_read_alarm,
629 .set_alarm = sh_rtc_set_alarm,
b420b1a7
AC		 630 .irq_set_state = sh_rtc_irq_set_state,
631 .irq_set_freq = sh_rtc_irq_set_freq,
317a6104
PM		 632 .proc = sh_rtc_proc,
633};
634
635static int __devinit sh_rtc_probe(struct platform_device *pdev)
636{
637 struct sh_rtc *rtc;
638 struct resource *res;
edf22477 639 struct rtc_time r;
2641dc92 640 int ret;
317a6104
PM		 641
642 rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL);
643 if (unlikely(!rtc))
644 return -ENOMEM;
645
646 spin_lock_init(&rtc->lock);
647
b420b1a7 648 /* get periodic/carry/alarm irqs */
2641dc92 649 ret = platform_get_irq(pdev, 0);
2fac6674 650 if (unlikely(ret <= 0)) {
2641dc92 651 ret = -ENOENT;
5e084a15 652 dev_err(&pdev->dev, "No IRQ resource\n");
317a6104
PM		 653 goto err_badres;
654 }
2641dc92 655 rtc->periodic_irq = ret;
5e084a15
MD		 656 rtc->carry_irq = platform_get_irq(pdev, 1);
657 rtc->alarm_irq = platform_get_irq(pdev, 2);
317a6104
PM		 658
659 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
660 if (unlikely(res == NULL)) {
2641dc92 661 ret = -ENOENT;
317a6104
PM		 662 dev_err(&pdev->dev, "No IO resource\n");
663 goto err_badres;
664 }
665
666 rtc->regsize = res->end - res->start + 1;
667
668 rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name);
669 if (unlikely(!rtc->res)) {
670 ret = -EBUSY;
671 goto err_badres;
672 }
673
0305794c 674 rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize);
317a6104
PM		 675 if (unlikely(!rtc->regbase)) {
676 ret = -EINVAL;
677 goto err_badmap;
678 }
679
680 rtc->rtc_dev = rtc_device_register("sh", &pdev->dev,
681 &sh_rtc_ops, THIS_MODULE);
29dd0dae 682 if (IS_ERR(rtc->rtc_dev)) {
317a6104 683 ret = PTR_ERR(rtc->rtc_dev);
0305794c 684 goto err_unmap;
317a6104
PM		 685 }
686
ad89f87a
PM		 687 rtc->capabilities = RTC_DEF_CAPABILITIES;
688 if (pdev->dev.platform_data) {
689 struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data;
690
691 /*
692 * Some CPUs have special capabilities in addition to the
693 * default set. Add those in here.
694 */
695 rtc->capabilities |= pinfo->capabilities;
696 }
697
b420b1a7 698 rtc->rtc_dev->max_user_freq = 256;
b420b1a7 699
317a6104
PM		 700 platform_set_drvdata(pdev, rtc);
701
5e084a15
MD		 702 if (rtc->carry_irq <= 0) {
703 /* register shared periodic/carry/alarm irq */
704 ret = request_irq(rtc->periodic_irq, sh_rtc_shared,
705 IRQF_DISABLED, "sh-rtc", rtc);
706 if (unlikely(ret)) {
707 dev_err(&pdev->dev,
708 "request IRQ failed with %d, IRQ %d\n", ret,
709 rtc->periodic_irq);
710 goto err_unmap;
711 }
712 } else {
713 /* register periodic/carry/alarm irqs */
714 ret = request_irq(rtc->periodic_irq, sh_rtc_periodic,
715 IRQF_DISABLED, "sh-rtc period", rtc);
716 if (unlikely(ret)) {
717 dev_err(&pdev->dev,
718 "request period IRQ failed with %d, IRQ %d\n",
719 ret, rtc->periodic_irq);
720 goto err_unmap;
721 }
b420b1a7 722
5e084a15
MD		 723 ret = request_irq(rtc->carry_irq, sh_rtc_interrupt,
724 IRQF_DISABLED, "sh-rtc carry", rtc);
725 if (unlikely(ret)) {
726 dev_err(&pdev->dev,
727 "request carry IRQ failed with %d, IRQ %d\n",
728 ret, rtc->carry_irq);
729 free_irq(rtc->periodic_irq, rtc);
730 goto err_unmap;
731 }
b420b1a7 732
5e084a15
MD		 733 ret = request_irq(rtc->alarm_irq, sh_rtc_alarm,
734 IRQF_DISABLED, "sh-rtc alarm", rtc);
735 if (unlikely(ret)) {
736 dev_err(&pdev->dev,
737 "request alarm IRQ failed with %d, IRQ %d\n",
738 ret, rtc->alarm_irq);
739 free_irq(rtc->carry_irq, rtc);
740 free_irq(rtc->periodic_irq, rtc);
741 goto err_unmap;
742 }
b420b1a7
AC		 743 }
744
9cd88b90
MD		 745 /* everything disabled by default */
746 rtc->periodic_freq = 0;
747 rtc->rtc_dev->irq_freq = 0;
748 sh_rtc_setpie(&pdev->dev, 0);
749 sh_rtc_setaie(&pdev->dev, 0);
750 sh_rtc_setcie(&pdev->dev, 0);
edf22477
MD		 751
752 /* reset rtc to epoch 0 if time is invalid */
753 if (rtc_read_time(rtc->rtc_dev, &r) < 0) {
754 rtc_time_to_tm(0, &r);
755 rtc_set_time(rtc->rtc_dev, &r);
756 }
757
7a8fe8e3 758 device_init_wakeup(&pdev->dev, 1);
317a6104
PM		 759 return 0;
760
0305794c
PM		 761err_unmap:
762 iounmap(rtc->regbase);
317a6104
PM		 763err_badmap:
764 release_resource(rtc->res);
765err_badres:
766 kfree(rtc);
767
768 return ret;
769}
770
771static int __devexit sh_rtc_remove(struct platform_device *pdev)
772{
773 struct sh_rtc *rtc = platform_get_drvdata(pdev);
774
775 if (likely(rtc->rtc_dev))
776 rtc_device_unregister(rtc->rtc_dev);
777
778 sh_rtc_setpie(&pdev->dev, 0);
779 sh_rtc_setaie(&pdev->dev, 0);
9cd88b90 780 sh_rtc_setcie(&pdev->dev, 0);
317a6104 781
b420b1a7 782 free_irq(rtc->periodic_irq, rtc);
5e084a15
MD		 783 if (rtc->carry_irq > 0) {
784 free_irq(rtc->carry_irq, rtc);
785 free_irq(rtc->alarm_irq, rtc);
786 }
b420b1a7 787
317a6104
PM		 788 release_resource(rtc->res);
789
0305794c
PM		 790 iounmap(rtc->regbase);
791
317a6104
PM		 792 platform_set_drvdata(pdev, NULL);
793
794 kfree(rtc);
795
796 return 0;
797}
faa9fa8e
MD		 798
799static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
800{
801 struct platform_device *pdev = to_platform_device(dev);
802 struct sh_rtc *rtc = platform_get_drvdata(pdev);
803
804 set_irq_wake(rtc->periodic_irq, enabled);
805 if (rtc->carry_irq > 0) {
806 set_irq_wake(rtc->carry_irq, enabled);
807 set_irq_wake(rtc->alarm_irq, enabled);
808 }
809
810}
811
812static int sh_rtc_suspend(struct device *dev)
813{
814 if (device_may_wakeup(dev))
815 sh_rtc_set_irq_wake(dev, 1);
816
817 return 0;
818}
819
820static int sh_rtc_resume(struct device *dev)
821{
822 if (device_may_wakeup(dev))
823 sh_rtc_set_irq_wake(dev, 0);
824
825 return 0;
826}
827
828static struct dev_pm_ops sh_rtc_dev_pm_ops = {
829 .suspend = sh_rtc_suspend,
830 .resume = sh_rtc_resume,
831};
832
317a6104
PM		 833static struct platform_driver sh_rtc_platform_driver = {
834 .driver = {
1b73e6ae 835 .name = DRV_NAME,
317a6104 836 .owner = THIS_MODULE,
faa9fa8e 837 .pm = &sh_rtc_dev_pm_ops,
317a6104
PM		 838 },
839 .probe = sh_rtc_probe,
840 .remove = __devexit_p(sh_rtc_remove),
841};
842
843static int __init sh_rtc_init(void)
844{
845 return platform_driver_register(&sh_rtc_platform_driver);
846}
847
848static void __exit sh_rtc_exit(void)
849{
850 platform_driver_unregister(&sh_rtc_platform_driver);
851}
852
853module_init(sh_rtc_init);
854module_exit(sh_rtc_exit);
855
856MODULE_DESCRIPTION("SuperH on-chip RTC driver");
1b73e6ae 857MODULE_VERSION(DRV_VERSION);
b420b1a7
AC		 858MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
859 "Jamie Lenehan <lenehan@twibble.org>, "
860 "Angelo Castello <angelo.castello@st.com>");
317a6104 861MODULE_LICENSE("GPL");
ad28a07b 862MODULE_ALIAS("platform:" DRV_NAME);
Linux 6.x block layer and io_uring tree(s)