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1 | /* |
2 | * Copyright (C) 2017 Spreadtrum Communications Inc. | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0 | |
5 | */ | |
6 | ||
7 | #include <linux/bitops.h> | |
8 | #include <linux/delay.h> | |
9 | #include <linux/err.h> | |
10 | #include <linux/module.h> | |
11 | #include <linux/of.h> | |
12 | #include <linux/platform_device.h> | |
13 | #include <linux/regmap.h> | |
14 | #include <linux/rtc.h> | |
15 | ||
16 | #define SPRD_RTC_SEC_CNT_VALUE 0x0 | |
17 | #define SPRD_RTC_MIN_CNT_VALUE 0x4 | |
18 | #define SPRD_RTC_HOUR_CNT_VALUE 0x8 | |
19 | #define SPRD_RTC_DAY_CNT_VALUE 0xc | |
20 | #define SPRD_RTC_SEC_CNT_UPD 0x10 | |
21 | #define SPRD_RTC_MIN_CNT_UPD 0x14 | |
22 | #define SPRD_RTC_HOUR_CNT_UPD 0x18 | |
23 | #define SPRD_RTC_DAY_CNT_UPD 0x1c | |
24 | #define SPRD_RTC_SEC_ALM_UPD 0x20 | |
25 | #define SPRD_RTC_MIN_ALM_UPD 0x24 | |
26 | #define SPRD_RTC_HOUR_ALM_UPD 0x28 | |
27 | #define SPRD_RTC_DAY_ALM_UPD 0x2c | |
28 | #define SPRD_RTC_INT_EN 0x30 | |
29 | #define SPRD_RTC_INT_RAW_STS 0x34 | |
30 | #define SPRD_RTC_INT_CLR 0x38 | |
31 | #define SPRD_RTC_INT_MASK_STS 0x3C | |
32 | #define SPRD_RTC_SEC_ALM_VALUE 0x40 | |
33 | #define SPRD_RTC_MIN_ALM_VALUE 0x44 | |
34 | #define SPRD_RTC_HOUR_ALM_VALUE 0x48 | |
35 | #define SPRD_RTC_DAY_ALM_VALUE 0x4c | |
36 | #define SPRD_RTC_SPG_VALUE 0x50 | |
37 | #define SPRD_RTC_SPG_UPD 0x54 | |
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38 | #define SPRD_RTC_PWR_CTRL 0x58 |
39 | #define SPRD_RTC_PWR_STS 0x5c | |
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40 | #define SPRD_RTC_SEC_AUXALM_UPD 0x60 |
41 | #define SPRD_RTC_MIN_AUXALM_UPD 0x64 | |
42 | #define SPRD_RTC_HOUR_AUXALM_UPD 0x68 | |
43 | #define SPRD_RTC_DAY_AUXALM_UPD 0x6c | |
44 | ||
45 | /* BIT & MASK definition for SPRD_RTC_INT_* registers */ | |
46 | #define SPRD_RTC_SEC_EN BIT(0) | |
47 | #define SPRD_RTC_MIN_EN BIT(1) | |
48 | #define SPRD_RTC_HOUR_EN BIT(2) | |
49 | #define SPRD_RTC_DAY_EN BIT(3) | |
50 | #define SPRD_RTC_ALARM_EN BIT(4) | |
51 | #define SPRD_RTC_HRS_FORMAT_EN BIT(5) | |
52 | #define SPRD_RTC_AUXALM_EN BIT(6) | |
53 | #define SPRD_RTC_SPG_UPD_EN BIT(7) | |
54 | #define SPRD_RTC_SEC_UPD_EN BIT(8) | |
55 | #define SPRD_RTC_MIN_UPD_EN BIT(9) | |
56 | #define SPRD_RTC_HOUR_UPD_EN BIT(10) | |
57 | #define SPRD_RTC_DAY_UPD_EN BIT(11) | |
58 | #define SPRD_RTC_ALMSEC_UPD_EN BIT(12) | |
59 | #define SPRD_RTC_ALMMIN_UPD_EN BIT(13) | |
60 | #define SPRD_RTC_ALMHOUR_UPD_EN BIT(14) | |
61 | #define SPRD_RTC_ALMDAY_UPD_EN BIT(15) | |
62 | #define SPRD_RTC_INT_MASK GENMASK(15, 0) | |
63 | ||
64 | #define SPRD_RTC_TIME_INT_MASK \ | |
65 | (SPRD_RTC_SEC_UPD_EN | SPRD_RTC_MIN_UPD_EN | \ | |
66 | SPRD_RTC_HOUR_UPD_EN | SPRD_RTC_DAY_UPD_EN) | |
67 | ||
68 | #define SPRD_RTC_ALMTIME_INT_MASK \ | |
69 | (SPRD_RTC_ALMSEC_UPD_EN | SPRD_RTC_ALMMIN_UPD_EN | \ | |
70 | SPRD_RTC_ALMHOUR_UPD_EN | SPRD_RTC_ALMDAY_UPD_EN) | |
71 | ||
72 | #define SPRD_RTC_ALM_INT_MASK \ | |
73 | (SPRD_RTC_SEC_EN | SPRD_RTC_MIN_EN | \ | |
74 | SPRD_RTC_HOUR_EN | SPRD_RTC_DAY_EN | \ | |
75 | SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN) | |
76 | ||
77 | /* second/minute/hour/day values mask definition */ | |
78 | #define SPRD_RTC_SEC_MASK GENMASK(5, 0) | |
79 | #define SPRD_RTC_MIN_MASK GENMASK(5, 0) | |
80 | #define SPRD_RTC_HOUR_MASK GENMASK(4, 0) | |
81 | #define SPRD_RTC_DAY_MASK GENMASK(15, 0) | |
82 | ||
83 | /* alarm lock definition for SPRD_RTC_SPG_UPD register */ | |
84 | #define SPRD_RTC_ALMLOCK_MASK GENMASK(7, 0) | |
85 | #define SPRD_RTC_ALM_UNLOCK 0xa5 | |
86 | #define SPRD_RTC_ALM_LOCK (~SPRD_RTC_ALM_UNLOCK & \ | |
87 | SPRD_RTC_ALMLOCK_MASK) | |
88 | ||
89 | /* SPG values definition for SPRD_RTC_SPG_UPD register */ | |
90 | #define SPRD_RTC_POWEROFF_ALM_FLAG BIT(8) | |
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91 | |
92 | /* power control/status definition */ | |
93 | #define SPRD_RTC_POWER_RESET_VALUE 0x96 | |
94 | #define SPRD_RTC_POWER_STS_CLEAR GENMASK(7, 0) | |
95 | #define SPRD_RTC_POWER_STS_SHIFT 8 | |
96 | #define SPRD_RTC_POWER_STS_VALID \ | |
97 | (~SPRD_RTC_POWER_RESET_VALUE << SPRD_RTC_POWER_STS_SHIFT) | |
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98 | |
99 | /* timeout of synchronizing time and alarm registers (us) */ | |
100 | #define SPRD_RTC_POLL_TIMEOUT 200000 | |
101 | #define SPRD_RTC_POLL_DELAY_US 20000 | |
102 | ||
103 | struct sprd_rtc { | |
104 | struct rtc_device *rtc; | |
105 | struct regmap *regmap; | |
106 | struct device *dev; | |
107 | u32 base; | |
108 | int irq; | |
109 | bool valid; | |
110 | }; | |
111 | ||
112 | /* | |
113 | * The Spreadtrum RTC controller has 3 groups registers, including time, normal | |
114 | * alarm and auxiliary alarm. The time group registers are used to set RTC time, | |
115 | * the normal alarm registers are used to set normal alarm, and the auxiliary | |
116 | * alarm registers are used to set auxiliary alarm. Both alarm event and | |
117 | * auxiliary alarm event can wake up system from deep sleep, but only alarm | |
118 | * event can power up system from power down status. | |
119 | */ | |
120 | enum sprd_rtc_reg_types { | |
121 | SPRD_RTC_TIME, | |
122 | SPRD_RTC_ALARM, | |
123 | SPRD_RTC_AUX_ALARM, | |
124 | }; | |
125 | ||
126 | static int sprd_rtc_clear_alarm_ints(struct sprd_rtc *rtc) | |
127 | { | |
128 | return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, | |
129 | SPRD_RTC_ALM_INT_MASK); | |
130 | } | |
131 | ||
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132 | static int sprd_rtc_lock_alarm(struct sprd_rtc *rtc, bool lock) |
133 | { | |
134 | int ret; | |
135 | u32 val; | |
136 | ||
137 | ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_SPG_VALUE, &val); | |
138 | if (ret) | |
139 | return ret; | |
140 | ||
141 | val &= ~(SPRD_RTC_ALMLOCK_MASK | SPRD_RTC_POWEROFF_ALM_FLAG); | |
142 | if (lock) | |
143 | val |= SPRD_RTC_ALM_LOCK; | |
144 | else | |
145 | val |= SPRD_RTC_ALM_UNLOCK | SPRD_RTC_POWEROFF_ALM_FLAG; | |
146 | ||
147 | ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_SPG_UPD, val); | |
148 | if (ret) | |
149 | return ret; | |
150 | ||
151 | /* wait until the SPG value is updated successfully */ | |
152 | ret = regmap_read_poll_timeout(rtc->regmap, | |
153 | rtc->base + SPRD_RTC_INT_RAW_STS, val, | |
154 | (val & SPRD_RTC_SPG_UPD_EN), | |
155 | SPRD_RTC_POLL_DELAY_US, | |
156 | SPRD_RTC_POLL_TIMEOUT); | |
157 | if (ret) { | |
158 | dev_err(rtc->dev, "failed to update SPG value:%d\n", ret); | |
159 | return ret; | |
160 | } | |
161 | ||
7db5adfa BW |
162 | return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, |
163 | SPRD_RTC_SPG_UPD_EN); | |
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164 | } |
165 | ||
166 | static int sprd_rtc_get_secs(struct sprd_rtc *rtc, enum sprd_rtc_reg_types type, | |
167 | time64_t *secs) | |
168 | { | |
169 | u32 sec_reg, min_reg, hour_reg, day_reg; | |
170 | u32 val, sec, min, hour, day; | |
171 | int ret; | |
172 | ||
173 | switch (type) { | |
174 | case SPRD_RTC_TIME: | |
175 | sec_reg = SPRD_RTC_SEC_CNT_VALUE; | |
176 | min_reg = SPRD_RTC_MIN_CNT_VALUE; | |
177 | hour_reg = SPRD_RTC_HOUR_CNT_VALUE; | |
178 | day_reg = SPRD_RTC_DAY_CNT_VALUE; | |
179 | break; | |
180 | case SPRD_RTC_ALARM: | |
181 | sec_reg = SPRD_RTC_SEC_ALM_VALUE; | |
182 | min_reg = SPRD_RTC_MIN_ALM_VALUE; | |
183 | hour_reg = SPRD_RTC_HOUR_ALM_VALUE; | |
184 | day_reg = SPRD_RTC_DAY_ALM_VALUE; | |
185 | break; | |
186 | case SPRD_RTC_AUX_ALARM: | |
187 | sec_reg = SPRD_RTC_SEC_AUXALM_UPD; | |
188 | min_reg = SPRD_RTC_MIN_AUXALM_UPD; | |
189 | hour_reg = SPRD_RTC_HOUR_AUXALM_UPD; | |
190 | day_reg = SPRD_RTC_DAY_AUXALM_UPD; | |
191 | break; | |
192 | default: | |
193 | return -EINVAL; | |
194 | } | |
195 | ||
196 | ret = regmap_read(rtc->regmap, rtc->base + sec_reg, &val); | |
197 | if (ret) | |
198 | return ret; | |
199 | ||
200 | sec = val & SPRD_RTC_SEC_MASK; | |
201 | ||
202 | ret = regmap_read(rtc->regmap, rtc->base + min_reg, &val); | |
203 | if (ret) | |
204 | return ret; | |
205 | ||
206 | min = val & SPRD_RTC_MIN_MASK; | |
207 | ||
208 | ret = regmap_read(rtc->regmap, rtc->base + hour_reg, &val); | |
209 | if (ret) | |
210 | return ret; | |
211 | ||
212 | hour = val & SPRD_RTC_HOUR_MASK; | |
213 | ||
214 | ret = regmap_read(rtc->regmap, rtc->base + day_reg, &val); | |
215 | if (ret) | |
216 | return ret; | |
217 | ||
218 | day = val & SPRD_RTC_DAY_MASK; | |
219 | *secs = (((time64_t)(day * 24) + hour) * 60 + min) * 60 + sec; | |
220 | return 0; | |
221 | } | |
222 | ||
223 | static int sprd_rtc_set_secs(struct sprd_rtc *rtc, enum sprd_rtc_reg_types type, | |
224 | time64_t secs) | |
225 | { | |
226 | u32 sec_reg, min_reg, hour_reg, day_reg, sts_mask; | |
227 | u32 sec, min, hour, day, val; | |
228 | int ret, rem; | |
229 | ||
230 | /* convert seconds to RTC time format */ | |
231 | day = div_s64_rem(secs, 86400, &rem); | |
232 | hour = rem / 3600; | |
233 | rem -= hour * 3600; | |
234 | min = rem / 60; | |
235 | sec = rem - min * 60; | |
236 | ||
237 | switch (type) { | |
238 | case SPRD_RTC_TIME: | |
239 | sec_reg = SPRD_RTC_SEC_CNT_UPD; | |
240 | min_reg = SPRD_RTC_MIN_CNT_UPD; | |
241 | hour_reg = SPRD_RTC_HOUR_CNT_UPD; | |
242 | day_reg = SPRD_RTC_DAY_CNT_UPD; | |
243 | sts_mask = SPRD_RTC_TIME_INT_MASK; | |
244 | break; | |
245 | case SPRD_RTC_ALARM: | |
246 | sec_reg = SPRD_RTC_SEC_ALM_UPD; | |
247 | min_reg = SPRD_RTC_MIN_ALM_UPD; | |
248 | hour_reg = SPRD_RTC_HOUR_ALM_UPD; | |
249 | day_reg = SPRD_RTC_DAY_ALM_UPD; | |
250 | sts_mask = SPRD_RTC_ALMTIME_INT_MASK; | |
251 | break; | |
252 | case SPRD_RTC_AUX_ALARM: | |
253 | sec_reg = SPRD_RTC_SEC_AUXALM_UPD; | |
254 | min_reg = SPRD_RTC_MIN_AUXALM_UPD; | |
255 | hour_reg = SPRD_RTC_HOUR_AUXALM_UPD; | |
256 | day_reg = SPRD_RTC_DAY_AUXALM_UPD; | |
257 | sts_mask = 0; | |
258 | break; | |
259 | default: | |
260 | return -EINVAL; | |
261 | } | |
262 | ||
263 | ret = regmap_write(rtc->regmap, rtc->base + sec_reg, sec); | |
264 | if (ret) | |
265 | return ret; | |
266 | ||
267 | ret = regmap_write(rtc->regmap, rtc->base + min_reg, min); | |
268 | if (ret) | |
269 | return ret; | |
270 | ||
271 | ret = regmap_write(rtc->regmap, rtc->base + hour_reg, hour); | |
272 | if (ret) | |
273 | return ret; | |
274 | ||
275 | ret = regmap_write(rtc->regmap, rtc->base + day_reg, day); | |
276 | if (ret) | |
277 | return ret; | |
278 | ||
279 | if (type == SPRD_RTC_AUX_ALARM) | |
280 | return 0; | |
281 | ||
282 | /* | |
283 | * Since the time and normal alarm registers are put in always-power-on | |
284 | * region supplied by VDDRTC, then these registers changing time will | |
285 | * be very long, about 125ms. Thus here we should wait until all | |
286 | * values are updated successfully. | |
287 | */ | |
288 | ret = regmap_read_poll_timeout(rtc->regmap, | |
289 | rtc->base + SPRD_RTC_INT_RAW_STS, val, | |
290 | ((val & sts_mask) == sts_mask), | |
291 | SPRD_RTC_POLL_DELAY_US, | |
292 | SPRD_RTC_POLL_TIMEOUT); | |
293 | if (ret < 0) { | |
294 | dev_err(rtc->dev, "set time/alarm values timeout\n"); | |
295 | return ret; | |
296 | } | |
297 | ||
298 | return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, | |
299 | sts_mask); | |
300 | } | |
301 | ||
302 | static int sprd_rtc_read_aux_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
303 | { | |
304 | struct sprd_rtc *rtc = dev_get_drvdata(dev); | |
305 | time64_t secs; | |
306 | u32 val; | |
307 | int ret; | |
308 | ||
309 | ret = sprd_rtc_get_secs(rtc, SPRD_RTC_AUX_ALARM, &secs); | |
310 | if (ret) | |
311 | return ret; | |
312 | ||
313 | rtc_time64_to_tm(secs, &alrm->time); | |
314 | ||
315 | ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_INT_EN, &val); | |
316 | if (ret) | |
317 | return ret; | |
318 | ||
319 | alrm->enabled = !!(val & SPRD_RTC_AUXALM_EN); | |
320 | ||
321 | ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_INT_RAW_STS, &val); | |
322 | if (ret) | |
323 | return ret; | |
324 | ||
325 | alrm->pending = !!(val & SPRD_RTC_AUXALM_EN); | |
326 | return 0; | |
327 | } | |
328 | ||
329 | static int sprd_rtc_set_aux_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
330 | { | |
331 | struct sprd_rtc *rtc = dev_get_drvdata(dev); | |
332 | time64_t secs = rtc_tm_to_time64(&alrm->time); | |
333 | int ret; | |
334 | ||
335 | /* clear the auxiliary alarm interrupt status */ | |
336 | ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, | |
337 | SPRD_RTC_AUXALM_EN); | |
338 | if (ret) | |
339 | return ret; | |
340 | ||
341 | ret = sprd_rtc_set_secs(rtc, SPRD_RTC_AUX_ALARM, secs); | |
342 | if (ret) | |
343 | return ret; | |
344 | ||
345 | if (alrm->enabled) { | |
346 | ret = regmap_update_bits(rtc->regmap, | |
347 | rtc->base + SPRD_RTC_INT_EN, | |
348 | SPRD_RTC_AUXALM_EN, | |
349 | SPRD_RTC_AUXALM_EN); | |
350 | } else { | |
351 | ret = regmap_update_bits(rtc->regmap, | |
352 | rtc->base + SPRD_RTC_INT_EN, | |
353 | SPRD_RTC_AUXALM_EN, 0); | |
354 | } | |
355 | ||
356 | return ret; | |
357 | } | |
358 | ||
359 | static int sprd_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
360 | { | |
361 | struct sprd_rtc *rtc = dev_get_drvdata(dev); | |
362 | time64_t secs; | |
363 | int ret; | |
364 | ||
365 | if (!rtc->valid) { | |
366 | dev_warn(dev, "RTC values are invalid\n"); | |
367 | return -EINVAL; | |
368 | } | |
369 | ||
370 | ret = sprd_rtc_get_secs(rtc, SPRD_RTC_TIME, &secs); | |
371 | if (ret) | |
372 | return ret; | |
373 | ||
374 | rtc_time64_to_tm(secs, tm); | |
66b32fc5 | 375 | return 0; |
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376 | } |
377 | ||
378 | static int sprd_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
379 | { | |
380 | struct sprd_rtc *rtc = dev_get_drvdata(dev); | |
381 | time64_t secs = rtc_tm_to_time64(tm); | |
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382 | int ret; |
383 | ||
384 | ret = sprd_rtc_set_secs(rtc, SPRD_RTC_TIME, secs); | |
385 | if (ret) | |
386 | return ret; | |
387 | ||
388 | if (!rtc->valid) { | |
a0defd7c BW |
389 | /* Clear RTC power status firstly */ |
390 | ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_PWR_CTRL, | |
391 | SPRD_RTC_POWER_STS_CLEAR); | |
495bbde5 BW |
392 | if (ret) |
393 | return ret; | |
394 | ||
a0defd7c BW |
395 | /* |
396 | * Set RTC power status to indicate now RTC has valid time | |
397 | * values. | |
398 | */ | |
399 | ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_PWR_CTRL, | |
400 | SPRD_RTC_POWER_STS_VALID); | |
401 | if (ret) | |
495bbde5 | 402 | return ret; |
495bbde5 BW |
403 | |
404 | rtc->valid = true; | |
405 | } | |
406 | ||
407 | return 0; | |
408 | } | |
409 | ||
410 | static int sprd_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
411 | { | |
412 | struct sprd_rtc *rtc = dev_get_drvdata(dev); | |
413 | time64_t secs; | |
414 | int ret; | |
415 | u32 val; | |
416 | ||
417 | /* | |
3822d1bb BW |
418 | * Before RTC device is registered, it will check to see if there is an |
419 | * alarm already set in RTC hardware, and we always read the normal | |
420 | * alarm at this time. | |
421 | * | |
422 | * Or if aie_timer is enabled, we should get the normal alarm time. | |
495bbde5 BW |
423 | * Otherwise we should get auxiliary alarm time. |
424 | */ | |
3822d1bb | 425 | if (rtc->rtc && rtc->rtc->registered && rtc->rtc->aie_timer.enabled == 0) |
495bbde5 BW |
426 | return sprd_rtc_read_aux_alarm(dev, alrm); |
427 | ||
428 | ret = sprd_rtc_get_secs(rtc, SPRD_RTC_ALARM, &secs); | |
429 | if (ret) | |
430 | return ret; | |
431 | ||
432 | rtc_time64_to_tm(secs, &alrm->time); | |
433 | ||
434 | ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_INT_EN, &val); | |
435 | if (ret) | |
436 | return ret; | |
437 | ||
438 | alrm->enabled = !!(val & SPRD_RTC_ALARM_EN); | |
439 | ||
440 | ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_INT_RAW_STS, &val); | |
441 | if (ret) | |
442 | return ret; | |
443 | ||
444 | alrm->pending = !!(val & SPRD_RTC_ALARM_EN); | |
445 | return 0; | |
446 | } | |
447 | ||
448 | static int sprd_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
449 | { | |
450 | struct sprd_rtc *rtc = dev_get_drvdata(dev); | |
451 | time64_t secs = rtc_tm_to_time64(&alrm->time); | |
452 | struct rtc_time aie_time = | |
453 | rtc_ktime_to_tm(rtc->rtc->aie_timer.node.expires); | |
454 | int ret; | |
455 | ||
456 | /* | |
457 | * We have 2 groups alarms: normal alarm and auxiliary alarm. Since | |
458 | * both normal alarm event and auxiliary alarm event can wake up system | |
459 | * from deep sleep, but only alarm event can power up system from power | |
460 | * down status. Moreover we do not need to poll about 125ms when | |
461 | * updating auxiliary alarm registers. Thus we usually set auxiliary | |
462 | * alarm when wake up system from deep sleep, and for other scenarios, | |
463 | * we should set normal alarm with polling status. | |
464 | * | |
465 | * So here we check if the alarm time is set by aie_timer, if yes, we | |
466 | * should set normal alarm, if not, we should set auxiliary alarm which | |
467 | * means it is just a wake event. | |
468 | */ | |
469 | if (!rtc->rtc->aie_timer.enabled || rtc_tm_sub(&aie_time, &alrm->time)) | |
470 | return sprd_rtc_set_aux_alarm(dev, alrm); | |
471 | ||
472 | /* clear the alarm interrupt status firstly */ | |
473 | ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, | |
474 | SPRD_RTC_ALARM_EN); | |
475 | if (ret) | |
476 | return ret; | |
477 | ||
478 | ret = sprd_rtc_set_secs(rtc, SPRD_RTC_ALARM, secs); | |
479 | if (ret) | |
480 | return ret; | |
481 | ||
482 | if (alrm->enabled) { | |
483 | ret = regmap_update_bits(rtc->regmap, | |
484 | rtc->base + SPRD_RTC_INT_EN, | |
485 | SPRD_RTC_ALARM_EN, | |
486 | SPRD_RTC_ALARM_EN); | |
487 | if (ret) | |
488 | return ret; | |
489 | ||
490 | /* unlock the alarm to enable the alarm function. */ | |
491 | ret = sprd_rtc_lock_alarm(rtc, false); | |
492 | } else { | |
493 | regmap_update_bits(rtc->regmap, | |
494 | rtc->base + SPRD_RTC_INT_EN, | |
495 | SPRD_RTC_ALARM_EN, 0); | |
496 | ||
497 | /* | |
498 | * Lock the alarm function in case fake alarm event will power | |
499 | * up systems. | |
500 | */ | |
501 | ret = sprd_rtc_lock_alarm(rtc, true); | |
502 | } | |
503 | ||
504 | return ret; | |
505 | } | |
506 | ||
507 | static int sprd_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | |
508 | { | |
509 | struct sprd_rtc *rtc = dev_get_drvdata(dev); | |
510 | int ret; | |
511 | ||
512 | if (enabled) { | |
513 | ret = regmap_update_bits(rtc->regmap, | |
514 | rtc->base + SPRD_RTC_INT_EN, | |
515 | SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN, | |
516 | SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN); | |
517 | if (ret) | |
518 | return ret; | |
519 | ||
520 | ret = sprd_rtc_lock_alarm(rtc, false); | |
521 | } else { | |
522 | regmap_update_bits(rtc->regmap, rtc->base + SPRD_RTC_INT_EN, | |
523 | SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN, 0); | |
524 | ||
525 | ret = sprd_rtc_lock_alarm(rtc, true); | |
526 | } | |
527 | ||
528 | return ret; | |
529 | } | |
530 | ||
531 | static const struct rtc_class_ops sprd_rtc_ops = { | |
532 | .read_time = sprd_rtc_read_time, | |
533 | .set_time = sprd_rtc_set_time, | |
534 | .read_alarm = sprd_rtc_read_alarm, | |
535 | .set_alarm = sprd_rtc_set_alarm, | |
536 | .alarm_irq_enable = sprd_rtc_alarm_irq_enable, | |
537 | }; | |
538 | ||
539 | static irqreturn_t sprd_rtc_handler(int irq, void *dev_id) | |
540 | { | |
541 | struct sprd_rtc *rtc = dev_id; | |
542 | int ret; | |
543 | ||
544 | ret = sprd_rtc_clear_alarm_ints(rtc); | |
545 | if (ret) | |
546 | return IRQ_RETVAL(ret); | |
547 | ||
548 | rtc_update_irq(rtc->rtc, 1, RTC_AF | RTC_IRQF); | |
549 | return IRQ_HANDLED; | |
550 | } | |
551 | ||
552 | static int sprd_rtc_check_power_down(struct sprd_rtc *rtc) | |
553 | { | |
554 | u32 val; | |
555 | int ret; | |
556 | ||
a0defd7c | 557 | ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_PWR_STS, &val); |
495bbde5 BW |
558 | if (ret) |
559 | return ret; | |
560 | ||
561 | /* | |
a0defd7c BW |
562 | * If the RTC power status value is SPRD_RTC_POWER_RESET_VALUE, which |
563 | * means the RTC has been powered down, so the RTC time values are | |
564 | * invalid. | |
495bbde5 | 565 | */ |
a0defd7c | 566 | rtc->valid = val == SPRD_RTC_POWER_RESET_VALUE ? false : true; |
495bbde5 BW |
567 | return 0; |
568 | } | |
569 | ||
bf2c532b BW |
570 | static int sprd_rtc_check_alarm_int(struct sprd_rtc *rtc) |
571 | { | |
572 | u32 val; | |
573 | int ret; | |
574 | ||
575 | ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_SPG_VALUE, &val); | |
576 | if (ret) | |
577 | return ret; | |
578 | ||
579 | /* | |
580 | * The SPRD_RTC_INT_EN register is not put in always-power-on region | |
581 | * supplied by VDDRTC, so we should check if we need enable the alarm | |
582 | * interrupt when system booting. | |
583 | * | |
584 | * If we have set SPRD_RTC_POWEROFF_ALM_FLAG which is saved in | |
585 | * always-power-on region, that means we have set one alarm last time, | |
586 | * so we should enable the alarm interrupt to help RTC core to see if | |
587 | * there is an alarm already set in RTC hardware. | |
588 | */ | |
589 | if (!(val & SPRD_RTC_POWEROFF_ALM_FLAG)) | |
590 | return 0; | |
591 | ||
592 | return regmap_update_bits(rtc->regmap, rtc->base + SPRD_RTC_INT_EN, | |
593 | SPRD_RTC_ALARM_EN, SPRD_RTC_ALARM_EN); | |
594 | } | |
595 | ||
495bbde5 BW |
596 | static int sprd_rtc_probe(struct platform_device *pdev) |
597 | { | |
598 | struct device_node *node = pdev->dev.of_node; | |
599 | struct sprd_rtc *rtc; | |
600 | int ret; | |
601 | ||
602 | rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL); | |
603 | if (!rtc) | |
604 | return -ENOMEM; | |
605 | ||
606 | rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL); | |
607 | if (!rtc->regmap) | |
608 | return -ENODEV; | |
609 | ||
610 | ret = of_property_read_u32(node, "reg", &rtc->base); | |
611 | if (ret) { | |
612 | dev_err(&pdev->dev, "failed to get RTC base address\n"); | |
613 | return ret; | |
614 | } | |
615 | ||
616 | rtc->irq = platform_get_irq(pdev, 0); | |
617 | if (rtc->irq < 0) { | |
618 | dev_err(&pdev->dev, "failed to get RTC irq number\n"); | |
619 | return rtc->irq; | |
620 | } | |
621 | ||
369a30a5 BW |
622 | rtc->rtc = devm_rtc_allocate_device(&pdev->dev); |
623 | if (IS_ERR(rtc->rtc)) | |
624 | return PTR_ERR(rtc->rtc); | |
625 | ||
495bbde5 BW |
626 | rtc->dev = &pdev->dev; |
627 | platform_set_drvdata(pdev, rtc); | |
628 | ||
bf2c532b BW |
629 | /* check if we need set the alarm interrupt */ |
630 | ret = sprd_rtc_check_alarm_int(rtc); | |
631 | if (ret) { | |
632 | dev_err(&pdev->dev, "failed to check RTC alarm interrupt\n"); | |
633 | return ret; | |
634 | } | |
635 | ||
495bbde5 BW |
636 | /* check if RTC time values are valid */ |
637 | ret = sprd_rtc_check_power_down(rtc); | |
638 | if (ret) { | |
639 | dev_err(&pdev->dev, "failed to check RTC time values\n"); | |
640 | return ret; | |
641 | } | |
642 | ||
643 | ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL, | |
644 | sprd_rtc_handler, | |
645 | IRQF_ONESHOT | IRQF_EARLY_RESUME, | |
646 | pdev->name, rtc); | |
647 | if (ret < 0) { | |
648 | dev_err(&pdev->dev, "failed to request RTC irq\n"); | |
649 | return ret; | |
650 | } | |
651 | ||
a86d6b23 BW |
652 | device_init_wakeup(&pdev->dev, 1); |
653 | ||
369a30a5 | 654 | rtc->rtc->ops = &sprd_rtc_ops; |
149aa91c BW |
655 | rtc->rtc->range_min = 0; |
656 | rtc->rtc->range_max = 5662310399LL; | |
369a30a5 BW |
657 | ret = rtc_register_device(rtc->rtc); |
658 | if (ret) { | |
659 | dev_err(&pdev->dev, "failed to register rtc device\n"); | |
a86d6b23 | 660 | device_init_wakeup(&pdev->dev, 0); |
369a30a5 BW |
661 | return ret; |
662 | } | |
495bbde5 | 663 | |
495bbde5 BW |
664 | return 0; |
665 | } | |
666 | ||
667 | static int sprd_rtc_remove(struct platform_device *pdev) | |
668 | { | |
669 | device_init_wakeup(&pdev->dev, 0); | |
670 | return 0; | |
671 | } | |
672 | ||
673 | static const struct of_device_id sprd_rtc_of_match[] = { | |
674 | { .compatible = "sprd,sc2731-rtc", }, | |
675 | { }, | |
676 | }; | |
677 | MODULE_DEVICE_TABLE(of, sprd_rtc_of_match); | |
678 | ||
679 | static struct platform_driver sprd_rtc_driver = { | |
680 | .driver = { | |
681 | .name = "sprd-rtc", | |
682 | .of_match_table = sprd_rtc_of_match, | |
683 | }, | |
684 | .probe = sprd_rtc_probe, | |
685 | .remove = sprd_rtc_remove, | |
686 | }; | |
687 | module_platform_driver(sprd_rtc_driver); | |
688 | ||
689 | MODULE_LICENSE("GPL v2"); | |
690 | MODULE_DESCRIPTION("Spreadtrum RTC Device Driver"); | |
691 | MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>"); |