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07869941 | 1 | // SPDX-License-Identifier: GPL-2.0 |
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2 | /* |
3 | * Copyright (C) 2017 Spreadtrum Communications Inc. | |
4 | * | |
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5 | */ |
6 | ||
7 | #include <linux/bitops.h> | |
8 | #include <linux/delay.h> | |
9 | #include <linux/err.h> | |
10 | #include <linux/module.h> | |
11 | #include <linux/of.h> | |
12 | #include <linux/platform_device.h> | |
13 | #include <linux/regmap.h> | |
14 | #include <linux/rtc.h> | |
15 | ||
16 | #define SPRD_RTC_SEC_CNT_VALUE 0x0 | |
17 | #define SPRD_RTC_MIN_CNT_VALUE 0x4 | |
18 | #define SPRD_RTC_HOUR_CNT_VALUE 0x8 | |
19 | #define SPRD_RTC_DAY_CNT_VALUE 0xc | |
20 | #define SPRD_RTC_SEC_CNT_UPD 0x10 | |
21 | #define SPRD_RTC_MIN_CNT_UPD 0x14 | |
22 | #define SPRD_RTC_HOUR_CNT_UPD 0x18 | |
23 | #define SPRD_RTC_DAY_CNT_UPD 0x1c | |
24 | #define SPRD_RTC_SEC_ALM_UPD 0x20 | |
25 | #define SPRD_RTC_MIN_ALM_UPD 0x24 | |
26 | #define SPRD_RTC_HOUR_ALM_UPD 0x28 | |
27 | #define SPRD_RTC_DAY_ALM_UPD 0x2c | |
28 | #define SPRD_RTC_INT_EN 0x30 | |
29 | #define SPRD_RTC_INT_RAW_STS 0x34 | |
30 | #define SPRD_RTC_INT_CLR 0x38 | |
31 | #define SPRD_RTC_INT_MASK_STS 0x3C | |
32 | #define SPRD_RTC_SEC_ALM_VALUE 0x40 | |
33 | #define SPRD_RTC_MIN_ALM_VALUE 0x44 | |
34 | #define SPRD_RTC_HOUR_ALM_VALUE 0x48 | |
35 | #define SPRD_RTC_DAY_ALM_VALUE 0x4c | |
36 | #define SPRD_RTC_SPG_VALUE 0x50 | |
37 | #define SPRD_RTC_SPG_UPD 0x54 | |
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38 | #define SPRD_RTC_PWR_CTRL 0x58 |
39 | #define SPRD_RTC_PWR_STS 0x5c | |
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40 | #define SPRD_RTC_SEC_AUXALM_UPD 0x60 |
41 | #define SPRD_RTC_MIN_AUXALM_UPD 0x64 | |
42 | #define SPRD_RTC_HOUR_AUXALM_UPD 0x68 | |
43 | #define SPRD_RTC_DAY_AUXALM_UPD 0x6c | |
44 | ||
45 | /* BIT & MASK definition for SPRD_RTC_INT_* registers */ | |
46 | #define SPRD_RTC_SEC_EN BIT(0) | |
47 | #define SPRD_RTC_MIN_EN BIT(1) | |
48 | #define SPRD_RTC_HOUR_EN BIT(2) | |
49 | #define SPRD_RTC_DAY_EN BIT(3) | |
50 | #define SPRD_RTC_ALARM_EN BIT(4) | |
51 | #define SPRD_RTC_HRS_FORMAT_EN BIT(5) | |
52 | #define SPRD_RTC_AUXALM_EN BIT(6) | |
53 | #define SPRD_RTC_SPG_UPD_EN BIT(7) | |
54 | #define SPRD_RTC_SEC_UPD_EN BIT(8) | |
55 | #define SPRD_RTC_MIN_UPD_EN BIT(9) | |
56 | #define SPRD_RTC_HOUR_UPD_EN BIT(10) | |
57 | #define SPRD_RTC_DAY_UPD_EN BIT(11) | |
58 | #define SPRD_RTC_ALMSEC_UPD_EN BIT(12) | |
59 | #define SPRD_RTC_ALMMIN_UPD_EN BIT(13) | |
60 | #define SPRD_RTC_ALMHOUR_UPD_EN BIT(14) | |
61 | #define SPRD_RTC_ALMDAY_UPD_EN BIT(15) | |
62 | #define SPRD_RTC_INT_MASK GENMASK(15, 0) | |
63 | ||
64 | #define SPRD_RTC_TIME_INT_MASK \ | |
65 | (SPRD_RTC_SEC_UPD_EN | SPRD_RTC_MIN_UPD_EN | \ | |
66 | SPRD_RTC_HOUR_UPD_EN | SPRD_RTC_DAY_UPD_EN) | |
67 | ||
68 | #define SPRD_RTC_ALMTIME_INT_MASK \ | |
69 | (SPRD_RTC_ALMSEC_UPD_EN | SPRD_RTC_ALMMIN_UPD_EN | \ | |
70 | SPRD_RTC_ALMHOUR_UPD_EN | SPRD_RTC_ALMDAY_UPD_EN) | |
71 | ||
72 | #define SPRD_RTC_ALM_INT_MASK \ | |
73 | (SPRD_RTC_SEC_EN | SPRD_RTC_MIN_EN | \ | |
74 | SPRD_RTC_HOUR_EN | SPRD_RTC_DAY_EN | \ | |
75 | SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN) | |
76 | ||
77 | /* second/minute/hour/day values mask definition */ | |
78 | #define SPRD_RTC_SEC_MASK GENMASK(5, 0) | |
79 | #define SPRD_RTC_MIN_MASK GENMASK(5, 0) | |
80 | #define SPRD_RTC_HOUR_MASK GENMASK(4, 0) | |
81 | #define SPRD_RTC_DAY_MASK GENMASK(15, 0) | |
82 | ||
83 | /* alarm lock definition for SPRD_RTC_SPG_UPD register */ | |
84 | #define SPRD_RTC_ALMLOCK_MASK GENMASK(7, 0) | |
85 | #define SPRD_RTC_ALM_UNLOCK 0xa5 | |
86 | #define SPRD_RTC_ALM_LOCK (~SPRD_RTC_ALM_UNLOCK & \ | |
87 | SPRD_RTC_ALMLOCK_MASK) | |
88 | ||
89 | /* SPG values definition for SPRD_RTC_SPG_UPD register */ | |
90 | #define SPRD_RTC_POWEROFF_ALM_FLAG BIT(8) | |
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91 | |
92 | /* power control/status definition */ | |
93 | #define SPRD_RTC_POWER_RESET_VALUE 0x96 | |
94 | #define SPRD_RTC_POWER_STS_CLEAR GENMASK(7, 0) | |
95 | #define SPRD_RTC_POWER_STS_SHIFT 8 | |
96 | #define SPRD_RTC_POWER_STS_VALID \ | |
97 | (~SPRD_RTC_POWER_RESET_VALUE << SPRD_RTC_POWER_STS_SHIFT) | |
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98 | |
99 | /* timeout of synchronizing time and alarm registers (us) */ | |
100 | #define SPRD_RTC_POLL_TIMEOUT 200000 | |
101 | #define SPRD_RTC_POLL_DELAY_US 20000 | |
102 | ||
103 | struct sprd_rtc { | |
104 | struct rtc_device *rtc; | |
105 | struct regmap *regmap; | |
106 | struct device *dev; | |
107 | u32 base; | |
108 | int irq; | |
109 | bool valid; | |
110 | }; | |
111 | ||
112 | /* | |
113 | * The Spreadtrum RTC controller has 3 groups registers, including time, normal | |
114 | * alarm and auxiliary alarm. The time group registers are used to set RTC time, | |
115 | * the normal alarm registers are used to set normal alarm, and the auxiliary | |
116 | * alarm registers are used to set auxiliary alarm. Both alarm event and | |
117 | * auxiliary alarm event can wake up system from deep sleep, but only alarm | |
118 | * event can power up system from power down status. | |
119 | */ | |
120 | enum sprd_rtc_reg_types { | |
121 | SPRD_RTC_TIME, | |
122 | SPRD_RTC_ALARM, | |
123 | SPRD_RTC_AUX_ALARM, | |
124 | }; | |
125 | ||
126 | static int sprd_rtc_clear_alarm_ints(struct sprd_rtc *rtc) | |
127 | { | |
128 | return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, | |
129 | SPRD_RTC_ALM_INT_MASK); | |
130 | } | |
131 | ||
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132 | static int sprd_rtc_lock_alarm(struct sprd_rtc *rtc, bool lock) |
133 | { | |
134 | int ret; | |
135 | u32 val; | |
136 | ||
137 | ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_SPG_VALUE, &val); | |
138 | if (ret) | |
139 | return ret; | |
140 | ||
e02e3dda | 141 | val &= ~SPRD_RTC_ALMLOCK_MASK; |
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142 | if (lock) |
143 | val |= SPRD_RTC_ALM_LOCK; | |
144 | else | |
145 | val |= SPRD_RTC_ALM_UNLOCK | SPRD_RTC_POWEROFF_ALM_FLAG; | |
146 | ||
147 | ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_SPG_UPD, val); | |
148 | if (ret) | |
149 | return ret; | |
150 | ||
151 | /* wait until the SPG value is updated successfully */ | |
152 | ret = regmap_read_poll_timeout(rtc->regmap, | |
153 | rtc->base + SPRD_RTC_INT_RAW_STS, val, | |
154 | (val & SPRD_RTC_SPG_UPD_EN), | |
155 | SPRD_RTC_POLL_DELAY_US, | |
156 | SPRD_RTC_POLL_TIMEOUT); | |
157 | if (ret) { | |
158 | dev_err(rtc->dev, "failed to update SPG value:%d\n", ret); | |
159 | return ret; | |
160 | } | |
161 | ||
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162 | return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, |
163 | SPRD_RTC_SPG_UPD_EN); | |
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164 | } |
165 | ||
166 | static int sprd_rtc_get_secs(struct sprd_rtc *rtc, enum sprd_rtc_reg_types type, | |
167 | time64_t *secs) | |
168 | { | |
169 | u32 sec_reg, min_reg, hour_reg, day_reg; | |
170 | u32 val, sec, min, hour, day; | |
171 | int ret; | |
172 | ||
173 | switch (type) { | |
174 | case SPRD_RTC_TIME: | |
175 | sec_reg = SPRD_RTC_SEC_CNT_VALUE; | |
176 | min_reg = SPRD_RTC_MIN_CNT_VALUE; | |
177 | hour_reg = SPRD_RTC_HOUR_CNT_VALUE; | |
178 | day_reg = SPRD_RTC_DAY_CNT_VALUE; | |
179 | break; | |
180 | case SPRD_RTC_ALARM: | |
181 | sec_reg = SPRD_RTC_SEC_ALM_VALUE; | |
182 | min_reg = SPRD_RTC_MIN_ALM_VALUE; | |
183 | hour_reg = SPRD_RTC_HOUR_ALM_VALUE; | |
184 | day_reg = SPRD_RTC_DAY_ALM_VALUE; | |
185 | break; | |
186 | case SPRD_RTC_AUX_ALARM: | |
187 | sec_reg = SPRD_RTC_SEC_AUXALM_UPD; | |
188 | min_reg = SPRD_RTC_MIN_AUXALM_UPD; | |
189 | hour_reg = SPRD_RTC_HOUR_AUXALM_UPD; | |
190 | day_reg = SPRD_RTC_DAY_AUXALM_UPD; | |
191 | break; | |
192 | default: | |
193 | return -EINVAL; | |
194 | } | |
195 | ||
196 | ret = regmap_read(rtc->regmap, rtc->base + sec_reg, &val); | |
197 | if (ret) | |
198 | return ret; | |
199 | ||
200 | sec = val & SPRD_RTC_SEC_MASK; | |
201 | ||
202 | ret = regmap_read(rtc->regmap, rtc->base + min_reg, &val); | |
203 | if (ret) | |
204 | return ret; | |
205 | ||
206 | min = val & SPRD_RTC_MIN_MASK; | |
207 | ||
208 | ret = regmap_read(rtc->regmap, rtc->base + hour_reg, &val); | |
209 | if (ret) | |
210 | return ret; | |
211 | ||
212 | hour = val & SPRD_RTC_HOUR_MASK; | |
213 | ||
214 | ret = regmap_read(rtc->regmap, rtc->base + day_reg, &val); | |
215 | if (ret) | |
216 | return ret; | |
217 | ||
218 | day = val & SPRD_RTC_DAY_MASK; | |
219 | *secs = (((time64_t)(day * 24) + hour) * 60 + min) * 60 + sec; | |
220 | return 0; | |
221 | } | |
222 | ||
223 | static int sprd_rtc_set_secs(struct sprd_rtc *rtc, enum sprd_rtc_reg_types type, | |
224 | time64_t secs) | |
225 | { | |
226 | u32 sec_reg, min_reg, hour_reg, day_reg, sts_mask; | |
227 | u32 sec, min, hour, day, val; | |
228 | int ret, rem; | |
229 | ||
230 | /* convert seconds to RTC time format */ | |
231 | day = div_s64_rem(secs, 86400, &rem); | |
232 | hour = rem / 3600; | |
233 | rem -= hour * 3600; | |
234 | min = rem / 60; | |
235 | sec = rem - min * 60; | |
236 | ||
237 | switch (type) { | |
238 | case SPRD_RTC_TIME: | |
239 | sec_reg = SPRD_RTC_SEC_CNT_UPD; | |
240 | min_reg = SPRD_RTC_MIN_CNT_UPD; | |
241 | hour_reg = SPRD_RTC_HOUR_CNT_UPD; | |
242 | day_reg = SPRD_RTC_DAY_CNT_UPD; | |
243 | sts_mask = SPRD_RTC_TIME_INT_MASK; | |
244 | break; | |
245 | case SPRD_RTC_ALARM: | |
246 | sec_reg = SPRD_RTC_SEC_ALM_UPD; | |
247 | min_reg = SPRD_RTC_MIN_ALM_UPD; | |
248 | hour_reg = SPRD_RTC_HOUR_ALM_UPD; | |
249 | day_reg = SPRD_RTC_DAY_ALM_UPD; | |
250 | sts_mask = SPRD_RTC_ALMTIME_INT_MASK; | |
251 | break; | |
252 | case SPRD_RTC_AUX_ALARM: | |
253 | sec_reg = SPRD_RTC_SEC_AUXALM_UPD; | |
254 | min_reg = SPRD_RTC_MIN_AUXALM_UPD; | |
255 | hour_reg = SPRD_RTC_HOUR_AUXALM_UPD; | |
256 | day_reg = SPRD_RTC_DAY_AUXALM_UPD; | |
257 | sts_mask = 0; | |
258 | break; | |
259 | default: | |
260 | return -EINVAL; | |
261 | } | |
262 | ||
263 | ret = regmap_write(rtc->regmap, rtc->base + sec_reg, sec); | |
264 | if (ret) | |
265 | return ret; | |
266 | ||
267 | ret = regmap_write(rtc->regmap, rtc->base + min_reg, min); | |
268 | if (ret) | |
269 | return ret; | |
270 | ||
271 | ret = regmap_write(rtc->regmap, rtc->base + hour_reg, hour); | |
272 | if (ret) | |
273 | return ret; | |
274 | ||
275 | ret = regmap_write(rtc->regmap, rtc->base + day_reg, day); | |
276 | if (ret) | |
277 | return ret; | |
278 | ||
279 | if (type == SPRD_RTC_AUX_ALARM) | |
280 | return 0; | |
281 | ||
282 | /* | |
283 | * Since the time and normal alarm registers are put in always-power-on | |
284 | * region supplied by VDDRTC, then these registers changing time will | |
285 | * be very long, about 125ms. Thus here we should wait until all | |
286 | * values are updated successfully. | |
287 | */ | |
288 | ret = regmap_read_poll_timeout(rtc->regmap, | |
289 | rtc->base + SPRD_RTC_INT_RAW_STS, val, | |
290 | ((val & sts_mask) == sts_mask), | |
291 | SPRD_RTC_POLL_DELAY_US, | |
292 | SPRD_RTC_POLL_TIMEOUT); | |
293 | if (ret < 0) { | |
294 | dev_err(rtc->dev, "set time/alarm values timeout\n"); | |
295 | return ret; | |
296 | } | |
297 | ||
298 | return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, | |
299 | sts_mask); | |
300 | } | |
301 | ||
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302 | static int sprd_rtc_set_aux_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
303 | { | |
304 | struct sprd_rtc *rtc = dev_get_drvdata(dev); | |
305 | time64_t secs = rtc_tm_to_time64(&alrm->time); | |
306 | int ret; | |
307 | ||
308 | /* clear the auxiliary alarm interrupt status */ | |
309 | ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, | |
310 | SPRD_RTC_AUXALM_EN); | |
311 | if (ret) | |
312 | return ret; | |
313 | ||
314 | ret = sprd_rtc_set_secs(rtc, SPRD_RTC_AUX_ALARM, secs); | |
315 | if (ret) | |
316 | return ret; | |
317 | ||
318 | if (alrm->enabled) { | |
319 | ret = regmap_update_bits(rtc->regmap, | |
320 | rtc->base + SPRD_RTC_INT_EN, | |
321 | SPRD_RTC_AUXALM_EN, | |
322 | SPRD_RTC_AUXALM_EN); | |
323 | } else { | |
324 | ret = regmap_update_bits(rtc->regmap, | |
325 | rtc->base + SPRD_RTC_INT_EN, | |
326 | SPRD_RTC_AUXALM_EN, 0); | |
327 | } | |
328 | ||
329 | return ret; | |
330 | } | |
331 | ||
332 | static int sprd_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
333 | { | |
334 | struct sprd_rtc *rtc = dev_get_drvdata(dev); | |
335 | time64_t secs; | |
336 | int ret; | |
337 | ||
338 | if (!rtc->valid) { | |
339 | dev_warn(dev, "RTC values are invalid\n"); | |
340 | return -EINVAL; | |
341 | } | |
342 | ||
343 | ret = sprd_rtc_get_secs(rtc, SPRD_RTC_TIME, &secs); | |
344 | if (ret) | |
345 | return ret; | |
346 | ||
347 | rtc_time64_to_tm(secs, tm); | |
66b32fc5 | 348 | return 0; |
495bbde5 BW |
349 | } |
350 | ||
351 | static int sprd_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
352 | { | |
353 | struct sprd_rtc *rtc = dev_get_drvdata(dev); | |
354 | time64_t secs = rtc_tm_to_time64(tm); | |
495bbde5 BW |
355 | int ret; |
356 | ||
357 | ret = sprd_rtc_set_secs(rtc, SPRD_RTC_TIME, secs); | |
358 | if (ret) | |
359 | return ret; | |
360 | ||
361 | if (!rtc->valid) { | |
a0defd7c BW |
362 | /* Clear RTC power status firstly */ |
363 | ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_PWR_CTRL, | |
364 | SPRD_RTC_POWER_STS_CLEAR); | |
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365 | if (ret) |
366 | return ret; | |
367 | ||
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368 | /* |
369 | * Set RTC power status to indicate now RTC has valid time | |
370 | * values. | |
371 | */ | |
372 | ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_PWR_CTRL, | |
373 | SPRD_RTC_POWER_STS_VALID); | |
374 | if (ret) | |
495bbde5 | 375 | return ret; |
495bbde5 BW |
376 | |
377 | rtc->valid = true; | |
378 | } | |
379 | ||
380 | return 0; | |
381 | } | |
382 | ||
383 | static int sprd_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
384 | { | |
385 | struct sprd_rtc *rtc = dev_get_drvdata(dev); | |
386 | time64_t secs; | |
387 | int ret; | |
388 | u32 val; | |
389 | ||
390 | /* | |
7d9d4868 AB |
391 | * The RTC core checks to see if there is an alarm already set in RTC |
392 | * hardware, and we always read the normal alarm at this time. | |
495bbde5 | 393 | */ |
495bbde5 BW |
394 | ret = sprd_rtc_get_secs(rtc, SPRD_RTC_ALARM, &secs); |
395 | if (ret) | |
396 | return ret; | |
397 | ||
398 | rtc_time64_to_tm(secs, &alrm->time); | |
399 | ||
400 | ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_INT_EN, &val); | |
401 | if (ret) | |
402 | return ret; | |
403 | ||
404 | alrm->enabled = !!(val & SPRD_RTC_ALARM_EN); | |
405 | ||
406 | ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_INT_RAW_STS, &val); | |
407 | if (ret) | |
408 | return ret; | |
409 | ||
410 | alrm->pending = !!(val & SPRD_RTC_ALARM_EN); | |
411 | return 0; | |
412 | } | |
413 | ||
414 | static int sprd_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
415 | { | |
416 | struct sprd_rtc *rtc = dev_get_drvdata(dev); | |
417 | time64_t secs = rtc_tm_to_time64(&alrm->time); | |
418 | struct rtc_time aie_time = | |
419 | rtc_ktime_to_tm(rtc->rtc->aie_timer.node.expires); | |
420 | int ret; | |
421 | ||
422 | /* | |
423 | * We have 2 groups alarms: normal alarm and auxiliary alarm. Since | |
424 | * both normal alarm event and auxiliary alarm event can wake up system | |
425 | * from deep sleep, but only alarm event can power up system from power | |
426 | * down status. Moreover we do not need to poll about 125ms when | |
427 | * updating auxiliary alarm registers. Thus we usually set auxiliary | |
428 | * alarm when wake up system from deep sleep, and for other scenarios, | |
429 | * we should set normal alarm with polling status. | |
430 | * | |
431 | * So here we check if the alarm time is set by aie_timer, if yes, we | |
432 | * should set normal alarm, if not, we should set auxiliary alarm which | |
433 | * means it is just a wake event. | |
434 | */ | |
435 | if (!rtc->rtc->aie_timer.enabled || rtc_tm_sub(&aie_time, &alrm->time)) | |
436 | return sprd_rtc_set_aux_alarm(dev, alrm); | |
437 | ||
438 | /* clear the alarm interrupt status firstly */ | |
439 | ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, | |
440 | SPRD_RTC_ALARM_EN); | |
441 | if (ret) | |
442 | return ret; | |
443 | ||
444 | ret = sprd_rtc_set_secs(rtc, SPRD_RTC_ALARM, secs); | |
445 | if (ret) | |
446 | return ret; | |
447 | ||
448 | if (alrm->enabled) { | |
449 | ret = regmap_update_bits(rtc->regmap, | |
450 | rtc->base + SPRD_RTC_INT_EN, | |
451 | SPRD_RTC_ALARM_EN, | |
452 | SPRD_RTC_ALARM_EN); | |
453 | if (ret) | |
454 | return ret; | |
455 | ||
456 | /* unlock the alarm to enable the alarm function. */ | |
457 | ret = sprd_rtc_lock_alarm(rtc, false); | |
458 | } else { | |
459 | regmap_update_bits(rtc->regmap, | |
460 | rtc->base + SPRD_RTC_INT_EN, | |
461 | SPRD_RTC_ALARM_EN, 0); | |
462 | ||
463 | /* | |
464 | * Lock the alarm function in case fake alarm event will power | |
465 | * up systems. | |
466 | */ | |
467 | ret = sprd_rtc_lock_alarm(rtc, true); | |
468 | } | |
469 | ||
470 | return ret; | |
471 | } | |
472 | ||
473 | static int sprd_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | |
474 | { | |
475 | struct sprd_rtc *rtc = dev_get_drvdata(dev); | |
476 | int ret; | |
477 | ||
478 | if (enabled) { | |
479 | ret = regmap_update_bits(rtc->regmap, | |
480 | rtc->base + SPRD_RTC_INT_EN, | |
481 | SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN, | |
482 | SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN); | |
483 | if (ret) | |
484 | return ret; | |
485 | ||
486 | ret = sprd_rtc_lock_alarm(rtc, false); | |
487 | } else { | |
488 | regmap_update_bits(rtc->regmap, rtc->base + SPRD_RTC_INT_EN, | |
489 | SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN, 0); | |
490 | ||
491 | ret = sprd_rtc_lock_alarm(rtc, true); | |
492 | } | |
493 | ||
494 | return ret; | |
495 | } | |
496 | ||
497 | static const struct rtc_class_ops sprd_rtc_ops = { | |
498 | .read_time = sprd_rtc_read_time, | |
499 | .set_time = sprd_rtc_set_time, | |
500 | .read_alarm = sprd_rtc_read_alarm, | |
501 | .set_alarm = sprd_rtc_set_alarm, | |
502 | .alarm_irq_enable = sprd_rtc_alarm_irq_enable, | |
503 | }; | |
504 | ||
505 | static irqreturn_t sprd_rtc_handler(int irq, void *dev_id) | |
506 | { | |
507 | struct sprd_rtc *rtc = dev_id; | |
508 | int ret; | |
509 | ||
510 | ret = sprd_rtc_clear_alarm_ints(rtc); | |
511 | if (ret) | |
512 | return IRQ_RETVAL(ret); | |
513 | ||
514 | rtc_update_irq(rtc->rtc, 1, RTC_AF | RTC_IRQF); | |
515 | return IRQ_HANDLED; | |
516 | } | |
517 | ||
518 | static int sprd_rtc_check_power_down(struct sprd_rtc *rtc) | |
519 | { | |
520 | u32 val; | |
521 | int ret; | |
522 | ||
a0defd7c | 523 | ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_PWR_STS, &val); |
495bbde5 BW |
524 | if (ret) |
525 | return ret; | |
526 | ||
527 | /* | |
a0defd7c BW |
528 | * If the RTC power status value is SPRD_RTC_POWER_RESET_VALUE, which |
529 | * means the RTC has been powered down, so the RTC time values are | |
530 | * invalid. | |
495bbde5 | 531 | */ |
825156a5 | 532 | rtc->valid = val != SPRD_RTC_POWER_RESET_VALUE; |
495bbde5 BW |
533 | return 0; |
534 | } | |
535 | ||
bf2c532b BW |
536 | static int sprd_rtc_check_alarm_int(struct sprd_rtc *rtc) |
537 | { | |
538 | u32 val; | |
539 | int ret; | |
540 | ||
541 | ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_SPG_VALUE, &val); | |
542 | if (ret) | |
543 | return ret; | |
544 | ||
545 | /* | |
546 | * The SPRD_RTC_INT_EN register is not put in always-power-on region | |
547 | * supplied by VDDRTC, so we should check if we need enable the alarm | |
548 | * interrupt when system booting. | |
549 | * | |
550 | * If we have set SPRD_RTC_POWEROFF_ALM_FLAG which is saved in | |
551 | * always-power-on region, that means we have set one alarm last time, | |
552 | * so we should enable the alarm interrupt to help RTC core to see if | |
553 | * there is an alarm already set in RTC hardware. | |
554 | */ | |
555 | if (!(val & SPRD_RTC_POWEROFF_ALM_FLAG)) | |
556 | return 0; | |
557 | ||
558 | return regmap_update_bits(rtc->regmap, rtc->base + SPRD_RTC_INT_EN, | |
559 | SPRD_RTC_ALARM_EN, SPRD_RTC_ALARM_EN); | |
560 | } | |
561 | ||
495bbde5 BW |
562 | static int sprd_rtc_probe(struct platform_device *pdev) |
563 | { | |
564 | struct device_node *node = pdev->dev.of_node; | |
565 | struct sprd_rtc *rtc; | |
566 | int ret; | |
567 | ||
568 | rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL); | |
569 | if (!rtc) | |
570 | return -ENOMEM; | |
571 | ||
572 | rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL); | |
573 | if (!rtc->regmap) | |
574 | return -ENODEV; | |
575 | ||
576 | ret = of_property_read_u32(node, "reg", &rtc->base); | |
577 | if (ret) { | |
578 | dev_err(&pdev->dev, "failed to get RTC base address\n"); | |
579 | return ret; | |
580 | } | |
581 | ||
582 | rtc->irq = platform_get_irq(pdev, 0); | |
faac9102 | 583 | if (rtc->irq < 0) |
495bbde5 | 584 | return rtc->irq; |
495bbde5 | 585 | |
369a30a5 BW |
586 | rtc->rtc = devm_rtc_allocate_device(&pdev->dev); |
587 | if (IS_ERR(rtc->rtc)) | |
588 | return PTR_ERR(rtc->rtc); | |
589 | ||
495bbde5 BW |
590 | rtc->dev = &pdev->dev; |
591 | platform_set_drvdata(pdev, rtc); | |
592 | ||
bf2c532b BW |
593 | /* check if we need set the alarm interrupt */ |
594 | ret = sprd_rtc_check_alarm_int(rtc); | |
595 | if (ret) { | |
596 | dev_err(&pdev->dev, "failed to check RTC alarm interrupt\n"); | |
597 | return ret; | |
598 | } | |
599 | ||
495bbde5 BW |
600 | /* check if RTC time values are valid */ |
601 | ret = sprd_rtc_check_power_down(rtc); | |
602 | if (ret) { | |
603 | dev_err(&pdev->dev, "failed to check RTC time values\n"); | |
604 | return ret; | |
605 | } | |
606 | ||
607 | ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL, | |
608 | sprd_rtc_handler, | |
609 | IRQF_ONESHOT | IRQF_EARLY_RESUME, | |
610 | pdev->name, rtc); | |
611 | if (ret < 0) { | |
612 | dev_err(&pdev->dev, "failed to request RTC irq\n"); | |
613 | return ret; | |
614 | } | |
615 | ||
a86d6b23 BW |
616 | device_init_wakeup(&pdev->dev, 1); |
617 | ||
369a30a5 | 618 | rtc->rtc->ops = &sprd_rtc_ops; |
149aa91c BW |
619 | rtc->rtc->range_min = 0; |
620 | rtc->rtc->range_max = 5662310399LL; | |
fdcfd854 | 621 | ret = devm_rtc_register_device(rtc->rtc); |
369a30a5 | 622 | if (ret) { |
a86d6b23 | 623 | device_init_wakeup(&pdev->dev, 0); |
369a30a5 BW |
624 | return ret; |
625 | } | |
495bbde5 | 626 | |
495bbde5 BW |
627 | return 0; |
628 | } | |
629 | ||
495bbde5 BW |
630 | static const struct of_device_id sprd_rtc_of_match[] = { |
631 | { .compatible = "sprd,sc2731-rtc", }, | |
632 | { }, | |
633 | }; | |
634 | MODULE_DEVICE_TABLE(of, sprd_rtc_of_match); | |
635 | ||
636 | static struct platform_driver sprd_rtc_driver = { | |
637 | .driver = { | |
638 | .name = "sprd-rtc", | |
639 | .of_match_table = sprd_rtc_of_match, | |
640 | }, | |
641 | .probe = sprd_rtc_probe, | |
495bbde5 BW |
642 | }; |
643 | module_platform_driver(sprd_rtc_driver); | |
644 | ||
645 | MODULE_LICENSE("GPL v2"); | |
646 | MODULE_DESCRIPTION("Spreadtrum RTC Device Driver"); | |
647 | MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>"); |