Merge branch 'master' of /pub/scm/linux/kernel/git/jejb/scsi-misc-2.6 into for-40...
[linux-block.git] / drivers / rtc / rtc-s3c.c
CommitLineData
1add6781 1/* drivers/rtc/rtc-s3c.c
e48add8c
AD
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
1add6781
BD
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
9974b6ea 26#include <linux/log2.h>
5a0e3ad6 27#include <linux/slab.h>
1add6781 28
a09e64fb 29#include <mach/hardware.h>
1add6781
BD
30#include <asm/uaccess.h>
31#include <asm/io.h>
32#include <asm/irq.h>
e2cd00cf 33#include <plat/regs-rtc.h>
1add6781 34
9f4123b7
MC
35enum s3c_cpu_type {
36 TYPE_S3C2410,
37 TYPE_S3C64XX,
38};
39
1add6781
BD
40/* I have yet to find an S3C implementation with more than one
41 * of these rtc blocks in */
42
43static struct resource *s3c_rtc_mem;
44
e48add8c 45static struct clk *rtc_clk;
1add6781
BD
46static void __iomem *s3c_rtc_base;
47static int s3c_rtc_alarmno = NO_IRQ;
48static int s3c_rtc_tickno = NO_IRQ;
9f4123b7 49static enum s3c_cpu_type s3c_rtc_cpu_type;
1add6781
BD
50
51static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
1add6781
BD
52
53/* IRQ Handlers */
54
7d12e780 55static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
1add6781
BD
56{
57 struct rtc_device *rdev = id;
58
ab6a2d70 59 rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
2f3478f6
AD
60
61 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
62 writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
63
1add6781
BD
64 return IRQ_HANDLED;
65}
66
7d12e780 67static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
1add6781
BD
68{
69 struct rtc_device *rdev = id;
70
773be7ee 71 rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
2f3478f6
AD
72
73 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
74 writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
75
1add6781
BD
76 return IRQ_HANDLED;
77}
78
79/* Update control registers */
2ec38a03 80static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
1add6781
BD
81{
82 unsigned int tmp;
83
2ec38a03 84 pr_debug("%s: aie=%d\n", __func__, enabled);
1add6781 85
9a654518 86 tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
1add6781 87
2ec38a03 88 if (enabled)
1add6781
BD
89 tmp |= S3C2410_RTCALM_ALMEN;
90
9a654518 91 writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
2ec38a03
AL
92
93 return 0;
1add6781
BD
94}
95
773be7ee 96static int s3c_rtc_setfreq(struct device *dev, int freq)
1add6781 97{
9f4123b7
MC
98 struct platform_device *pdev = to_platform_device(dev);
99 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
100 unsigned int tmp = 0;
1add6781 101
5d2a5037
JC
102 if (!is_power_of_2(freq))
103 return -EINVAL;
104
1add6781 105 spin_lock_irq(&s3c_rtc_pie_lock);
1add6781 106
9f4123b7
MC
107 if (s3c_rtc_cpu_type == TYPE_S3C2410) {
108 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
109 tmp &= S3C2410_TICNT_ENABLE;
110 }
111
112 tmp |= (rtc_dev->max_user_freq / freq)-1;
1add6781 113
2f3478f6 114 writel(tmp, s3c_rtc_base + S3C2410_TICNT);
1add6781 115 spin_unlock_irq(&s3c_rtc_pie_lock);
773be7ee
BD
116
117 return 0;
1add6781
BD
118}
119
120/* Time read/write */
121
122static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
123{
124 unsigned int have_retried = 0;
9a654518 125 void __iomem *base = s3c_rtc_base;
1add6781
BD
126
127 retry_get_time:
9a654518
BD
128 rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
129 rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
130 rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
131 rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
132 rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
133 rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
1add6781
BD
134
135 /* the only way to work out wether the system was mid-update
136 * when we read it is to check the second counter, and if it
137 * is zero, then we re-try the entire read
138 */
139
140 if (rtc_tm->tm_sec == 0 && !have_retried) {
141 have_retried = 1;
142 goto retry_get_time;
143 }
144
30ffc40c
KK
145 pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
146 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
1add6781
BD
147 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
148
fe20ba70
AB
149 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
150 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
151 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
152 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
153 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
154 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
1add6781
BD
155
156 rtc_tm->tm_year += 100;
157 rtc_tm->tm_mon -= 1;
158
5b3ffddd 159 return rtc_valid_tm(rtc_tm);
1add6781
BD
160}
161
162static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
163{
9a654518 164 void __iomem *base = s3c_rtc_base;
641741e0 165 int year = tm->tm_year - 100;
9a654518 166
30ffc40c
KK
167 pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
168 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
641741e0
BD
169 tm->tm_hour, tm->tm_min, tm->tm_sec);
170
171 /* we get around y2k by simply not supporting it */
1add6781 172
641741e0 173 if (year < 0 || year >= 100) {
9a654518 174 dev_err(dev, "rtc only supports 100 years\n");
1add6781 175 return -EINVAL;
9a654518
BD
176 }
177
fe20ba70
AB
178 writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
179 writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
180 writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
181 writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
182 writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
183 writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
1add6781
BD
184
185 return 0;
186}
187
188static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
189{
190 struct rtc_time *alm_tm = &alrm->time;
9a654518 191 void __iomem *base = s3c_rtc_base;
1add6781
BD
192 unsigned int alm_en;
193
9a654518
BD
194 alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
195 alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
196 alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
197 alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
198 alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
199 alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
1add6781 200
9a654518 201 alm_en = readb(base + S3C2410_RTCALM);
1add6781 202
a2db8dfc
DB
203 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
204
30ffc40c 205 pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781 206 alm_en,
30ffc40c 207 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
1add6781
BD
208 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
209
210
211 /* decode the alarm enable field */
212
213 if (alm_en & S3C2410_RTCALM_SECEN)
fe20ba70 214 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
1add6781 215 else
dd061d1a 216 alm_tm->tm_sec = -1;
1add6781
BD
217
218 if (alm_en & S3C2410_RTCALM_MINEN)
fe20ba70 219 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
1add6781 220 else
dd061d1a 221 alm_tm->tm_min = -1;
1add6781
BD
222
223 if (alm_en & S3C2410_RTCALM_HOUREN)
fe20ba70 224 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
1add6781 225 else
dd061d1a 226 alm_tm->tm_hour = -1;
1add6781
BD
227
228 if (alm_en & S3C2410_RTCALM_DAYEN)
fe20ba70 229 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
1add6781 230 else
dd061d1a 231 alm_tm->tm_mday = -1;
1add6781
BD
232
233 if (alm_en & S3C2410_RTCALM_MONEN) {
fe20ba70 234 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
1add6781
BD
235 alm_tm->tm_mon -= 1;
236 } else {
dd061d1a 237 alm_tm->tm_mon = -1;
1add6781
BD
238 }
239
240 if (alm_en & S3C2410_RTCALM_YEAREN)
fe20ba70 241 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
1add6781 242 else
dd061d1a 243 alm_tm->tm_year = -1;
1add6781
BD
244
245 return 0;
246}
247
248static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
249{
250 struct rtc_time *tm = &alrm->time;
9a654518 251 void __iomem *base = s3c_rtc_base;
1add6781
BD
252 unsigned int alrm_en;
253
30ffc40c 254 pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781 255 alrm->enabled,
30ffc40c
KK
256 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
257 tm->tm_hour, tm->tm_min, tm->tm_sec);
1add6781
BD
258
259
9a654518
BD
260 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
261 writeb(0x00, base + S3C2410_RTCALM);
1add6781
BD
262
263 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
264 alrm_en |= S3C2410_RTCALM_SECEN;
fe20ba70 265 writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
1add6781
BD
266 }
267
268 if (tm->tm_min < 60 && tm->tm_min >= 0) {
269 alrm_en |= S3C2410_RTCALM_MINEN;
fe20ba70 270 writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
1add6781
BD
271 }
272
273 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
274 alrm_en |= S3C2410_RTCALM_HOUREN;
fe20ba70 275 writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
1add6781
BD
276 }
277
278 pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
279
9a654518 280 writeb(alrm_en, base + S3C2410_RTCALM);
1add6781 281
2ec38a03 282 s3c_rtc_setaie(dev, alrm->enabled);
1add6781 283
1add6781
BD
284 return 0;
285}
286
1add6781
BD
287static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
288{
9f4123b7 289 unsigned int ticnt;
1add6781 290
9f4123b7 291 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
f61ae671 292 ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
9f4123b7
MC
293 ticnt &= S3C64XX_RTCCON_TICEN;
294 } else {
295 ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
296 ticnt &= S3C2410_TICNT_ENABLE;
297 }
298
299 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
1add6781
BD
300 return 0;
301}
302
303static int s3c_rtc_open(struct device *dev)
304{
305 struct platform_device *pdev = to_platform_device(dev);
306 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
307 int ret;
308
309 ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
38515e90 310 IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev);
1add6781
BD
311
312 if (ret) {
313 dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
314 return ret;
315 }
316
317 ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
38515e90 318 IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev);
1add6781
BD
319
320 if (ret) {
321 dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
322 goto tick_err;
323 }
324
325 return ret;
326
327 tick_err:
328 free_irq(s3c_rtc_alarmno, rtc_dev);
329 return ret;
330}
331
332static void s3c_rtc_release(struct device *dev)
333{
334 struct platform_device *pdev = to_platform_device(dev);
335 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
336
337 /* do not clear AIE here, it may be needed for wake */
338
1add6781
BD
339 free_irq(s3c_rtc_alarmno, rtc_dev);
340 free_irq(s3c_rtc_tickno, rtc_dev);
341}
342
ff8371ac 343static const struct rtc_class_ops s3c_rtcops = {
1add6781
BD
344 .open = s3c_rtc_open,
345 .release = s3c_rtc_release,
1add6781
BD
346 .read_time = s3c_rtc_gettime,
347 .set_time = s3c_rtc_settime,
348 .read_alarm = s3c_rtc_getalarm,
349 .set_alarm = s3c_rtc_setalarm,
e6eb524e
CY
350 .proc = s3c_rtc_proc,
351 .alarm_irq_enable = s3c_rtc_setaie,
1add6781
BD
352};
353
354static void s3c_rtc_enable(struct platform_device *pdev, int en)
355{
9a654518 356 void __iomem *base = s3c_rtc_base;
1add6781
BD
357 unsigned int tmp;
358
359 if (s3c_rtc_base == NULL)
360 return;
361
362 if (!en) {
f61ae671 363 tmp = readw(base + S3C2410_RTCCON);
9f4123b7
MC
364 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
365 tmp &= ~S3C64XX_RTCCON_TICEN;
366 tmp &= ~S3C2410_RTCCON_RTCEN;
f61ae671 367 writew(tmp, base + S3C2410_RTCCON);
9f4123b7
MC
368
369 if (s3c_rtc_cpu_type == TYPE_S3C2410) {
370 tmp = readb(base + S3C2410_TICNT);
371 tmp &= ~S3C2410_TICNT_ENABLE;
372 writeb(tmp, base + S3C2410_TICNT);
373 }
1add6781
BD
374 } else {
375 /* re-enable the device, and check it is ok */
376
f61ae671 377 if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
1add6781
BD
378 dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
379
f61ae671
CY
380 tmp = readw(base + S3C2410_RTCCON);
381 writew(tmp | S3C2410_RTCCON_RTCEN,
382 base + S3C2410_RTCCON);
1add6781
BD
383 }
384
f61ae671 385 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
1add6781
BD
386 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
387
f61ae671
CY
388 tmp = readw(base + S3C2410_RTCCON);
389 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
390 base + S3C2410_RTCCON);
1add6781
BD
391 }
392
f61ae671 393 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
1add6781
BD
394 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
395
f61ae671
CY
396 tmp = readw(base + S3C2410_RTCCON);
397 writew(tmp & ~S3C2410_RTCCON_CLKRST,
398 base + S3C2410_RTCCON);
1add6781
BD
399 }
400 }
401}
402
4cd0c5c4 403static int __devexit s3c_rtc_remove(struct platform_device *dev)
1add6781
BD
404{
405 struct rtc_device *rtc = platform_get_drvdata(dev);
406
407 platform_set_drvdata(dev, NULL);
408 rtc_device_unregister(rtc);
409
2ec38a03 410 s3c_rtc_setaie(&dev->dev, 0);
1add6781 411
e48add8c
AD
412 clk_disable(rtc_clk);
413 clk_put(rtc_clk);
414 rtc_clk = NULL;
415
1add6781
BD
416 iounmap(s3c_rtc_base);
417 release_resource(s3c_rtc_mem);
418 kfree(s3c_rtc_mem);
419
420 return 0;
421}
422
4cd0c5c4 423static int __devinit s3c_rtc_probe(struct platform_device *pdev)
1add6781
BD
424{
425 struct rtc_device *rtc;
e1df962e 426 struct rtc_time rtc_tm;
1add6781
BD
427 struct resource *res;
428 int ret;
429
2a4e2b87 430 pr_debug("%s: probe=%p\n", __func__, pdev);
1add6781
BD
431
432 /* find the IRQs */
433
434 s3c_rtc_tickno = platform_get_irq(pdev, 1);
435 if (s3c_rtc_tickno < 0) {
436 dev_err(&pdev->dev, "no irq for rtc tick\n");
437 return -ENOENT;
438 }
439
440 s3c_rtc_alarmno = platform_get_irq(pdev, 0);
441 if (s3c_rtc_alarmno < 0) {
442 dev_err(&pdev->dev, "no irq for alarm\n");
443 return -ENOENT;
444 }
445
446 pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
447 s3c_rtc_tickno, s3c_rtc_alarmno);
448
449 /* get the memory region */
450
451 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
452 if (res == NULL) {
453 dev_err(&pdev->dev, "failed to get memory region resource\n");
454 return -ENOENT;
455 }
456
457 s3c_rtc_mem = request_mem_region(res->start,
9a654518
BD
458 res->end-res->start+1,
459 pdev->name);
1add6781
BD
460
461 if (s3c_rtc_mem == NULL) {
462 dev_err(&pdev->dev, "failed to reserve memory region\n");
463 ret = -ENOENT;
464 goto err_nores;
465 }
466
467 s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
468 if (s3c_rtc_base == NULL) {
469 dev_err(&pdev->dev, "failed ioremap()\n");
470 ret = -EINVAL;
471 goto err_nomap;
472 }
473
e48add8c
AD
474 rtc_clk = clk_get(&pdev->dev, "rtc");
475 if (IS_ERR(rtc_clk)) {
476 dev_err(&pdev->dev, "failed to find rtc clock source\n");
477 ret = PTR_ERR(rtc_clk);
478 rtc_clk = NULL;
479 goto err_clk;
480 }
481
482 clk_enable(rtc_clk);
483
1add6781
BD
484 /* check to see if everything is setup correctly */
485
486 s3c_rtc_enable(pdev, 1);
487
f61ae671
CY
488 pr_debug("s3c2410_rtc: RTCCON=%02x\n",
489 readw(s3c_rtc_base + S3C2410_RTCCON));
1add6781 490
51b7616e
YK
491 device_init_wakeup(&pdev->dev, 1);
492
1add6781
BD
493 /* register RTC and exit */
494
495 rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
496 THIS_MODULE);
497
498 if (IS_ERR(rtc)) {
499 dev_err(&pdev->dev, "cannot attach rtc\n");
500 ret = PTR_ERR(rtc);
501 goto err_nortc;
502 }
503
eaa6e4dd
MC
504 s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
505
051fe54e
TK
506 /* Check RTC Time */
507
e1df962e 508 s3c_rtc_gettime(NULL, &rtc_tm);
051fe54e 509
e1df962e
CY
510 if (rtc_valid_tm(&rtc_tm)) {
511 rtc_tm.tm_year = 100;
512 rtc_tm.tm_mon = 0;
513 rtc_tm.tm_mday = 1;
514 rtc_tm.tm_hour = 0;
515 rtc_tm.tm_min = 0;
516 rtc_tm.tm_sec = 0;
517
518 s3c_rtc_settime(NULL, &rtc_tm);
519
520 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
051fe54e
TK
521 }
522
9f4123b7
MC
523 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
524 rtc->max_user_freq = 32768;
525 else
526 rtc->max_user_freq = 128;
527
1add6781 528 platform_set_drvdata(pdev, rtc);
e893de59
MC
529
530 s3c_rtc_setfreq(&pdev->dev, 1);
531
1add6781
BD
532 return 0;
533
534 err_nortc:
535 s3c_rtc_enable(pdev, 0);
e48add8c
AD
536 clk_disable(rtc_clk);
537 clk_put(rtc_clk);
538
539 err_clk:
1add6781
BD
540 iounmap(s3c_rtc_base);
541
542 err_nomap:
543 release_resource(s3c_rtc_mem);
544
545 err_nores:
546 return ret;
547}
548
549#ifdef CONFIG_PM
550
551/* RTC Power management control */
552
9f4123b7 553static int ticnt_save, ticnt_en_save;
1add6781
BD
554
555static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
556{
1add6781 557 /* save TICNT for anyone using periodic interrupts */
9a654518 558 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
9f4123b7 559 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
f61ae671 560 ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
9f4123b7
MC
561 ticnt_en_save &= S3C64XX_RTCCON_TICEN;
562 }
1add6781 563 s3c_rtc_enable(pdev, 0);
f501ed52
VZ
564
565 if (device_may_wakeup(&pdev->dev))
566 enable_irq_wake(s3c_rtc_alarmno);
567
1add6781
BD
568 return 0;
569}
570
571static int s3c_rtc_resume(struct platform_device *pdev)
572{
9f4123b7
MC
573 unsigned int tmp;
574
1add6781 575 s3c_rtc_enable(pdev, 1);
9a654518 576 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
9f4123b7 577 if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
f61ae671
CY
578 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
579 writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
9f4123b7 580 }
f501ed52
VZ
581
582 if (device_may_wakeup(&pdev->dev))
583 disable_irq_wake(s3c_rtc_alarmno);
584
1add6781
BD
585 return 0;
586}
587#else
588#define s3c_rtc_suspend NULL
589#define s3c_rtc_resume NULL
590#endif
591
9f4123b7
MC
592static struct platform_device_id s3c_rtc_driver_ids[] = {
593 {
594 .name = "s3c2410-rtc",
595 .driver_data = TYPE_S3C2410,
596 }, {
597 .name = "s3c64xx-rtc",
598 .driver_data = TYPE_S3C64XX,
599 },
600 { }
601};
602
603MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
604
605static struct platform_driver s3c_rtc_driver = {
1add6781 606 .probe = s3c_rtc_probe,
4cd0c5c4 607 .remove = __devexit_p(s3c_rtc_remove),
1add6781
BD
608 .suspend = s3c_rtc_suspend,
609 .resume = s3c_rtc_resume,
9f4123b7 610 .id_table = s3c_rtc_driver_ids,
1add6781 611 .driver = {
9f4123b7 612 .name = "s3c-rtc",
1add6781
BD
613 .owner = THIS_MODULE,
614 },
615};
616
617static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
618
619static int __init s3c_rtc_init(void)
620{
621 printk(banner);
9f4123b7 622 return platform_driver_register(&s3c_rtc_driver);
1add6781
BD
623}
624
625static void __exit s3c_rtc_exit(void)
626{
9f4123b7 627 platform_driver_unregister(&s3c_rtc_driver);
1add6781
BD
628}
629
630module_init(s3c_rtc_init);
631module_exit(s3c_rtc_exit);
632
633MODULE_DESCRIPTION("Samsung S3C RTC Driver");
634MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
635MODULE_LICENSE("GPL");
ad28a07b 636MODULE_ALIAS("platform:s3c2410-rtc");