Commit | Line | Data |
---|---|---|
d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1add6781 | 2 | /* drivers/rtc/rtc-s3c.c |
e48add8c AD |
3 | * |
4 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com/ | |
1add6781 BD |
6 | * |
7 | * Copyright (c) 2004,2006 Simtec Electronics | |
8 | * Ben Dooks, <ben@simtec.co.uk> | |
9 | * http://armlinux.simtec.co.uk/ | |
10 | * | |
1add6781 BD |
11 | * S3C2410/S3C2440/S3C24XX Internal RTC Driver |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/fs.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/rtc.h> | |
21 | #include <linux/bcd.h> | |
22 | #include <linux/clk.h> | |
9974b6ea | 23 | #include <linux/log2.h> |
5a0e3ad6 | 24 | #include <linux/slab.h> |
39ce4084 | 25 | #include <linux/of.h> |
64704c92 | 26 | #include <linux/of_device.h> |
dbd9acbe SK |
27 | #include <linux/uaccess.h> |
28 | #include <linux/io.h> | |
1add6781 | 29 | |
1add6781 | 30 | #include <asm/irq.h> |
b9d7c5d3 | 31 | #include "rtc-s3c.h" |
1add6781 | 32 | |
19be09f5 CC |
33 | struct s3c_rtc { |
34 | struct device *dev; | |
35 | struct rtc_device *rtc; | |
36 | ||
37 | void __iomem *base; | |
38 | struct clk *rtc_clk; | |
df9e26d0 | 39 | struct clk *rtc_src_clk; |
5a5b614b | 40 | bool alarm_enabled; |
19be09f5 | 41 | |
6b72086d | 42 | const struct s3c_rtc_data *data; |
1add6781 | 43 | |
19be09f5 | 44 | int irq_alarm; |
5a5b614b | 45 | spinlock_t alarm_lock; |
1add6781 | 46 | |
19be09f5 CC |
47 | bool wake_en; |
48 | }; | |
49 | ||
ae05c950 | 50 | struct s3c_rtc_data { |
df9e26d0 | 51 | bool needs_src_clk; |
ae05c950 CC |
52 | |
53 | void (*irq_handler) (struct s3c_rtc *info, int mask); | |
ae05c950 CC |
54 | void (*enable) (struct s3c_rtc *info); |
55 | void (*disable) (struct s3c_rtc *info); | |
56 | }; | |
57 | ||
498bcf31 | 58 | static int s3c_rtc_enable_clk(struct s3c_rtc *info) |
88cee8fd | 59 | { |
5a5b614b | 60 | int ret; |
88cee8fd | 61 | |
5a5b614b MS |
62 | ret = clk_enable(info->rtc_clk); |
63 | if (ret) | |
64 | return ret; | |
498bcf31 | 65 | |
5a5b614b MS |
66 | if (info->data->needs_src_clk) { |
67 | ret = clk_enable(info->rtc_src_clk); | |
68 | if (ret) { | |
69 | clk_disable(info->rtc_clk); | |
70 | return ret; | |
498bcf31 | 71 | } |
1fb1c35f | 72 | } |
5a5b614b | 73 | return 0; |
24e14554 CC |
74 | } |
75 | ||
76 | static void s3c_rtc_disable_clk(struct s3c_rtc *info) | |
77 | { | |
5a5b614b MS |
78 | if (info->data->needs_src_clk) |
79 | clk_disable(info->rtc_src_clk); | |
80 | clk_disable(info->rtc_clk); | |
88cee8fd DK |
81 | } |
82 | ||
ce9af893 | 83 | /* IRQ Handler */ |
ae05c950 | 84 | static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) |
1add6781 | 85 | { |
19be09f5 | 86 | struct s3c_rtc *info = (struct s3c_rtc *)id; |
1add6781 | 87 | |
ae05c950 CC |
88 | if (info->data->irq_handler) |
89 | info->data->irq_handler(info, S3C2410_INTP_ALM); | |
2f3478f6 | 90 | |
1add6781 BD |
91 | return IRQ_HANDLED; |
92 | } | |
93 | ||
94 | /* Update control registers */ | |
2ec38a03 | 95 | static int s3c_rtc_setaie(struct device *dev, unsigned int enabled) |
1add6781 | 96 | { |
19be09f5 | 97 | struct s3c_rtc *info = dev_get_drvdata(dev); |
5a5b614b | 98 | unsigned long flags; |
1add6781 | 99 | unsigned int tmp; |
498bcf31 | 100 | int ret; |
1add6781 | 101 | |
19be09f5 | 102 | dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled); |
1add6781 | 103 | |
498bcf31 KK |
104 | ret = s3c_rtc_enable_clk(info); |
105 | if (ret) | |
106 | return ret; | |
24e14554 | 107 | |
19be09f5 | 108 | tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; |
1add6781 | 109 | |
2ec38a03 | 110 | if (enabled) |
1add6781 BD |
111 | tmp |= S3C2410_RTCALM_ALMEN; |
112 | ||
19be09f5 | 113 | writeb(tmp, info->base + S3C2410_RTCALM); |
2ec38a03 | 114 | |
5a5b614b | 115 | spin_lock_irqsave(&info->alarm_lock, flags); |
88cee8fd | 116 | |
5a5b614b | 117 | if (info->alarm_enabled && !enabled) |
1fb1c35f | 118 | s3c_rtc_disable_clk(info); |
5a5b614b MS |
119 | else if (!info->alarm_enabled && enabled) |
120 | ret = s3c_rtc_enable_clk(info); | |
1fb1c35f | 121 | |
5a5b614b MS |
122 | info->alarm_enabled = enabled; |
123 | spin_unlock_irqrestore(&info->alarm_lock, flags); | |
124 | ||
125 | s3c_rtc_disable_clk(info); | |
126 | ||
127 | return ret; | |
1add6781 BD |
128 | } |
129 | ||
e4a1444e SP |
130 | /* Read time from RTC and convert it from BCD */ |
131 | static int s3c_rtc_read_time(struct s3c_rtc *info, struct rtc_time *tm) | |
1add6781 BD |
132 | { |
133 | unsigned int have_retried = 0; | |
498bcf31 | 134 | int ret; |
1add6781 | 135 | |
498bcf31 KK |
136 | ret = s3c_rtc_enable_clk(info); |
137 | if (ret) | |
138 | return ret; | |
df9e26d0 | 139 | |
fc1afe60 | 140 | retry_get_time: |
e4a1444e SP |
141 | tm->tm_min = readb(info->base + S3C2410_RTCMIN); |
142 | tm->tm_hour = readb(info->base + S3C2410_RTCHOUR); | |
143 | tm->tm_mday = readb(info->base + S3C2410_RTCDATE); | |
144 | tm->tm_mon = readb(info->base + S3C2410_RTCMON); | |
145 | tm->tm_year = readb(info->base + S3C2410_RTCYEAR); | |
146 | tm->tm_sec = readb(info->base + S3C2410_RTCSEC); | |
147 | ||
148 | /* | |
149 | * The only way to work out whether the system was mid-update | |
1add6781 BD |
150 | * when we read it is to check the second counter, and if it |
151 | * is zero, then we re-try the entire read | |
152 | */ | |
e4a1444e | 153 | if (tm->tm_sec == 0 && !have_retried) { |
1add6781 BD |
154 | have_retried = 1; |
155 | goto retry_get_time; | |
156 | } | |
157 | ||
24e14554 CC |
158 | s3c_rtc_disable_clk(info); |
159 | ||
e4a1444e SP |
160 | tm->tm_sec = bcd2bin(tm->tm_sec); |
161 | tm->tm_min = bcd2bin(tm->tm_min); | |
162 | tm->tm_hour = bcd2bin(tm->tm_hour); | |
163 | tm->tm_mday = bcd2bin(tm->tm_mday); | |
164 | tm->tm_mon = bcd2bin(tm->tm_mon); | |
165 | tm->tm_year = bcd2bin(tm->tm_year); | |
1add6781 | 166 | |
22652ba7 | 167 | return 0; |
1add6781 BD |
168 | } |
169 | ||
e4a1444e SP |
170 | /* Convert time to BCD and write it to RTC */ |
171 | static int s3c_rtc_write_time(struct s3c_rtc *info, const struct rtc_time *tm) | |
1add6781 | 172 | { |
498bcf31 | 173 | int ret; |
9a654518 | 174 | |
498bcf31 KK |
175 | ret = s3c_rtc_enable_clk(info); |
176 | if (ret) | |
177 | return ret; | |
19be09f5 CC |
178 | |
179 | writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC); | |
180 | writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN); | |
181 | writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR); | |
182 | writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE); | |
e4a1444e SP |
183 | writeb(bin2bcd(tm->tm_mon), info->base + S3C2410_RTCMON); |
184 | writeb(bin2bcd(tm->tm_year), info->base + S3C2410_RTCYEAR); | |
19be09f5 | 185 | |
24e14554 | 186 | s3c_rtc_disable_clk(info); |
1add6781 BD |
187 | |
188 | return 0; | |
189 | } | |
190 | ||
e4a1444e SP |
191 | static int s3c_rtc_gettime(struct device *dev, struct rtc_time *tm) |
192 | { | |
193 | struct s3c_rtc *info = dev_get_drvdata(dev); | |
194 | int ret; | |
195 | ||
196 | ret = s3c_rtc_read_time(info, tm); | |
197 | if (ret) | |
198 | return ret; | |
199 | ||
200 | /* Convert internal representation to actual date/time */ | |
201 | tm->tm_year += 100; | |
202 | tm->tm_mon -= 1; | |
203 | ||
204 | dev_dbg(dev, "read time %ptR\n", tm); | |
205 | return 0; | |
206 | } | |
207 | ||
208 | static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) | |
209 | { | |
210 | struct s3c_rtc *info = dev_get_drvdata(dev); | |
211 | struct rtc_time rtc_tm = *tm; | |
212 | ||
213 | dev_dbg(dev, "set time %ptR\n", tm); | |
214 | ||
215 | /* | |
216 | * Convert actual date/time to internal representation. | |
217 | * We get around Y2K by simply not supporting it. | |
218 | */ | |
219 | rtc_tm.tm_year -= 100; | |
220 | rtc_tm.tm_mon += 1; | |
221 | ||
e4a1444e SP |
222 | return s3c_rtc_write_time(info, &rtc_tm); |
223 | } | |
224 | ||
1add6781 BD |
225 | static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) |
226 | { | |
19be09f5 | 227 | struct s3c_rtc *info = dev_get_drvdata(dev); |
1add6781 BD |
228 | struct rtc_time *alm_tm = &alrm->time; |
229 | unsigned int alm_en; | |
498bcf31 | 230 | int ret; |
1add6781 | 231 | |
498bcf31 KK |
232 | ret = s3c_rtc_enable_clk(info); |
233 | if (ret) | |
234 | return ret; | |
df9e26d0 | 235 | |
19be09f5 CC |
236 | alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC); |
237 | alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN); | |
238 | alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR); | |
239 | alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON); | |
240 | alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE); | |
241 | alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR); | |
1add6781 | 242 | |
19be09f5 | 243 | alm_en = readb(info->base + S3C2410_RTCALM); |
1add6781 | 244 | |
24e14554 CC |
245 | s3c_rtc_disable_clk(info); |
246 | ||
a2db8dfc DB |
247 | alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; |
248 | ||
9a1bacf4 | 249 | dev_dbg(dev, "read alarm %d, %ptR\n", alm_en, alm_tm); |
1add6781 | 250 | |
1add6781 | 251 | /* decode the alarm enable field */ |
1add6781 | 252 | if (alm_en & S3C2410_RTCALM_SECEN) |
fe20ba70 | 253 | alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec); |
1add6781 BD |
254 | |
255 | if (alm_en & S3C2410_RTCALM_MINEN) | |
fe20ba70 | 256 | alm_tm->tm_min = bcd2bin(alm_tm->tm_min); |
1add6781 BD |
257 | |
258 | if (alm_en & S3C2410_RTCALM_HOUREN) | |
fe20ba70 | 259 | alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour); |
1add6781 BD |
260 | |
261 | if (alm_en & S3C2410_RTCALM_DAYEN) | |
fe20ba70 | 262 | alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday); |
1add6781 BD |
263 | |
264 | if (alm_en & S3C2410_RTCALM_MONEN) { | |
fe20ba70 | 265 | alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon); |
1add6781 | 266 | alm_tm->tm_mon -= 1; |
1add6781 BD |
267 | } |
268 | ||
269 | if (alm_en & S3C2410_RTCALM_YEAREN) | |
fe20ba70 | 270 | alm_tm->tm_year = bcd2bin(alm_tm->tm_year); |
1add6781 BD |
271 | |
272 | return 0; | |
273 | } | |
274 | ||
275 | static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
276 | { | |
19be09f5 | 277 | struct s3c_rtc *info = dev_get_drvdata(dev); |
1add6781 BD |
278 | struct rtc_time *tm = &alrm->time; |
279 | unsigned int alrm_en; | |
498bcf31 | 280 | int ret; |
1add6781 | 281 | |
9a1bacf4 | 282 | dev_dbg(dev, "s3c_rtc_setalarm: %d, %ptR\n", alrm->enabled, tm); |
1add6781 | 283 | |
498bcf31 KK |
284 | ret = s3c_rtc_enable_clk(info); |
285 | if (ret) | |
286 | return ret; | |
24e14554 | 287 | |
19be09f5 CC |
288 | alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; |
289 | writeb(0x00, info->base + S3C2410_RTCALM); | |
1add6781 BD |
290 | |
291 | if (tm->tm_sec < 60 && tm->tm_sec >= 0) { | |
292 | alrm_en |= S3C2410_RTCALM_SECEN; | |
19be09f5 | 293 | writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC); |
1add6781 BD |
294 | } |
295 | ||
296 | if (tm->tm_min < 60 && tm->tm_min >= 0) { | |
297 | alrm_en |= S3C2410_RTCALM_MINEN; | |
19be09f5 | 298 | writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN); |
1add6781 BD |
299 | } |
300 | ||
301 | if (tm->tm_hour < 24 && tm->tm_hour >= 0) { | |
302 | alrm_en |= S3C2410_RTCALM_HOUREN; | |
19be09f5 | 303 | writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR); |
1add6781 BD |
304 | } |
305 | ||
fb4ac3c1 KK |
306 | if (tm->tm_mon < 12 && tm->tm_mon >= 0) { |
307 | alrm_en |= S3C2410_RTCALM_MONEN; | |
308 | writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON); | |
309 | } | |
310 | ||
311 | if (tm->tm_mday <= 31 && tm->tm_mday >= 1) { | |
312 | alrm_en |= S3C2410_RTCALM_DAYEN; | |
313 | writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE); | |
314 | } | |
315 | ||
d4a48c2a | 316 | dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en); |
1add6781 | 317 | |
19be09f5 | 318 | writeb(alrm_en, info->base + S3C2410_RTCALM); |
1add6781 | 319 | |
24e14554 | 320 | s3c_rtc_setaie(dev, alrm->enabled); |
19be09f5 | 321 | |
5a5b614b MS |
322 | s3c_rtc_disable_clk(info); |
323 | ||
1add6781 BD |
324 | return 0; |
325 | } | |
326 | ||
ff8371ac | 327 | static const struct rtc_class_ops s3c_rtcops = { |
1add6781 BD |
328 | .read_time = s3c_rtc_gettime, |
329 | .set_time = s3c_rtc_settime, | |
330 | .read_alarm = s3c_rtc_getalarm, | |
331 | .set_alarm = s3c_rtc_setalarm, | |
e6eb524e | 332 | .alarm_irq_enable = s3c_rtc_setaie, |
1add6781 BD |
333 | }; |
334 | ||
ae05c950 | 335 | static void s3c24xx_rtc_enable(struct s3c_rtc *info) |
1add6781 | 336 | { |
d67288da | 337 | unsigned int con, tmp; |
1add6781 | 338 | |
d67288da | 339 | con = readw(info->base + S3C2410_RTCCON); |
ae05c950 CC |
340 | /* re-enable the device, and check it is ok */ |
341 | if ((con & S3C2410_RTCCON_RTCEN) == 0) { | |
342 | dev_info(info->dev, "rtc disabled, re-enabling\n"); | |
1add6781 | 343 | |
ae05c950 | 344 | tmp = readw(info->base + S3C2410_RTCCON); |
fc1afe60 | 345 | writew(tmp | S3C2410_RTCCON_RTCEN, info->base + S3C2410_RTCCON); |
ae05c950 | 346 | } |
1add6781 | 347 | |
ae05c950 CC |
348 | if (con & S3C2410_RTCCON_CNTSEL) { |
349 | dev_info(info->dev, "removing RTCCON_CNTSEL\n"); | |
1add6781 | 350 | |
ae05c950 CC |
351 | tmp = readw(info->base + S3C2410_RTCCON); |
352 | writew(tmp & ~S3C2410_RTCCON_CNTSEL, | |
fc1afe60 | 353 | info->base + S3C2410_RTCCON); |
ae05c950 | 354 | } |
1add6781 | 355 | |
ae05c950 CC |
356 | if (con & S3C2410_RTCCON_CLKRST) { |
357 | dev_info(info->dev, "removing RTCCON_CLKRST\n"); | |
1add6781 | 358 | |
ae05c950 CC |
359 | tmp = readw(info->base + S3C2410_RTCCON); |
360 | writew(tmp & ~S3C2410_RTCCON_CLKRST, | |
fc1afe60 | 361 | info->base + S3C2410_RTCCON); |
1add6781 | 362 | } |
ae05c950 CC |
363 | } |
364 | ||
365 | static void s3c24xx_rtc_disable(struct s3c_rtc *info) | |
366 | { | |
367 | unsigned int con; | |
368 | ||
ae05c950 CC |
369 | con = readw(info->base + S3C2410_RTCCON); |
370 | con &= ~S3C2410_RTCCON_RTCEN; | |
371 | writew(con, info->base + S3C2410_RTCCON); | |
372 | ||
373 | con = readb(info->base + S3C2410_TICNT); | |
374 | con &= ~S3C2410_TICNT_ENABLE; | |
375 | writeb(con, info->base + S3C2410_TICNT); | |
ae05c950 CC |
376 | } |
377 | ||
378 | static void s3c6410_rtc_disable(struct s3c_rtc *info) | |
379 | { | |
380 | unsigned int con; | |
381 | ||
ae05c950 CC |
382 | con = readw(info->base + S3C2410_RTCCON); |
383 | con &= ~S3C64XX_RTCCON_TICEN; | |
384 | con &= ~S3C2410_RTCCON_RTCEN; | |
385 | writew(con, info->base + S3C2410_RTCCON); | |
1add6781 BD |
386 | } |
387 | ||
19be09f5 | 388 | static int s3c_rtc_remove(struct platform_device *pdev) |
1add6781 | 389 | { |
19be09f5 CC |
390 | struct s3c_rtc *info = platform_get_drvdata(pdev); |
391 | ||
392 | s3c_rtc_setaie(info->dev, 0); | |
1add6781 | 393 | |
7f23a936 JS |
394 | if (info->data->needs_src_clk) |
395 | clk_unprepare(info->rtc_src_clk); | |
19be09f5 | 396 | clk_unprepare(info->rtc_clk); |
e48add8c | 397 | |
1add6781 BD |
398 | return 0; |
399 | } | |
400 | ||
5a167f45 | 401 | static int s3c_rtc_probe(struct platform_device *pdev) |
1add6781 | 402 | { |
19be09f5 | 403 | struct s3c_rtc *info = NULL; |
1add6781 BD |
404 | int ret; |
405 | ||
19be09f5 CC |
406 | info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); |
407 | if (!info) | |
408 | return -ENOMEM; | |
1add6781 | 409 | |
19be09f5 | 410 | info->dev = &pdev->dev; |
64704c92 | 411 | info->data = of_device_get_match_data(&pdev->dev); |
ae05c950 CC |
412 | if (!info->data) { |
413 | dev_err(&pdev->dev, "failed getting s3c_rtc_data\n"); | |
414 | return -EINVAL; | |
415 | } | |
5a5b614b | 416 | spin_lock_init(&info->alarm_lock); |
19be09f5 CC |
417 | |
418 | platform_set_drvdata(pdev, info); | |
419 | ||
420 | info->irq_alarm = platform_get_irq(pdev, 0); | |
faac9102 | 421 | if (info->irq_alarm < 0) |
19be09f5 | 422 | return info->irq_alarm; |
1add6781 | 423 | |
ce9af893 | 424 | dev_dbg(&pdev->dev, "s3c2410_rtc: alarm irq %d\n", info->irq_alarm); |
1add6781 BD |
425 | |
426 | /* get the memory region */ | |
09ef18bc | 427 | info->base = devm_platform_ioremap_resource(pdev, 0); |
19be09f5 CC |
428 | if (IS_ERR(info->base)) |
429 | return PTR_ERR(info->base); | |
1add6781 | 430 | |
19be09f5 | 431 | info->rtc_clk = devm_clk_get(&pdev->dev, "rtc"); |
eb633de6 YY |
432 | if (IS_ERR(info->rtc_clk)) |
433 | return dev_err_probe(&pdev->dev, PTR_ERR(info->rtc_clk), | |
434 | "failed to find rtc clock\n"); | |
9903f68a KK |
435 | ret = clk_prepare_enable(info->rtc_clk); |
436 | if (ret) | |
437 | return ret; | |
e48add8c | 438 | |
eaf3a659 MS |
439 | if (info->data->needs_src_clk) { |
440 | info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src"); | |
441 | if (IS_ERR(info->rtc_src_clk)) { | |
c52d270c KK |
442 | ret = dev_err_probe(&pdev->dev, PTR_ERR(info->rtc_src_clk), |
443 | "failed to find rtc source clock\n"); | |
8768e7b3 | 444 | goto err_src_clk; |
eaf3a659 | 445 | } |
9903f68a KK |
446 | ret = clk_prepare_enable(info->rtc_src_clk); |
447 | if (ret) | |
448 | goto err_src_clk; | |
df9e26d0 | 449 | } |
df9e26d0 | 450 | |
31b16d97 MS |
451 | /* disable RTC enable bits potentially set by the bootloader */ |
452 | if (info->data->disable) | |
453 | info->data->disable(info); | |
454 | ||
1add6781 | 455 | /* check to see if everything is setup correctly */ |
ae05c950 CC |
456 | if (info->data->enable) |
457 | info->data->enable(info); | |
1add6781 | 458 | |
d4a48c2a | 459 | dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n", |
fc1afe60 | 460 | readw(info->base + S3C2410_RTCCON)); |
1add6781 | 461 | |
51b7616e YK |
462 | device_init_wakeup(&pdev->dev, 1); |
463 | ||
dba28c37 | 464 | info->rtc = devm_rtc_allocate_device(&pdev->dev); |
19be09f5 | 465 | if (IS_ERR(info->rtc)) { |
19be09f5 | 466 | ret = PTR_ERR(info->rtc); |
1add6781 BD |
467 | goto err_nortc; |
468 | } | |
469 | ||
dba28c37 | 470 | info->rtc->ops = &s3c_rtcops; |
a5feda3b SP |
471 | info->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; |
472 | info->rtc->range_max = RTC_TIMESTAMP_END_2099; | |
dba28c37 SP |
473 | |
474 | ret = devm_rtc_register_device(info->rtc); | |
475 | if (ret) | |
476 | goto err_nortc; | |
477 | ||
19be09f5 | 478 | ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq, |
fc1afe60 | 479 | 0, "s3c2410-rtc alarm", info); |
19be09f5 CC |
480 | if (ret) { |
481 | dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret); | |
482 | goto err_nortc; | |
483 | } | |
eaa6e4dd | 484 | |
5a5b614b MS |
485 | s3c_rtc_disable_clk(info); |
486 | ||
1add6781 BD |
487 | return 0; |
488 | ||
fc1afe60 | 489 | err_nortc: |
ae05c950 CC |
490 | if (info->data->disable) |
491 | info->data->disable(info); | |
24e14554 CC |
492 | |
493 | if (info->data->needs_src_clk) | |
494 | clk_disable_unprepare(info->rtc_src_clk); | |
8768e7b3 | 495 | err_src_clk: |
19be09f5 | 496 | clk_disable_unprepare(info->rtc_clk); |
1add6781 | 497 | |
1add6781 BD |
498 | return ret; |
499 | } | |
500 | ||
32e445aa | 501 | #ifdef CONFIG_PM_SLEEP |
1add6781 | 502 | |
32e445aa | 503 | static int s3c_rtc_suspend(struct device *dev) |
1add6781 | 504 | { |
19be09f5 | 505 | struct s3c_rtc *info = dev_get_drvdata(dev); |
498bcf31 | 506 | int ret; |
32e445aa | 507 | |
498bcf31 KK |
508 | ret = s3c_rtc_enable_clk(info); |
509 | if (ret) | |
510 | return ret; | |
ae05c950 | 511 | |
ae05c950 CC |
512 | if (info->data->disable) |
513 | info->data->disable(info); | |
f501ed52 | 514 | |
19be09f5 CC |
515 | if (device_may_wakeup(dev) && !info->wake_en) { |
516 | if (enable_irq_wake(info->irq_alarm) == 0) | |
517 | info->wake_en = true; | |
52cd4e5c | 518 | else |
32e445aa | 519 | dev_err(dev, "enable_irq_wake failed\n"); |
52cd4e5c | 520 | } |
ae05c950 | 521 | |
1add6781 BD |
522 | return 0; |
523 | } | |
524 | ||
32e445aa | 525 | static int s3c_rtc_resume(struct device *dev) |
1add6781 | 526 | { |
19be09f5 | 527 | struct s3c_rtc *info = dev_get_drvdata(dev); |
9f4123b7 | 528 | |
ae05c950 CC |
529 | if (info->data->enable) |
530 | info->data->enable(info); | |
531 | ||
24e14554 CC |
532 | s3c_rtc_disable_clk(info); |
533 | ||
19be09f5 CC |
534 | if (device_may_wakeup(dev) && info->wake_en) { |
535 | disable_irq_wake(info->irq_alarm); | |
536 | info->wake_en = false; | |
52cd4e5c | 537 | } |
ae05c950 | 538 | |
1add6781 BD |
539 | return 0; |
540 | } | |
1add6781 | 541 | #endif |
32e445aa JH |
542 | static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume); |
543 | ||
ae05c950 CC |
544 | static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask) |
545 | { | |
ae05c950 | 546 | rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF); |
ae05c950 CC |
547 | } |
548 | ||
549 | static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask) | |
550 | { | |
ae05c950 CC |
551 | rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF); |
552 | writeb(mask, info->base + S3C2410_INTP); | |
ae05c950 CC |
553 | } |
554 | ||
ae05c950 | 555 | static struct s3c_rtc_data const s3c2410_rtc_data = { |
ae05c950 | 556 | .irq_handler = s3c24xx_rtc_irq, |
ae05c950 CC |
557 | .enable = s3c24xx_rtc_enable, |
558 | .disable = s3c24xx_rtc_disable, | |
559 | }; | |
560 | ||
561 | static struct s3c_rtc_data const s3c2416_rtc_data = { | |
ae05c950 | 562 | .irq_handler = s3c24xx_rtc_irq, |
ae05c950 CC |
563 | .enable = s3c24xx_rtc_enable, |
564 | .disable = s3c24xx_rtc_disable, | |
565 | }; | |
566 | ||
567 | static struct s3c_rtc_data const s3c2443_rtc_data = { | |
ae05c950 | 568 | .irq_handler = s3c24xx_rtc_irq, |
ae05c950 CC |
569 | .enable = s3c24xx_rtc_enable, |
570 | .disable = s3c24xx_rtc_disable, | |
571 | }; | |
572 | ||
573 | static struct s3c_rtc_data const s3c6410_rtc_data = { | |
8792f777 | 574 | .needs_src_clk = true, |
ae05c950 | 575 | .irq_handler = s3c6410_rtc_irq, |
ae05c950 CC |
576 | .enable = s3c24xx_rtc_enable, |
577 | .disable = s3c6410_rtc_disable, | |
c3cba928 TB |
578 | }; |
579 | ||
7d6bec28 | 580 | static const __maybe_unused struct of_device_id s3c_rtc_dt_match[] = { |
d2524caa | 581 | { |
cd1e6f9e | 582 | .compatible = "samsung,s3c2410-rtc", |
21df6fed | 583 | .data = &s3c2410_rtc_data, |
25c1a246 | 584 | }, { |
cd1e6f9e | 585 | .compatible = "samsung,s3c2416-rtc", |
21df6fed | 586 | .data = &s3c2416_rtc_data, |
25c1a246 | 587 | }, { |
cd1e6f9e | 588 | .compatible = "samsung,s3c2443-rtc", |
21df6fed | 589 | .data = &s3c2443_rtc_data, |
d2524caa | 590 | }, { |
cd1e6f9e | 591 | .compatible = "samsung,s3c6410-rtc", |
21df6fed | 592 | .data = &s3c6410_rtc_data, |
df9e26d0 CC |
593 | }, { |
594 | .compatible = "samsung,exynos3250-rtc", | |
21df6fed | 595 | .data = &s3c6410_rtc_data, |
d2524caa | 596 | }, |
ae05c950 | 597 | { /* sentinel */ }, |
39ce4084 TA |
598 | }; |
599 | MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match); | |
9f4123b7 MC |
600 | |
601 | static struct platform_driver s3c_rtc_driver = { | |
1add6781 | 602 | .probe = s3c_rtc_probe, |
5a167f45 | 603 | .remove = s3c_rtc_remove, |
1add6781 | 604 | .driver = { |
9f4123b7 | 605 | .name = "s3c-rtc", |
32e445aa | 606 | .pm = &s3c_rtc_pm_ops, |
04a373fd | 607 | .of_match_table = of_match_ptr(s3c_rtc_dt_match), |
1add6781 BD |
608 | }, |
609 | }; | |
0c4eae66 | 610 | module_platform_driver(s3c_rtc_driver); |
1add6781 BD |
611 | |
612 | MODULE_DESCRIPTION("Samsung S3C RTC Driver"); | |
613 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | |
614 | MODULE_LICENSE("GPL"); | |
ad28a07b | 615 | MODULE_ALIAS("platform:s3c2410-rtc"); |