[linux-2.6-block.git] / drivers / rtc / rtc-s35390a.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Seiko Instruments S-35390A RTC Driver
 *
 * Copyright (c) 2007 Byron Bradley
 */

#include <linux/module.h>
#include <linux/rtc.h>
#include <linux/i2c.h>
#include <linux/bitrev.h>
#include <linux/bcd.h>
#include <linux/slab.h>
#include <linux/delay.h>

#define S35390A_CMD_STATUS1	0
#define S35390A_CMD_STATUS2	1
#define S35390A_CMD_TIME1	2
#define S35390A_CMD_TIME2	3
#define S35390A_CMD_INT2_REG1	5

#define S35390A_BYTE_YEAR	0
#define S35390A_BYTE_MONTH	1
#define S35390A_BYTE_DAY	2
#define S35390A_BYTE_WDAY	3
#define S35390A_BYTE_HOURS	4
#define S35390A_BYTE_MINS	5
#define S35390A_BYTE_SECS	6

#define S35390A_ALRM_BYTE_WDAY	0
#define S35390A_ALRM_BYTE_HOURS	1
#define S35390A_ALRM_BYTE_MINS	2

/* flags for STATUS1 */
#define S35390A_FLAG_POC	BIT(0)
#define S35390A_FLAG_BLD	BIT(1)
#define S35390A_FLAG_INT2	BIT(2)
#define S35390A_FLAG_24H	BIT(6)
#define S35390A_FLAG_RESET	BIT(7)

/* flag for STATUS2 */
#define S35390A_FLAG_TEST	BIT(0)

/* INT2 pin output mode */
#define S35390A_INT2_MODE_MASK		0x0E
#define S35390A_INT2_MODE_NOINTR	0x00
#define S35390A_INT2_MODE_ALARM		BIT(1) /* INT2AE */
#define S35390A_INT2_MODE_PMIN_EDG	BIT(2) /* INT2ME */
#define S35390A_INT2_MODE_FREQ		BIT(3) /* INT2FE */
#define S35390A_INT2_MODE_PMIN		(BIT(3) | BIT(2)) /* INT2FE | INT2ME */

static const struct i2c_device_id s35390a_id[] = {
	{ "s35390a", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, s35390a_id);

static const __maybe_unused struct of_device_id s35390a_of_match[] = {
	{ .compatible = "s35390a" },
	{ .compatible = "sii,s35390a" },
	{ }
};
MODULE_DEVICE_TABLE(of, s35390a_of_match);

struct s35390a {
	struct i2c_client *client[8];
	struct rtc_device *rtc;
	int twentyfourhour;
};

static int s35390a_set_reg(struct s35390a *s35390a, int reg, char *buf, int len)
{
	struct i2c_client *client = s35390a->client[reg];
	struct i2c_msg msg[] = {
		{
			.addr = client->addr,
			.len = len,
			.buf = buf
		},
	};

	if ((i2c_transfer(client->adapter, msg, 1)) != 1)
		return -EIO;

	return 0;
}

static int s35390a_get_reg(struct s35390a *s35390a, int reg, char *buf, int len)
{
	struct i2c_client *client = s35390a->client[reg];
	struct i2c_msg msg[] = {
		{
			.addr = client->addr,
			.flags = I2C_M_RD,
			.len = len,
			.buf = buf
		},
	};

	if ((i2c_transfer(client->adapter, msg, 1)) != 1)
		return -EIO;

	return 0;
}

static int s35390a_init(struct s35390a *s35390a)
{
	u8 buf;
	int ret;
	unsigned initcount = 0;

	/*
	 * At least one of POC and BLD are set, so reinitialise chip. Keeping
	 * this information in the hardware to know later that the time isn't
	 * valid is unfortunately not possible because POC and BLD are cleared
	 * on read. So the reset is best done now.
	 *
	 * The 24H bit is kept over reset, so set it already here.
	 */
initialize:
	buf = S35390A_FLAG_RESET | S35390A_FLAG_24H;
	ret = s35390a_set_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1);

	if (ret < 0)
		return ret;

	ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1);
	if (ret < 0)
		return ret;

	if (buf & (S35390A_FLAG_POC | S35390A_FLAG_BLD)) {
		/* Try up to five times to reset the chip */
		if (initcount < 5) {
			++initcount;
			goto initialize;
		} else
			return -EIO;
	}

	return 1;
}

/*
 * Returns <0 on error, 0 if rtc is setup fine and 1 if the chip was reset.
 * To keep the information if an irq is pending, pass the value read from
 * STATUS1 to the caller.
 */
static int s35390a_read_status(struct s35390a *s35390a, char *status1)
{
	int ret;

	ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, status1, 1);
	if (ret < 0)
		return ret;

	if (*status1 & S35390A_FLAG_POC) {
		/*
		 * Do not communicate for 0.5 seconds since the power-on
		 * detection circuit is in operation.
		 */
		msleep(500);
		return 1;
	} else if (*status1 & S35390A_FLAG_BLD)
		return 1;
	/*
	 * If both POC and BLD are unset everything is fine.
	 */
	return 0;
}

static int s35390a_disable_test_mode(struct s35390a *s35390a)
{
	char buf[1];

	if (s35390a_get_reg(s35390a, S35390A_CMD_STATUS2, buf, sizeof(buf)) < 0)
		return -EIO;

	if (!(buf[0] & S35390A_FLAG_TEST))
		return 0;

	buf[0] &= ~S35390A_FLAG_TEST;
	return s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, buf, sizeof(buf));
}

static char s35390a_hr2reg(struct s35390a *s35390a, int hour)
{
	if (s35390a->twentyfourhour)
		return bin2bcd(hour);

	if (hour < 12)
		return bin2bcd(hour);

	return 0x40 | bin2bcd(hour - 12);
}

static int s35390a_reg2hr(struct s35390a *s35390a, char reg)
{
	unsigned hour;

	if (s35390a->twentyfourhour)
		return bcd2bin(reg & 0x3f);

	hour = bcd2bin(reg & 0x3f);
	if (reg & 0x40)
		hour += 12;

	return hour;
}

static int s35390a_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct s35390a	*s35390a = i2c_get_clientdata(client);
	int i;
	char buf[7], status;

	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d mday=%d, "
		"mon=%d, year=%d, wday=%d\n", __func__, tm->tm_sec,
		tm->tm_min, tm->tm_hour, tm->tm_mday, tm->tm_mon, tm->tm_year,
		tm->tm_wday);

	if (s35390a_read_status(s35390a, &status) == 1)
		s35390a_init(s35390a);

	buf[S35390A_BYTE_YEAR] = bin2bcd(tm->tm_year - 100);
	buf[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon + 1);
	buf[S35390A_BYTE_DAY] = bin2bcd(tm->tm_mday);
	buf[S35390A_BYTE_WDAY] = bin2bcd(tm->tm_wday);
	buf[S35390A_BYTE_HOURS] = s35390a_hr2reg(s35390a, tm->tm_hour);
	buf[S35390A_BYTE_MINS] = bin2bcd(tm->tm_min);
	buf[S35390A_BYTE_SECS] = bin2bcd(tm->tm_sec);

	/* This chip expects the bits of each byte to be in reverse order */
	for (i = 0; i < 7; ++i)
		buf[i] = bitrev8(buf[i]);

	return s35390a_set_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf));
}

static int s35390a_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct s35390a *s35390a = i2c_get_clientdata(client);
	char buf[7], status;
	int i, err;

	if (s35390a_read_status(s35390a, &status) == 1)
		return -EINVAL;

	err = s35390a_get_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf));
	if (err < 0)
		return err;

	/* This chip returns the bits of each byte in reverse order */
	for (i = 0; i < 7; ++i)
		buf[i] = bitrev8(buf[i]);

	tm->tm_sec = bcd2bin(buf[S35390A_BYTE_SECS]);
	tm->tm_min = bcd2bin(buf[S35390A_BYTE_MINS]);
	tm->tm_hour = s35390a_reg2hr(s35390a, buf[S35390A_BYTE_HOURS]);
	tm->tm_wday = bcd2bin(buf[S35390A_BYTE_WDAY]);
	tm->tm_mday = bcd2bin(buf[S35390A_BYTE_DAY]);
	tm->tm_mon = bcd2bin(buf[S35390A_BYTE_MONTH]) - 1;
	tm->tm_year = bcd2bin(buf[S35390A_BYTE_YEAR]) + 100;

	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, mday=%d, "
		"mon=%d, year=%d, wday=%d\n", __func__, tm->tm_sec,
		tm->tm_min, tm->tm_hour, tm->tm_mday, tm->tm_mon, tm->tm_year,
		tm->tm_wday);

	return 0;
}

static int s35390a_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct s35390a *s35390a = i2c_get_clientdata(client);
	char buf[3], sts = 0;
	int err, i;

	dev_dbg(&client->dev, "%s: alm is secs=%d, mins=%d, hours=%d mday=%d, "\
		"mon=%d, year=%d, wday=%d\n", __func__, alm->time.tm_sec,
		alm->time.tm_min, alm->time.tm_hour, alm->time.tm_mday,
		alm->time.tm_mon, alm->time.tm_year, alm->time.tm_wday);

	/* disable interrupt (which deasserts the irq line) */
	err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts));
	if (err < 0)
		return err;

	/* clear pending interrupt (in STATUS1 only), if any */
	err = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, &sts, sizeof(sts));
	if (err < 0)
		return err;

	if (alm->enabled)
		sts = S35390A_INT2_MODE_ALARM;
	else
		sts = S35390A_INT2_MODE_NOINTR;

	/* set interupt mode*/
	err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts));
	if (err < 0)
		return err;

	if (alm->time.tm_wday != -1)
		buf[S35390A_ALRM_BYTE_WDAY] = bin2bcd(alm->time.tm_wday) | 0x80;
	else
		buf[S35390A_ALRM_BYTE_WDAY] = 0;

	buf[S35390A_ALRM_BYTE_HOURS] = s35390a_hr2reg(s35390a,
			alm->time.tm_hour) | 0x80;
	buf[S35390A_ALRM_BYTE_MINS] = bin2bcd(alm->time.tm_min) | 0x80;

	if (alm->time.tm_hour >= 12)
		buf[S35390A_ALRM_BYTE_HOURS] |= 0x40;

	for (i = 0; i < 3; ++i)
		buf[i] = bitrev8(buf[i]);

	err = s35390a_set_reg(s35390a, S35390A_CMD_INT2_REG1, buf,
								sizeof(buf));

	return err;
}

static int s35390a_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct s35390a *s35390a = i2c_get_clientdata(client);
	char buf[3], sts;
	int i, err;

	err = s35390a_get_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts));
	if (err < 0)
		return err;

	if ((sts & S35390A_INT2_MODE_MASK) != S35390A_INT2_MODE_ALARM) {
		/*
		 * When the alarm isn't enabled, the register to configure
		 * the alarm time isn't accessible.
		 */
		alm->enabled = 0;
		return 0;
	} else {
		alm->enabled = 1;
	}

	err = s35390a_get_reg(s35390a, S35390A_CMD_INT2_REG1, buf, sizeof(buf));
	if (err < 0)
		return err;

	/* This chip returns the bits of each byte in reverse order */
	for (i = 0; i < 3; ++i)
		buf[i] = bitrev8(buf[i]);

	/*
	 * B0 of the three matching registers is an enable flag. Iff it is set
	 * the configured value is used for matching.
	 */
	if (buf[S35390A_ALRM_BYTE_WDAY] & 0x80)
		alm->time.tm_wday =
			bcd2bin(buf[S35390A_ALRM_BYTE_WDAY] & ~0x80);

	if (buf[S35390A_ALRM_BYTE_HOURS] & 0x80)
		alm->time.tm_hour =
			s35390a_reg2hr(s35390a,
				       buf[S35390A_ALRM_BYTE_HOURS] & ~0x80);

	if (buf[S35390A_ALRM_BYTE_MINS] & 0x80)
		alm->time.tm_min = bcd2bin(buf[S35390A_ALRM_BYTE_MINS] & ~0x80);

	/* alarm triggers always at s=0 */
	alm->time.tm_sec = 0;

	dev_dbg(&client->dev, "%s: alm is mins=%d, hours=%d, wday=%d\n",
			__func__, alm->time.tm_min, alm->time.tm_hour,
			alm->time.tm_wday);

	return 0;
}

static int s35390a_rtc_ioctl(struct device *dev, unsigned int cmd,
			     unsigned long arg)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct s35390a *s35390a = i2c_get_clientdata(client);
	char sts;
	int err;

	switch (cmd) {
	case RTC_VL_READ:
		/* s35390a_reset set lowvoltage flag and init RTC if needed */
		err = s35390a_read_status(s35390a, &sts);
		if (err < 0)
			return err;
		if (copy_to_user((void __user *)arg, &err, sizeof(int)))
			return -EFAULT;
		break;
	case RTC_VL_CLR:
		/* update flag and clear register */
		err = s35390a_init(s35390a);
		if (err < 0)
			return err;
		break;
	default:
		return -ENOIOCTLCMD;
	}

	return 0;
}

static const struct rtc_class_ops s35390a_rtc_ops = {
	.read_time	= s35390a_rtc_read_time,
	.set_time	= s35390a_rtc_set_time,
	.set_alarm	= s35390a_rtc_set_alarm,
	.read_alarm	= s35390a_rtc_read_alarm,
	.ioctl          = s35390a_rtc_ioctl,
};

static int s35390a_probe(struct i2c_client *client)
{
	int err, err_read;
	unsigned int i;
	struct s35390a *s35390a;
	char buf, status1;
	struct device *dev = &client->dev;

	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
		return -ENODEV;

	s35390a = devm_kzalloc(dev, sizeof(struct s35390a), GFP_KERNEL);
	if (!s35390a)
		return -ENOMEM;

	s35390a->client[0] = client;
	i2c_set_clientdata(client, s35390a);

	/* This chip uses multiple addresses, use dummy devices for them */
	for (i = 1; i < 8; ++i) {
		s35390a->client[i] = devm_i2c_new_dummy_device(dev,
							       client->adapter,
							       client->addr + i);
		if (IS_ERR(s35390a->client[i])) {
			dev_err(dev, "Address %02x unavailable\n",
				client->addr + i);
			return PTR_ERR(s35390a->client[i]);
		}
	}

	s35390a->rtc = devm_rtc_allocate_device(dev);
	if (IS_ERR(s35390a->rtc))
		return PTR_ERR(s35390a->rtc);

	err_read = s35390a_read_status(s35390a, &status1);
	if (err_read < 0) {
		dev_err(dev, "error resetting chip\n");
		return err_read;
	}

	if (status1 & S35390A_FLAG_24H)
		s35390a->twentyfourhour = 1;
	else
		s35390a->twentyfourhour = 0;

	if (status1 & S35390A_FLAG_INT2) {
		/* disable alarm (and maybe test mode) */
		buf = 0;
		err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &buf, 1);
		if (err < 0) {
			dev_err(dev, "error disabling alarm");
			return err;
		}
	} else {
		err = s35390a_disable_test_mode(s35390a);
		if (err < 0) {
			dev_err(dev, "error disabling test mode\n");
			return err;
		}
	}

	device_set_wakeup_capable(dev, 1);

	s35390a->rtc->ops = &s35390a_rtc_ops;
	s35390a->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
	s35390a->rtc->range_max = RTC_TIMESTAMP_END_2099;

	set_bit(RTC_FEATURE_ALARM_RES_MINUTE, s35390a->rtc->features);
	clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, s35390a->rtc->features );

	if (status1 & S35390A_FLAG_INT2)
		rtc_update_irq(s35390a->rtc, 1, RTC_AF);

	return devm_rtc_register_device(s35390a->rtc);
}

static struct i2c_driver s35390a_driver = {
	.driver		= {
		.name	= "rtc-s35390a",
		.of_match_table = of_match_ptr(s35390a_of_match),
	},
	.probe_new	= s35390a_probe,
	.id_table	= s35390a_id,
};

module_i2c_driver(s35390a_driver);

MODULE_AUTHOR("Byron Bradley <byron.bbradley@gmail.com>");
MODULE_DESCRIPTION("S35390A RTC driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
c46288b0 BB	2	/*
	3	* Seiko Instruments S-35390A RTC Driver
	4	*
	5	* Copyright (c) 2007 Byron Bradley
c46288b0 BB	6	*/
	7
	8	#include <linux/module.h>
	9	#include <linux/rtc.h>
	10	#include <linux/i2c.h>
	11	#include <linux/bitrev.h>
	12	#include <linux/bcd.h>
	13	#include <linux/slab.h>
8e6583f1	14	#include <linux/delay.h>
c46288b0 BB	15
	16	#define S35390A_CMD_STATUS1 0
	17	#define S35390A_CMD_STATUS2 1
	18	#define S35390A_CMD_TIME1 2
542dd33a ML	19	#define S35390A_CMD_TIME2 3
542dd33a ML	20	#define S35390A_CMD_INT2_REG1 5
c46288b0 BB	21
	22	#define S35390A_BYTE_YEAR 0
	23	#define S35390A_BYTE_MONTH 1
	24	#define S35390A_BYTE_DAY 2
	25	#define S35390A_BYTE_WDAY 3
	26	#define S35390A_BYTE_HOURS 4
	27	#define S35390A_BYTE_MINS 5
	28	#define S35390A_BYTE_SECS 6
	29
542dd33a ML	30	#define S35390A_ALRM_BYTE_WDAY 0
	31	#define S35390A_ALRM_BYTE_HOURS 1
	32	#define S35390A_ALRM_BYTE_MINS 2
	33
3bd32722	34	/* flags for STATUS1 */
097aa24b RL	35	#define S35390A_FLAG_POC BIT(0)
	36	#define S35390A_FLAG_BLD BIT(1)
	37	#define S35390A_FLAG_INT2 BIT(2)
	38	#define S35390A_FLAG_24H BIT(6)
	39	#define S35390A_FLAG_RESET BIT(7)
3bd32722 UKK	40
3bd32722 UKK	41	/* flag for STATUS2 */
097aa24b	42	#define S35390A_FLAG_TEST BIT(0)
542dd33a	43
a86bd904 RL	44	/* INT2 pin output mode */
a86bd904 RL	45	#define S35390A_INT2_MODE_MASK 0x0E
542dd33a	46	#define S35390A_INT2_MODE_NOINTR 0x00
a86bd904 RL	47	#define S35390A_INT2_MODE_ALARM BIT(1) /* INT2AE */
	48	#define S35390A_INT2_MODE_PMIN_EDG BIT(2) /* INT2ME */
	49	#define S35390A_INT2_MODE_FREQ BIT(3) /* INT2FE */
	50	#define S35390A_INT2_MODE_PMIN (BIT(3) \| BIT(2)) /* INT2FE \| INT2ME */
542dd33a	51
3760f736 JD	52	static const struct i2c_device_id s35390a_id[] = {
	53	{ "s35390a", 0 },
	54	{ }
	55	};
	56	MODULE_DEVICE_TABLE(i2c, s35390a_id);
	57
0a268386	58	static const __maybe_unused struct of_device_id s35390a_of_match[] = {
21f27432 JMC	59	{ .compatible = "s35390a" },
	60	{ .compatible = "sii,s35390a" },
	61	{ }
	62	};
	63	MODULE_DEVICE_TABLE(of, s35390a_of_match);
	64
c46288b0 BB	65	struct s35390a {
	66	struct i2c_client *client[8];
	67	struct rtc_device *rtc;
	68	int twentyfourhour;
	69	};
	70
	71	static int s35390a_set_reg(struct s35390a s35390a, int reg, char buf, int len)
	72	{
	73	struct i2c_client *client = s35390a->client[reg];
	74	struct i2c_msg msg[] = {
65659f63 S	75	{
	76	.addr = client->addr,
	77	.len = len,
	78	.buf = buf
	79	},
c46288b0 BB	80	};
	81
	82	if ((i2c_transfer(client->adapter, msg, 1)) != 1)
	83	return -EIO;
	84
	85	return 0;
	86	}
	87
	88	static int s35390a_get_reg(struct s35390a s35390a, int reg, char buf, int len)
	89	{
	90	struct i2c_client *client = s35390a->client[reg];
	91	struct i2c_msg msg[] = {
65659f63 S	92	{
	93	.addr = client->addr,
	94	.flags = I2C_M_RD,
	95	.len = len,
	96	.buf = buf
	97	},
c46288b0 BB	98	};
	99
	100	if ((i2c_transfer(client->adapter, msg, 1)) != 1)
	101	return -EIO;
	102
	103	return 0;
	104	}
	105
16486d0c	106	static int s35390a_init(struct s35390a *s35390a)
c46288b0	107	{
ef0f02fd	108	u8 buf;
8e6583f1 UKK	109	int ret;
8e6583f1 UKK	110	unsigned initcount = 0;
c46288b0	111
8e6583f1 UKK	112	/*
	113	* At least one of POC and BLD are set, so reinitialise chip. Keeping
	114	* this information in the hardware to know later that the time isn't
	115	* valid is unfortunately not possible because POC and BLD are cleared
	116	* on read. So the reset is best done now.
	117	*
	118	* The 24H bit is kept over reset, so set it already here.
	119	*/
	120	initialize:
8e6583f1 UKK	121	buf = S35390A_FLAG_RESET \| S35390A_FLAG_24H;
	122	ret = s35390a_set_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1);
	123
	124	if (ret < 0)
	125	return ret;
	126
	127	ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1);
	128	if (ret < 0)
	129	return ret;
	130
	131	if (buf & (S35390A_FLAG_POC \| S35390A_FLAG_BLD)) {
	132	/* Try up to five times to reset the chip */
	133	if (initcount < 5) {
	134	++initcount;
	135	goto initialize;
	136	} else
	137	return -EIO;
	138	}
	139
	140	return 1;
c46288b0 BB	141	}
c46288b0 BB	142
16486d0c FL	143	/*
	144	* Returns <0 on error, 0 if rtc is setup fine and 1 if the chip was reset.
	145	* To keep the information if an irq is pending, pass the value read from
	146	* STATUS1 to the caller.
	147	*/
	148	static int s35390a_read_status(struct s35390a s35390a, char status1)
	149	{
	150	int ret;
	151
	152	ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, status1, 1);
	153	if (ret < 0)
	154	return ret;
	155
	156	if (*status1 & S35390A_FLAG_POC) {
	157	/*
	158	* Do not communicate for 0.5 seconds since the power-on
	159	* detection circuit is in operation.
	160	*/
	161	msleep(500);
	162	return 1;
	163	} else if (*status1 & S35390A_FLAG_BLD)
	164	return 1;
	165	/*
	166	* If both POC and BLD are unset everything is fine.
	167	*/
	168	return 0;
	169	}
	170
c46288b0 BB	171	static int s35390a_disable_test_mode(struct s35390a *s35390a)
	172	{
	173	char buf[1];
	174
	175	if (s35390a_get_reg(s35390a, S35390A_CMD_STATUS2, buf, sizeof(buf)) < 0)
	176	return -EIO;
	177
	178	if (!(buf[0] & S35390A_FLAG_TEST))
	179	return 0;
	180
	181	buf[0] &= ~S35390A_FLAG_TEST;
	182	return s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, buf, sizeof(buf));
	183	}
	184
	185	static char s35390a_hr2reg(struct s35390a *s35390a, int hour)
	186	{
	187	if (s35390a->twentyfourhour)
fe20ba70	188	return bin2bcd(hour);
c46288b0 BB	189
c46288b0 BB	190	if (hour < 12)
fe20ba70	191	return bin2bcd(hour);
c46288b0	192
fe20ba70	193	return 0x40 \| bin2bcd(hour - 12);
c46288b0 BB	194	}
	195
	196	static int s35390a_reg2hr(struct s35390a *s35390a, char reg)
	197	{
	198	unsigned hour;
	199
	200	if (s35390a->twentyfourhour)
fe20ba70	201	return bcd2bin(reg & 0x3f);
c46288b0	202
fe20ba70	203	hour = bcd2bin(reg & 0x3f);
c46288b0 BB	204	if (reg & 0x40)
	205	hour += 12;
	206
	207	return hour;
	208	}
	209
779e1aab	210	static int s35390a_rtc_set_time(struct device dev, struct rtc_time tm)
c46288b0	211	{
779e1aab	212	struct i2c_client *client = to_i2c_client(dev);
c46288b0	213	struct s35390a *s35390a = i2c_get_clientdata(client);
f8513363	214	int i;
16486d0c	215	char buf[7], status;
c46288b0 BB	216
	217	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d mday=%d, "
	218	"mon=%d, year=%d, wday=%d\n", __func__, tm->tm_sec,
	219	tm->tm_min, tm->tm_hour, tm->tm_mday, tm->tm_mon, tm->tm_year,
	220	tm->tm_wday);
	221
16486d0c FL	222	if (s35390a_read_status(s35390a, &status) == 1)
	223	s35390a_init(s35390a);
	224
fe20ba70 AB	225	buf[S35390A_BYTE_YEAR] = bin2bcd(tm->tm_year - 100);
	226	buf[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon + 1);
	227	buf[S35390A_BYTE_DAY] = bin2bcd(tm->tm_mday);
	228	buf[S35390A_BYTE_WDAY] = bin2bcd(tm->tm_wday);
c46288b0	229	buf[S35390A_BYTE_HOURS] = s35390a_hr2reg(s35390a, tm->tm_hour);
fe20ba70 AB	230	buf[S35390A_BYTE_MINS] = bin2bcd(tm->tm_min);
fe20ba70 AB	231	buf[S35390A_BYTE_SECS] = bin2bcd(tm->tm_sec);
c46288b0 BB	232
	233	/* This chip expects the bits of each byte to be in reverse order */
	234	for (i = 0; i < 7; ++i)
	235	buf[i] = bitrev8(buf[i]);
	236
f8513363	237	return s35390a_set_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf));
c46288b0 BB	238	}
c46288b0 BB	239
779e1aab	240	static int s35390a_rtc_read_time(struct device dev, struct rtc_time tm)
c46288b0	241	{
779e1aab	242	struct i2c_client *client = to_i2c_client(dev);
c46288b0	243	struct s35390a *s35390a = i2c_get_clientdata(client);
16486d0c	244	char buf[7], status;
c46288b0 BB	245	int i, err;
c46288b0 BB	246
16486d0c FL	247	if (s35390a_read_status(s35390a, &status) == 1)
	248	return -EINVAL;
	249
c46288b0 BB	250	err = s35390a_get_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf));
	251	if (err < 0)
	252	return err;
	253
	254	/* This chip returns the bits of each byte in reverse order */
	255	for (i = 0; i < 7; ++i)
	256	buf[i] = bitrev8(buf[i]);
	257
fe20ba70 AB	258	tm->tm_sec = bcd2bin(buf[S35390A_BYTE_SECS]);
fe20ba70 AB	259	tm->tm_min = bcd2bin(buf[S35390A_BYTE_MINS]);
c46288b0	260	tm->tm_hour = s35390a_reg2hr(s35390a, buf[S35390A_BYTE_HOURS]);
fe20ba70 AB	261	tm->tm_wday = bcd2bin(buf[S35390A_BYTE_WDAY]);
	262	tm->tm_mday = bcd2bin(buf[S35390A_BYTE_DAY]);
	263	tm->tm_mon = bcd2bin(buf[S35390A_BYTE_MONTH]) - 1;
	264	tm->tm_year = bcd2bin(buf[S35390A_BYTE_YEAR]) + 100;
c46288b0 BB	265
	266	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, mday=%d, "
	267	"mon=%d, year=%d, wday=%d\n", __func__, tm->tm_sec,
	268	tm->tm_min, tm->tm_hour, tm->tm_mday, tm->tm_mon, tm->tm_year,
	269	tm->tm_wday);
	270
bb530199	271	return 0;
c46288b0 BB	272	}
c46288b0 BB	273
779e1aab	274	static int s35390a_rtc_set_alarm(struct device dev, struct rtc_wkalrm alm)
542dd33a	275	{
779e1aab	276	struct i2c_client *client = to_i2c_client(dev);
542dd33a ML	277	struct s35390a *s35390a = i2c_get_clientdata(client);
	278	char buf[3], sts = 0;
	279	int err, i;
	280
	281	dev_dbg(&client->dev, "%s: alm is secs=%d, mins=%d, hours=%d mday=%d, "\
	282	"mon=%d, year=%d, wday=%d\n", __func__, alm->time.tm_sec,
	283	alm->time.tm_min, alm->time.tm_hour, alm->time.tm_mday,
	284	alm->time.tm_mon, alm->time.tm_year, alm->time.tm_wday);
	285
5227e8a2	286	/* disable interrupt (which deasserts the irq line) */
542dd33a ML	287	err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts));
	288	if (err < 0)
	289	return err;
	290
5227e8a2	291	/* clear pending interrupt (in STATUS1 only), if any */
542dd33a ML	292	err = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, &sts, sizeof(sts));
	293	if (err < 0)
	294	return err;
	295
	296	if (alm->enabled)
	297	sts = S35390A_INT2_MODE_ALARM;
	298	else
	299	sts = S35390A_INT2_MODE_NOINTR;
	300
542dd33a ML	301	/* set interupt mode*/
	302	err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts));
	303	if (err < 0)
	304	return err;
	305
	306	if (alm->time.tm_wday != -1)
	307	buf[S35390A_ALRM_BYTE_WDAY] = bin2bcd(alm->time.tm_wday) \| 0x80;
f87e904d UKK	308	else
f87e904d UKK	309	buf[S35390A_ALRM_BYTE_WDAY] = 0;
542dd33a ML	310
	311	buf[S35390A_ALRM_BYTE_HOURS] = s35390a_hr2reg(s35390a,
	312	alm->time.tm_hour) \| 0x80;
	313	buf[S35390A_ALRM_BYTE_MINS] = bin2bcd(alm->time.tm_min) \| 0x80;
	314
	315	if (alm->time.tm_hour >= 12)
	316	buf[S35390A_ALRM_BYTE_HOURS] \|= 0x40;
	317
	318	for (i = 0; i < 3; ++i)
	319	buf[i] = bitrev8(buf[i]);
	320
	321	err = s35390a_set_reg(s35390a, S35390A_CMD_INT2_REG1, buf,
	322	sizeof(buf));
	323
	324	return err;
	325	}
	326
779e1aab	327	static int s35390a_rtc_read_alarm(struct device dev, struct rtc_wkalrm alm)
542dd33a	328	{
779e1aab	329	struct i2c_client *client = to_i2c_client(dev);
542dd33a ML	330	struct s35390a *s35390a = i2c_get_clientdata(client);
	331	char buf[3], sts;
	332	int i, err;
	333
	334	err = s35390a_get_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts));
	335	if (err < 0)
	336	return err;
	337
a86bd904	338	if ((sts & S35390A_INT2_MODE_MASK) != S35390A_INT2_MODE_ALARM) {
f87e904d UKK	339	/*
	340	* When the alarm isn't enabled, the register to configure
	341	* the alarm time isn't accessible.
	342	*/
	343	alm->enabled = 0;
	344	return 0;
	345	} else {
	346	alm->enabled = 1;
	347	}
542dd33a ML	348
	349	err = s35390a_get_reg(s35390a, S35390A_CMD_INT2_REG1, buf, sizeof(buf));
	350	if (err < 0)
	351	return err;
	352
	353	/* This chip returns the bits of each byte in reverse order */
f87e904d	354	for (i = 0; i < 3; ++i)
542dd33a	355	buf[i] = bitrev8(buf[i]);
542dd33a	356
f87e904d UKK	357	/*
	358	* B0 of the three matching registers is an enable flag. Iff it is set
	359	* the configured value is used for matching.
	360	*/
	361	if (buf[S35390A_ALRM_BYTE_WDAY] & 0x80)
	362	alm->time.tm_wday =
	363	bcd2bin(buf[S35390A_ALRM_BYTE_WDAY] & ~0x80);
	364
	365	if (buf[S35390A_ALRM_BYTE_HOURS] & 0x80)
	366	alm->time.tm_hour =
	367	s35390a_reg2hr(s35390a,
	368	buf[S35390A_ALRM_BYTE_HOURS] & ~0x80);
	369
	370	if (buf[S35390A_ALRM_BYTE_MINS] & 0x80)
	371	alm->time.tm_min = bcd2bin(buf[S35390A_ALRM_BYTE_MINS] & ~0x80);
	372
	373	/* alarm triggers always at s=0 */
	374	alm->time.tm_sec = 0;
542dd33a ML	375
	376	dev_dbg(&client->dev, "%s: alm is mins=%d, hours=%d, wday=%d\n",
	377	__func__, alm->time.tm_min, alm->time.tm_hour,
	378	alm->time.tm_wday);
	379
	380	return 0;
	381	}
	382
7a1fe407 FL	383	static int s35390a_rtc_ioctl(struct device *dev, unsigned int cmd,
	384	unsigned long arg)
	385	{
	386	struct i2c_client *client = to_i2c_client(dev);
	387	struct s35390a *s35390a = i2c_get_clientdata(client);
	388	char sts;
	389	int err;
	390
	391	switch (cmd) {
	392	case RTC_VL_READ:
	393	/* s35390a_reset set lowvoltage flag and init RTC if needed */
	394	err = s35390a_read_status(s35390a, &sts);
	395	if (err < 0)
	396	return err;
	397	if (copy_to_user((void __user *)arg, &err, sizeof(int)))
	398	return -EFAULT;
	399	break;
	400	case RTC_VL_CLR:
	401	/* update flag and clear register */
	402	err = s35390a_init(s35390a);
	403	if (err < 0)
	404	return err;
	405	break;
	406	default:
	407	return -ENOIOCTLCMD;
	408	}
	409
	410	return 0;
	411	}
	412
c46288b0 BB	413	static const struct rtc_class_ops s35390a_rtc_ops = {
	414	.read_time = s35390a_rtc_read_time,
	415	.set_time = s35390a_rtc_set_time,
542dd33a ML	416	.set_alarm = s35390a_rtc_set_alarm,
542dd33a ML	417	.read_alarm = s35390a_rtc_read_alarm,
7a1fe407	418	.ioctl = s35390a_rtc_ioctl,
c46288b0 BB	419	};
c46288b0 BB	420
3f4a3322	421	static int s35390a_probe(struct i2c_client *client)
c46288b0	422	{
16486d0c	423	int err, err_read;
c46288b0 BB	424	unsigned int i;
c46288b0 BB	425	struct s35390a *s35390a;
3bd32722	426	char buf, status1;
03279634	427	struct device *dev = &client->dev;
c46288b0	428
4053e749 WS	429	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
4053e749 WS	430	return -ENODEV;
c46288b0	431
03279634	432	s35390a = devm_kzalloc(dev, sizeof(struct s35390a), GFP_KERNEL);
4053e749 WS	433	if (!s35390a)
4053e749 WS	434	return -ENOMEM;
c46288b0 BB	435
	436	s35390a->client[0] = client;
	437	i2c_set_clientdata(client, s35390a);
	438
	439	/* This chip uses multiple addresses, use dummy devices for them */
	440	for (i = 1; i < 8; ++i) {
4053e749 WS	441	s35390a->client[i] = devm_i2c_new_dummy_device(dev,
	442	client->adapter,
	443	client->addr + i);
ca83542c	444	if (IS_ERR(s35390a->client[i])) {
03279634 RL	445	dev_err(dev, "Address %02x unavailable\n",
03279634 RL	446	client->addr + i);
4053e749	447	return PTR_ERR(s35390a->client[i]);
c46288b0 BB	448	}
	449	}
	450
ed6c6dfd AB	451	s35390a->rtc = devm_rtc_allocate_device(dev);
	452	if (IS_ERR(s35390a->rtc))
	453	return PTR_ERR(s35390a->rtc);
	454
16486d0c FL	455	err_read = s35390a_read_status(s35390a, &status1);
16486d0c FL	456	if (err_read < 0) {
03279634	457	dev_err(dev, "error resetting chip\n");
4053e749	458	return err_read;
c46288b0 BB	459	}
c46288b0 BB	460
3bd32722	461	if (status1 & S35390A_FLAG_24H)
c46288b0 BB	462	s35390a->twentyfourhour = 1;
	463	else
	464	s35390a->twentyfourhour = 0;
	465
3bd32722 UKK	466	if (status1 & S35390A_FLAG_INT2) {
	467	/* disable alarm (and maybe test mode) */
	468	buf = 0;
	469	err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &buf, 1);
	470	if (err < 0) {
03279634	471	dev_err(dev, "error disabling alarm");
4053e749	472	return err;
3bd32722 UKK	473	}
	474	} else {
	475	err = s35390a_disable_test_mode(s35390a);
	476	if (err < 0) {
03279634	477	dev_err(dev, "error disabling test mode\n");
4053e749	478	return err;
3bd32722 UKK	479	}
	480	}
	481
03279634	482	device_set_wakeup_capable(dev, 1);
542dd33a	483
ed6c6dfd	484	s35390a->rtc->ops = &s35390a_rtc_ops;
9e8a968f AB	485	s35390a->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
9e8a968f AB	486	s35390a->rtc->range_max = RTC_TIMESTAMP_END_2099;
3bd32722	487
654815ef AB	488	set_bit(RTC_FEATURE_ALARM_RES_MINUTE, s35390a->rtc->features);
654815ef AB	489	clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, s35390a->rtc->features );
c0e12848	490
3bd32722 UKK	491	if (status1 & S35390A_FLAG_INT2)
	492	rtc_update_irq(s35390a->rtc, 1, RTC_AF);
	493
fdcfd854	494	return devm_rtc_register_device(s35390a->rtc);
c46288b0 BB	495	}
	496
	497	static struct i2c_driver s35390a_driver = {
	498	.driver = {
	499	.name = "rtc-s35390a",
21f27432	500	.of_match_table = of_match_ptr(s35390a_of_match),
c46288b0	501	},
3f4a3322	502	.probe_new = s35390a_probe,
3760f736	503	.id_table = s35390a_id,
c46288b0 BB	504	};
c46288b0 BB	505
0abc9201	506	module_i2c_driver(s35390a_driver);
c46288b0 BB	507
	508	MODULE_AUTHOR("Byron Bradley <byron.bbradley@gmail.com>");
	509	MODULE_DESCRIPTION("S35390A RTC driver");
	510	MODULE_LICENSE("GPL");