Commit | Line | Data |
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c46288b0 BB |
1 | /* |
2 | * Seiko Instruments S-35390A RTC Driver | |
3 | * | |
4 | * Copyright (c) 2007 Byron Bradley | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/rtc.h> | |
14 | #include <linux/i2c.h> | |
15 | #include <linux/bitrev.h> | |
16 | #include <linux/bcd.h> | |
17 | #include <linux/slab.h> | |
8e6583f1 | 18 | #include <linux/delay.h> |
c46288b0 BB |
19 | |
20 | #define S35390A_CMD_STATUS1 0 | |
21 | #define S35390A_CMD_STATUS2 1 | |
22 | #define S35390A_CMD_TIME1 2 | |
542dd33a ML |
23 | #define S35390A_CMD_TIME2 3 |
24 | #define S35390A_CMD_INT2_REG1 5 | |
c46288b0 BB |
25 | |
26 | #define S35390A_BYTE_YEAR 0 | |
27 | #define S35390A_BYTE_MONTH 1 | |
28 | #define S35390A_BYTE_DAY 2 | |
29 | #define S35390A_BYTE_WDAY 3 | |
30 | #define S35390A_BYTE_HOURS 4 | |
31 | #define S35390A_BYTE_MINS 5 | |
32 | #define S35390A_BYTE_SECS 6 | |
33 | ||
542dd33a ML |
34 | #define S35390A_ALRM_BYTE_WDAY 0 |
35 | #define S35390A_ALRM_BYTE_HOURS 1 | |
36 | #define S35390A_ALRM_BYTE_MINS 2 | |
37 | ||
3bd32722 | 38 | /* flags for STATUS1 */ |
c46288b0 BB |
39 | #define S35390A_FLAG_POC 0x01 |
40 | #define S35390A_FLAG_BLD 0x02 | |
3bd32722 | 41 | #define S35390A_FLAG_INT2 0x04 |
c46288b0 BB |
42 | #define S35390A_FLAG_24H 0x40 |
43 | #define S35390A_FLAG_RESET 0x80 | |
3bd32722 UKK |
44 | |
45 | /* flag for STATUS2 */ | |
c46288b0 BB |
46 | #define S35390A_FLAG_TEST 0x01 |
47 | ||
542dd33a ML |
48 | #define S35390A_INT2_MODE_MASK 0xF0 |
49 | ||
50 | #define S35390A_INT2_MODE_NOINTR 0x00 | |
51 | #define S35390A_INT2_MODE_FREQ 0x10 | |
52 | #define S35390A_INT2_MODE_ALARM 0x40 | |
53 | #define S35390A_INT2_MODE_PMIN_EDG 0x20 | |
54 | ||
3760f736 JD |
55 | static const struct i2c_device_id s35390a_id[] = { |
56 | { "s35390a", 0 }, | |
57 | { } | |
58 | }; | |
59 | MODULE_DEVICE_TABLE(i2c, s35390a_id); | |
60 | ||
21f27432 JMC |
61 | static const struct of_device_id s35390a_of_match[] = { |
62 | { .compatible = "s35390a" }, | |
63 | { .compatible = "sii,s35390a" }, | |
64 | { } | |
65 | }; | |
66 | MODULE_DEVICE_TABLE(of, s35390a_of_match); | |
67 | ||
c46288b0 BB |
68 | struct s35390a { |
69 | struct i2c_client *client[8]; | |
70 | struct rtc_device *rtc; | |
71 | int twentyfourhour; | |
72 | }; | |
73 | ||
74 | static int s35390a_set_reg(struct s35390a *s35390a, int reg, char *buf, int len) | |
75 | { | |
76 | struct i2c_client *client = s35390a->client[reg]; | |
77 | struct i2c_msg msg[] = { | |
65659f63 S |
78 | { |
79 | .addr = client->addr, | |
80 | .len = len, | |
81 | .buf = buf | |
82 | }, | |
c46288b0 BB |
83 | }; |
84 | ||
85 | if ((i2c_transfer(client->adapter, msg, 1)) != 1) | |
86 | return -EIO; | |
87 | ||
88 | return 0; | |
89 | } | |
90 | ||
91 | static int s35390a_get_reg(struct s35390a *s35390a, int reg, char *buf, int len) | |
92 | { | |
93 | struct i2c_client *client = s35390a->client[reg]; | |
94 | struct i2c_msg msg[] = { | |
65659f63 S |
95 | { |
96 | .addr = client->addr, | |
97 | .flags = I2C_M_RD, | |
98 | .len = len, | |
99 | .buf = buf | |
100 | }, | |
c46288b0 BB |
101 | }; |
102 | ||
103 | if ((i2c_transfer(client->adapter, msg, 1)) != 1) | |
104 | return -EIO; | |
105 | ||
106 | return 0; | |
107 | } | |
108 | ||
16486d0c | 109 | static int s35390a_init(struct s35390a *s35390a) |
c46288b0 | 110 | { |
8e6583f1 UKK |
111 | char buf; |
112 | int ret; | |
113 | unsigned initcount = 0; | |
c46288b0 | 114 | |
8e6583f1 UKK |
115 | /* |
116 | * At least one of POC and BLD are set, so reinitialise chip. Keeping | |
117 | * this information in the hardware to know later that the time isn't | |
118 | * valid is unfortunately not possible because POC and BLD are cleared | |
119 | * on read. So the reset is best done now. | |
120 | * | |
121 | * The 24H bit is kept over reset, so set it already here. | |
122 | */ | |
123 | initialize: | |
8e6583f1 UKK |
124 | buf = S35390A_FLAG_RESET | S35390A_FLAG_24H; |
125 | ret = s35390a_set_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1); | |
126 | ||
127 | if (ret < 0) | |
128 | return ret; | |
129 | ||
130 | ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1); | |
131 | if (ret < 0) | |
132 | return ret; | |
133 | ||
134 | if (buf & (S35390A_FLAG_POC | S35390A_FLAG_BLD)) { | |
135 | /* Try up to five times to reset the chip */ | |
136 | if (initcount < 5) { | |
137 | ++initcount; | |
138 | goto initialize; | |
139 | } else | |
140 | return -EIO; | |
141 | } | |
142 | ||
143 | return 1; | |
c46288b0 BB |
144 | } |
145 | ||
16486d0c FL |
146 | /* |
147 | * Returns <0 on error, 0 if rtc is setup fine and 1 if the chip was reset. | |
148 | * To keep the information if an irq is pending, pass the value read from | |
149 | * STATUS1 to the caller. | |
150 | */ | |
151 | static int s35390a_read_status(struct s35390a *s35390a, char *status1) | |
152 | { | |
153 | int ret; | |
154 | ||
155 | ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, status1, 1); | |
156 | if (ret < 0) | |
157 | return ret; | |
158 | ||
159 | if (*status1 & S35390A_FLAG_POC) { | |
160 | /* | |
161 | * Do not communicate for 0.5 seconds since the power-on | |
162 | * detection circuit is in operation. | |
163 | */ | |
164 | msleep(500); | |
165 | return 1; | |
166 | } else if (*status1 & S35390A_FLAG_BLD) | |
167 | return 1; | |
168 | /* | |
169 | * If both POC and BLD are unset everything is fine. | |
170 | */ | |
171 | return 0; | |
172 | } | |
173 | ||
c46288b0 BB |
174 | static int s35390a_disable_test_mode(struct s35390a *s35390a) |
175 | { | |
176 | char buf[1]; | |
177 | ||
178 | if (s35390a_get_reg(s35390a, S35390A_CMD_STATUS2, buf, sizeof(buf)) < 0) | |
179 | return -EIO; | |
180 | ||
181 | if (!(buf[0] & S35390A_FLAG_TEST)) | |
182 | return 0; | |
183 | ||
184 | buf[0] &= ~S35390A_FLAG_TEST; | |
185 | return s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, buf, sizeof(buf)); | |
186 | } | |
187 | ||
188 | static char s35390a_hr2reg(struct s35390a *s35390a, int hour) | |
189 | { | |
190 | if (s35390a->twentyfourhour) | |
fe20ba70 | 191 | return bin2bcd(hour); |
c46288b0 BB |
192 | |
193 | if (hour < 12) | |
fe20ba70 | 194 | return bin2bcd(hour); |
c46288b0 | 195 | |
fe20ba70 | 196 | return 0x40 | bin2bcd(hour - 12); |
c46288b0 BB |
197 | } |
198 | ||
199 | static int s35390a_reg2hr(struct s35390a *s35390a, char reg) | |
200 | { | |
201 | unsigned hour; | |
202 | ||
203 | if (s35390a->twentyfourhour) | |
fe20ba70 | 204 | return bcd2bin(reg & 0x3f); |
c46288b0 | 205 | |
fe20ba70 | 206 | hour = bcd2bin(reg & 0x3f); |
c46288b0 BB |
207 | if (reg & 0x40) |
208 | hour += 12; | |
209 | ||
210 | return hour; | |
211 | } | |
212 | ||
779e1aab | 213 | static int s35390a_rtc_set_time(struct device *dev, struct rtc_time *tm) |
c46288b0 | 214 | { |
779e1aab | 215 | struct i2c_client *client = to_i2c_client(dev); |
c46288b0 BB |
216 | struct s35390a *s35390a = i2c_get_clientdata(client); |
217 | int i, err; | |
16486d0c | 218 | char buf[7], status; |
c46288b0 BB |
219 | |
220 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d mday=%d, " | |
221 | "mon=%d, year=%d, wday=%d\n", __func__, tm->tm_sec, | |
222 | tm->tm_min, tm->tm_hour, tm->tm_mday, tm->tm_mon, tm->tm_year, | |
223 | tm->tm_wday); | |
224 | ||
16486d0c FL |
225 | if (s35390a_read_status(s35390a, &status) == 1) |
226 | s35390a_init(s35390a); | |
227 | ||
fe20ba70 AB |
228 | buf[S35390A_BYTE_YEAR] = bin2bcd(tm->tm_year - 100); |
229 | buf[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon + 1); | |
230 | buf[S35390A_BYTE_DAY] = bin2bcd(tm->tm_mday); | |
231 | buf[S35390A_BYTE_WDAY] = bin2bcd(tm->tm_wday); | |
c46288b0 | 232 | buf[S35390A_BYTE_HOURS] = s35390a_hr2reg(s35390a, tm->tm_hour); |
fe20ba70 AB |
233 | buf[S35390A_BYTE_MINS] = bin2bcd(tm->tm_min); |
234 | buf[S35390A_BYTE_SECS] = bin2bcd(tm->tm_sec); | |
c46288b0 BB |
235 | |
236 | /* This chip expects the bits of each byte to be in reverse order */ | |
237 | for (i = 0; i < 7; ++i) | |
238 | buf[i] = bitrev8(buf[i]); | |
239 | ||
240 | err = s35390a_set_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf)); | |
241 | ||
242 | return err; | |
243 | } | |
244 | ||
779e1aab | 245 | static int s35390a_rtc_read_time(struct device *dev, struct rtc_time *tm) |
c46288b0 | 246 | { |
779e1aab | 247 | struct i2c_client *client = to_i2c_client(dev); |
c46288b0 | 248 | struct s35390a *s35390a = i2c_get_clientdata(client); |
16486d0c | 249 | char buf[7], status; |
c46288b0 BB |
250 | int i, err; |
251 | ||
16486d0c FL |
252 | if (s35390a_read_status(s35390a, &status) == 1) |
253 | return -EINVAL; | |
254 | ||
c46288b0 BB |
255 | err = s35390a_get_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf)); |
256 | if (err < 0) | |
257 | return err; | |
258 | ||
259 | /* This chip returns the bits of each byte in reverse order */ | |
260 | for (i = 0; i < 7; ++i) | |
261 | buf[i] = bitrev8(buf[i]); | |
262 | ||
fe20ba70 AB |
263 | tm->tm_sec = bcd2bin(buf[S35390A_BYTE_SECS]); |
264 | tm->tm_min = bcd2bin(buf[S35390A_BYTE_MINS]); | |
c46288b0 | 265 | tm->tm_hour = s35390a_reg2hr(s35390a, buf[S35390A_BYTE_HOURS]); |
fe20ba70 AB |
266 | tm->tm_wday = bcd2bin(buf[S35390A_BYTE_WDAY]); |
267 | tm->tm_mday = bcd2bin(buf[S35390A_BYTE_DAY]); | |
268 | tm->tm_mon = bcd2bin(buf[S35390A_BYTE_MONTH]) - 1; | |
269 | tm->tm_year = bcd2bin(buf[S35390A_BYTE_YEAR]) + 100; | |
c46288b0 BB |
270 | |
271 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, mday=%d, " | |
272 | "mon=%d, year=%d, wday=%d\n", __func__, tm->tm_sec, | |
273 | tm->tm_min, tm->tm_hour, tm->tm_mday, tm->tm_mon, tm->tm_year, | |
274 | tm->tm_wday); | |
275 | ||
bb530199 | 276 | return 0; |
c46288b0 BB |
277 | } |
278 | ||
779e1aab | 279 | static int s35390a_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) |
542dd33a | 280 | { |
779e1aab | 281 | struct i2c_client *client = to_i2c_client(dev); |
542dd33a ML |
282 | struct s35390a *s35390a = i2c_get_clientdata(client); |
283 | char buf[3], sts = 0; | |
284 | int err, i; | |
285 | ||
286 | dev_dbg(&client->dev, "%s: alm is secs=%d, mins=%d, hours=%d mday=%d, "\ | |
287 | "mon=%d, year=%d, wday=%d\n", __func__, alm->time.tm_sec, | |
288 | alm->time.tm_min, alm->time.tm_hour, alm->time.tm_mday, | |
289 | alm->time.tm_mon, alm->time.tm_year, alm->time.tm_wday); | |
290 | ||
5227e8a2 | 291 | /* disable interrupt (which deasserts the irq line) */ |
542dd33a ML |
292 | err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts)); |
293 | if (err < 0) | |
294 | return err; | |
295 | ||
5227e8a2 | 296 | /* clear pending interrupt (in STATUS1 only), if any */ |
542dd33a ML |
297 | err = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, &sts, sizeof(sts)); |
298 | if (err < 0) | |
299 | return err; | |
300 | ||
301 | if (alm->enabled) | |
302 | sts = S35390A_INT2_MODE_ALARM; | |
303 | else | |
304 | sts = S35390A_INT2_MODE_NOINTR; | |
305 | ||
306 | /* This chip expects the bits of each byte to be in reverse order */ | |
307 | sts = bitrev8(sts); | |
308 | ||
309 | /* set interupt mode*/ | |
310 | err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts)); | |
311 | if (err < 0) | |
312 | return err; | |
313 | ||
314 | if (alm->time.tm_wday != -1) | |
315 | buf[S35390A_ALRM_BYTE_WDAY] = bin2bcd(alm->time.tm_wday) | 0x80; | |
f87e904d UKK |
316 | else |
317 | buf[S35390A_ALRM_BYTE_WDAY] = 0; | |
542dd33a ML |
318 | |
319 | buf[S35390A_ALRM_BYTE_HOURS] = s35390a_hr2reg(s35390a, | |
320 | alm->time.tm_hour) | 0x80; | |
321 | buf[S35390A_ALRM_BYTE_MINS] = bin2bcd(alm->time.tm_min) | 0x80; | |
322 | ||
323 | if (alm->time.tm_hour >= 12) | |
324 | buf[S35390A_ALRM_BYTE_HOURS] |= 0x40; | |
325 | ||
326 | for (i = 0; i < 3; ++i) | |
327 | buf[i] = bitrev8(buf[i]); | |
328 | ||
329 | err = s35390a_set_reg(s35390a, S35390A_CMD_INT2_REG1, buf, | |
330 | sizeof(buf)); | |
331 | ||
332 | return err; | |
333 | } | |
334 | ||
779e1aab | 335 | static int s35390a_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) |
542dd33a | 336 | { |
779e1aab | 337 | struct i2c_client *client = to_i2c_client(dev); |
542dd33a ML |
338 | struct s35390a *s35390a = i2c_get_clientdata(client); |
339 | char buf[3], sts; | |
340 | int i, err; | |
341 | ||
342 | err = s35390a_get_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts)); | |
343 | if (err < 0) | |
344 | return err; | |
345 | ||
f87e904d UKK |
346 | if ((bitrev8(sts) & S35390A_INT2_MODE_MASK) != S35390A_INT2_MODE_ALARM) { |
347 | /* | |
348 | * When the alarm isn't enabled, the register to configure | |
349 | * the alarm time isn't accessible. | |
350 | */ | |
351 | alm->enabled = 0; | |
352 | return 0; | |
353 | } else { | |
354 | alm->enabled = 1; | |
355 | } | |
542dd33a ML |
356 | |
357 | err = s35390a_get_reg(s35390a, S35390A_CMD_INT2_REG1, buf, sizeof(buf)); | |
358 | if (err < 0) | |
359 | return err; | |
360 | ||
361 | /* This chip returns the bits of each byte in reverse order */ | |
f87e904d | 362 | for (i = 0; i < 3; ++i) |
542dd33a | 363 | buf[i] = bitrev8(buf[i]); |
542dd33a | 364 | |
f87e904d UKK |
365 | /* |
366 | * B0 of the three matching registers is an enable flag. Iff it is set | |
367 | * the configured value is used for matching. | |
368 | */ | |
369 | if (buf[S35390A_ALRM_BYTE_WDAY] & 0x80) | |
370 | alm->time.tm_wday = | |
371 | bcd2bin(buf[S35390A_ALRM_BYTE_WDAY] & ~0x80); | |
372 | ||
373 | if (buf[S35390A_ALRM_BYTE_HOURS] & 0x80) | |
374 | alm->time.tm_hour = | |
375 | s35390a_reg2hr(s35390a, | |
376 | buf[S35390A_ALRM_BYTE_HOURS] & ~0x80); | |
377 | ||
378 | if (buf[S35390A_ALRM_BYTE_MINS] & 0x80) | |
379 | alm->time.tm_min = bcd2bin(buf[S35390A_ALRM_BYTE_MINS] & ~0x80); | |
380 | ||
381 | /* alarm triggers always at s=0 */ | |
382 | alm->time.tm_sec = 0; | |
542dd33a ML |
383 | |
384 | dev_dbg(&client->dev, "%s: alm is mins=%d, hours=%d, wday=%d\n", | |
385 | __func__, alm->time.tm_min, alm->time.tm_hour, | |
386 | alm->time.tm_wday); | |
387 | ||
388 | return 0; | |
389 | } | |
390 | ||
7a1fe407 FL |
391 | static int s35390a_rtc_ioctl(struct device *dev, unsigned int cmd, |
392 | unsigned long arg) | |
393 | { | |
394 | struct i2c_client *client = to_i2c_client(dev); | |
395 | struct s35390a *s35390a = i2c_get_clientdata(client); | |
396 | char sts; | |
397 | int err; | |
398 | ||
399 | switch (cmd) { | |
400 | case RTC_VL_READ: | |
401 | /* s35390a_reset set lowvoltage flag and init RTC if needed */ | |
402 | err = s35390a_read_status(s35390a, &sts); | |
403 | if (err < 0) | |
404 | return err; | |
405 | if (copy_to_user((void __user *)arg, &err, sizeof(int))) | |
406 | return -EFAULT; | |
407 | break; | |
408 | case RTC_VL_CLR: | |
409 | /* update flag and clear register */ | |
410 | err = s35390a_init(s35390a); | |
411 | if (err < 0) | |
412 | return err; | |
413 | break; | |
414 | default: | |
415 | return -ENOIOCTLCMD; | |
416 | } | |
417 | ||
418 | return 0; | |
419 | } | |
420 | ||
c46288b0 BB |
421 | static const struct rtc_class_ops s35390a_rtc_ops = { |
422 | .read_time = s35390a_rtc_read_time, | |
423 | .set_time = s35390a_rtc_set_time, | |
542dd33a ML |
424 | .set_alarm = s35390a_rtc_set_alarm, |
425 | .read_alarm = s35390a_rtc_read_alarm, | |
7a1fe407 | 426 | .ioctl = s35390a_rtc_ioctl, |
c46288b0 BB |
427 | }; |
428 | ||
429 | static struct i2c_driver s35390a_driver; | |
430 | ||
d2653e92 JD |
431 | static int s35390a_probe(struct i2c_client *client, |
432 | const struct i2c_device_id *id) | |
c46288b0 | 433 | { |
16486d0c | 434 | int err, err_read; |
c46288b0 BB |
435 | unsigned int i; |
436 | struct s35390a *s35390a; | |
3bd32722 | 437 | char buf, status1; |
c46288b0 BB |
438 | |
439 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { | |
440 | err = -ENODEV; | |
441 | goto exit; | |
442 | } | |
443 | ||
b4cd3d6a JH |
444 | s35390a = devm_kzalloc(&client->dev, sizeof(struct s35390a), |
445 | GFP_KERNEL); | |
c46288b0 BB |
446 | if (!s35390a) { |
447 | err = -ENOMEM; | |
448 | goto exit; | |
449 | } | |
450 | ||
451 | s35390a->client[0] = client; | |
452 | i2c_set_clientdata(client, s35390a); | |
453 | ||
454 | /* This chip uses multiple addresses, use dummy devices for them */ | |
455 | for (i = 1; i < 8; ++i) { | |
456 | s35390a->client[i] = i2c_new_dummy(client->adapter, | |
60b129d7 | 457 | client->addr + i); |
c46288b0 BB |
458 | if (!s35390a->client[i]) { |
459 | dev_err(&client->dev, "Address %02x unavailable\n", | |
460 | client->addr + i); | |
461 | err = -EBUSY; | |
462 | goto exit_dummy; | |
463 | } | |
464 | } | |
465 | ||
16486d0c FL |
466 | err_read = s35390a_read_status(s35390a, &status1); |
467 | if (err_read < 0) { | |
468 | err = err_read; | |
c46288b0 BB |
469 | dev_err(&client->dev, "error resetting chip\n"); |
470 | goto exit_dummy; | |
471 | } | |
472 | ||
3bd32722 | 473 | if (status1 & S35390A_FLAG_24H) |
c46288b0 BB |
474 | s35390a->twentyfourhour = 1; |
475 | else | |
476 | s35390a->twentyfourhour = 0; | |
477 | ||
3bd32722 UKK |
478 | if (status1 & S35390A_FLAG_INT2) { |
479 | /* disable alarm (and maybe test mode) */ | |
480 | buf = 0; | |
481 | err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &buf, 1); | |
482 | if (err < 0) { | |
483 | dev_err(&client->dev, "error disabling alarm"); | |
484 | goto exit_dummy; | |
485 | } | |
486 | } else { | |
487 | err = s35390a_disable_test_mode(s35390a); | |
488 | if (err < 0) { | |
489 | dev_err(&client->dev, "error disabling test mode\n"); | |
490 | goto exit_dummy; | |
491 | } | |
492 | } | |
493 | ||
542dd33a ML |
494 | device_set_wakeup_capable(&client->dev, 1); |
495 | ||
b4cd3d6a JH |
496 | s35390a->rtc = devm_rtc_device_register(&client->dev, |
497 | s35390a_driver.driver.name, | |
498 | &s35390a_rtc_ops, THIS_MODULE); | |
c46288b0 BB |
499 | |
500 | if (IS_ERR(s35390a->rtc)) { | |
501 | err = PTR_ERR(s35390a->rtc); | |
502 | goto exit_dummy; | |
503 | } | |
3bd32722 UKK |
504 | |
505 | if (status1 & S35390A_FLAG_INT2) | |
506 | rtc_update_irq(s35390a->rtc, 1, RTC_AF); | |
507 | ||
c46288b0 BB |
508 | return 0; |
509 | ||
510 | exit_dummy: | |
511 | for (i = 1; i < 8; ++i) | |
512 | if (s35390a->client[i]) | |
513 | i2c_unregister_device(s35390a->client[i]); | |
c46288b0 BB |
514 | |
515 | exit: | |
516 | return err; | |
517 | } | |
518 | ||
519 | static int s35390a_remove(struct i2c_client *client) | |
520 | { | |
521 | unsigned int i; | |
c46288b0 | 522 | struct s35390a *s35390a = i2c_get_clientdata(client); |
b4cd3d6a | 523 | |
c46288b0 BB |
524 | for (i = 1; i < 8; ++i) |
525 | if (s35390a->client[i]) | |
526 | i2c_unregister_device(s35390a->client[i]); | |
527 | ||
c46288b0 BB |
528 | return 0; |
529 | } | |
530 | ||
531 | static struct i2c_driver s35390a_driver = { | |
532 | .driver = { | |
533 | .name = "rtc-s35390a", | |
21f27432 | 534 | .of_match_table = of_match_ptr(s35390a_of_match), |
c46288b0 BB |
535 | }, |
536 | .probe = s35390a_probe, | |
537 | .remove = s35390a_remove, | |
3760f736 | 538 | .id_table = s35390a_id, |
c46288b0 BB |
539 | }; |
540 | ||
0abc9201 | 541 | module_i2c_driver(s35390a_driver); |
c46288b0 BB |
542 | |
543 | MODULE_AUTHOR("Byron Bradley <byron.bbradley@gmail.com>"); | |
544 | MODULE_DESCRIPTION("S35390A RTC driver"); | |
545 | MODULE_LICENSE("GPL"); |