Commit | Line | Data |
---|---|---|
52365230 | 1 | /* |
c2a1c145 | 2 | * Micro Crystal RV-3029 / RV-3049 rtc class driver |
52365230 HS |
3 | * |
4 | * Author: Gregory Hermant <gregory.hermant@calao-systems.com> | |
2dca3d9e | 5 | * Michael Buesch <m@bues.ch> |
52365230 HS |
6 | * |
7 | * based on previously existing rtc class drivers | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
52365230 HS |
13 | */ |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/i2c.h> | |
c2a1c145 | 17 | #include <linux/spi/spi.h> |
52365230 HS |
18 | #include <linux/bcd.h> |
19 | #include <linux/rtc.h> | |
a7f6e287 MB |
20 | #include <linux/delay.h> |
21 | #include <linux/of.h> | |
a696b31e MB |
22 | #include <linux/hwmon.h> |
23 | #include <linux/hwmon-sysfs.h> | |
e6e38082 | 24 | #include <linux/regmap.h> |
52365230 HS |
25 | |
26 | /* Register map */ | |
27 | /* control section */ | |
aba39d27 | 28 | #define RV3029_ONOFF_CTRL 0x00 |
7697de35 MB |
29 | #define RV3029_ONOFF_CTRL_WE BIT(0) |
30 | #define RV3029_ONOFF_CTRL_TE BIT(1) | |
31 | #define RV3029_ONOFF_CTRL_TAR BIT(2) | |
32 | #define RV3029_ONOFF_CTRL_EERE BIT(3) | |
33 | #define RV3029_ONOFF_CTRL_SRON BIT(4) | |
34 | #define RV3029_ONOFF_CTRL_TD0 BIT(5) | |
35 | #define RV3029_ONOFF_CTRL_TD1 BIT(6) | |
36 | #define RV3029_ONOFF_CTRL_CLKINT BIT(7) | |
aba39d27 | 37 | #define RV3029_IRQ_CTRL 0x01 |
7697de35 MB |
38 | #define RV3029_IRQ_CTRL_AIE BIT(0) |
39 | #define RV3029_IRQ_CTRL_TIE BIT(1) | |
40 | #define RV3029_IRQ_CTRL_V1IE BIT(2) | |
41 | #define RV3029_IRQ_CTRL_V2IE BIT(3) | |
42 | #define RV3029_IRQ_CTRL_SRIE BIT(4) | |
aba39d27 | 43 | #define RV3029_IRQ_FLAGS 0x02 |
7697de35 MB |
44 | #define RV3029_IRQ_FLAGS_AF BIT(0) |
45 | #define RV3029_IRQ_FLAGS_TF BIT(1) | |
46 | #define RV3029_IRQ_FLAGS_V1IF BIT(2) | |
47 | #define RV3029_IRQ_FLAGS_V2IF BIT(3) | |
48 | #define RV3029_IRQ_FLAGS_SRF BIT(4) | |
aba39d27 | 49 | #define RV3029_STATUS 0x03 |
7697de35 MB |
50 | #define RV3029_STATUS_VLOW1 BIT(2) |
51 | #define RV3029_STATUS_VLOW2 BIT(3) | |
52 | #define RV3029_STATUS_SR BIT(4) | |
53 | #define RV3029_STATUS_PON BIT(5) | |
54 | #define RV3029_STATUS_EEBUSY BIT(7) | |
aba39d27 | 55 | #define RV3029_RST_CTRL 0x04 |
7697de35 | 56 | #define RV3029_RST_CTRL_SYSR BIT(4) |
aba39d27 | 57 | #define RV3029_CONTROL_SECTION_LEN 0x05 |
52365230 HS |
58 | |
59 | /* watch section */ | |
aba39d27 MB |
60 | #define RV3029_W_SEC 0x08 |
61 | #define RV3029_W_MINUTES 0x09 | |
62 | #define RV3029_W_HOURS 0x0A | |
7697de35 MB |
63 | #define RV3029_REG_HR_12_24 BIT(6) /* 24h/12h mode */ |
64 | #define RV3029_REG_HR_PM BIT(5) /* PM/AM bit in 12h mode */ | |
aba39d27 MB |
65 | #define RV3029_W_DATE 0x0B |
66 | #define RV3029_W_DAYS 0x0C | |
67 | #define RV3029_W_MONTHS 0x0D | |
68 | #define RV3029_W_YEARS 0x0E | |
69 | #define RV3029_WATCH_SECTION_LEN 0x07 | |
52365230 HS |
70 | |
71 | /* alarm section */ | |
aba39d27 MB |
72 | #define RV3029_A_SC 0x10 |
73 | #define RV3029_A_MN 0x11 | |
74 | #define RV3029_A_HR 0x12 | |
75 | #define RV3029_A_DT 0x13 | |
76 | #define RV3029_A_DW 0x14 | |
77 | #define RV3029_A_MO 0x15 | |
78 | #define RV3029_A_YR 0x16 | |
dc492e86 | 79 | #define RV3029_A_AE_X BIT(7) |
aba39d27 | 80 | #define RV3029_ALARM_SECTION_LEN 0x07 |
52365230 HS |
81 | |
82 | /* timer section */ | |
aba39d27 MB |
83 | #define RV3029_TIMER_LOW 0x18 |
84 | #define RV3029_TIMER_HIGH 0x19 | |
52365230 HS |
85 | |
86 | /* temperature section */ | |
aba39d27 | 87 | #define RV3029_TEMP_PAGE 0x20 |
52365230 HS |
88 | |
89 | /* eeprom data section */ | |
aba39d27 MB |
90 | #define RV3029_E2P_EEDATA1 0x28 |
91 | #define RV3029_E2P_EEDATA2 0x29 | |
7697de35 | 92 | #define RV3029_E2PDATA_SECTION_LEN 0x02 |
52365230 HS |
93 | |
94 | /* eeprom control section */ | |
aba39d27 | 95 | #define RV3029_CONTROL_E2P_EECTRL 0x30 |
7697de35 MB |
96 | #define RV3029_EECTRL_THP BIT(0) /* temp scan interval */ |
97 | #define RV3029_EECTRL_THE BIT(1) /* thermometer enable */ | |
98 | #define RV3029_EECTRL_FD0 BIT(2) /* CLKOUT */ | |
99 | #define RV3029_EECTRL_FD1 BIT(3) /* CLKOUT */ | |
100 | #define RV3029_TRICKLE_1K BIT(4) /* 1.5K resistance */ | |
101 | #define RV3029_TRICKLE_5K BIT(5) /* 5K resistance */ | |
102 | #define RV3029_TRICKLE_20K BIT(6) /* 20K resistance */ | |
103 | #define RV3029_TRICKLE_80K BIT(7) /* 80K resistance */ | |
104 | #define RV3029_TRICKLE_MASK (RV3029_TRICKLE_1K |\ | |
105 | RV3029_TRICKLE_5K |\ | |
106 | RV3029_TRICKLE_20K |\ | |
107 | RV3029_TRICKLE_80K) | |
108 | #define RV3029_TRICKLE_SHIFT 4 | |
109 | #define RV3029_CONTROL_E2P_XOFFS 0x31 /* XTAL offset */ | |
110 | #define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */ | |
111 | #define RV3029_CONTROL_E2P_QCOEF 0x32 /* XTAL temp drift coef */ | |
112 | #define RV3029_CONTROL_E2P_TURNOVER 0x33 /* XTAL turnover temp (in *C) */ | |
113 | #define RV3029_CONTROL_E2P_TOV_MASK 0x3F /* XTAL turnover temp mask */ | |
52365230 HS |
114 | |
115 | /* user ram section */ | |
aba39d27 MB |
116 | #define RV3029_USR1_RAM_PAGE 0x38 |
117 | #define RV3029_USR1_SECTION_LEN 0x04 | |
118 | #define RV3029_USR2_RAM_PAGE 0x3C | |
119 | #define RV3029_USR2_SECTION_LEN 0x04 | |
52365230 | 120 | |
e6e38082 MJ |
121 | struct rv3029_data { |
122 | struct device *dev; | |
123 | struct rtc_device *rtc; | |
124 | struct regmap *regmap; | |
125 | int irq; | |
126 | }; | |
127 | ||
128 | static int rv3029_read_regs(struct device *dev, u8 reg, u8 *buf, | |
abe2f551 | 129 | unsigned int len) |
52365230 | 130 | { |
e6e38082 | 131 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 | 132 | |
aba39d27 | 133 | if ((reg > RV3029_USR1_RAM_PAGE + 7) || |
abe2f551 | 134 | (reg + len > RV3029_USR1_RAM_PAGE + 8)) |
52365230 HS |
135 | return -EINVAL; |
136 | ||
e6e38082 | 137 | return regmap_bulk_read(rv3029->regmap, reg, buf, len); |
52365230 HS |
138 | } |
139 | ||
e6e38082 | 140 | static int rv3029_write_regs(struct device *dev, u8 reg, u8 const buf[], |
abe2f551 | 141 | unsigned int len) |
52365230 | 142 | { |
e6e38082 MJ |
143 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
144 | ||
aba39d27 | 145 | if ((reg > RV3029_USR1_RAM_PAGE + 7) || |
abe2f551 | 146 | (reg + len > RV3029_USR1_RAM_PAGE + 8)) |
52365230 HS |
147 | return -EINVAL; |
148 | ||
e6e38082 | 149 | return regmap_bulk_write(rv3029->regmap, reg, buf, len); |
52365230 HS |
150 | } |
151 | ||
e6e38082 | 152 | static int rv3029_update_bits(struct device *dev, u8 reg, u8 mask, u8 set) |
2dca3d9e MB |
153 | { |
154 | u8 buf; | |
155 | int ret; | |
156 | ||
e6e38082 | 157 | ret = rv3029_read_regs(dev, reg, &buf, 1); |
2dca3d9e MB |
158 | if (ret < 0) |
159 | return ret; | |
160 | buf &= ~mask; | |
161 | buf |= set & mask; | |
e6e38082 | 162 | ret = rv3029_write_regs(dev, reg, &buf, 1); |
2dca3d9e MB |
163 | if (ret < 0) |
164 | return ret; | |
165 | ||
166 | return 0; | |
167 | } | |
168 | ||
e6e38082 | 169 | static int rv3029_get_sr(struct device *dev, u8 *buf) |
52365230 | 170 | { |
e6e38082 | 171 | int ret = rv3029_read_regs(dev, RV3029_STATUS, buf, 1); |
52365230 HS |
172 | |
173 | if (ret < 0) | |
174 | return -EIO; | |
e6e38082 | 175 | dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]); |
52365230 HS |
176 | return 0; |
177 | } | |
178 | ||
e6e38082 | 179 | static int rv3029_set_sr(struct device *dev, u8 val) |
52365230 HS |
180 | { |
181 | u8 buf[1]; | |
182 | int sr; | |
183 | ||
184 | buf[0] = val; | |
e6e38082 MJ |
185 | sr = rv3029_write_regs(dev, RV3029_STATUS, buf, 1); |
186 | dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]); | |
52365230 HS |
187 | if (sr < 0) |
188 | return -EIO; | |
189 | return 0; | |
190 | } | |
191 | ||
e6e38082 | 192 | static int rv3029_eeprom_busywait(struct device *dev) |
a7f6e287 MB |
193 | { |
194 | int i, ret; | |
195 | u8 sr; | |
196 | ||
197 | for (i = 100; i > 0; i--) { | |
e6e38082 | 198 | ret = rv3029_get_sr(dev, &sr); |
a7f6e287 MB |
199 | if (ret < 0) |
200 | break; | |
201 | if (!(sr & RV3029_STATUS_EEBUSY)) | |
202 | break; | |
203 | usleep_range(1000, 10000); | |
204 | } | |
205 | if (i <= 0) { | |
e6e38082 | 206 | dev_err(dev, "EEPROM busy wait timeout.\n"); |
a7f6e287 MB |
207 | return -ETIMEDOUT; |
208 | } | |
209 | ||
210 | return ret; | |
211 | } | |
212 | ||
e6e38082 | 213 | static int rv3029_eeprom_exit(struct device *dev) |
a7f6e287 MB |
214 | { |
215 | /* Re-enable eeprom refresh */ | |
e6e38082 | 216 | return rv3029_update_bits(dev, RV3029_ONOFF_CTRL, |
4e7f1a60 MJ |
217 | RV3029_ONOFF_CTRL_EERE, |
218 | RV3029_ONOFF_CTRL_EERE); | |
a7f6e287 MB |
219 | } |
220 | ||
e6e38082 | 221 | static int rv3029_eeprom_enter(struct device *dev) |
a7f6e287 MB |
222 | { |
223 | int ret; | |
224 | u8 sr; | |
225 | ||
226 | /* Check whether we are in the allowed voltage range. */ | |
e6e38082 | 227 | ret = rv3029_get_sr(dev, &sr); |
a7f6e287 MB |
228 | if (ret < 0) |
229 | return ret; | |
230 | if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) { | |
231 | /* We clear the bits and retry once just in case | |
232 | * we had a brown out in early startup. | |
233 | */ | |
234 | sr &= ~RV3029_STATUS_VLOW1; | |
235 | sr &= ~RV3029_STATUS_VLOW2; | |
e6e38082 | 236 | ret = rv3029_set_sr(dev, sr); |
a7f6e287 MB |
237 | if (ret < 0) |
238 | return ret; | |
239 | usleep_range(1000, 10000); | |
e6e38082 | 240 | ret = rv3029_get_sr(dev, &sr); |
a7f6e287 MB |
241 | if (ret < 0) |
242 | return ret; | |
243 | if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) { | |
e6e38082 | 244 | dev_err(dev, |
a7f6e287 MB |
245 | "Supply voltage is too low to safely access the EEPROM.\n"); |
246 | return -ENODEV; | |
247 | } | |
248 | } | |
249 | ||
250 | /* Disable eeprom refresh. */ | |
e6e38082 MJ |
251 | ret = rv3029_update_bits(dev, RV3029_ONOFF_CTRL, RV3029_ONOFF_CTRL_EERE, |
252 | 0); | |
a7f6e287 MB |
253 | if (ret < 0) |
254 | return ret; | |
255 | ||
256 | /* Wait for any previous eeprom accesses to finish. */ | |
e6e38082 | 257 | ret = rv3029_eeprom_busywait(dev); |
a7f6e287 | 258 | if (ret < 0) |
e6e38082 | 259 | rv3029_eeprom_exit(dev); |
a7f6e287 MB |
260 | |
261 | return ret; | |
262 | } | |
263 | ||
e6e38082 | 264 | static int rv3029_eeprom_read(struct device *dev, u8 reg, |
a7f6e287 MB |
265 | u8 buf[], size_t len) |
266 | { | |
267 | int ret, err; | |
268 | ||
e6e38082 | 269 | err = rv3029_eeprom_enter(dev); |
a7f6e287 MB |
270 | if (err < 0) |
271 | return err; | |
272 | ||
e6e38082 | 273 | ret = rv3029_read_regs(dev, reg, buf, len); |
a7f6e287 | 274 | |
e6e38082 | 275 | err = rv3029_eeprom_exit(dev); |
a7f6e287 MB |
276 | if (err < 0) |
277 | return err; | |
278 | ||
279 | return ret; | |
280 | } | |
281 | ||
e6e38082 | 282 | static int rv3029_eeprom_write(struct device *dev, u8 reg, |
a7f6e287 MB |
283 | u8 const buf[], size_t len) |
284 | { | |
285 | int ret, err; | |
286 | size_t i; | |
287 | u8 tmp; | |
288 | ||
e6e38082 | 289 | err = rv3029_eeprom_enter(dev); |
a7f6e287 MB |
290 | if (err < 0) |
291 | return err; | |
292 | ||
293 | for (i = 0; i < len; i++, reg++) { | |
e6e38082 | 294 | ret = rv3029_read_regs(dev, reg, &tmp, 1); |
a7f6e287 MB |
295 | if (ret < 0) |
296 | break; | |
297 | if (tmp != buf[i]) { | |
e6e38082 | 298 | ret = rv3029_write_regs(dev, reg, &buf[i], 1); |
a7f6e287 MB |
299 | if (ret < 0) |
300 | break; | |
301 | } | |
e6e38082 | 302 | ret = rv3029_eeprom_busywait(dev); |
a7f6e287 MB |
303 | if (ret < 0) |
304 | break; | |
305 | } | |
306 | ||
e6e38082 | 307 | err = rv3029_eeprom_exit(dev); |
a7f6e287 MB |
308 | if (err < 0) |
309 | return err; | |
310 | ||
311 | return ret; | |
312 | } | |
313 | ||
e6e38082 | 314 | static int rv3029_eeprom_update_bits(struct device *dev, |
39387dc2 MB |
315 | u8 reg, u8 mask, u8 set) |
316 | { | |
317 | u8 buf; | |
318 | int ret; | |
319 | ||
e6e38082 | 320 | ret = rv3029_eeprom_read(dev, reg, &buf, 1); |
39387dc2 MB |
321 | if (ret < 0) |
322 | return ret; | |
323 | buf &= ~mask; | |
324 | buf |= set & mask; | |
e6e38082 | 325 | ret = rv3029_eeprom_write(dev, reg, &buf, 1); |
39387dc2 MB |
326 | if (ret < 0) |
327 | return ret; | |
328 | ||
329 | return 0; | |
330 | } | |
331 | ||
e6e38082 | 332 | static int rv3029_read_time(struct device *dev, struct rtc_time *tm) |
52365230 HS |
333 | { |
334 | u8 buf[1]; | |
335 | int ret; | |
aba39d27 | 336 | u8 regs[RV3029_WATCH_SECTION_LEN] = { 0, }; |
52365230 | 337 | |
e6e38082 | 338 | ret = rv3029_get_sr(dev, buf); |
52365230 | 339 | if (ret < 0) { |
e6e38082 | 340 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
341 | return -EIO; |
342 | } | |
343 | ||
e6e38082 | 344 | ret = rv3029_read_regs(dev, RV3029_W_SEC, regs, |
4e7f1a60 | 345 | RV3029_WATCH_SECTION_LEN); |
52365230 | 346 | if (ret < 0) { |
e6e38082 | 347 | dev_err(dev, "%s: reading RTC section failed\n", __func__); |
52365230 HS |
348 | return ret; |
349 | } | |
350 | ||
abe2f551 MJ |
351 | tm->tm_sec = bcd2bin(regs[RV3029_W_SEC - RV3029_W_SEC]); |
352 | tm->tm_min = bcd2bin(regs[RV3029_W_MINUTES - RV3029_W_SEC]); | |
52365230 HS |
353 | |
354 | /* HR field has a more complex interpretation */ | |
355 | { | |
abe2f551 | 356 | const u8 _hr = regs[RV3029_W_HOURS - RV3029_W_SEC]; |
aba39d27 MB |
357 | |
358 | if (_hr & RV3029_REG_HR_12_24) { | |
52365230 HS |
359 | /* 12h format */ |
360 | tm->tm_hour = bcd2bin(_hr & 0x1f); | |
aba39d27 | 361 | if (_hr & RV3029_REG_HR_PM) /* PM flag set */ |
52365230 HS |
362 | tm->tm_hour += 12; |
363 | } else /* 24h format */ | |
364 | tm->tm_hour = bcd2bin(_hr & 0x3f); | |
365 | } | |
366 | ||
abe2f551 MJ |
367 | tm->tm_mday = bcd2bin(regs[RV3029_W_DATE - RV3029_W_SEC]); |
368 | tm->tm_mon = bcd2bin(regs[RV3029_W_MONTHS - RV3029_W_SEC]) - 1; | |
369 | tm->tm_year = bcd2bin(regs[RV3029_W_YEARS - RV3029_W_SEC]) + 100; | |
370 | tm->tm_wday = bcd2bin(regs[RV3029_W_DAYS - RV3029_W_SEC]) - 1; | |
52365230 HS |
371 | |
372 | return 0; | |
373 | } | |
374 | ||
e6e38082 | 375 | static int rv3029_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
52365230 HS |
376 | { |
377 | struct rtc_time *const tm = &alarm->time; | |
378 | int ret; | |
379 | u8 regs[8]; | |
380 | ||
e6e38082 | 381 | ret = rv3029_get_sr(dev, regs); |
52365230 | 382 | if (ret < 0) { |
e6e38082 | 383 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
384 | return -EIO; |
385 | } | |
386 | ||
e6e38082 | 387 | ret = rv3029_read_regs(dev, RV3029_A_SC, regs, |
4e7f1a60 | 388 | RV3029_ALARM_SECTION_LEN); |
52365230 HS |
389 | |
390 | if (ret < 0) { | |
e6e38082 | 391 | dev_err(dev, "%s: reading alarm section failed\n", __func__); |
52365230 HS |
392 | return ret; |
393 | } | |
394 | ||
abe2f551 MJ |
395 | tm->tm_sec = bcd2bin(regs[RV3029_A_SC - RV3029_A_SC] & 0x7f); |
396 | tm->tm_min = bcd2bin(regs[RV3029_A_MN - RV3029_A_SC] & 0x7f); | |
397 | tm->tm_hour = bcd2bin(regs[RV3029_A_HR - RV3029_A_SC] & 0x3f); | |
398 | tm->tm_mday = bcd2bin(regs[RV3029_A_DT - RV3029_A_SC] & 0x3f); | |
399 | tm->tm_mon = bcd2bin(regs[RV3029_A_MO - RV3029_A_SC] & 0x1f) - 1; | |
400 | tm->tm_year = bcd2bin(regs[RV3029_A_YR - RV3029_A_SC] & 0x7f) + 100; | |
401 | tm->tm_wday = bcd2bin(regs[RV3029_A_DW - RV3029_A_SC] & 0x07) - 1; | |
52365230 HS |
402 | |
403 | return 0; | |
404 | } | |
405 | ||
e6e38082 | 406 | static int rv3029_rtc_alarm_set_irq(struct device *dev, int enable) |
52365230 HS |
407 | { |
408 | int ret; | |
52365230 | 409 | |
2dca3d9e | 410 | /* enable/disable AIE irq */ |
e6e38082 | 411 | ret = rv3029_update_bits(dev, RV3029_IRQ_CTRL, RV3029_IRQ_CTRL_AIE, |
4e7f1a60 | 412 | (enable ? RV3029_IRQ_CTRL_AIE : 0)); |
52365230 | 413 | if (ret < 0) { |
e6e38082 | 414 | dev_err(dev, "can't update INT reg\n"); |
52365230 HS |
415 | return ret; |
416 | } | |
417 | ||
418 | return 0; | |
419 | } | |
420 | ||
e6e38082 | 421 | static int rv3029_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
52365230 HS |
422 | { |
423 | struct rtc_time *const tm = &alarm->time; | |
424 | int ret; | |
425 | u8 regs[8]; | |
426 | ||
427 | /* | |
428 | * The clock has an 8 bit wide bcd-coded register (they never learn) | |
429 | * for the year. tm_year is an offset from 1900 and we are interested | |
430 | * in the 2000-2099 range, so any value less than 100 is invalid. | |
431 | */ | |
432 | if (tm->tm_year < 100) | |
433 | return -EINVAL; | |
434 | ||
e6e38082 | 435 | ret = rv3029_get_sr(dev, regs); |
52365230 | 436 | if (ret < 0) { |
e6e38082 | 437 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
438 | return -EIO; |
439 | } | |
aba39d27 | 440 | |
dc492e86 MJ |
441 | /* Activate all the alarms with AE_x bit */ |
442 | regs[RV3029_A_SC - RV3029_A_SC] = bin2bcd(tm->tm_sec) | RV3029_A_AE_X; | |
443 | regs[RV3029_A_MN - RV3029_A_SC] = bin2bcd(tm->tm_min) | RV3029_A_AE_X; | |
444 | regs[RV3029_A_HR - RV3029_A_SC] = (bin2bcd(tm->tm_hour) & 0x3f) | |
445 | | RV3029_A_AE_X; | |
446 | regs[RV3029_A_DT - RV3029_A_SC] = (bin2bcd(tm->tm_mday) & 0x3f) | |
447 | | RV3029_A_AE_X; | |
448 | regs[RV3029_A_MO - RV3029_A_SC] = (bin2bcd(tm->tm_mon + 1) & 0x1f) | |
449 | | RV3029_A_AE_X; | |
450 | regs[RV3029_A_DW - RV3029_A_SC] = (bin2bcd(tm->tm_wday + 1) & 0x7) | |
451 | | RV3029_A_AE_X; | |
452 | regs[RV3029_A_YR - RV3029_A_SC] = (bin2bcd(tm->tm_year - 100)) | |
453 | | RV3029_A_AE_X; | |
454 | ||
455 | /* Write the alarm */ | |
e6e38082 | 456 | ret = rv3029_write_regs(dev, RV3029_A_SC, regs, |
4e7f1a60 | 457 | RV3029_ALARM_SECTION_LEN); |
52365230 HS |
458 | if (ret < 0) |
459 | return ret; | |
460 | ||
461 | if (alarm->enabled) { | |
52365230 | 462 | /* clear AF flag */ |
e6e38082 | 463 | ret = rv3029_update_bits(dev, RV3029_IRQ_FLAGS, |
4e7f1a60 | 464 | RV3029_IRQ_FLAGS_AF, 0); |
52365230 | 465 | if (ret < 0) { |
e6e38082 | 466 | dev_err(dev, "can't clear alarm flag\n"); |
52365230 HS |
467 | return ret; |
468 | } | |
469 | /* enable AIE irq */ | |
e6e38082 | 470 | ret = rv3029_rtc_alarm_set_irq(dev, 1); |
52365230 HS |
471 | if (ret) |
472 | return ret; | |
473 | ||
e6e38082 | 474 | dev_dbg(dev, "alarm IRQ armed\n"); |
52365230 HS |
475 | } else { |
476 | /* disable AIE irq */ | |
e6e38082 | 477 | ret = rv3029_rtc_alarm_set_irq(dev, 0); |
52365230 HS |
478 | if (ret) |
479 | return ret; | |
480 | ||
e6e38082 | 481 | dev_dbg(dev, "alarm IRQ disabled\n"); |
52365230 HS |
482 | } |
483 | ||
484 | return 0; | |
485 | } | |
486 | ||
e6e38082 | 487 | static int rv3029_set_time(struct device *dev, struct rtc_time *tm) |
52365230 HS |
488 | { |
489 | u8 regs[8]; | |
490 | int ret; | |
491 | ||
492 | /* | |
493 | * The clock has an 8 bit wide bcd-coded register (they never learn) | |
494 | * for the year. tm_year is an offset from 1900 and we are interested | |
495 | * in the 2000-2099 range, so any value less than 100 is invalid. | |
496 | */ | |
497 | if (tm->tm_year < 100) | |
498 | return -EINVAL; | |
499 | ||
abe2f551 MJ |
500 | regs[RV3029_W_SEC - RV3029_W_SEC] = bin2bcd(tm->tm_sec); |
501 | regs[RV3029_W_MINUTES - RV3029_W_SEC] = bin2bcd(tm->tm_min); | |
502 | regs[RV3029_W_HOURS - RV3029_W_SEC] = bin2bcd(tm->tm_hour); | |
503 | regs[RV3029_W_DATE - RV3029_W_SEC] = bin2bcd(tm->tm_mday); | |
504 | regs[RV3029_W_MONTHS - RV3029_W_SEC] = bin2bcd(tm->tm_mon + 1); | |
505 | regs[RV3029_W_DAYS - RV3029_W_SEC] = bin2bcd((tm->tm_wday & 7) + 1); | |
506 | regs[RV3029_W_YEARS - RV3029_W_SEC] = bin2bcd(tm->tm_year - 100); | |
52365230 | 507 | |
e6e38082 | 508 | ret = rv3029_write_regs(dev, RV3029_W_SEC, regs, |
4e7f1a60 | 509 | RV3029_WATCH_SECTION_LEN); |
52365230 HS |
510 | if (ret < 0) |
511 | return ret; | |
512 | ||
e6e38082 | 513 | ret = rv3029_get_sr(dev, regs); |
52365230 | 514 | if (ret < 0) { |
e6e38082 | 515 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
516 | return ret; |
517 | } | |
518 | /* clear PON bit */ | |
e6e38082 | 519 | ret = rv3029_set_sr(dev, (regs[0] & ~RV3029_STATUS_PON)); |
52365230 | 520 | if (ret < 0) { |
e6e38082 | 521 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
522 | return ret; |
523 | } | |
524 | ||
525 | return 0; | |
526 | } | |
abe2f551 | 527 | |
e27e2160 MB |
528 | static const struct rv3029_trickle_tab_elem { |
529 | u32 r; /* resistance in ohms */ | |
530 | u8 conf; /* trickle config bits */ | |
531 | } rv3029_trickle_tab[] = { | |
532 | { | |
533 | .r = 1076, | |
534 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
535 | RV3029_TRICKLE_20K | RV3029_TRICKLE_80K, | |
536 | }, { | |
537 | .r = 1091, | |
538 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
539 | RV3029_TRICKLE_20K, | |
540 | }, { | |
541 | .r = 1137, | |
542 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
543 | RV3029_TRICKLE_80K, | |
544 | }, { | |
545 | .r = 1154, | |
546 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K, | |
547 | }, { | |
548 | .r = 1371, | |
549 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K | | |
550 | RV3029_TRICKLE_80K, | |
551 | }, { | |
552 | .r = 1395, | |
553 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K, | |
554 | }, { | |
555 | .r = 1472, | |
556 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_80K, | |
557 | }, { | |
558 | .r = 1500, | |
559 | .conf = RV3029_TRICKLE_1K, | |
560 | }, { | |
561 | .r = 3810, | |
562 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K | | |
563 | RV3029_TRICKLE_80K, | |
564 | }, { | |
565 | .r = 4000, | |
566 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K, | |
567 | }, { | |
568 | .r = 4706, | |
569 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_80K, | |
570 | }, { | |
571 | .r = 5000, | |
572 | .conf = RV3029_TRICKLE_5K, | |
573 | }, { | |
574 | .r = 16000, | |
575 | .conf = RV3029_TRICKLE_20K | RV3029_TRICKLE_80K, | |
576 | }, { | |
577 | .r = 20000, | |
578 | .conf = RV3029_TRICKLE_20K, | |
579 | }, { | |
580 | .r = 80000, | |
581 | .conf = RV3029_TRICKLE_80K, | |
582 | }, | |
583 | }; | |
584 | ||
e6e38082 | 585 | static void rv3029_trickle_config(struct device *dev) |
e27e2160 | 586 | { |
e6e38082 | 587 | struct device_node *of_node = dev->of_node; |
e27e2160 MB |
588 | const struct rv3029_trickle_tab_elem *elem; |
589 | int i, err; | |
590 | u32 ohms; | |
39387dc2 | 591 | u8 trickle_set_bits; |
e27e2160 MB |
592 | |
593 | if (!of_node) | |
594 | return; | |
595 | ||
596 | /* Configure the trickle charger. */ | |
e27e2160 MB |
597 | err = of_property_read_u32(of_node, "trickle-resistor-ohms", &ohms); |
598 | if (err) { | |
599 | /* Disable trickle charger. */ | |
39387dc2 | 600 | trickle_set_bits = 0; |
e27e2160 MB |
601 | } else { |
602 | /* Enable trickle charger. */ | |
603 | for (i = 0; i < ARRAY_SIZE(rv3029_trickle_tab); i++) { | |
604 | elem = &rv3029_trickle_tab[i]; | |
605 | if (elem->r >= ohms) | |
606 | break; | |
607 | } | |
39387dc2 | 608 | trickle_set_bits = elem->conf; |
e6e38082 | 609 | dev_info(dev, |
e27e2160 MB |
610 | "Trickle charger enabled at %d ohms resistance.\n", |
611 | elem->r); | |
612 | } | |
e6e38082 | 613 | err = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL, |
39387dc2 MB |
614 | RV3029_TRICKLE_MASK, |
615 | trickle_set_bits); | |
abe2f551 | 616 | if (err < 0) |
e6e38082 | 617 | dev_err(dev, "Failed to update trickle charger config\n"); |
e27e2160 MB |
618 | } |
619 | ||
a696b31e MB |
620 | #ifdef CONFIG_RTC_DRV_RV3029_HWMON |
621 | ||
e6e38082 | 622 | static int rv3029_read_temp(struct device *dev, int *temp_mC) |
a696b31e MB |
623 | { |
624 | int ret; | |
625 | u8 temp; | |
626 | ||
e6e38082 | 627 | ret = rv3029_read_regs(dev, RV3029_TEMP_PAGE, &temp, 1); |
a696b31e MB |
628 | if (ret < 0) |
629 | return ret; | |
630 | ||
631 | *temp_mC = ((int)temp - 60) * 1000; | |
632 | ||
633 | return 0; | |
634 | } | |
635 | ||
636 | static ssize_t rv3029_hwmon_show_temp(struct device *dev, | |
637 | struct device_attribute *attr, | |
638 | char *buf) | |
639 | { | |
a696b31e MB |
640 | int ret, temp_mC; |
641 | ||
e6e38082 | 642 | ret = rv3029_read_temp(dev, &temp_mC); |
a696b31e MB |
643 | if (ret < 0) |
644 | return ret; | |
645 | ||
646 | return sprintf(buf, "%d\n", temp_mC); | |
647 | } | |
648 | ||
649 | static ssize_t rv3029_hwmon_set_update_interval(struct device *dev, | |
650 | struct device_attribute *attr, | |
651 | const char *buf, | |
652 | size_t count) | |
653 | { | |
a696b31e MB |
654 | unsigned long interval_ms; |
655 | int ret; | |
656 | u8 th_set_bits = 0; | |
657 | ||
658 | ret = kstrtoul(buf, 10, &interval_ms); | |
659 | if (ret < 0) | |
660 | return ret; | |
661 | ||
662 | if (interval_ms != 0) { | |
663 | th_set_bits |= RV3029_EECTRL_THE; | |
664 | if (interval_ms >= 16000) | |
665 | th_set_bits |= RV3029_EECTRL_THP; | |
666 | } | |
e6e38082 | 667 | ret = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL, |
a696b31e MB |
668 | RV3029_EECTRL_THE | RV3029_EECTRL_THP, |
669 | th_set_bits); | |
670 | if (ret < 0) | |
671 | return ret; | |
672 | ||
673 | return count; | |
674 | } | |
675 | ||
676 | static ssize_t rv3029_hwmon_show_update_interval(struct device *dev, | |
677 | struct device_attribute *attr, | |
678 | char *buf) | |
679 | { | |
a696b31e MB |
680 | int ret, interval_ms; |
681 | u8 eectrl; | |
682 | ||
e6e38082 | 683 | ret = rv3029_eeprom_read(dev, RV3029_CONTROL_E2P_EECTRL, |
a696b31e MB |
684 | &eectrl, 1); |
685 | if (ret < 0) | |
686 | return ret; | |
687 | ||
688 | if (eectrl & RV3029_EECTRL_THE) { | |
689 | if (eectrl & RV3029_EECTRL_THP) | |
690 | interval_ms = 16000; | |
691 | else | |
692 | interval_ms = 1000; | |
693 | } else { | |
694 | interval_ms = 0; | |
695 | } | |
696 | ||
697 | return sprintf(buf, "%d\n", interval_ms); | |
698 | } | |
699 | ||
700 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, rv3029_hwmon_show_temp, | |
701 | NULL, 0); | |
702 | static SENSOR_DEVICE_ATTR(update_interval, S_IWUSR | S_IRUGO, | |
703 | rv3029_hwmon_show_update_interval, | |
704 | rv3029_hwmon_set_update_interval, 0); | |
705 | ||
706 | static struct attribute *rv3029_hwmon_attrs[] = { | |
707 | &sensor_dev_attr_temp1_input.dev_attr.attr, | |
708 | &sensor_dev_attr_update_interval.dev_attr.attr, | |
709 | NULL, | |
710 | }; | |
711 | ATTRIBUTE_GROUPS(rv3029_hwmon); | |
712 | ||
e6e38082 | 713 | static void rv3029_hwmon_register(struct device *dev, const char *name) |
a696b31e | 714 | { |
e6e38082 | 715 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
a696b31e MB |
716 | struct device *hwmon_dev; |
717 | ||
e6e38082 MJ |
718 | hwmon_dev = devm_hwmon_device_register_with_groups(dev, name, rv3029, |
719 | rv3029_hwmon_groups); | |
a696b31e | 720 | if (IS_ERR(hwmon_dev)) { |
e6e38082 | 721 | dev_warn(dev, "unable to register hwmon device %ld\n", |
4e7f1a60 | 722 | PTR_ERR(hwmon_dev)); |
a696b31e MB |
723 | } |
724 | } | |
725 | ||
726 | #else /* CONFIG_RTC_DRV_RV3029_HWMON */ | |
727 | ||
e6e38082 | 728 | static void rv3029_hwmon_register(struct device *dev, const char *name) |
a696b31e MB |
729 | { |
730 | } | |
731 | ||
732 | #endif /* CONFIG_RTC_DRV_RV3029_HWMON */ | |
733 | ||
aba39d27 | 734 | static const struct rtc_class_ops rv3029_rtc_ops = { |
e6e38082 MJ |
735 | .read_time = rv3029_read_time, |
736 | .set_time = rv3029_set_time, | |
737 | .read_alarm = rv3029_read_alarm, | |
738 | .set_alarm = rv3029_set_alarm, | |
52365230 HS |
739 | }; |
740 | ||
aba39d27 | 741 | static struct i2c_device_id rv3029_id[] = { |
baba623f | 742 | { "rv3029", 0 }, |
52365230 HS |
743 | { "rv3029c2", 0 }, |
744 | { } | |
745 | }; | |
aba39d27 | 746 | MODULE_DEVICE_TABLE(i2c, rv3029_id); |
52365230 | 747 | |
e6e38082 MJ |
748 | static int rv3029_probe(struct device *dev, struct regmap *regmap, int irq, |
749 | const char *name) | |
52365230 | 750 | { |
e6e38082 | 751 | struct rv3029_data *rv3029; |
52365230 HS |
752 | int rc = 0; |
753 | u8 buf[1]; | |
754 | ||
e6e38082 MJ |
755 | rv3029 = devm_kzalloc(dev, sizeof(*rv3029), GFP_KERNEL); |
756 | if (!rv3029) | |
757 | return -ENOMEM; | |
758 | ||
759 | rv3029->regmap = regmap; | |
760 | rv3029->irq = irq; | |
761 | rv3029->dev = dev; | |
762 | dev_set_drvdata(dev, rv3029); | |
52365230 | 763 | |
e6e38082 | 764 | rc = rv3029_get_sr(dev, buf); |
67ab2440 | 765 | if (rc < 0) { |
e6e38082 | 766 | dev_err(dev, "reading status failed\n"); |
67ab2440 GH |
767 | return rc; |
768 | } | |
769 | ||
e6e38082 MJ |
770 | rv3029_trickle_config(dev); |
771 | rv3029_hwmon_register(dev, name); | |
772 | ||
773 | rv3029->rtc = devm_rtc_device_register(dev, name, &rv3029_rtc_ops, | |
774 | THIS_MODULE); | |
e27e2160 | 775 | |
e6e38082 MJ |
776 | return PTR_ERR_OR_ZERO(rv3029->rtc); |
777 | } | |
52365230 | 778 | |
c2a1c145 MJ |
779 | #if IS_ENABLED(CONFIG_I2C) |
780 | ||
e6e38082 MJ |
781 | static int rv3029_i2c_probe(struct i2c_client *client, |
782 | const struct i2c_device_id *id) | |
783 | { | |
784 | struct regmap *regmap; | |
785 | static const struct regmap_config config = { | |
786 | .reg_bits = 8, | |
787 | .val_bits = 8, | |
788 | }; | |
789 | ||
790 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | | |
791 | I2C_FUNC_SMBUS_BYTE)) { | |
792 | dev_err(&client->dev, "Adapter does not support SMBUS_I2C_BLOCK or SMBUS_I2C_BYTE\n"); | |
793 | return -ENODEV; | |
794 | } | |
52365230 | 795 | |
e6e38082 MJ |
796 | regmap = devm_regmap_init_i2c(client, &config); |
797 | if (IS_ERR(regmap)) { | |
798 | dev_err(&client->dev, "%s: regmap allocation failed: %ld\n", | |
799 | __func__, PTR_ERR(regmap)); | |
800 | return PTR_ERR(regmap); | |
801 | } | |
52365230 | 802 | |
e6e38082 | 803 | return rv3029_probe(&client->dev, regmap, client->irq, client->name); |
52365230 HS |
804 | } |
805 | ||
aba39d27 | 806 | static struct i2c_driver rv3029_driver = { |
52365230 HS |
807 | .driver = { |
808 | .name = "rtc-rv3029c2", | |
809 | }, | |
e6e38082 | 810 | .probe = rv3029_i2c_probe, |
aba39d27 | 811 | .id_table = rv3029_id, |
52365230 HS |
812 | }; |
813 | ||
c2a1c145 MJ |
814 | static int rv3029_register_driver(void) |
815 | { | |
816 | return i2c_add_driver(&rv3029_driver); | |
817 | } | |
818 | ||
819 | static void rv3029_unregister_driver(void) | |
820 | { | |
821 | i2c_del_driver(&rv3029_driver); | |
822 | } | |
823 | ||
824 | #else | |
825 | ||
826 | static int rv3029_register_driver(void) | |
827 | { | |
828 | return 0; | |
829 | } | |
830 | ||
831 | static void rv3029_unregister_driver(void) | |
832 | { | |
833 | } | |
834 | ||
835 | #endif | |
836 | ||
837 | #if IS_ENABLED(CONFIG_SPI_MASTER) | |
838 | ||
839 | static int rv3049_probe(struct spi_device *spi) | |
840 | { | |
841 | static const struct regmap_config config = { | |
842 | .reg_bits = 8, | |
843 | .val_bits = 8, | |
844 | }; | |
845 | struct regmap *regmap; | |
846 | ||
847 | regmap = devm_regmap_init_spi(spi, &config); | |
848 | if (IS_ERR(regmap)) { | |
849 | dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n", | |
850 | __func__, PTR_ERR(regmap)); | |
851 | return PTR_ERR(regmap); | |
852 | } | |
853 | ||
854 | return rv3029_probe(&spi->dev, regmap, spi->irq, "rv3049"); | |
855 | } | |
856 | ||
857 | static struct spi_driver rv3049_driver = { | |
858 | .driver = { | |
859 | .name = "rv3049", | |
860 | }, | |
861 | .probe = rv3049_probe, | |
862 | }; | |
863 | ||
864 | static int rv3049_register_driver(void) | |
865 | { | |
866 | return spi_register_driver(&rv3049_driver); | |
867 | } | |
868 | ||
869 | static void rv3049_unregister_driver(void) | |
870 | { | |
871 | spi_unregister_driver(&rv3049_driver); | |
872 | } | |
873 | ||
874 | #else | |
875 | ||
876 | static int rv3049_register_driver(void) | |
877 | { | |
878 | return 0; | |
879 | } | |
880 | ||
881 | static void rv3049_unregister_driver(void) | |
882 | { | |
883 | } | |
884 | ||
885 | #endif | |
886 | ||
887 | static int __init rv30x9_init(void) | |
888 | { | |
889 | int ret; | |
890 | ||
891 | ret = rv3029_register_driver(); | |
892 | if (ret) { | |
893 | pr_err("Failed to register rv3029 driver: %d\n", ret); | |
894 | return ret; | |
895 | } | |
896 | ||
897 | ret = rv3049_register_driver(); | |
898 | if (ret) { | |
899 | pr_err("Failed to register rv3049 driver: %d\n", ret); | |
900 | rv3029_unregister_driver(); | |
901 | } | |
902 | ||
903 | return ret; | |
904 | } | |
905 | module_init(rv30x9_init) | |
906 | ||
907 | static void __exit rv30x9_exit(void) | |
908 | { | |
909 | rv3049_unregister_driver(); | |
910 | rv3029_unregister_driver(); | |
911 | } | |
912 | module_exit(rv30x9_exit) | |
52365230 HS |
913 | |
914 | MODULE_AUTHOR("Gregory Hermant <gregory.hermant@calao-systems.com>"); | |
2dca3d9e | 915 | MODULE_AUTHOR("Michael Buesch <m@bues.ch>"); |
c2a1c145 | 916 | MODULE_DESCRIPTION("Micro Crystal RV3029/RV3049 RTC driver"); |
52365230 | 917 | MODULE_LICENSE("GPL"); |
c2a1c145 | 918 | MODULE_ALIAS("spi:rv3049"); |