Commit | Line | Data |
---|---|---|
d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
52365230 | 2 | /* |
c2a1c145 | 3 | * Micro Crystal RV-3029 / RV-3049 rtc class driver |
52365230 HS |
4 | * |
5 | * Author: Gregory Hermant <gregory.hermant@calao-systems.com> | |
2dca3d9e | 6 | * Michael Buesch <m@bues.ch> |
52365230 HS |
7 | * |
8 | * based on previously existing rtc class drivers | |
52365230 HS |
9 | */ |
10 | ||
11 | #include <linux/module.h> | |
12 | #include <linux/i2c.h> | |
c2a1c145 | 13 | #include <linux/spi/spi.h> |
52365230 HS |
14 | #include <linux/bcd.h> |
15 | #include <linux/rtc.h> | |
a7f6e287 MB |
16 | #include <linux/delay.h> |
17 | #include <linux/of.h> | |
a696b31e MB |
18 | #include <linux/hwmon.h> |
19 | #include <linux/hwmon-sysfs.h> | |
e6e38082 | 20 | #include <linux/regmap.h> |
52365230 HS |
21 | |
22 | /* Register map */ | |
23 | /* control section */ | |
aba39d27 | 24 | #define RV3029_ONOFF_CTRL 0x00 |
7697de35 MB |
25 | #define RV3029_ONOFF_CTRL_WE BIT(0) |
26 | #define RV3029_ONOFF_CTRL_TE BIT(1) | |
27 | #define RV3029_ONOFF_CTRL_TAR BIT(2) | |
28 | #define RV3029_ONOFF_CTRL_EERE BIT(3) | |
29 | #define RV3029_ONOFF_CTRL_SRON BIT(4) | |
30 | #define RV3029_ONOFF_CTRL_TD0 BIT(5) | |
31 | #define RV3029_ONOFF_CTRL_TD1 BIT(6) | |
32 | #define RV3029_ONOFF_CTRL_CLKINT BIT(7) | |
aba39d27 | 33 | #define RV3029_IRQ_CTRL 0x01 |
7697de35 MB |
34 | #define RV3029_IRQ_CTRL_AIE BIT(0) |
35 | #define RV3029_IRQ_CTRL_TIE BIT(1) | |
36 | #define RV3029_IRQ_CTRL_V1IE BIT(2) | |
37 | #define RV3029_IRQ_CTRL_V2IE BIT(3) | |
38 | #define RV3029_IRQ_CTRL_SRIE BIT(4) | |
aba39d27 | 39 | #define RV3029_IRQ_FLAGS 0x02 |
7697de35 MB |
40 | #define RV3029_IRQ_FLAGS_AF BIT(0) |
41 | #define RV3029_IRQ_FLAGS_TF BIT(1) | |
42 | #define RV3029_IRQ_FLAGS_V1IF BIT(2) | |
43 | #define RV3029_IRQ_FLAGS_V2IF BIT(3) | |
44 | #define RV3029_IRQ_FLAGS_SRF BIT(4) | |
aba39d27 | 45 | #define RV3029_STATUS 0x03 |
7697de35 MB |
46 | #define RV3029_STATUS_VLOW1 BIT(2) |
47 | #define RV3029_STATUS_VLOW2 BIT(3) | |
48 | #define RV3029_STATUS_SR BIT(4) | |
49 | #define RV3029_STATUS_PON BIT(5) | |
50 | #define RV3029_STATUS_EEBUSY BIT(7) | |
aba39d27 | 51 | #define RV3029_RST_CTRL 0x04 |
7697de35 | 52 | #define RV3029_RST_CTRL_SYSR BIT(4) |
aba39d27 | 53 | #define RV3029_CONTROL_SECTION_LEN 0x05 |
52365230 HS |
54 | |
55 | /* watch section */ | |
aba39d27 MB |
56 | #define RV3029_W_SEC 0x08 |
57 | #define RV3029_W_MINUTES 0x09 | |
58 | #define RV3029_W_HOURS 0x0A | |
7697de35 MB |
59 | #define RV3029_REG_HR_12_24 BIT(6) /* 24h/12h mode */ |
60 | #define RV3029_REG_HR_PM BIT(5) /* PM/AM bit in 12h mode */ | |
aba39d27 MB |
61 | #define RV3029_W_DATE 0x0B |
62 | #define RV3029_W_DAYS 0x0C | |
63 | #define RV3029_W_MONTHS 0x0D | |
64 | #define RV3029_W_YEARS 0x0E | |
65 | #define RV3029_WATCH_SECTION_LEN 0x07 | |
52365230 HS |
66 | |
67 | /* alarm section */ | |
aba39d27 MB |
68 | #define RV3029_A_SC 0x10 |
69 | #define RV3029_A_MN 0x11 | |
70 | #define RV3029_A_HR 0x12 | |
71 | #define RV3029_A_DT 0x13 | |
72 | #define RV3029_A_DW 0x14 | |
73 | #define RV3029_A_MO 0x15 | |
74 | #define RV3029_A_YR 0x16 | |
dc492e86 | 75 | #define RV3029_A_AE_X BIT(7) |
aba39d27 | 76 | #define RV3029_ALARM_SECTION_LEN 0x07 |
52365230 HS |
77 | |
78 | /* timer section */ | |
aba39d27 MB |
79 | #define RV3029_TIMER_LOW 0x18 |
80 | #define RV3029_TIMER_HIGH 0x19 | |
52365230 HS |
81 | |
82 | /* temperature section */ | |
aba39d27 | 83 | #define RV3029_TEMP_PAGE 0x20 |
52365230 HS |
84 | |
85 | /* eeprom data section */ | |
aba39d27 MB |
86 | #define RV3029_E2P_EEDATA1 0x28 |
87 | #define RV3029_E2P_EEDATA2 0x29 | |
7697de35 | 88 | #define RV3029_E2PDATA_SECTION_LEN 0x02 |
52365230 HS |
89 | |
90 | /* eeprom control section */ | |
aba39d27 | 91 | #define RV3029_CONTROL_E2P_EECTRL 0x30 |
7697de35 MB |
92 | #define RV3029_EECTRL_THP BIT(0) /* temp scan interval */ |
93 | #define RV3029_EECTRL_THE BIT(1) /* thermometer enable */ | |
94 | #define RV3029_EECTRL_FD0 BIT(2) /* CLKOUT */ | |
95 | #define RV3029_EECTRL_FD1 BIT(3) /* CLKOUT */ | |
96 | #define RV3029_TRICKLE_1K BIT(4) /* 1.5K resistance */ | |
97 | #define RV3029_TRICKLE_5K BIT(5) /* 5K resistance */ | |
98 | #define RV3029_TRICKLE_20K BIT(6) /* 20K resistance */ | |
99 | #define RV3029_TRICKLE_80K BIT(7) /* 80K resistance */ | |
100 | #define RV3029_TRICKLE_MASK (RV3029_TRICKLE_1K |\ | |
101 | RV3029_TRICKLE_5K |\ | |
102 | RV3029_TRICKLE_20K |\ | |
103 | RV3029_TRICKLE_80K) | |
104 | #define RV3029_TRICKLE_SHIFT 4 | |
105 | #define RV3029_CONTROL_E2P_XOFFS 0x31 /* XTAL offset */ | |
106 | #define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */ | |
107 | #define RV3029_CONTROL_E2P_QCOEF 0x32 /* XTAL temp drift coef */ | |
108 | #define RV3029_CONTROL_E2P_TURNOVER 0x33 /* XTAL turnover temp (in *C) */ | |
109 | #define RV3029_CONTROL_E2P_TOV_MASK 0x3F /* XTAL turnover temp mask */ | |
52365230 HS |
110 | |
111 | /* user ram section */ | |
aba39d27 MB |
112 | #define RV3029_USR1_RAM_PAGE 0x38 |
113 | #define RV3029_USR1_SECTION_LEN 0x04 | |
114 | #define RV3029_USR2_RAM_PAGE 0x3C | |
115 | #define RV3029_USR2_SECTION_LEN 0x04 | |
52365230 | 116 | |
e6e38082 MJ |
117 | struct rv3029_data { |
118 | struct device *dev; | |
119 | struct rtc_device *rtc; | |
120 | struct regmap *regmap; | |
121 | int irq; | |
122 | }; | |
123 | ||
bb72dbba | 124 | static int rv3029_eeprom_busywait(struct rv3029_data *rv3029) |
a7f6e287 | 125 | { |
bb72dbba | 126 | unsigned int sr; |
a7f6e287 | 127 | int i, ret; |
a7f6e287 MB |
128 | |
129 | for (i = 100; i > 0; i--) { | |
bb72dbba | 130 | ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); |
a7f6e287 MB |
131 | if (ret < 0) |
132 | break; | |
133 | if (!(sr & RV3029_STATUS_EEBUSY)) | |
134 | break; | |
135 | usleep_range(1000, 10000); | |
136 | } | |
137 | if (i <= 0) { | |
bb72dbba | 138 | dev_err(rv3029->dev, "EEPROM busy wait timeout.\n"); |
a7f6e287 MB |
139 | return -ETIMEDOUT; |
140 | } | |
141 | ||
142 | return ret; | |
143 | } | |
144 | ||
7518dd9a | 145 | static int rv3029_eeprom_exit(struct rv3029_data *rv3029) |
a7f6e287 MB |
146 | { |
147 | /* Re-enable eeprom refresh */ | |
609e97fe | 148 | return regmap_update_bits(rv3029->regmap, RV3029_ONOFF_CTRL, |
4e7f1a60 MJ |
149 | RV3029_ONOFF_CTRL_EERE, |
150 | RV3029_ONOFF_CTRL_EERE); | |
a7f6e287 MB |
151 | } |
152 | ||
7518dd9a | 153 | static int rv3029_eeprom_enter(struct rv3029_data *rv3029) |
a7f6e287 | 154 | { |
bb72dbba | 155 | unsigned int sr; |
a7f6e287 | 156 | int ret; |
a7f6e287 MB |
157 | |
158 | /* Check whether we are in the allowed voltage range. */ | |
bb72dbba | 159 | ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); |
a7f6e287 MB |
160 | if (ret < 0) |
161 | return ret; | |
cff2e4d2 AB |
162 | if (sr & RV3029_STATUS_VLOW2) |
163 | return -ENODEV; | |
164 | if (sr & RV3029_STATUS_VLOW1) { | |
a7f6e287 MB |
165 | /* We clear the bits and retry once just in case |
166 | * we had a brown out in early startup. | |
167 | */ | |
54c5970d | 168 | ret = regmap_update_bits(rv3029->regmap, RV3029_STATUS, |
cff2e4d2 | 169 | RV3029_STATUS_VLOW1, 0); |
a7f6e287 MB |
170 | if (ret < 0) |
171 | return ret; | |
172 | usleep_range(1000, 10000); | |
bb72dbba | 173 | ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); |
a7f6e287 MB |
174 | if (ret < 0) |
175 | return ret; | |
cff2e4d2 | 176 | if (sr & RV3029_STATUS_VLOW1) { |
7518dd9a | 177 | dev_err(rv3029->dev, |
a7f6e287 MB |
178 | "Supply voltage is too low to safely access the EEPROM.\n"); |
179 | return -ENODEV; | |
180 | } | |
181 | } | |
182 | ||
183 | /* Disable eeprom refresh. */ | |
609e97fe AB |
184 | ret = regmap_update_bits(rv3029->regmap, RV3029_ONOFF_CTRL, |
185 | RV3029_ONOFF_CTRL_EERE, 0); | |
a7f6e287 MB |
186 | if (ret < 0) |
187 | return ret; | |
188 | ||
189 | /* Wait for any previous eeprom accesses to finish. */ | |
bb72dbba | 190 | ret = rv3029_eeprom_busywait(rv3029); |
a7f6e287 | 191 | if (ret < 0) |
7518dd9a | 192 | rv3029_eeprom_exit(rv3029); |
a7f6e287 MB |
193 | |
194 | return ret; | |
195 | } | |
196 | ||
7518dd9a | 197 | static int rv3029_eeprom_read(struct rv3029_data *rv3029, u8 reg, |
a7f6e287 MB |
198 | u8 buf[], size_t len) |
199 | { | |
200 | int ret, err; | |
201 | ||
7518dd9a | 202 | err = rv3029_eeprom_enter(rv3029); |
a7f6e287 MB |
203 | if (err < 0) |
204 | return err; | |
205 | ||
7518dd9a | 206 | ret = regmap_bulk_read(rv3029->regmap, reg, buf, len); |
a7f6e287 | 207 | |
7518dd9a | 208 | err = rv3029_eeprom_exit(rv3029); |
a7f6e287 MB |
209 | if (err < 0) |
210 | return err; | |
211 | ||
212 | return ret; | |
213 | } | |
214 | ||
7518dd9a | 215 | static int rv3029_eeprom_write(struct rv3029_data *rv3029, u8 reg, |
a7f6e287 MB |
216 | u8 const buf[], size_t len) |
217 | { | |
7518dd9a | 218 | unsigned int tmp; |
a6f26606 | 219 | int ret, err; |
a7f6e287 | 220 | size_t i; |
a7f6e287 | 221 | |
7518dd9a | 222 | err = rv3029_eeprom_enter(rv3029); |
a6f26606 DC |
223 | if (err < 0) |
224 | return err; | |
a7f6e287 MB |
225 | |
226 | for (i = 0; i < len; i++, reg++) { | |
7518dd9a | 227 | ret = regmap_read(rv3029->regmap, reg, &tmp); |
a7f6e287 MB |
228 | if (ret < 0) |
229 | break; | |
230 | if (tmp != buf[i]) { | |
7518dd9a AB |
231 | tmp = buf[i]; |
232 | ret = regmap_write(rv3029->regmap, reg, tmp); | |
a7f6e287 MB |
233 | if (ret < 0) |
234 | break; | |
235 | } | |
bb72dbba | 236 | ret = rv3029_eeprom_busywait(rv3029); |
a7f6e287 MB |
237 | if (ret < 0) |
238 | break; | |
239 | } | |
240 | ||
7518dd9a | 241 | err = rv3029_eeprom_exit(rv3029); |
a6f26606 DC |
242 | if (err < 0) |
243 | return err; | |
a7f6e287 | 244 | |
a6f26606 | 245 | return ret; |
a7f6e287 MB |
246 | } |
247 | ||
7518dd9a | 248 | static int rv3029_eeprom_update_bits(struct rv3029_data *rv3029, |
39387dc2 MB |
249 | u8 reg, u8 mask, u8 set) |
250 | { | |
251 | u8 buf; | |
252 | int ret; | |
253 | ||
7518dd9a | 254 | ret = rv3029_eeprom_read(rv3029, reg, &buf, 1); |
39387dc2 MB |
255 | if (ret < 0) |
256 | return ret; | |
257 | buf &= ~mask; | |
258 | buf |= set & mask; | |
7518dd9a | 259 | ret = rv3029_eeprom_write(rv3029, reg, &buf, 1); |
39387dc2 MB |
260 | if (ret < 0) |
261 | return ret; | |
262 | ||
263 | return 0; | |
264 | } | |
265 | ||
0ddc5b89 MJ |
266 | static irqreturn_t rv3029_handle_irq(int irq, void *dev_id) |
267 | { | |
268 | struct device *dev = dev_id; | |
269 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); | |
270 | struct mutex *lock = &rv3029->rtc->ops_lock; | |
7518dd9a | 271 | unsigned int flags, controls; |
0ddc5b89 | 272 | unsigned long events = 0; |
0ddc5b89 MJ |
273 | int ret; |
274 | ||
275 | mutex_lock(lock); | |
276 | ||
7518dd9a | 277 | ret = regmap_read(rv3029->regmap, RV3029_IRQ_CTRL, &controls); |
0ddc5b89 MJ |
278 | if (ret) { |
279 | dev_warn(dev, "Read IRQ Control Register error %d\n", ret); | |
280 | mutex_unlock(lock); | |
281 | return IRQ_NONE; | |
282 | } | |
283 | ||
7518dd9a | 284 | ret = regmap_read(rv3029->regmap, RV3029_IRQ_FLAGS, &flags); |
0ddc5b89 MJ |
285 | if (ret) { |
286 | dev_warn(dev, "Read IRQ Flags Register error %d\n", ret); | |
287 | mutex_unlock(lock); | |
288 | return IRQ_NONE; | |
289 | } | |
290 | ||
291 | if (flags & RV3029_IRQ_FLAGS_AF) { | |
292 | flags &= ~RV3029_IRQ_FLAGS_AF; | |
293 | controls &= ~RV3029_IRQ_CTRL_AIE; | |
294 | events |= RTC_AF; | |
295 | } | |
296 | ||
297 | if (events) { | |
298 | rtc_update_irq(rv3029->rtc, 1, events); | |
7518dd9a AB |
299 | regmap_write(rv3029->regmap, RV3029_IRQ_FLAGS, flags); |
300 | regmap_write(rv3029->regmap, RV3029_IRQ_CTRL, controls); | |
0ddc5b89 MJ |
301 | } |
302 | mutex_unlock(lock); | |
303 | ||
304 | return IRQ_HANDLED; | |
305 | } | |
306 | ||
e6e38082 | 307 | static int rv3029_read_time(struct device *dev, struct rtc_time *tm) |
52365230 | 308 | { |
7518dd9a | 309 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
cff2e4d2 | 310 | unsigned int sr; |
52365230 | 311 | int ret; |
aba39d27 | 312 | u8 regs[RV3029_WATCH_SECTION_LEN] = { 0, }; |
52365230 | 313 | |
cff2e4d2 AB |
314 | ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); |
315 | if (ret < 0) | |
316 | return ret; | |
317 | ||
318 | if (sr & (RV3029_STATUS_VLOW2 | RV3029_STATUS_PON)) | |
319 | return -EINVAL; | |
320 | ||
7518dd9a | 321 | ret = regmap_bulk_read(rv3029->regmap, RV3029_W_SEC, regs, |
4e7f1a60 | 322 | RV3029_WATCH_SECTION_LEN); |
52365230 | 323 | if (ret < 0) { |
e6e38082 | 324 | dev_err(dev, "%s: reading RTC section failed\n", __func__); |
52365230 HS |
325 | return ret; |
326 | } | |
327 | ||
abe2f551 MJ |
328 | tm->tm_sec = bcd2bin(regs[RV3029_W_SEC - RV3029_W_SEC]); |
329 | tm->tm_min = bcd2bin(regs[RV3029_W_MINUTES - RV3029_W_SEC]); | |
52365230 HS |
330 | |
331 | /* HR field has a more complex interpretation */ | |
332 | { | |
abe2f551 | 333 | const u8 _hr = regs[RV3029_W_HOURS - RV3029_W_SEC]; |
aba39d27 MB |
334 | |
335 | if (_hr & RV3029_REG_HR_12_24) { | |
52365230 HS |
336 | /* 12h format */ |
337 | tm->tm_hour = bcd2bin(_hr & 0x1f); | |
aba39d27 | 338 | if (_hr & RV3029_REG_HR_PM) /* PM flag set */ |
52365230 HS |
339 | tm->tm_hour += 12; |
340 | } else /* 24h format */ | |
341 | tm->tm_hour = bcd2bin(_hr & 0x3f); | |
342 | } | |
343 | ||
abe2f551 MJ |
344 | tm->tm_mday = bcd2bin(regs[RV3029_W_DATE - RV3029_W_SEC]); |
345 | tm->tm_mon = bcd2bin(regs[RV3029_W_MONTHS - RV3029_W_SEC]) - 1; | |
346 | tm->tm_year = bcd2bin(regs[RV3029_W_YEARS - RV3029_W_SEC]) + 100; | |
347 | tm->tm_wday = bcd2bin(regs[RV3029_W_DAYS - RV3029_W_SEC]) - 1; | |
52365230 HS |
348 | |
349 | return 0; | |
350 | } | |
351 | ||
e6e38082 | 352 | static int rv3029_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
52365230 | 353 | { |
7518dd9a | 354 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 | 355 | struct rtc_time *const tm = &alarm->time; |
7518dd9a | 356 | unsigned int controls, flags; |
52365230 | 357 | int ret; |
7518dd9a | 358 | u8 regs[8]; |
52365230 | 359 | |
7518dd9a | 360 | ret = regmap_bulk_read(rv3029->regmap, RV3029_A_SC, regs, |
4e7f1a60 | 361 | RV3029_ALARM_SECTION_LEN); |
52365230 | 362 | if (ret < 0) { |
e6e38082 | 363 | dev_err(dev, "%s: reading alarm section failed\n", __func__); |
52365230 HS |
364 | return ret; |
365 | } | |
366 | ||
7518dd9a | 367 | ret = regmap_read(rv3029->regmap, RV3029_IRQ_CTRL, &controls); |
0ddc5b89 MJ |
368 | if (ret) { |
369 | dev_err(dev, "Read IRQ Control Register error %d\n", ret); | |
370 | return ret; | |
371 | } | |
7518dd9a | 372 | ret = regmap_read(rv3029->regmap, RV3029_IRQ_FLAGS, &flags); |
0ddc5b89 MJ |
373 | if (ret < 0) { |
374 | dev_err(dev, "Read IRQ Flags Register error %d\n", ret); | |
375 | return ret; | |
376 | } | |
377 | ||
abe2f551 MJ |
378 | tm->tm_sec = bcd2bin(regs[RV3029_A_SC - RV3029_A_SC] & 0x7f); |
379 | tm->tm_min = bcd2bin(regs[RV3029_A_MN - RV3029_A_SC] & 0x7f); | |
380 | tm->tm_hour = bcd2bin(regs[RV3029_A_HR - RV3029_A_SC] & 0x3f); | |
381 | tm->tm_mday = bcd2bin(regs[RV3029_A_DT - RV3029_A_SC] & 0x3f); | |
382 | tm->tm_mon = bcd2bin(regs[RV3029_A_MO - RV3029_A_SC] & 0x1f) - 1; | |
383 | tm->tm_year = bcd2bin(regs[RV3029_A_YR - RV3029_A_SC] & 0x7f) + 100; | |
384 | tm->tm_wday = bcd2bin(regs[RV3029_A_DW - RV3029_A_SC] & 0x07) - 1; | |
52365230 | 385 | |
0ddc5b89 MJ |
386 | alarm->enabled = !!(controls & RV3029_IRQ_CTRL_AIE); |
387 | alarm->pending = (flags & RV3029_IRQ_FLAGS_AF) && alarm->enabled; | |
388 | ||
52365230 HS |
389 | return 0; |
390 | } | |
391 | ||
0ddc5b89 | 392 | static int rv3029_alarm_irq_enable(struct device *dev, unsigned int enable) |
52365230 | 393 | { |
38ce8e30 | 394 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 | 395 | |
38ce8e30 AB |
396 | return regmap_update_bits(rv3029->regmap, RV3029_IRQ_CTRL, |
397 | RV3029_IRQ_CTRL_AIE, | |
398 | enable ? RV3029_IRQ_CTRL_AIE : 0); | |
52365230 HS |
399 | } |
400 | ||
e6e38082 | 401 | static int rv3029_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
52365230 | 402 | { |
7518dd9a | 403 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 HS |
404 | struct rtc_time *const tm = &alarm->time; |
405 | int ret; | |
406 | u8 regs[8]; | |
407 | ||
408 | /* | |
409 | * The clock has an 8 bit wide bcd-coded register (they never learn) | |
410 | * for the year. tm_year is an offset from 1900 and we are interested | |
411 | * in the 2000-2099 range, so any value less than 100 is invalid. | |
412 | */ | |
413 | if (tm->tm_year < 100) | |
414 | return -EINVAL; | |
415 | ||
dc492e86 MJ |
416 | /* Activate all the alarms with AE_x bit */ |
417 | regs[RV3029_A_SC - RV3029_A_SC] = bin2bcd(tm->tm_sec) | RV3029_A_AE_X; | |
418 | regs[RV3029_A_MN - RV3029_A_SC] = bin2bcd(tm->tm_min) | RV3029_A_AE_X; | |
419 | regs[RV3029_A_HR - RV3029_A_SC] = (bin2bcd(tm->tm_hour) & 0x3f) | |
420 | | RV3029_A_AE_X; | |
421 | regs[RV3029_A_DT - RV3029_A_SC] = (bin2bcd(tm->tm_mday) & 0x3f) | |
422 | | RV3029_A_AE_X; | |
423 | regs[RV3029_A_MO - RV3029_A_SC] = (bin2bcd(tm->tm_mon + 1) & 0x1f) | |
424 | | RV3029_A_AE_X; | |
425 | regs[RV3029_A_DW - RV3029_A_SC] = (bin2bcd(tm->tm_wday + 1) & 0x7) | |
426 | | RV3029_A_AE_X; | |
427 | regs[RV3029_A_YR - RV3029_A_SC] = (bin2bcd(tm->tm_year - 100)) | |
428 | | RV3029_A_AE_X; | |
429 | ||
430 | /* Write the alarm */ | |
7518dd9a | 431 | ret = regmap_bulk_write(rv3029->regmap, RV3029_A_SC, regs, |
4e7f1a60 | 432 | RV3029_ALARM_SECTION_LEN); |
52365230 HS |
433 | if (ret < 0) |
434 | return ret; | |
435 | ||
8fd3d609 | 436 | return rv3029_alarm_irq_enable(dev, alarm->enabled); |
52365230 HS |
437 | } |
438 | ||
e6e38082 | 439 | static int rv3029_set_time(struct device *dev, struct rtc_time *tm) |
52365230 | 440 | { |
54c5970d | 441 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 HS |
442 | u8 regs[8]; |
443 | int ret; | |
444 | ||
445 | /* | |
446 | * The clock has an 8 bit wide bcd-coded register (they never learn) | |
447 | * for the year. tm_year is an offset from 1900 and we are interested | |
448 | * in the 2000-2099 range, so any value less than 100 is invalid. | |
449 | */ | |
450 | if (tm->tm_year < 100) | |
451 | return -EINVAL; | |
452 | ||
abe2f551 MJ |
453 | regs[RV3029_W_SEC - RV3029_W_SEC] = bin2bcd(tm->tm_sec); |
454 | regs[RV3029_W_MINUTES - RV3029_W_SEC] = bin2bcd(tm->tm_min); | |
455 | regs[RV3029_W_HOURS - RV3029_W_SEC] = bin2bcd(tm->tm_hour); | |
456 | regs[RV3029_W_DATE - RV3029_W_SEC] = bin2bcd(tm->tm_mday); | |
457 | regs[RV3029_W_MONTHS - RV3029_W_SEC] = bin2bcd(tm->tm_mon + 1); | |
38201ca3 | 458 | regs[RV3029_W_DAYS - RV3029_W_SEC] = bin2bcd(tm->tm_wday + 1) & 0x7; |
abe2f551 | 459 | regs[RV3029_W_YEARS - RV3029_W_SEC] = bin2bcd(tm->tm_year - 100); |
52365230 | 460 | |
7518dd9a | 461 | ret = regmap_bulk_write(rv3029->regmap, RV3029_W_SEC, regs, |
4e7f1a60 | 462 | RV3029_WATCH_SECTION_LEN); |
52365230 HS |
463 | if (ret < 0) |
464 | return ret; | |
465 | ||
cff2e4d2 | 466 | /* clear PON and VLOW2 bits */ |
54c5970d | 467 | return regmap_update_bits(rv3029->regmap, RV3029_STATUS, |
cff2e4d2 | 468 | RV3029_STATUS_PON | RV3029_STATUS_VLOW2, 0); |
52365230 | 469 | } |
abe2f551 | 470 | |
f630f728 AB |
471 | static int rv3029_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) |
472 | { | |
473 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); | |
474 | unsigned long vl = 0; | |
475 | int sr, ret = 0; | |
476 | ||
477 | switch (cmd) { | |
478 | case RTC_VL_READ: | |
479 | ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); | |
480 | if (ret < 0) | |
481 | return ret; | |
482 | ||
483 | if (sr & RV3029_STATUS_VLOW1) | |
484 | vl = RTC_VL_ACCURACY_LOW; | |
485 | ||
486 | if (sr & (RV3029_STATUS_VLOW2 | RV3029_STATUS_PON)) | |
487 | vl |= RTC_VL_DATA_INVALID; | |
488 | ||
489 | return put_user(vl, (unsigned int __user *)arg); | |
490 | ||
491 | case RTC_VL_CLR: | |
492 | return regmap_update_bits(rv3029->regmap, RV3029_STATUS, | |
493 | RV3029_STATUS_VLOW1, 0); | |
494 | ||
495 | default: | |
496 | return -ENOIOCTLCMD; | |
497 | } | |
498 | } | |
499 | ||
e27e2160 MB |
500 | static const struct rv3029_trickle_tab_elem { |
501 | u32 r; /* resistance in ohms */ | |
502 | u8 conf; /* trickle config bits */ | |
503 | } rv3029_trickle_tab[] = { | |
504 | { | |
505 | .r = 1076, | |
506 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
507 | RV3029_TRICKLE_20K | RV3029_TRICKLE_80K, | |
508 | }, { | |
509 | .r = 1091, | |
510 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
511 | RV3029_TRICKLE_20K, | |
512 | }, { | |
513 | .r = 1137, | |
514 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
515 | RV3029_TRICKLE_80K, | |
516 | }, { | |
517 | .r = 1154, | |
518 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K, | |
519 | }, { | |
520 | .r = 1371, | |
521 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K | | |
522 | RV3029_TRICKLE_80K, | |
523 | }, { | |
524 | .r = 1395, | |
525 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K, | |
526 | }, { | |
527 | .r = 1472, | |
528 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_80K, | |
529 | }, { | |
530 | .r = 1500, | |
531 | .conf = RV3029_TRICKLE_1K, | |
532 | }, { | |
533 | .r = 3810, | |
534 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K | | |
535 | RV3029_TRICKLE_80K, | |
536 | }, { | |
537 | .r = 4000, | |
538 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K, | |
539 | }, { | |
540 | .r = 4706, | |
541 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_80K, | |
542 | }, { | |
543 | .r = 5000, | |
544 | .conf = RV3029_TRICKLE_5K, | |
545 | }, { | |
546 | .r = 16000, | |
547 | .conf = RV3029_TRICKLE_20K | RV3029_TRICKLE_80K, | |
548 | }, { | |
549 | .r = 20000, | |
550 | .conf = RV3029_TRICKLE_20K, | |
551 | }, { | |
552 | .r = 80000, | |
553 | .conf = RV3029_TRICKLE_80K, | |
554 | }, | |
555 | }; | |
556 | ||
e6e38082 | 557 | static void rv3029_trickle_config(struct device *dev) |
e27e2160 | 558 | { |
7518dd9a | 559 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
e6e38082 | 560 | struct device_node *of_node = dev->of_node; |
e27e2160 MB |
561 | const struct rv3029_trickle_tab_elem *elem; |
562 | int i, err; | |
563 | u32 ohms; | |
39387dc2 | 564 | u8 trickle_set_bits; |
e27e2160 MB |
565 | |
566 | if (!of_node) | |
567 | return; | |
568 | ||
569 | /* Configure the trickle charger. */ | |
e27e2160 MB |
570 | err = of_property_read_u32(of_node, "trickle-resistor-ohms", &ohms); |
571 | if (err) { | |
572 | /* Disable trickle charger. */ | |
39387dc2 | 573 | trickle_set_bits = 0; |
e27e2160 MB |
574 | } else { |
575 | /* Enable trickle charger. */ | |
576 | for (i = 0; i < ARRAY_SIZE(rv3029_trickle_tab); i++) { | |
577 | elem = &rv3029_trickle_tab[i]; | |
578 | if (elem->r >= ohms) | |
579 | break; | |
580 | } | |
39387dc2 | 581 | trickle_set_bits = elem->conf; |
e6e38082 | 582 | dev_info(dev, |
e27e2160 MB |
583 | "Trickle charger enabled at %d ohms resistance.\n", |
584 | elem->r); | |
585 | } | |
7518dd9a | 586 | err = rv3029_eeprom_update_bits(rv3029, RV3029_CONTROL_E2P_EECTRL, |
39387dc2 MB |
587 | RV3029_TRICKLE_MASK, |
588 | trickle_set_bits); | |
abe2f551 | 589 | if (err < 0) |
e6e38082 | 590 | dev_err(dev, "Failed to update trickle charger config\n"); |
e27e2160 MB |
591 | } |
592 | ||
a696b31e MB |
593 | #ifdef CONFIG_RTC_DRV_RV3029_HWMON |
594 | ||
7518dd9a | 595 | static int rv3029_read_temp(struct rv3029_data *rv3029, int *temp_mC) |
a696b31e | 596 | { |
7518dd9a | 597 | unsigned int temp; |
a696b31e | 598 | int ret; |
a696b31e | 599 | |
7518dd9a | 600 | ret = regmap_read(rv3029->regmap, RV3029_TEMP_PAGE, &temp); |
a696b31e MB |
601 | if (ret < 0) |
602 | return ret; | |
603 | ||
604 | *temp_mC = ((int)temp - 60) * 1000; | |
605 | ||
606 | return 0; | |
607 | } | |
608 | ||
609 | static ssize_t rv3029_hwmon_show_temp(struct device *dev, | |
610 | struct device_attribute *attr, | |
611 | char *buf) | |
612 | { | |
7518dd9a | 613 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
a696b31e MB |
614 | int ret, temp_mC; |
615 | ||
7518dd9a | 616 | ret = rv3029_read_temp(rv3029, &temp_mC); |
a696b31e MB |
617 | if (ret < 0) |
618 | return ret; | |
619 | ||
620 | return sprintf(buf, "%d\n", temp_mC); | |
621 | } | |
622 | ||
623 | static ssize_t rv3029_hwmon_set_update_interval(struct device *dev, | |
624 | struct device_attribute *attr, | |
625 | const char *buf, | |
626 | size_t count) | |
627 | { | |
7518dd9a AB |
628 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
629 | unsigned int th_set_bits = 0; | |
a696b31e MB |
630 | unsigned long interval_ms; |
631 | int ret; | |
a696b31e MB |
632 | |
633 | ret = kstrtoul(buf, 10, &interval_ms); | |
634 | if (ret < 0) | |
635 | return ret; | |
636 | ||
637 | if (interval_ms != 0) { | |
638 | th_set_bits |= RV3029_EECTRL_THE; | |
639 | if (interval_ms >= 16000) | |
640 | th_set_bits |= RV3029_EECTRL_THP; | |
641 | } | |
7518dd9a | 642 | ret = rv3029_eeprom_update_bits(rv3029, RV3029_CONTROL_E2P_EECTRL, |
a696b31e MB |
643 | RV3029_EECTRL_THE | RV3029_EECTRL_THP, |
644 | th_set_bits); | |
645 | if (ret < 0) | |
646 | return ret; | |
647 | ||
648 | return count; | |
649 | } | |
650 | ||
651 | static ssize_t rv3029_hwmon_show_update_interval(struct device *dev, | |
652 | struct device_attribute *attr, | |
653 | char *buf) | |
654 | { | |
7518dd9a | 655 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
a696b31e MB |
656 | int ret, interval_ms; |
657 | u8 eectrl; | |
658 | ||
7518dd9a | 659 | ret = rv3029_eeprom_read(rv3029, RV3029_CONTROL_E2P_EECTRL, |
a696b31e MB |
660 | &eectrl, 1); |
661 | if (ret < 0) | |
662 | return ret; | |
663 | ||
664 | if (eectrl & RV3029_EECTRL_THE) { | |
665 | if (eectrl & RV3029_EECTRL_THP) | |
666 | interval_ms = 16000; | |
667 | else | |
668 | interval_ms = 1000; | |
669 | } else { | |
670 | interval_ms = 0; | |
671 | } | |
672 | ||
673 | return sprintf(buf, "%d\n", interval_ms); | |
674 | } | |
675 | ||
676 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, rv3029_hwmon_show_temp, | |
677 | NULL, 0); | |
678 | static SENSOR_DEVICE_ATTR(update_interval, S_IWUSR | S_IRUGO, | |
679 | rv3029_hwmon_show_update_interval, | |
680 | rv3029_hwmon_set_update_interval, 0); | |
681 | ||
682 | static struct attribute *rv3029_hwmon_attrs[] = { | |
683 | &sensor_dev_attr_temp1_input.dev_attr.attr, | |
684 | &sensor_dev_attr_update_interval.dev_attr.attr, | |
685 | NULL, | |
686 | }; | |
687 | ATTRIBUTE_GROUPS(rv3029_hwmon); | |
688 | ||
e6e38082 | 689 | static void rv3029_hwmon_register(struct device *dev, const char *name) |
a696b31e | 690 | { |
e6e38082 | 691 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
a696b31e MB |
692 | struct device *hwmon_dev; |
693 | ||
e6e38082 MJ |
694 | hwmon_dev = devm_hwmon_device_register_with_groups(dev, name, rv3029, |
695 | rv3029_hwmon_groups); | |
a696b31e | 696 | if (IS_ERR(hwmon_dev)) { |
e6e38082 | 697 | dev_warn(dev, "unable to register hwmon device %ld\n", |
4e7f1a60 | 698 | PTR_ERR(hwmon_dev)); |
a696b31e MB |
699 | } |
700 | } | |
701 | ||
702 | #else /* CONFIG_RTC_DRV_RV3029_HWMON */ | |
703 | ||
e6e38082 | 704 | static void rv3029_hwmon_register(struct device *dev, const char *name) |
a696b31e MB |
705 | { |
706 | } | |
707 | ||
708 | #endif /* CONFIG_RTC_DRV_RV3029_HWMON */ | |
709 | ||
0ddc5b89 | 710 | static struct rtc_class_ops rv3029_rtc_ops = { |
e6e38082 MJ |
711 | .read_time = rv3029_read_time, |
712 | .set_time = rv3029_set_time, | |
f630f728 | 713 | .ioctl = rv3029_ioctl, |
52365230 HS |
714 | }; |
715 | ||
e6e38082 MJ |
716 | static int rv3029_probe(struct device *dev, struct regmap *regmap, int irq, |
717 | const char *name) | |
52365230 | 718 | { |
e6e38082 | 719 | struct rv3029_data *rv3029; |
52365230 | 720 | int rc = 0; |
52365230 | 721 | |
e6e38082 MJ |
722 | rv3029 = devm_kzalloc(dev, sizeof(*rv3029), GFP_KERNEL); |
723 | if (!rv3029) | |
724 | return -ENOMEM; | |
725 | ||
726 | rv3029->regmap = regmap; | |
727 | rv3029->irq = irq; | |
728 | rv3029->dev = dev; | |
729 | dev_set_drvdata(dev, rv3029); | |
52365230 | 730 | |
e6e38082 MJ |
731 | rv3029_trickle_config(dev); |
732 | rv3029_hwmon_register(dev, name); | |
733 | ||
9346f870 AB |
734 | rv3029->rtc = devm_rtc_allocate_device(dev); |
735 | if (IS_ERR(rv3029->rtc)) | |
0ddc5b89 | 736 | return PTR_ERR(rv3029->rtc); |
e27e2160 | 737 | |
0ddc5b89 MJ |
738 | if (rv3029->irq > 0) { |
739 | rc = devm_request_threaded_irq(dev, rv3029->irq, | |
740 | NULL, rv3029_handle_irq, | |
741 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
742 | "rv3029", dev); | |
743 | if (rc) { | |
744 | dev_warn(dev, "unable to request IRQ, alarms disabled\n"); | |
745 | rv3029->irq = 0; | |
746 | } else { | |
747 | rv3029_rtc_ops.read_alarm = rv3029_read_alarm; | |
748 | rv3029_rtc_ops.set_alarm = rv3029_set_alarm; | |
749 | rv3029_rtc_ops.alarm_irq_enable = rv3029_alarm_irq_enable; | |
750 | } | |
751 | } | |
752 | ||
9346f870 AB |
753 | rv3029->rtc->ops = &rv3029_rtc_ops; |
754 | ||
755 | return rtc_register_device(rv3029->rtc); | |
e6e38082 | 756 | } |
52365230 | 757 | |
c509e434 AB |
758 | static const struct regmap_range rv3029_holes_range[] = { |
759 | regmap_reg_range(0x05, 0x07), | |
760 | regmap_reg_range(0x0f, 0x0f), | |
761 | regmap_reg_range(0x17, 0x17), | |
762 | regmap_reg_range(0x1a, 0x1f), | |
763 | regmap_reg_range(0x21, 0x27), | |
764 | regmap_reg_range(0x34, 0x37), | |
765 | }; | |
766 | ||
767 | static const struct regmap_access_table rv3029_regs = { | |
768 | .no_ranges = rv3029_holes_range, | |
769 | .n_no_ranges = ARRAY_SIZE(rv3029_holes_range), | |
770 | }; | |
771 | ||
772 | static const struct regmap_config config = { | |
773 | .reg_bits = 8, | |
774 | .val_bits = 8, | |
775 | .rd_table = &rv3029_regs, | |
776 | .wr_table = &rv3029_regs, | |
777 | .max_register = 0x3f, | |
778 | }; | |
779 | ||
c2a1c145 MJ |
780 | #if IS_ENABLED(CONFIG_I2C) |
781 | ||
e6e38082 MJ |
782 | static int rv3029_i2c_probe(struct i2c_client *client, |
783 | const struct i2c_device_id *id) | |
784 | { | |
785 | struct regmap *regmap; | |
e6e38082 MJ |
786 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | |
787 | I2C_FUNC_SMBUS_BYTE)) { | |
788 | dev_err(&client->dev, "Adapter does not support SMBUS_I2C_BLOCK or SMBUS_I2C_BYTE\n"); | |
789 | return -ENODEV; | |
790 | } | |
52365230 | 791 | |
e6e38082 MJ |
792 | regmap = devm_regmap_init_i2c(client, &config); |
793 | if (IS_ERR(regmap)) { | |
794 | dev_err(&client->dev, "%s: regmap allocation failed: %ld\n", | |
795 | __func__, PTR_ERR(regmap)); | |
796 | return PTR_ERR(regmap); | |
797 | } | |
52365230 | 798 | |
e6e38082 | 799 | return rv3029_probe(&client->dev, regmap, client->irq, client->name); |
52365230 HS |
800 | } |
801 | ||
45a63518 | 802 | static const struct i2c_device_id rv3029_id[] = { |
814db2bc AB |
803 | { "rv3029", 0 }, |
804 | { "rv3029c2", 0 }, | |
805 | { } | |
806 | }; | |
807 | MODULE_DEVICE_TABLE(i2c, rv3029_id); | |
808 | ||
e696a1dd | 809 | static const struct of_device_id rv3029_of_match[] = { |
45b611c8 AB |
810 | { .compatible = "microcrystal,rv3029" }, |
811 | /* Backward compatibility only, do not use compatibles below: */ | |
e696a1dd JMC |
812 | { .compatible = "rv3029" }, |
813 | { .compatible = "rv3029c2" }, | |
814 | { .compatible = "mc,rv3029c2" }, | |
815 | { } | |
816 | }; | |
817 | MODULE_DEVICE_TABLE(of, rv3029_of_match); | |
818 | ||
aba39d27 | 819 | static struct i2c_driver rv3029_driver = { |
52365230 | 820 | .driver = { |
9b45ef97 | 821 | .name = "rv3029", |
e696a1dd | 822 | .of_match_table = of_match_ptr(rv3029_of_match), |
52365230 | 823 | }, |
e6e38082 | 824 | .probe = rv3029_i2c_probe, |
aba39d27 | 825 | .id_table = rv3029_id, |
52365230 HS |
826 | }; |
827 | ||
c2a1c145 MJ |
828 | static int rv3029_register_driver(void) |
829 | { | |
830 | return i2c_add_driver(&rv3029_driver); | |
831 | } | |
832 | ||
833 | static void rv3029_unregister_driver(void) | |
834 | { | |
835 | i2c_del_driver(&rv3029_driver); | |
836 | } | |
837 | ||
838 | #else | |
839 | ||
840 | static int rv3029_register_driver(void) | |
841 | { | |
842 | return 0; | |
843 | } | |
844 | ||
845 | static void rv3029_unregister_driver(void) | |
846 | { | |
847 | } | |
848 | ||
849 | #endif | |
850 | ||
851 | #if IS_ENABLED(CONFIG_SPI_MASTER) | |
852 | ||
853 | static int rv3049_probe(struct spi_device *spi) | |
854 | { | |
c2a1c145 MJ |
855 | struct regmap *regmap; |
856 | ||
857 | regmap = devm_regmap_init_spi(spi, &config); | |
858 | if (IS_ERR(regmap)) { | |
859 | dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n", | |
860 | __func__, PTR_ERR(regmap)); | |
861 | return PTR_ERR(regmap); | |
862 | } | |
863 | ||
864 | return rv3029_probe(&spi->dev, regmap, spi->irq, "rv3049"); | |
865 | } | |
866 | ||
867 | static struct spi_driver rv3049_driver = { | |
868 | .driver = { | |
869 | .name = "rv3049", | |
870 | }, | |
871 | .probe = rv3049_probe, | |
872 | }; | |
873 | ||
874 | static int rv3049_register_driver(void) | |
875 | { | |
876 | return spi_register_driver(&rv3049_driver); | |
877 | } | |
878 | ||
879 | static void rv3049_unregister_driver(void) | |
880 | { | |
881 | spi_unregister_driver(&rv3049_driver); | |
882 | } | |
883 | ||
884 | #else | |
885 | ||
886 | static int rv3049_register_driver(void) | |
887 | { | |
888 | return 0; | |
889 | } | |
890 | ||
891 | static void rv3049_unregister_driver(void) | |
892 | { | |
893 | } | |
894 | ||
895 | #endif | |
896 | ||
897 | static int __init rv30x9_init(void) | |
898 | { | |
899 | int ret; | |
900 | ||
901 | ret = rv3029_register_driver(); | |
902 | if (ret) { | |
903 | pr_err("Failed to register rv3029 driver: %d\n", ret); | |
904 | return ret; | |
905 | } | |
906 | ||
907 | ret = rv3049_register_driver(); | |
908 | if (ret) { | |
909 | pr_err("Failed to register rv3049 driver: %d\n", ret); | |
910 | rv3029_unregister_driver(); | |
911 | } | |
912 | ||
913 | return ret; | |
914 | } | |
915 | module_init(rv30x9_init) | |
916 | ||
917 | static void __exit rv30x9_exit(void) | |
918 | { | |
919 | rv3049_unregister_driver(); | |
920 | rv3029_unregister_driver(); | |
921 | } | |
922 | module_exit(rv30x9_exit) | |
52365230 HS |
923 | |
924 | MODULE_AUTHOR("Gregory Hermant <gregory.hermant@calao-systems.com>"); | |
2dca3d9e | 925 | MODULE_AUTHOR("Michael Buesch <m@bues.ch>"); |
c2a1c145 | 926 | MODULE_DESCRIPTION("Micro Crystal RV3029/RV3049 RTC driver"); |
52365230 | 927 | MODULE_LICENSE("GPL"); |
c2a1c145 | 928 | MODULE_ALIAS("spi:rv3049"); |