Commit | Line | Data |
---|---|---|
52365230 | 1 | /* |
c2a1c145 | 2 | * Micro Crystal RV-3029 / RV-3049 rtc class driver |
52365230 HS |
3 | * |
4 | * Author: Gregory Hermant <gregory.hermant@calao-systems.com> | |
2dca3d9e | 5 | * Michael Buesch <m@bues.ch> |
52365230 HS |
6 | * |
7 | * based on previously existing rtc class drivers | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
52365230 HS |
13 | */ |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/i2c.h> | |
c2a1c145 | 17 | #include <linux/spi/spi.h> |
52365230 HS |
18 | #include <linux/bcd.h> |
19 | #include <linux/rtc.h> | |
a7f6e287 MB |
20 | #include <linux/delay.h> |
21 | #include <linux/of.h> | |
a696b31e MB |
22 | #include <linux/hwmon.h> |
23 | #include <linux/hwmon-sysfs.h> | |
e6e38082 | 24 | #include <linux/regmap.h> |
52365230 HS |
25 | |
26 | /* Register map */ | |
27 | /* control section */ | |
aba39d27 | 28 | #define RV3029_ONOFF_CTRL 0x00 |
7697de35 MB |
29 | #define RV3029_ONOFF_CTRL_WE BIT(0) |
30 | #define RV3029_ONOFF_CTRL_TE BIT(1) | |
31 | #define RV3029_ONOFF_CTRL_TAR BIT(2) | |
32 | #define RV3029_ONOFF_CTRL_EERE BIT(3) | |
33 | #define RV3029_ONOFF_CTRL_SRON BIT(4) | |
34 | #define RV3029_ONOFF_CTRL_TD0 BIT(5) | |
35 | #define RV3029_ONOFF_CTRL_TD1 BIT(6) | |
36 | #define RV3029_ONOFF_CTRL_CLKINT BIT(7) | |
aba39d27 | 37 | #define RV3029_IRQ_CTRL 0x01 |
7697de35 MB |
38 | #define RV3029_IRQ_CTRL_AIE BIT(0) |
39 | #define RV3029_IRQ_CTRL_TIE BIT(1) | |
40 | #define RV3029_IRQ_CTRL_V1IE BIT(2) | |
41 | #define RV3029_IRQ_CTRL_V2IE BIT(3) | |
42 | #define RV3029_IRQ_CTRL_SRIE BIT(4) | |
aba39d27 | 43 | #define RV3029_IRQ_FLAGS 0x02 |
7697de35 MB |
44 | #define RV3029_IRQ_FLAGS_AF BIT(0) |
45 | #define RV3029_IRQ_FLAGS_TF BIT(1) | |
46 | #define RV3029_IRQ_FLAGS_V1IF BIT(2) | |
47 | #define RV3029_IRQ_FLAGS_V2IF BIT(3) | |
48 | #define RV3029_IRQ_FLAGS_SRF BIT(4) | |
aba39d27 | 49 | #define RV3029_STATUS 0x03 |
7697de35 MB |
50 | #define RV3029_STATUS_VLOW1 BIT(2) |
51 | #define RV3029_STATUS_VLOW2 BIT(3) | |
52 | #define RV3029_STATUS_SR BIT(4) | |
53 | #define RV3029_STATUS_PON BIT(5) | |
54 | #define RV3029_STATUS_EEBUSY BIT(7) | |
aba39d27 | 55 | #define RV3029_RST_CTRL 0x04 |
7697de35 | 56 | #define RV3029_RST_CTRL_SYSR BIT(4) |
aba39d27 | 57 | #define RV3029_CONTROL_SECTION_LEN 0x05 |
52365230 HS |
58 | |
59 | /* watch section */ | |
aba39d27 MB |
60 | #define RV3029_W_SEC 0x08 |
61 | #define RV3029_W_MINUTES 0x09 | |
62 | #define RV3029_W_HOURS 0x0A | |
7697de35 MB |
63 | #define RV3029_REG_HR_12_24 BIT(6) /* 24h/12h mode */ |
64 | #define RV3029_REG_HR_PM BIT(5) /* PM/AM bit in 12h mode */ | |
aba39d27 MB |
65 | #define RV3029_W_DATE 0x0B |
66 | #define RV3029_W_DAYS 0x0C | |
67 | #define RV3029_W_MONTHS 0x0D | |
68 | #define RV3029_W_YEARS 0x0E | |
69 | #define RV3029_WATCH_SECTION_LEN 0x07 | |
52365230 HS |
70 | |
71 | /* alarm section */ | |
aba39d27 MB |
72 | #define RV3029_A_SC 0x10 |
73 | #define RV3029_A_MN 0x11 | |
74 | #define RV3029_A_HR 0x12 | |
75 | #define RV3029_A_DT 0x13 | |
76 | #define RV3029_A_DW 0x14 | |
77 | #define RV3029_A_MO 0x15 | |
78 | #define RV3029_A_YR 0x16 | |
dc492e86 | 79 | #define RV3029_A_AE_X BIT(7) |
aba39d27 | 80 | #define RV3029_ALARM_SECTION_LEN 0x07 |
52365230 HS |
81 | |
82 | /* timer section */ | |
aba39d27 MB |
83 | #define RV3029_TIMER_LOW 0x18 |
84 | #define RV3029_TIMER_HIGH 0x19 | |
52365230 HS |
85 | |
86 | /* temperature section */ | |
aba39d27 | 87 | #define RV3029_TEMP_PAGE 0x20 |
52365230 HS |
88 | |
89 | /* eeprom data section */ | |
aba39d27 MB |
90 | #define RV3029_E2P_EEDATA1 0x28 |
91 | #define RV3029_E2P_EEDATA2 0x29 | |
7697de35 | 92 | #define RV3029_E2PDATA_SECTION_LEN 0x02 |
52365230 HS |
93 | |
94 | /* eeprom control section */ | |
aba39d27 | 95 | #define RV3029_CONTROL_E2P_EECTRL 0x30 |
7697de35 MB |
96 | #define RV3029_EECTRL_THP BIT(0) /* temp scan interval */ |
97 | #define RV3029_EECTRL_THE BIT(1) /* thermometer enable */ | |
98 | #define RV3029_EECTRL_FD0 BIT(2) /* CLKOUT */ | |
99 | #define RV3029_EECTRL_FD1 BIT(3) /* CLKOUT */ | |
100 | #define RV3029_TRICKLE_1K BIT(4) /* 1.5K resistance */ | |
101 | #define RV3029_TRICKLE_5K BIT(5) /* 5K resistance */ | |
102 | #define RV3029_TRICKLE_20K BIT(6) /* 20K resistance */ | |
103 | #define RV3029_TRICKLE_80K BIT(7) /* 80K resistance */ | |
104 | #define RV3029_TRICKLE_MASK (RV3029_TRICKLE_1K |\ | |
105 | RV3029_TRICKLE_5K |\ | |
106 | RV3029_TRICKLE_20K |\ | |
107 | RV3029_TRICKLE_80K) | |
108 | #define RV3029_TRICKLE_SHIFT 4 | |
109 | #define RV3029_CONTROL_E2P_XOFFS 0x31 /* XTAL offset */ | |
110 | #define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */ | |
111 | #define RV3029_CONTROL_E2P_QCOEF 0x32 /* XTAL temp drift coef */ | |
112 | #define RV3029_CONTROL_E2P_TURNOVER 0x33 /* XTAL turnover temp (in *C) */ | |
113 | #define RV3029_CONTROL_E2P_TOV_MASK 0x3F /* XTAL turnover temp mask */ | |
52365230 HS |
114 | |
115 | /* user ram section */ | |
aba39d27 MB |
116 | #define RV3029_USR1_RAM_PAGE 0x38 |
117 | #define RV3029_USR1_SECTION_LEN 0x04 | |
118 | #define RV3029_USR2_RAM_PAGE 0x3C | |
119 | #define RV3029_USR2_SECTION_LEN 0x04 | |
52365230 | 120 | |
e6e38082 MJ |
121 | struct rv3029_data { |
122 | struct device *dev; | |
123 | struct rtc_device *rtc; | |
124 | struct regmap *regmap; | |
125 | int irq; | |
126 | }; | |
127 | ||
128 | static int rv3029_read_regs(struct device *dev, u8 reg, u8 *buf, | |
abe2f551 | 129 | unsigned int len) |
52365230 | 130 | { |
e6e38082 | 131 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 | 132 | |
aba39d27 | 133 | if ((reg > RV3029_USR1_RAM_PAGE + 7) || |
abe2f551 | 134 | (reg + len > RV3029_USR1_RAM_PAGE + 8)) |
52365230 HS |
135 | return -EINVAL; |
136 | ||
e6e38082 | 137 | return regmap_bulk_read(rv3029->regmap, reg, buf, len); |
52365230 HS |
138 | } |
139 | ||
e6e38082 | 140 | static int rv3029_write_regs(struct device *dev, u8 reg, u8 const buf[], |
abe2f551 | 141 | unsigned int len) |
52365230 | 142 | { |
e6e38082 MJ |
143 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
144 | ||
aba39d27 | 145 | if ((reg > RV3029_USR1_RAM_PAGE + 7) || |
abe2f551 | 146 | (reg + len > RV3029_USR1_RAM_PAGE + 8)) |
52365230 HS |
147 | return -EINVAL; |
148 | ||
e6e38082 | 149 | return regmap_bulk_write(rv3029->regmap, reg, buf, len); |
52365230 HS |
150 | } |
151 | ||
e6e38082 | 152 | static int rv3029_update_bits(struct device *dev, u8 reg, u8 mask, u8 set) |
2dca3d9e MB |
153 | { |
154 | u8 buf; | |
155 | int ret; | |
156 | ||
e6e38082 | 157 | ret = rv3029_read_regs(dev, reg, &buf, 1); |
2dca3d9e MB |
158 | if (ret < 0) |
159 | return ret; | |
160 | buf &= ~mask; | |
161 | buf |= set & mask; | |
e6e38082 | 162 | ret = rv3029_write_regs(dev, reg, &buf, 1); |
2dca3d9e MB |
163 | if (ret < 0) |
164 | return ret; | |
165 | ||
166 | return 0; | |
167 | } | |
168 | ||
e6e38082 | 169 | static int rv3029_get_sr(struct device *dev, u8 *buf) |
52365230 | 170 | { |
e6e38082 | 171 | int ret = rv3029_read_regs(dev, RV3029_STATUS, buf, 1); |
52365230 HS |
172 | |
173 | if (ret < 0) | |
174 | return -EIO; | |
e6e38082 | 175 | dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]); |
52365230 HS |
176 | return 0; |
177 | } | |
178 | ||
e6e38082 | 179 | static int rv3029_set_sr(struct device *dev, u8 val) |
52365230 HS |
180 | { |
181 | u8 buf[1]; | |
182 | int sr; | |
183 | ||
184 | buf[0] = val; | |
e6e38082 MJ |
185 | sr = rv3029_write_regs(dev, RV3029_STATUS, buf, 1); |
186 | dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]); | |
52365230 HS |
187 | if (sr < 0) |
188 | return -EIO; | |
189 | return 0; | |
190 | } | |
191 | ||
e6e38082 | 192 | static int rv3029_eeprom_busywait(struct device *dev) |
a7f6e287 MB |
193 | { |
194 | int i, ret; | |
195 | u8 sr; | |
196 | ||
197 | for (i = 100; i > 0; i--) { | |
e6e38082 | 198 | ret = rv3029_get_sr(dev, &sr); |
a7f6e287 MB |
199 | if (ret < 0) |
200 | break; | |
201 | if (!(sr & RV3029_STATUS_EEBUSY)) | |
202 | break; | |
203 | usleep_range(1000, 10000); | |
204 | } | |
205 | if (i <= 0) { | |
e6e38082 | 206 | dev_err(dev, "EEPROM busy wait timeout.\n"); |
a7f6e287 MB |
207 | return -ETIMEDOUT; |
208 | } | |
209 | ||
210 | return ret; | |
211 | } | |
212 | ||
e6e38082 | 213 | static int rv3029_eeprom_exit(struct device *dev) |
a7f6e287 MB |
214 | { |
215 | /* Re-enable eeprom refresh */ | |
e6e38082 | 216 | return rv3029_update_bits(dev, RV3029_ONOFF_CTRL, |
4e7f1a60 MJ |
217 | RV3029_ONOFF_CTRL_EERE, |
218 | RV3029_ONOFF_CTRL_EERE); | |
a7f6e287 MB |
219 | } |
220 | ||
e6e38082 | 221 | static int rv3029_eeprom_enter(struct device *dev) |
a7f6e287 MB |
222 | { |
223 | int ret; | |
224 | u8 sr; | |
225 | ||
226 | /* Check whether we are in the allowed voltage range. */ | |
e6e38082 | 227 | ret = rv3029_get_sr(dev, &sr); |
a7f6e287 MB |
228 | if (ret < 0) |
229 | return ret; | |
230 | if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) { | |
231 | /* We clear the bits and retry once just in case | |
232 | * we had a brown out in early startup. | |
233 | */ | |
234 | sr &= ~RV3029_STATUS_VLOW1; | |
235 | sr &= ~RV3029_STATUS_VLOW2; | |
e6e38082 | 236 | ret = rv3029_set_sr(dev, sr); |
a7f6e287 MB |
237 | if (ret < 0) |
238 | return ret; | |
239 | usleep_range(1000, 10000); | |
e6e38082 | 240 | ret = rv3029_get_sr(dev, &sr); |
a7f6e287 MB |
241 | if (ret < 0) |
242 | return ret; | |
243 | if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) { | |
e6e38082 | 244 | dev_err(dev, |
a7f6e287 MB |
245 | "Supply voltage is too low to safely access the EEPROM.\n"); |
246 | return -ENODEV; | |
247 | } | |
248 | } | |
249 | ||
250 | /* Disable eeprom refresh. */ | |
e6e38082 MJ |
251 | ret = rv3029_update_bits(dev, RV3029_ONOFF_CTRL, RV3029_ONOFF_CTRL_EERE, |
252 | 0); | |
a7f6e287 MB |
253 | if (ret < 0) |
254 | return ret; | |
255 | ||
256 | /* Wait for any previous eeprom accesses to finish. */ | |
e6e38082 | 257 | ret = rv3029_eeprom_busywait(dev); |
a7f6e287 | 258 | if (ret < 0) |
e6e38082 | 259 | rv3029_eeprom_exit(dev); |
a7f6e287 MB |
260 | |
261 | return ret; | |
262 | } | |
263 | ||
e6e38082 | 264 | static int rv3029_eeprom_read(struct device *dev, u8 reg, |
a7f6e287 MB |
265 | u8 buf[], size_t len) |
266 | { | |
267 | int ret, err; | |
268 | ||
e6e38082 | 269 | err = rv3029_eeprom_enter(dev); |
a7f6e287 MB |
270 | if (err < 0) |
271 | return err; | |
272 | ||
e6e38082 | 273 | ret = rv3029_read_regs(dev, reg, buf, len); |
a7f6e287 | 274 | |
e6e38082 | 275 | err = rv3029_eeprom_exit(dev); |
a7f6e287 MB |
276 | if (err < 0) |
277 | return err; | |
278 | ||
279 | return ret; | |
280 | } | |
281 | ||
e6e38082 | 282 | static int rv3029_eeprom_write(struct device *dev, u8 reg, |
a7f6e287 MB |
283 | u8 const buf[], size_t len) |
284 | { | |
285 | int ret, err; | |
286 | size_t i; | |
287 | u8 tmp; | |
288 | ||
e6e38082 | 289 | err = rv3029_eeprom_enter(dev); |
a7f6e287 MB |
290 | if (err < 0) |
291 | return err; | |
292 | ||
293 | for (i = 0; i < len; i++, reg++) { | |
e6e38082 | 294 | ret = rv3029_read_regs(dev, reg, &tmp, 1); |
a7f6e287 MB |
295 | if (ret < 0) |
296 | break; | |
297 | if (tmp != buf[i]) { | |
e6e38082 | 298 | ret = rv3029_write_regs(dev, reg, &buf[i], 1); |
a7f6e287 MB |
299 | if (ret < 0) |
300 | break; | |
301 | } | |
e6e38082 | 302 | ret = rv3029_eeprom_busywait(dev); |
a7f6e287 MB |
303 | if (ret < 0) |
304 | break; | |
305 | } | |
306 | ||
e6e38082 | 307 | err = rv3029_eeprom_exit(dev); |
a7f6e287 MB |
308 | if (err < 0) |
309 | return err; | |
310 | ||
311 | return ret; | |
312 | } | |
313 | ||
e6e38082 | 314 | static int rv3029_eeprom_update_bits(struct device *dev, |
39387dc2 MB |
315 | u8 reg, u8 mask, u8 set) |
316 | { | |
317 | u8 buf; | |
318 | int ret; | |
319 | ||
e6e38082 | 320 | ret = rv3029_eeprom_read(dev, reg, &buf, 1); |
39387dc2 MB |
321 | if (ret < 0) |
322 | return ret; | |
323 | buf &= ~mask; | |
324 | buf |= set & mask; | |
e6e38082 | 325 | ret = rv3029_eeprom_write(dev, reg, &buf, 1); |
39387dc2 MB |
326 | if (ret < 0) |
327 | return ret; | |
328 | ||
329 | return 0; | |
330 | } | |
331 | ||
0ddc5b89 MJ |
332 | static irqreturn_t rv3029_handle_irq(int irq, void *dev_id) |
333 | { | |
334 | struct device *dev = dev_id; | |
335 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); | |
336 | struct mutex *lock = &rv3029->rtc->ops_lock; | |
337 | unsigned long events = 0; | |
338 | u8 flags, controls; | |
339 | int ret; | |
340 | ||
341 | mutex_lock(lock); | |
342 | ||
343 | ret = rv3029_read_regs(dev, RV3029_IRQ_CTRL, &controls, 1); | |
344 | if (ret) { | |
345 | dev_warn(dev, "Read IRQ Control Register error %d\n", ret); | |
346 | mutex_unlock(lock); | |
347 | return IRQ_NONE; | |
348 | } | |
349 | ||
350 | ret = rv3029_read_regs(dev, RV3029_IRQ_FLAGS, &flags, 1); | |
351 | if (ret) { | |
352 | dev_warn(dev, "Read IRQ Flags Register error %d\n", ret); | |
353 | mutex_unlock(lock); | |
354 | return IRQ_NONE; | |
355 | } | |
356 | ||
357 | if (flags & RV3029_IRQ_FLAGS_AF) { | |
358 | flags &= ~RV3029_IRQ_FLAGS_AF; | |
359 | controls &= ~RV3029_IRQ_CTRL_AIE; | |
360 | events |= RTC_AF; | |
361 | } | |
362 | ||
363 | if (events) { | |
364 | rtc_update_irq(rv3029->rtc, 1, events); | |
365 | rv3029_write_regs(dev, RV3029_IRQ_FLAGS, &flags, 1); | |
366 | rv3029_write_regs(dev, RV3029_IRQ_CTRL, &controls, 1); | |
367 | } | |
368 | mutex_unlock(lock); | |
369 | ||
370 | return IRQ_HANDLED; | |
371 | } | |
372 | ||
e6e38082 | 373 | static int rv3029_read_time(struct device *dev, struct rtc_time *tm) |
52365230 HS |
374 | { |
375 | u8 buf[1]; | |
376 | int ret; | |
aba39d27 | 377 | u8 regs[RV3029_WATCH_SECTION_LEN] = { 0, }; |
52365230 | 378 | |
e6e38082 | 379 | ret = rv3029_get_sr(dev, buf); |
52365230 | 380 | if (ret < 0) { |
e6e38082 | 381 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
382 | return -EIO; |
383 | } | |
384 | ||
e6e38082 | 385 | ret = rv3029_read_regs(dev, RV3029_W_SEC, regs, |
4e7f1a60 | 386 | RV3029_WATCH_SECTION_LEN); |
52365230 | 387 | if (ret < 0) { |
e6e38082 | 388 | dev_err(dev, "%s: reading RTC section failed\n", __func__); |
52365230 HS |
389 | return ret; |
390 | } | |
391 | ||
abe2f551 MJ |
392 | tm->tm_sec = bcd2bin(regs[RV3029_W_SEC - RV3029_W_SEC]); |
393 | tm->tm_min = bcd2bin(regs[RV3029_W_MINUTES - RV3029_W_SEC]); | |
52365230 HS |
394 | |
395 | /* HR field has a more complex interpretation */ | |
396 | { | |
abe2f551 | 397 | const u8 _hr = regs[RV3029_W_HOURS - RV3029_W_SEC]; |
aba39d27 MB |
398 | |
399 | if (_hr & RV3029_REG_HR_12_24) { | |
52365230 HS |
400 | /* 12h format */ |
401 | tm->tm_hour = bcd2bin(_hr & 0x1f); | |
aba39d27 | 402 | if (_hr & RV3029_REG_HR_PM) /* PM flag set */ |
52365230 HS |
403 | tm->tm_hour += 12; |
404 | } else /* 24h format */ | |
405 | tm->tm_hour = bcd2bin(_hr & 0x3f); | |
406 | } | |
407 | ||
abe2f551 MJ |
408 | tm->tm_mday = bcd2bin(regs[RV3029_W_DATE - RV3029_W_SEC]); |
409 | tm->tm_mon = bcd2bin(regs[RV3029_W_MONTHS - RV3029_W_SEC]) - 1; | |
410 | tm->tm_year = bcd2bin(regs[RV3029_W_YEARS - RV3029_W_SEC]) + 100; | |
411 | tm->tm_wday = bcd2bin(regs[RV3029_W_DAYS - RV3029_W_SEC]) - 1; | |
52365230 HS |
412 | |
413 | return 0; | |
414 | } | |
415 | ||
e6e38082 | 416 | static int rv3029_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
52365230 HS |
417 | { |
418 | struct rtc_time *const tm = &alarm->time; | |
419 | int ret; | |
0ddc5b89 | 420 | u8 regs[8], controls, flags; |
52365230 | 421 | |
e6e38082 | 422 | ret = rv3029_get_sr(dev, regs); |
52365230 | 423 | if (ret < 0) { |
e6e38082 | 424 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
425 | return -EIO; |
426 | } | |
427 | ||
e6e38082 | 428 | ret = rv3029_read_regs(dev, RV3029_A_SC, regs, |
4e7f1a60 | 429 | RV3029_ALARM_SECTION_LEN); |
52365230 HS |
430 | |
431 | if (ret < 0) { | |
e6e38082 | 432 | dev_err(dev, "%s: reading alarm section failed\n", __func__); |
52365230 HS |
433 | return ret; |
434 | } | |
435 | ||
0ddc5b89 MJ |
436 | ret = rv3029_read_regs(dev, RV3029_IRQ_CTRL, &controls, 1); |
437 | if (ret) { | |
438 | dev_err(dev, "Read IRQ Control Register error %d\n", ret); | |
439 | return ret; | |
440 | } | |
441 | ret = rv3029_read_regs(dev, RV3029_IRQ_FLAGS, &flags, 1); | |
442 | if (ret < 0) { | |
443 | dev_err(dev, "Read IRQ Flags Register error %d\n", ret); | |
444 | return ret; | |
445 | } | |
446 | ||
abe2f551 MJ |
447 | tm->tm_sec = bcd2bin(regs[RV3029_A_SC - RV3029_A_SC] & 0x7f); |
448 | tm->tm_min = bcd2bin(regs[RV3029_A_MN - RV3029_A_SC] & 0x7f); | |
449 | tm->tm_hour = bcd2bin(regs[RV3029_A_HR - RV3029_A_SC] & 0x3f); | |
450 | tm->tm_mday = bcd2bin(regs[RV3029_A_DT - RV3029_A_SC] & 0x3f); | |
451 | tm->tm_mon = bcd2bin(regs[RV3029_A_MO - RV3029_A_SC] & 0x1f) - 1; | |
452 | tm->tm_year = bcd2bin(regs[RV3029_A_YR - RV3029_A_SC] & 0x7f) + 100; | |
453 | tm->tm_wday = bcd2bin(regs[RV3029_A_DW - RV3029_A_SC] & 0x07) - 1; | |
52365230 | 454 | |
0ddc5b89 MJ |
455 | alarm->enabled = !!(controls & RV3029_IRQ_CTRL_AIE); |
456 | alarm->pending = (flags & RV3029_IRQ_FLAGS_AF) && alarm->enabled; | |
457 | ||
52365230 HS |
458 | return 0; |
459 | } | |
460 | ||
0ddc5b89 | 461 | static int rv3029_alarm_irq_enable(struct device *dev, unsigned int enable) |
52365230 HS |
462 | { |
463 | int ret; | |
0ddc5b89 MJ |
464 | u8 controls; |
465 | ||
466 | ret = rv3029_read_regs(dev, RV3029_IRQ_CTRL, &controls, 1); | |
467 | if (ret < 0) { | |
468 | dev_warn(dev, "Read IRQ Control Register error %d\n", ret); | |
469 | return ret; | |
470 | } | |
52365230 | 471 | |
2dca3d9e | 472 | /* enable/disable AIE irq */ |
0ddc5b89 MJ |
473 | if (enable) |
474 | controls |= RV3029_IRQ_CTRL_AIE; | |
475 | else | |
476 | controls &= ~RV3029_IRQ_CTRL_AIE; | |
477 | ||
478 | ret = rv3029_write_regs(dev, RV3029_IRQ_CTRL, &controls, 1); | |
52365230 | 479 | if (ret < 0) { |
e6e38082 | 480 | dev_err(dev, "can't update INT reg\n"); |
52365230 HS |
481 | return ret; |
482 | } | |
483 | ||
484 | return 0; | |
485 | } | |
486 | ||
e6e38082 | 487 | static int rv3029_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
52365230 HS |
488 | { |
489 | struct rtc_time *const tm = &alarm->time; | |
490 | int ret; | |
491 | u8 regs[8]; | |
492 | ||
493 | /* | |
494 | * The clock has an 8 bit wide bcd-coded register (they never learn) | |
495 | * for the year. tm_year is an offset from 1900 and we are interested | |
496 | * in the 2000-2099 range, so any value less than 100 is invalid. | |
497 | */ | |
498 | if (tm->tm_year < 100) | |
499 | return -EINVAL; | |
500 | ||
e6e38082 | 501 | ret = rv3029_get_sr(dev, regs); |
52365230 | 502 | if (ret < 0) { |
e6e38082 | 503 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
504 | return -EIO; |
505 | } | |
aba39d27 | 506 | |
dc492e86 MJ |
507 | /* Activate all the alarms with AE_x bit */ |
508 | regs[RV3029_A_SC - RV3029_A_SC] = bin2bcd(tm->tm_sec) | RV3029_A_AE_X; | |
509 | regs[RV3029_A_MN - RV3029_A_SC] = bin2bcd(tm->tm_min) | RV3029_A_AE_X; | |
510 | regs[RV3029_A_HR - RV3029_A_SC] = (bin2bcd(tm->tm_hour) & 0x3f) | |
511 | | RV3029_A_AE_X; | |
512 | regs[RV3029_A_DT - RV3029_A_SC] = (bin2bcd(tm->tm_mday) & 0x3f) | |
513 | | RV3029_A_AE_X; | |
514 | regs[RV3029_A_MO - RV3029_A_SC] = (bin2bcd(tm->tm_mon + 1) & 0x1f) | |
515 | | RV3029_A_AE_X; | |
516 | regs[RV3029_A_DW - RV3029_A_SC] = (bin2bcd(tm->tm_wday + 1) & 0x7) | |
517 | | RV3029_A_AE_X; | |
518 | regs[RV3029_A_YR - RV3029_A_SC] = (bin2bcd(tm->tm_year - 100)) | |
519 | | RV3029_A_AE_X; | |
520 | ||
521 | /* Write the alarm */ | |
e6e38082 | 522 | ret = rv3029_write_regs(dev, RV3029_A_SC, regs, |
4e7f1a60 | 523 | RV3029_ALARM_SECTION_LEN); |
52365230 HS |
524 | if (ret < 0) |
525 | return ret; | |
526 | ||
527 | if (alarm->enabled) { | |
52365230 | 528 | /* enable AIE irq */ |
0ddc5b89 | 529 | ret = rv3029_alarm_irq_enable(dev, 1); |
52365230 HS |
530 | if (ret) |
531 | return ret; | |
52365230 HS |
532 | } else { |
533 | /* disable AIE irq */ | |
0ddc5b89 | 534 | ret = rv3029_alarm_irq_enable(dev, 0); |
52365230 HS |
535 | if (ret) |
536 | return ret; | |
52365230 HS |
537 | } |
538 | ||
539 | return 0; | |
540 | } | |
541 | ||
e6e38082 | 542 | static int rv3029_set_time(struct device *dev, struct rtc_time *tm) |
52365230 HS |
543 | { |
544 | u8 regs[8]; | |
545 | int ret; | |
546 | ||
547 | /* | |
548 | * The clock has an 8 bit wide bcd-coded register (they never learn) | |
549 | * for the year. tm_year is an offset from 1900 and we are interested | |
550 | * in the 2000-2099 range, so any value less than 100 is invalid. | |
551 | */ | |
552 | if (tm->tm_year < 100) | |
553 | return -EINVAL; | |
554 | ||
abe2f551 MJ |
555 | regs[RV3029_W_SEC - RV3029_W_SEC] = bin2bcd(tm->tm_sec); |
556 | regs[RV3029_W_MINUTES - RV3029_W_SEC] = bin2bcd(tm->tm_min); | |
557 | regs[RV3029_W_HOURS - RV3029_W_SEC] = bin2bcd(tm->tm_hour); | |
558 | regs[RV3029_W_DATE - RV3029_W_SEC] = bin2bcd(tm->tm_mday); | |
559 | regs[RV3029_W_MONTHS - RV3029_W_SEC] = bin2bcd(tm->tm_mon + 1); | |
38201ca3 | 560 | regs[RV3029_W_DAYS - RV3029_W_SEC] = bin2bcd(tm->tm_wday + 1) & 0x7; |
abe2f551 | 561 | regs[RV3029_W_YEARS - RV3029_W_SEC] = bin2bcd(tm->tm_year - 100); |
52365230 | 562 | |
e6e38082 | 563 | ret = rv3029_write_regs(dev, RV3029_W_SEC, regs, |
4e7f1a60 | 564 | RV3029_WATCH_SECTION_LEN); |
52365230 HS |
565 | if (ret < 0) |
566 | return ret; | |
567 | ||
e6e38082 | 568 | ret = rv3029_get_sr(dev, regs); |
52365230 | 569 | if (ret < 0) { |
e6e38082 | 570 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
571 | return ret; |
572 | } | |
573 | /* clear PON bit */ | |
e6e38082 | 574 | ret = rv3029_set_sr(dev, (regs[0] & ~RV3029_STATUS_PON)); |
52365230 | 575 | if (ret < 0) { |
e6e38082 | 576 | dev_err(dev, "%s: reading SR failed\n", __func__); |
52365230 HS |
577 | return ret; |
578 | } | |
579 | ||
580 | return 0; | |
581 | } | |
abe2f551 | 582 | |
e27e2160 MB |
583 | static const struct rv3029_trickle_tab_elem { |
584 | u32 r; /* resistance in ohms */ | |
585 | u8 conf; /* trickle config bits */ | |
586 | } rv3029_trickle_tab[] = { | |
587 | { | |
588 | .r = 1076, | |
589 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
590 | RV3029_TRICKLE_20K | RV3029_TRICKLE_80K, | |
591 | }, { | |
592 | .r = 1091, | |
593 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
594 | RV3029_TRICKLE_20K, | |
595 | }, { | |
596 | .r = 1137, | |
597 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
598 | RV3029_TRICKLE_80K, | |
599 | }, { | |
600 | .r = 1154, | |
601 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K, | |
602 | }, { | |
603 | .r = 1371, | |
604 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K | | |
605 | RV3029_TRICKLE_80K, | |
606 | }, { | |
607 | .r = 1395, | |
608 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K, | |
609 | }, { | |
610 | .r = 1472, | |
611 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_80K, | |
612 | }, { | |
613 | .r = 1500, | |
614 | .conf = RV3029_TRICKLE_1K, | |
615 | }, { | |
616 | .r = 3810, | |
617 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K | | |
618 | RV3029_TRICKLE_80K, | |
619 | }, { | |
620 | .r = 4000, | |
621 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K, | |
622 | }, { | |
623 | .r = 4706, | |
624 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_80K, | |
625 | }, { | |
626 | .r = 5000, | |
627 | .conf = RV3029_TRICKLE_5K, | |
628 | }, { | |
629 | .r = 16000, | |
630 | .conf = RV3029_TRICKLE_20K | RV3029_TRICKLE_80K, | |
631 | }, { | |
632 | .r = 20000, | |
633 | .conf = RV3029_TRICKLE_20K, | |
634 | }, { | |
635 | .r = 80000, | |
636 | .conf = RV3029_TRICKLE_80K, | |
637 | }, | |
638 | }; | |
639 | ||
e6e38082 | 640 | static void rv3029_trickle_config(struct device *dev) |
e27e2160 | 641 | { |
e6e38082 | 642 | struct device_node *of_node = dev->of_node; |
e27e2160 MB |
643 | const struct rv3029_trickle_tab_elem *elem; |
644 | int i, err; | |
645 | u32 ohms; | |
39387dc2 | 646 | u8 trickle_set_bits; |
e27e2160 MB |
647 | |
648 | if (!of_node) | |
649 | return; | |
650 | ||
651 | /* Configure the trickle charger. */ | |
e27e2160 MB |
652 | err = of_property_read_u32(of_node, "trickle-resistor-ohms", &ohms); |
653 | if (err) { | |
654 | /* Disable trickle charger. */ | |
39387dc2 | 655 | trickle_set_bits = 0; |
e27e2160 MB |
656 | } else { |
657 | /* Enable trickle charger. */ | |
658 | for (i = 0; i < ARRAY_SIZE(rv3029_trickle_tab); i++) { | |
659 | elem = &rv3029_trickle_tab[i]; | |
660 | if (elem->r >= ohms) | |
661 | break; | |
662 | } | |
39387dc2 | 663 | trickle_set_bits = elem->conf; |
e6e38082 | 664 | dev_info(dev, |
e27e2160 MB |
665 | "Trickle charger enabled at %d ohms resistance.\n", |
666 | elem->r); | |
667 | } | |
e6e38082 | 668 | err = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL, |
39387dc2 MB |
669 | RV3029_TRICKLE_MASK, |
670 | trickle_set_bits); | |
abe2f551 | 671 | if (err < 0) |
e6e38082 | 672 | dev_err(dev, "Failed to update trickle charger config\n"); |
e27e2160 MB |
673 | } |
674 | ||
a696b31e MB |
675 | #ifdef CONFIG_RTC_DRV_RV3029_HWMON |
676 | ||
e6e38082 | 677 | static int rv3029_read_temp(struct device *dev, int *temp_mC) |
a696b31e MB |
678 | { |
679 | int ret; | |
680 | u8 temp; | |
681 | ||
e6e38082 | 682 | ret = rv3029_read_regs(dev, RV3029_TEMP_PAGE, &temp, 1); |
a696b31e MB |
683 | if (ret < 0) |
684 | return ret; | |
685 | ||
686 | *temp_mC = ((int)temp - 60) * 1000; | |
687 | ||
688 | return 0; | |
689 | } | |
690 | ||
691 | static ssize_t rv3029_hwmon_show_temp(struct device *dev, | |
692 | struct device_attribute *attr, | |
693 | char *buf) | |
694 | { | |
a696b31e MB |
695 | int ret, temp_mC; |
696 | ||
e6e38082 | 697 | ret = rv3029_read_temp(dev, &temp_mC); |
a696b31e MB |
698 | if (ret < 0) |
699 | return ret; | |
700 | ||
701 | return sprintf(buf, "%d\n", temp_mC); | |
702 | } | |
703 | ||
704 | static ssize_t rv3029_hwmon_set_update_interval(struct device *dev, | |
705 | struct device_attribute *attr, | |
706 | const char *buf, | |
707 | size_t count) | |
708 | { | |
a696b31e MB |
709 | unsigned long interval_ms; |
710 | int ret; | |
711 | u8 th_set_bits = 0; | |
712 | ||
713 | ret = kstrtoul(buf, 10, &interval_ms); | |
714 | if (ret < 0) | |
715 | return ret; | |
716 | ||
717 | if (interval_ms != 0) { | |
718 | th_set_bits |= RV3029_EECTRL_THE; | |
719 | if (interval_ms >= 16000) | |
720 | th_set_bits |= RV3029_EECTRL_THP; | |
721 | } | |
e6e38082 | 722 | ret = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL, |
a696b31e MB |
723 | RV3029_EECTRL_THE | RV3029_EECTRL_THP, |
724 | th_set_bits); | |
725 | if (ret < 0) | |
726 | return ret; | |
727 | ||
728 | return count; | |
729 | } | |
730 | ||
731 | static ssize_t rv3029_hwmon_show_update_interval(struct device *dev, | |
732 | struct device_attribute *attr, | |
733 | char *buf) | |
734 | { | |
a696b31e MB |
735 | int ret, interval_ms; |
736 | u8 eectrl; | |
737 | ||
e6e38082 | 738 | ret = rv3029_eeprom_read(dev, RV3029_CONTROL_E2P_EECTRL, |
a696b31e MB |
739 | &eectrl, 1); |
740 | if (ret < 0) | |
741 | return ret; | |
742 | ||
743 | if (eectrl & RV3029_EECTRL_THE) { | |
744 | if (eectrl & RV3029_EECTRL_THP) | |
745 | interval_ms = 16000; | |
746 | else | |
747 | interval_ms = 1000; | |
748 | } else { | |
749 | interval_ms = 0; | |
750 | } | |
751 | ||
752 | return sprintf(buf, "%d\n", interval_ms); | |
753 | } | |
754 | ||
755 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, rv3029_hwmon_show_temp, | |
756 | NULL, 0); | |
757 | static SENSOR_DEVICE_ATTR(update_interval, S_IWUSR | S_IRUGO, | |
758 | rv3029_hwmon_show_update_interval, | |
759 | rv3029_hwmon_set_update_interval, 0); | |
760 | ||
761 | static struct attribute *rv3029_hwmon_attrs[] = { | |
762 | &sensor_dev_attr_temp1_input.dev_attr.attr, | |
763 | &sensor_dev_attr_update_interval.dev_attr.attr, | |
764 | NULL, | |
765 | }; | |
766 | ATTRIBUTE_GROUPS(rv3029_hwmon); | |
767 | ||
e6e38082 | 768 | static void rv3029_hwmon_register(struct device *dev, const char *name) |
a696b31e | 769 | { |
e6e38082 | 770 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
a696b31e MB |
771 | struct device *hwmon_dev; |
772 | ||
e6e38082 MJ |
773 | hwmon_dev = devm_hwmon_device_register_with_groups(dev, name, rv3029, |
774 | rv3029_hwmon_groups); | |
a696b31e | 775 | if (IS_ERR(hwmon_dev)) { |
e6e38082 | 776 | dev_warn(dev, "unable to register hwmon device %ld\n", |
4e7f1a60 | 777 | PTR_ERR(hwmon_dev)); |
a696b31e MB |
778 | } |
779 | } | |
780 | ||
781 | #else /* CONFIG_RTC_DRV_RV3029_HWMON */ | |
782 | ||
e6e38082 | 783 | static void rv3029_hwmon_register(struct device *dev, const char *name) |
a696b31e MB |
784 | { |
785 | } | |
786 | ||
787 | #endif /* CONFIG_RTC_DRV_RV3029_HWMON */ | |
788 | ||
0ddc5b89 | 789 | static struct rtc_class_ops rv3029_rtc_ops = { |
e6e38082 MJ |
790 | .read_time = rv3029_read_time, |
791 | .set_time = rv3029_set_time, | |
52365230 HS |
792 | }; |
793 | ||
e6e38082 MJ |
794 | static int rv3029_probe(struct device *dev, struct regmap *regmap, int irq, |
795 | const char *name) | |
52365230 | 796 | { |
e6e38082 | 797 | struct rv3029_data *rv3029; |
52365230 HS |
798 | int rc = 0; |
799 | u8 buf[1]; | |
800 | ||
e6e38082 MJ |
801 | rv3029 = devm_kzalloc(dev, sizeof(*rv3029), GFP_KERNEL); |
802 | if (!rv3029) | |
803 | return -ENOMEM; | |
804 | ||
805 | rv3029->regmap = regmap; | |
806 | rv3029->irq = irq; | |
807 | rv3029->dev = dev; | |
808 | dev_set_drvdata(dev, rv3029); | |
52365230 | 809 | |
e6e38082 | 810 | rc = rv3029_get_sr(dev, buf); |
67ab2440 | 811 | if (rc < 0) { |
e6e38082 | 812 | dev_err(dev, "reading status failed\n"); |
67ab2440 GH |
813 | return rc; |
814 | } | |
815 | ||
e6e38082 MJ |
816 | rv3029_trickle_config(dev); |
817 | rv3029_hwmon_register(dev, name); | |
818 | ||
819 | rv3029->rtc = devm_rtc_device_register(dev, name, &rv3029_rtc_ops, | |
820 | THIS_MODULE); | |
0ddc5b89 MJ |
821 | if (IS_ERR(rv3029->rtc)) { |
822 | dev_err(dev, "unable to register the class device\n"); | |
823 | return PTR_ERR(rv3029->rtc); | |
824 | } | |
e27e2160 | 825 | |
0ddc5b89 MJ |
826 | if (rv3029->irq > 0) { |
827 | rc = devm_request_threaded_irq(dev, rv3029->irq, | |
828 | NULL, rv3029_handle_irq, | |
829 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
830 | "rv3029", dev); | |
831 | if (rc) { | |
832 | dev_warn(dev, "unable to request IRQ, alarms disabled\n"); | |
833 | rv3029->irq = 0; | |
834 | } else { | |
835 | rv3029_rtc_ops.read_alarm = rv3029_read_alarm; | |
836 | rv3029_rtc_ops.set_alarm = rv3029_set_alarm; | |
837 | rv3029_rtc_ops.alarm_irq_enable = rv3029_alarm_irq_enable; | |
838 | } | |
839 | } | |
840 | ||
841 | return 0; | |
e6e38082 | 842 | } |
52365230 | 843 | |
c2a1c145 MJ |
844 | #if IS_ENABLED(CONFIG_I2C) |
845 | ||
e6e38082 MJ |
846 | static int rv3029_i2c_probe(struct i2c_client *client, |
847 | const struct i2c_device_id *id) | |
848 | { | |
849 | struct regmap *regmap; | |
850 | static const struct regmap_config config = { | |
851 | .reg_bits = 8, | |
852 | .val_bits = 8, | |
853 | }; | |
854 | ||
855 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | | |
856 | I2C_FUNC_SMBUS_BYTE)) { | |
857 | dev_err(&client->dev, "Adapter does not support SMBUS_I2C_BLOCK or SMBUS_I2C_BYTE\n"); | |
858 | return -ENODEV; | |
859 | } | |
52365230 | 860 | |
e6e38082 MJ |
861 | regmap = devm_regmap_init_i2c(client, &config); |
862 | if (IS_ERR(regmap)) { | |
863 | dev_err(&client->dev, "%s: regmap allocation failed: %ld\n", | |
864 | __func__, PTR_ERR(regmap)); | |
865 | return PTR_ERR(regmap); | |
866 | } | |
52365230 | 867 | |
e6e38082 | 868 | return rv3029_probe(&client->dev, regmap, client->irq, client->name); |
52365230 HS |
869 | } |
870 | ||
814db2bc AB |
871 | static struct i2c_device_id rv3029_id[] = { |
872 | { "rv3029", 0 }, | |
873 | { "rv3029c2", 0 }, | |
874 | { } | |
875 | }; | |
876 | MODULE_DEVICE_TABLE(i2c, rv3029_id); | |
877 | ||
e696a1dd JMC |
878 | static const struct of_device_id rv3029_of_match[] = { |
879 | { .compatible = "rv3029" }, | |
880 | { .compatible = "rv3029c2" }, | |
881 | { .compatible = "mc,rv3029c2" }, | |
882 | { } | |
883 | }; | |
884 | MODULE_DEVICE_TABLE(of, rv3029_of_match); | |
885 | ||
aba39d27 | 886 | static struct i2c_driver rv3029_driver = { |
52365230 HS |
887 | .driver = { |
888 | .name = "rtc-rv3029c2", | |
e696a1dd | 889 | .of_match_table = of_match_ptr(rv3029_of_match), |
52365230 | 890 | }, |
e6e38082 | 891 | .probe = rv3029_i2c_probe, |
aba39d27 | 892 | .id_table = rv3029_id, |
52365230 HS |
893 | }; |
894 | ||
c2a1c145 MJ |
895 | static int rv3029_register_driver(void) |
896 | { | |
897 | return i2c_add_driver(&rv3029_driver); | |
898 | } | |
899 | ||
900 | static void rv3029_unregister_driver(void) | |
901 | { | |
902 | i2c_del_driver(&rv3029_driver); | |
903 | } | |
904 | ||
905 | #else | |
906 | ||
907 | static int rv3029_register_driver(void) | |
908 | { | |
909 | return 0; | |
910 | } | |
911 | ||
912 | static void rv3029_unregister_driver(void) | |
913 | { | |
914 | } | |
915 | ||
916 | #endif | |
917 | ||
918 | #if IS_ENABLED(CONFIG_SPI_MASTER) | |
919 | ||
920 | static int rv3049_probe(struct spi_device *spi) | |
921 | { | |
922 | static const struct regmap_config config = { | |
923 | .reg_bits = 8, | |
924 | .val_bits = 8, | |
925 | }; | |
926 | struct regmap *regmap; | |
927 | ||
928 | regmap = devm_regmap_init_spi(spi, &config); | |
929 | if (IS_ERR(regmap)) { | |
930 | dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n", | |
931 | __func__, PTR_ERR(regmap)); | |
932 | return PTR_ERR(regmap); | |
933 | } | |
934 | ||
935 | return rv3029_probe(&spi->dev, regmap, spi->irq, "rv3049"); | |
936 | } | |
937 | ||
938 | static struct spi_driver rv3049_driver = { | |
939 | .driver = { | |
940 | .name = "rv3049", | |
941 | }, | |
942 | .probe = rv3049_probe, | |
943 | }; | |
944 | ||
945 | static int rv3049_register_driver(void) | |
946 | { | |
947 | return spi_register_driver(&rv3049_driver); | |
948 | } | |
949 | ||
950 | static void rv3049_unregister_driver(void) | |
951 | { | |
952 | spi_unregister_driver(&rv3049_driver); | |
953 | } | |
954 | ||
955 | #else | |
956 | ||
957 | static int rv3049_register_driver(void) | |
958 | { | |
959 | return 0; | |
960 | } | |
961 | ||
962 | static void rv3049_unregister_driver(void) | |
963 | { | |
964 | } | |
965 | ||
966 | #endif | |
967 | ||
968 | static int __init rv30x9_init(void) | |
969 | { | |
970 | int ret; | |
971 | ||
972 | ret = rv3029_register_driver(); | |
973 | if (ret) { | |
974 | pr_err("Failed to register rv3029 driver: %d\n", ret); | |
975 | return ret; | |
976 | } | |
977 | ||
978 | ret = rv3049_register_driver(); | |
979 | if (ret) { | |
980 | pr_err("Failed to register rv3049 driver: %d\n", ret); | |
981 | rv3029_unregister_driver(); | |
982 | } | |
983 | ||
984 | return ret; | |
985 | } | |
986 | module_init(rv30x9_init) | |
987 | ||
988 | static void __exit rv30x9_exit(void) | |
989 | { | |
990 | rv3049_unregister_driver(); | |
991 | rv3029_unregister_driver(); | |
992 | } | |
993 | module_exit(rv30x9_exit) | |
52365230 HS |
994 | |
995 | MODULE_AUTHOR("Gregory Hermant <gregory.hermant@calao-systems.com>"); | |
2dca3d9e | 996 | MODULE_AUTHOR("Michael Buesch <m@bues.ch>"); |
c2a1c145 | 997 | MODULE_DESCRIPTION("Micro Crystal RV3029/RV3049 RTC driver"); |
52365230 | 998 | MODULE_LICENSE("GPL"); |
c2a1c145 | 999 | MODULE_ALIAS("spi:rv3049"); |