Commit | Line | Data |
---|---|---|
d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
52365230 | 2 | /* |
c2a1c145 | 3 | * Micro Crystal RV-3029 / RV-3049 rtc class driver |
52365230 HS |
4 | * |
5 | * Author: Gregory Hermant <gregory.hermant@calao-systems.com> | |
2dca3d9e | 6 | * Michael Buesch <m@bues.ch> |
52365230 HS |
7 | * |
8 | * based on previously existing rtc class drivers | |
52365230 HS |
9 | */ |
10 | ||
11 | #include <linux/module.h> | |
12 | #include <linux/i2c.h> | |
c2a1c145 | 13 | #include <linux/spi/spi.h> |
52365230 HS |
14 | #include <linux/bcd.h> |
15 | #include <linux/rtc.h> | |
a7f6e287 MB |
16 | #include <linux/delay.h> |
17 | #include <linux/of.h> | |
a696b31e MB |
18 | #include <linux/hwmon.h> |
19 | #include <linux/hwmon-sysfs.h> | |
e6e38082 | 20 | #include <linux/regmap.h> |
52365230 HS |
21 | |
22 | /* Register map */ | |
23 | /* control section */ | |
aba39d27 | 24 | #define RV3029_ONOFF_CTRL 0x00 |
7697de35 MB |
25 | #define RV3029_ONOFF_CTRL_WE BIT(0) |
26 | #define RV3029_ONOFF_CTRL_TE BIT(1) | |
27 | #define RV3029_ONOFF_CTRL_TAR BIT(2) | |
28 | #define RV3029_ONOFF_CTRL_EERE BIT(3) | |
29 | #define RV3029_ONOFF_CTRL_SRON BIT(4) | |
30 | #define RV3029_ONOFF_CTRL_TD0 BIT(5) | |
31 | #define RV3029_ONOFF_CTRL_TD1 BIT(6) | |
32 | #define RV3029_ONOFF_CTRL_CLKINT BIT(7) | |
aba39d27 | 33 | #define RV3029_IRQ_CTRL 0x01 |
7697de35 MB |
34 | #define RV3029_IRQ_CTRL_AIE BIT(0) |
35 | #define RV3029_IRQ_CTRL_TIE BIT(1) | |
36 | #define RV3029_IRQ_CTRL_V1IE BIT(2) | |
37 | #define RV3029_IRQ_CTRL_V2IE BIT(3) | |
38 | #define RV3029_IRQ_CTRL_SRIE BIT(4) | |
aba39d27 | 39 | #define RV3029_IRQ_FLAGS 0x02 |
7697de35 MB |
40 | #define RV3029_IRQ_FLAGS_AF BIT(0) |
41 | #define RV3029_IRQ_FLAGS_TF BIT(1) | |
42 | #define RV3029_IRQ_FLAGS_V1IF BIT(2) | |
43 | #define RV3029_IRQ_FLAGS_V2IF BIT(3) | |
44 | #define RV3029_IRQ_FLAGS_SRF BIT(4) | |
aba39d27 | 45 | #define RV3029_STATUS 0x03 |
7697de35 MB |
46 | #define RV3029_STATUS_VLOW1 BIT(2) |
47 | #define RV3029_STATUS_VLOW2 BIT(3) | |
48 | #define RV3029_STATUS_SR BIT(4) | |
49 | #define RV3029_STATUS_PON BIT(5) | |
50 | #define RV3029_STATUS_EEBUSY BIT(7) | |
aba39d27 | 51 | #define RV3029_RST_CTRL 0x04 |
7697de35 | 52 | #define RV3029_RST_CTRL_SYSR BIT(4) |
aba39d27 | 53 | #define RV3029_CONTROL_SECTION_LEN 0x05 |
52365230 HS |
54 | |
55 | /* watch section */ | |
aba39d27 MB |
56 | #define RV3029_W_SEC 0x08 |
57 | #define RV3029_W_MINUTES 0x09 | |
58 | #define RV3029_W_HOURS 0x0A | |
7697de35 MB |
59 | #define RV3029_REG_HR_12_24 BIT(6) /* 24h/12h mode */ |
60 | #define RV3029_REG_HR_PM BIT(5) /* PM/AM bit in 12h mode */ | |
aba39d27 MB |
61 | #define RV3029_W_DATE 0x0B |
62 | #define RV3029_W_DAYS 0x0C | |
63 | #define RV3029_W_MONTHS 0x0D | |
64 | #define RV3029_W_YEARS 0x0E | |
65 | #define RV3029_WATCH_SECTION_LEN 0x07 | |
52365230 HS |
66 | |
67 | /* alarm section */ | |
aba39d27 MB |
68 | #define RV3029_A_SC 0x10 |
69 | #define RV3029_A_MN 0x11 | |
70 | #define RV3029_A_HR 0x12 | |
71 | #define RV3029_A_DT 0x13 | |
72 | #define RV3029_A_DW 0x14 | |
73 | #define RV3029_A_MO 0x15 | |
74 | #define RV3029_A_YR 0x16 | |
dc492e86 | 75 | #define RV3029_A_AE_X BIT(7) |
aba39d27 | 76 | #define RV3029_ALARM_SECTION_LEN 0x07 |
52365230 HS |
77 | |
78 | /* timer section */ | |
aba39d27 MB |
79 | #define RV3029_TIMER_LOW 0x18 |
80 | #define RV3029_TIMER_HIGH 0x19 | |
52365230 HS |
81 | |
82 | /* temperature section */ | |
aba39d27 | 83 | #define RV3029_TEMP_PAGE 0x20 |
52365230 HS |
84 | |
85 | /* eeprom data section */ | |
aba39d27 MB |
86 | #define RV3029_E2P_EEDATA1 0x28 |
87 | #define RV3029_E2P_EEDATA2 0x29 | |
7697de35 | 88 | #define RV3029_E2PDATA_SECTION_LEN 0x02 |
52365230 HS |
89 | |
90 | /* eeprom control section */ | |
aba39d27 | 91 | #define RV3029_CONTROL_E2P_EECTRL 0x30 |
7697de35 MB |
92 | #define RV3029_EECTRL_THP BIT(0) /* temp scan interval */ |
93 | #define RV3029_EECTRL_THE BIT(1) /* thermometer enable */ | |
94 | #define RV3029_EECTRL_FD0 BIT(2) /* CLKOUT */ | |
95 | #define RV3029_EECTRL_FD1 BIT(3) /* CLKOUT */ | |
96 | #define RV3029_TRICKLE_1K BIT(4) /* 1.5K resistance */ | |
97 | #define RV3029_TRICKLE_5K BIT(5) /* 5K resistance */ | |
98 | #define RV3029_TRICKLE_20K BIT(6) /* 20K resistance */ | |
99 | #define RV3029_TRICKLE_80K BIT(7) /* 80K resistance */ | |
100 | #define RV3029_TRICKLE_MASK (RV3029_TRICKLE_1K |\ | |
101 | RV3029_TRICKLE_5K |\ | |
102 | RV3029_TRICKLE_20K |\ | |
103 | RV3029_TRICKLE_80K) | |
104 | #define RV3029_TRICKLE_SHIFT 4 | |
105 | #define RV3029_CONTROL_E2P_XOFFS 0x31 /* XTAL offset */ | |
106 | #define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */ | |
107 | #define RV3029_CONTROL_E2P_QCOEF 0x32 /* XTAL temp drift coef */ | |
108 | #define RV3029_CONTROL_E2P_TURNOVER 0x33 /* XTAL turnover temp (in *C) */ | |
109 | #define RV3029_CONTROL_E2P_TOV_MASK 0x3F /* XTAL turnover temp mask */ | |
52365230 HS |
110 | |
111 | /* user ram section */ | |
ec923fcc AB |
112 | #define RV3029_RAM_PAGE 0x38 |
113 | #define RV3029_RAM_SECTION_LEN 8 | |
52365230 | 114 | |
e6e38082 MJ |
115 | struct rv3029_data { |
116 | struct device *dev; | |
117 | struct rtc_device *rtc; | |
118 | struct regmap *regmap; | |
119 | int irq; | |
120 | }; | |
121 | ||
bb72dbba | 122 | static int rv3029_eeprom_busywait(struct rv3029_data *rv3029) |
a7f6e287 | 123 | { |
bb72dbba | 124 | unsigned int sr; |
a7f6e287 | 125 | int i, ret; |
a7f6e287 MB |
126 | |
127 | for (i = 100; i > 0; i--) { | |
bb72dbba | 128 | ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); |
a7f6e287 MB |
129 | if (ret < 0) |
130 | break; | |
131 | if (!(sr & RV3029_STATUS_EEBUSY)) | |
132 | break; | |
133 | usleep_range(1000, 10000); | |
134 | } | |
135 | if (i <= 0) { | |
bb72dbba | 136 | dev_err(rv3029->dev, "EEPROM busy wait timeout.\n"); |
a7f6e287 MB |
137 | return -ETIMEDOUT; |
138 | } | |
139 | ||
140 | return ret; | |
141 | } | |
142 | ||
7518dd9a | 143 | static int rv3029_eeprom_exit(struct rv3029_data *rv3029) |
a7f6e287 MB |
144 | { |
145 | /* Re-enable eeprom refresh */ | |
609e97fe | 146 | return regmap_update_bits(rv3029->regmap, RV3029_ONOFF_CTRL, |
4e7f1a60 MJ |
147 | RV3029_ONOFF_CTRL_EERE, |
148 | RV3029_ONOFF_CTRL_EERE); | |
a7f6e287 MB |
149 | } |
150 | ||
7518dd9a | 151 | static int rv3029_eeprom_enter(struct rv3029_data *rv3029) |
a7f6e287 | 152 | { |
bb72dbba | 153 | unsigned int sr; |
a7f6e287 | 154 | int ret; |
a7f6e287 MB |
155 | |
156 | /* Check whether we are in the allowed voltage range. */ | |
bb72dbba | 157 | ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); |
a7f6e287 MB |
158 | if (ret < 0) |
159 | return ret; | |
cff2e4d2 AB |
160 | if (sr & RV3029_STATUS_VLOW2) |
161 | return -ENODEV; | |
162 | if (sr & RV3029_STATUS_VLOW1) { | |
a7f6e287 MB |
163 | /* We clear the bits and retry once just in case |
164 | * we had a brown out in early startup. | |
165 | */ | |
54c5970d | 166 | ret = regmap_update_bits(rv3029->regmap, RV3029_STATUS, |
cff2e4d2 | 167 | RV3029_STATUS_VLOW1, 0); |
a7f6e287 MB |
168 | if (ret < 0) |
169 | return ret; | |
170 | usleep_range(1000, 10000); | |
bb72dbba | 171 | ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); |
a7f6e287 MB |
172 | if (ret < 0) |
173 | return ret; | |
cff2e4d2 | 174 | if (sr & RV3029_STATUS_VLOW1) { |
7518dd9a | 175 | dev_err(rv3029->dev, |
a7f6e287 MB |
176 | "Supply voltage is too low to safely access the EEPROM.\n"); |
177 | return -ENODEV; | |
178 | } | |
179 | } | |
180 | ||
181 | /* Disable eeprom refresh. */ | |
609e97fe AB |
182 | ret = regmap_update_bits(rv3029->regmap, RV3029_ONOFF_CTRL, |
183 | RV3029_ONOFF_CTRL_EERE, 0); | |
a7f6e287 MB |
184 | if (ret < 0) |
185 | return ret; | |
186 | ||
187 | /* Wait for any previous eeprom accesses to finish. */ | |
bb72dbba | 188 | ret = rv3029_eeprom_busywait(rv3029); |
a7f6e287 | 189 | if (ret < 0) |
7518dd9a | 190 | rv3029_eeprom_exit(rv3029); |
a7f6e287 MB |
191 | |
192 | return ret; | |
193 | } | |
194 | ||
7518dd9a | 195 | static int rv3029_eeprom_read(struct rv3029_data *rv3029, u8 reg, |
a7f6e287 MB |
196 | u8 buf[], size_t len) |
197 | { | |
198 | int ret, err; | |
199 | ||
7518dd9a | 200 | err = rv3029_eeprom_enter(rv3029); |
a7f6e287 MB |
201 | if (err < 0) |
202 | return err; | |
203 | ||
7518dd9a | 204 | ret = regmap_bulk_read(rv3029->regmap, reg, buf, len); |
a7f6e287 | 205 | |
7518dd9a | 206 | err = rv3029_eeprom_exit(rv3029); |
a7f6e287 MB |
207 | if (err < 0) |
208 | return err; | |
209 | ||
210 | return ret; | |
211 | } | |
212 | ||
7518dd9a | 213 | static int rv3029_eeprom_write(struct rv3029_data *rv3029, u8 reg, |
a7f6e287 MB |
214 | u8 const buf[], size_t len) |
215 | { | |
7518dd9a | 216 | unsigned int tmp; |
a6f26606 | 217 | int ret, err; |
a7f6e287 | 218 | size_t i; |
a7f6e287 | 219 | |
7518dd9a | 220 | err = rv3029_eeprom_enter(rv3029); |
a6f26606 DC |
221 | if (err < 0) |
222 | return err; | |
a7f6e287 MB |
223 | |
224 | for (i = 0; i < len; i++, reg++) { | |
7518dd9a | 225 | ret = regmap_read(rv3029->regmap, reg, &tmp); |
a7f6e287 MB |
226 | if (ret < 0) |
227 | break; | |
228 | if (tmp != buf[i]) { | |
7518dd9a AB |
229 | tmp = buf[i]; |
230 | ret = regmap_write(rv3029->regmap, reg, tmp); | |
a7f6e287 MB |
231 | if (ret < 0) |
232 | break; | |
233 | } | |
bb72dbba | 234 | ret = rv3029_eeprom_busywait(rv3029); |
a7f6e287 MB |
235 | if (ret < 0) |
236 | break; | |
237 | } | |
238 | ||
7518dd9a | 239 | err = rv3029_eeprom_exit(rv3029); |
a6f26606 DC |
240 | if (err < 0) |
241 | return err; | |
a7f6e287 | 242 | |
a6f26606 | 243 | return ret; |
a7f6e287 MB |
244 | } |
245 | ||
7518dd9a | 246 | static int rv3029_eeprom_update_bits(struct rv3029_data *rv3029, |
39387dc2 MB |
247 | u8 reg, u8 mask, u8 set) |
248 | { | |
249 | u8 buf; | |
250 | int ret; | |
251 | ||
7518dd9a | 252 | ret = rv3029_eeprom_read(rv3029, reg, &buf, 1); |
39387dc2 MB |
253 | if (ret < 0) |
254 | return ret; | |
255 | buf &= ~mask; | |
256 | buf |= set & mask; | |
7518dd9a | 257 | ret = rv3029_eeprom_write(rv3029, reg, &buf, 1); |
39387dc2 MB |
258 | if (ret < 0) |
259 | return ret; | |
260 | ||
261 | return 0; | |
262 | } | |
263 | ||
0ddc5b89 MJ |
264 | static irqreturn_t rv3029_handle_irq(int irq, void *dev_id) |
265 | { | |
266 | struct device *dev = dev_id; | |
267 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); | |
268 | struct mutex *lock = &rv3029->rtc->ops_lock; | |
7518dd9a | 269 | unsigned int flags, controls; |
0ddc5b89 | 270 | unsigned long events = 0; |
0ddc5b89 MJ |
271 | int ret; |
272 | ||
273 | mutex_lock(lock); | |
274 | ||
7518dd9a | 275 | ret = regmap_read(rv3029->regmap, RV3029_IRQ_CTRL, &controls); |
0ddc5b89 MJ |
276 | if (ret) { |
277 | dev_warn(dev, "Read IRQ Control Register error %d\n", ret); | |
278 | mutex_unlock(lock); | |
279 | return IRQ_NONE; | |
280 | } | |
281 | ||
7518dd9a | 282 | ret = regmap_read(rv3029->regmap, RV3029_IRQ_FLAGS, &flags); |
0ddc5b89 MJ |
283 | if (ret) { |
284 | dev_warn(dev, "Read IRQ Flags Register error %d\n", ret); | |
285 | mutex_unlock(lock); | |
286 | return IRQ_NONE; | |
287 | } | |
288 | ||
289 | if (flags & RV3029_IRQ_FLAGS_AF) { | |
290 | flags &= ~RV3029_IRQ_FLAGS_AF; | |
291 | controls &= ~RV3029_IRQ_CTRL_AIE; | |
292 | events |= RTC_AF; | |
293 | } | |
294 | ||
295 | if (events) { | |
296 | rtc_update_irq(rv3029->rtc, 1, events); | |
7518dd9a AB |
297 | regmap_write(rv3029->regmap, RV3029_IRQ_FLAGS, flags); |
298 | regmap_write(rv3029->regmap, RV3029_IRQ_CTRL, controls); | |
0ddc5b89 MJ |
299 | } |
300 | mutex_unlock(lock); | |
301 | ||
302 | return IRQ_HANDLED; | |
303 | } | |
304 | ||
e6e38082 | 305 | static int rv3029_read_time(struct device *dev, struct rtc_time *tm) |
52365230 | 306 | { |
7518dd9a | 307 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
cff2e4d2 | 308 | unsigned int sr; |
52365230 | 309 | int ret; |
aba39d27 | 310 | u8 regs[RV3029_WATCH_SECTION_LEN] = { 0, }; |
52365230 | 311 | |
cff2e4d2 AB |
312 | ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); |
313 | if (ret < 0) | |
314 | return ret; | |
315 | ||
316 | if (sr & (RV3029_STATUS_VLOW2 | RV3029_STATUS_PON)) | |
317 | return -EINVAL; | |
318 | ||
7518dd9a | 319 | ret = regmap_bulk_read(rv3029->regmap, RV3029_W_SEC, regs, |
4e7f1a60 | 320 | RV3029_WATCH_SECTION_LEN); |
bd0d9379 | 321 | if (ret < 0) |
52365230 | 322 | return ret; |
52365230 | 323 | |
abe2f551 MJ |
324 | tm->tm_sec = bcd2bin(regs[RV3029_W_SEC - RV3029_W_SEC]); |
325 | tm->tm_min = bcd2bin(regs[RV3029_W_MINUTES - RV3029_W_SEC]); | |
52365230 HS |
326 | |
327 | /* HR field has a more complex interpretation */ | |
328 | { | |
abe2f551 | 329 | const u8 _hr = regs[RV3029_W_HOURS - RV3029_W_SEC]; |
aba39d27 MB |
330 | |
331 | if (_hr & RV3029_REG_HR_12_24) { | |
52365230 HS |
332 | /* 12h format */ |
333 | tm->tm_hour = bcd2bin(_hr & 0x1f); | |
aba39d27 | 334 | if (_hr & RV3029_REG_HR_PM) /* PM flag set */ |
52365230 HS |
335 | tm->tm_hour += 12; |
336 | } else /* 24h format */ | |
337 | tm->tm_hour = bcd2bin(_hr & 0x3f); | |
338 | } | |
339 | ||
abe2f551 MJ |
340 | tm->tm_mday = bcd2bin(regs[RV3029_W_DATE - RV3029_W_SEC]); |
341 | tm->tm_mon = bcd2bin(regs[RV3029_W_MONTHS - RV3029_W_SEC]) - 1; | |
342 | tm->tm_year = bcd2bin(regs[RV3029_W_YEARS - RV3029_W_SEC]) + 100; | |
343 | tm->tm_wday = bcd2bin(regs[RV3029_W_DAYS - RV3029_W_SEC]) - 1; | |
52365230 HS |
344 | |
345 | return 0; | |
346 | } | |
347 | ||
e6e38082 | 348 | static int rv3029_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
52365230 | 349 | { |
7518dd9a | 350 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 | 351 | struct rtc_time *const tm = &alarm->time; |
7518dd9a | 352 | unsigned int controls, flags; |
52365230 | 353 | int ret; |
7518dd9a | 354 | u8 regs[8]; |
52365230 | 355 | |
7518dd9a | 356 | ret = regmap_bulk_read(rv3029->regmap, RV3029_A_SC, regs, |
4e7f1a60 | 357 | RV3029_ALARM_SECTION_LEN); |
bd0d9379 | 358 | if (ret < 0) |
52365230 | 359 | return ret; |
52365230 | 360 | |
7518dd9a | 361 | ret = regmap_read(rv3029->regmap, RV3029_IRQ_CTRL, &controls); |
bd0d9379 | 362 | if (ret) |
0ddc5b89 | 363 | return ret; |
bd0d9379 | 364 | |
7518dd9a | 365 | ret = regmap_read(rv3029->regmap, RV3029_IRQ_FLAGS, &flags); |
bd0d9379 | 366 | if (ret < 0) |
0ddc5b89 | 367 | return ret; |
0ddc5b89 | 368 | |
abe2f551 MJ |
369 | tm->tm_sec = bcd2bin(regs[RV3029_A_SC - RV3029_A_SC] & 0x7f); |
370 | tm->tm_min = bcd2bin(regs[RV3029_A_MN - RV3029_A_SC] & 0x7f); | |
371 | tm->tm_hour = bcd2bin(regs[RV3029_A_HR - RV3029_A_SC] & 0x3f); | |
372 | tm->tm_mday = bcd2bin(regs[RV3029_A_DT - RV3029_A_SC] & 0x3f); | |
373 | tm->tm_mon = bcd2bin(regs[RV3029_A_MO - RV3029_A_SC] & 0x1f) - 1; | |
374 | tm->tm_year = bcd2bin(regs[RV3029_A_YR - RV3029_A_SC] & 0x7f) + 100; | |
375 | tm->tm_wday = bcd2bin(regs[RV3029_A_DW - RV3029_A_SC] & 0x07) - 1; | |
52365230 | 376 | |
0ddc5b89 MJ |
377 | alarm->enabled = !!(controls & RV3029_IRQ_CTRL_AIE); |
378 | alarm->pending = (flags & RV3029_IRQ_FLAGS_AF) && alarm->enabled; | |
379 | ||
52365230 HS |
380 | return 0; |
381 | } | |
382 | ||
0ddc5b89 | 383 | static int rv3029_alarm_irq_enable(struct device *dev, unsigned int enable) |
52365230 | 384 | { |
38ce8e30 | 385 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 | 386 | |
38ce8e30 AB |
387 | return regmap_update_bits(rv3029->regmap, RV3029_IRQ_CTRL, |
388 | RV3029_IRQ_CTRL_AIE, | |
389 | enable ? RV3029_IRQ_CTRL_AIE : 0); | |
52365230 HS |
390 | } |
391 | ||
e6e38082 | 392 | static int rv3029_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
52365230 | 393 | { |
7518dd9a | 394 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 HS |
395 | struct rtc_time *const tm = &alarm->time; |
396 | int ret; | |
397 | u8 regs[8]; | |
398 | ||
dc492e86 MJ |
399 | /* Activate all the alarms with AE_x bit */ |
400 | regs[RV3029_A_SC - RV3029_A_SC] = bin2bcd(tm->tm_sec) | RV3029_A_AE_X; | |
401 | regs[RV3029_A_MN - RV3029_A_SC] = bin2bcd(tm->tm_min) | RV3029_A_AE_X; | |
402 | regs[RV3029_A_HR - RV3029_A_SC] = (bin2bcd(tm->tm_hour) & 0x3f) | |
403 | | RV3029_A_AE_X; | |
404 | regs[RV3029_A_DT - RV3029_A_SC] = (bin2bcd(tm->tm_mday) & 0x3f) | |
405 | | RV3029_A_AE_X; | |
406 | regs[RV3029_A_MO - RV3029_A_SC] = (bin2bcd(tm->tm_mon + 1) & 0x1f) | |
407 | | RV3029_A_AE_X; | |
408 | regs[RV3029_A_DW - RV3029_A_SC] = (bin2bcd(tm->tm_wday + 1) & 0x7) | |
409 | | RV3029_A_AE_X; | |
410 | regs[RV3029_A_YR - RV3029_A_SC] = (bin2bcd(tm->tm_year - 100)) | |
411 | | RV3029_A_AE_X; | |
412 | ||
413 | /* Write the alarm */ | |
7518dd9a | 414 | ret = regmap_bulk_write(rv3029->regmap, RV3029_A_SC, regs, |
4e7f1a60 | 415 | RV3029_ALARM_SECTION_LEN); |
52365230 HS |
416 | if (ret < 0) |
417 | return ret; | |
418 | ||
8fd3d609 | 419 | return rv3029_alarm_irq_enable(dev, alarm->enabled); |
52365230 HS |
420 | } |
421 | ||
e6e38082 | 422 | static int rv3029_set_time(struct device *dev, struct rtc_time *tm) |
52365230 | 423 | { |
54c5970d | 424 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 HS |
425 | u8 regs[8]; |
426 | int ret; | |
427 | ||
abe2f551 MJ |
428 | regs[RV3029_W_SEC - RV3029_W_SEC] = bin2bcd(tm->tm_sec); |
429 | regs[RV3029_W_MINUTES - RV3029_W_SEC] = bin2bcd(tm->tm_min); | |
430 | regs[RV3029_W_HOURS - RV3029_W_SEC] = bin2bcd(tm->tm_hour); | |
431 | regs[RV3029_W_DATE - RV3029_W_SEC] = bin2bcd(tm->tm_mday); | |
432 | regs[RV3029_W_MONTHS - RV3029_W_SEC] = bin2bcd(tm->tm_mon + 1); | |
38201ca3 | 433 | regs[RV3029_W_DAYS - RV3029_W_SEC] = bin2bcd(tm->tm_wday + 1) & 0x7; |
abe2f551 | 434 | regs[RV3029_W_YEARS - RV3029_W_SEC] = bin2bcd(tm->tm_year - 100); |
52365230 | 435 | |
7518dd9a | 436 | ret = regmap_bulk_write(rv3029->regmap, RV3029_W_SEC, regs, |
4e7f1a60 | 437 | RV3029_WATCH_SECTION_LEN); |
52365230 HS |
438 | if (ret < 0) |
439 | return ret; | |
440 | ||
cff2e4d2 | 441 | /* clear PON and VLOW2 bits */ |
54c5970d | 442 | return regmap_update_bits(rv3029->regmap, RV3029_STATUS, |
cff2e4d2 | 443 | RV3029_STATUS_PON | RV3029_STATUS_VLOW2, 0); |
52365230 | 444 | } |
abe2f551 | 445 | |
f630f728 AB |
446 | static int rv3029_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) |
447 | { | |
448 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); | |
449 | unsigned long vl = 0; | |
450 | int sr, ret = 0; | |
451 | ||
452 | switch (cmd) { | |
453 | case RTC_VL_READ: | |
454 | ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); | |
455 | if (ret < 0) | |
456 | return ret; | |
457 | ||
458 | if (sr & RV3029_STATUS_VLOW1) | |
459 | vl = RTC_VL_ACCURACY_LOW; | |
460 | ||
461 | if (sr & (RV3029_STATUS_VLOW2 | RV3029_STATUS_PON)) | |
462 | vl |= RTC_VL_DATA_INVALID; | |
463 | ||
464 | return put_user(vl, (unsigned int __user *)arg); | |
465 | ||
466 | case RTC_VL_CLR: | |
467 | return regmap_update_bits(rv3029->regmap, RV3029_STATUS, | |
468 | RV3029_STATUS_VLOW1, 0); | |
469 | ||
470 | default: | |
471 | return -ENOIOCTLCMD; | |
472 | } | |
473 | } | |
474 | ||
ec923fcc AB |
475 | static int rv3029_nvram_write(void *priv, unsigned int offset, void *val, |
476 | size_t bytes) | |
477 | { | |
478 | return regmap_bulk_write(priv, RV3029_RAM_PAGE + offset, val, bytes); | |
479 | } | |
480 | ||
481 | static int rv3029_nvram_read(void *priv, unsigned int offset, void *val, | |
482 | size_t bytes) | |
483 | { | |
484 | return regmap_bulk_read(priv, RV3029_RAM_PAGE + offset, val, bytes); | |
485 | } | |
486 | ||
e27e2160 MB |
487 | static const struct rv3029_trickle_tab_elem { |
488 | u32 r; /* resistance in ohms */ | |
489 | u8 conf; /* trickle config bits */ | |
490 | } rv3029_trickle_tab[] = { | |
491 | { | |
492 | .r = 1076, | |
493 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
494 | RV3029_TRICKLE_20K | RV3029_TRICKLE_80K, | |
495 | }, { | |
496 | .r = 1091, | |
497 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
498 | RV3029_TRICKLE_20K, | |
499 | }, { | |
500 | .r = 1137, | |
501 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
502 | RV3029_TRICKLE_80K, | |
503 | }, { | |
504 | .r = 1154, | |
505 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K, | |
506 | }, { | |
507 | .r = 1371, | |
508 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K | | |
509 | RV3029_TRICKLE_80K, | |
510 | }, { | |
511 | .r = 1395, | |
512 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K, | |
513 | }, { | |
514 | .r = 1472, | |
515 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_80K, | |
516 | }, { | |
517 | .r = 1500, | |
518 | .conf = RV3029_TRICKLE_1K, | |
519 | }, { | |
520 | .r = 3810, | |
521 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K | | |
522 | RV3029_TRICKLE_80K, | |
523 | }, { | |
524 | .r = 4000, | |
525 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K, | |
526 | }, { | |
527 | .r = 4706, | |
528 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_80K, | |
529 | }, { | |
530 | .r = 5000, | |
531 | .conf = RV3029_TRICKLE_5K, | |
532 | }, { | |
533 | .r = 16000, | |
534 | .conf = RV3029_TRICKLE_20K | RV3029_TRICKLE_80K, | |
535 | }, { | |
536 | .r = 20000, | |
537 | .conf = RV3029_TRICKLE_20K, | |
538 | }, { | |
539 | .r = 80000, | |
540 | .conf = RV3029_TRICKLE_80K, | |
541 | }, | |
542 | }; | |
543 | ||
e6e38082 | 544 | static void rv3029_trickle_config(struct device *dev) |
e27e2160 | 545 | { |
7518dd9a | 546 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
e6e38082 | 547 | struct device_node *of_node = dev->of_node; |
e27e2160 MB |
548 | const struct rv3029_trickle_tab_elem *elem; |
549 | int i, err; | |
550 | u32 ohms; | |
39387dc2 | 551 | u8 trickle_set_bits; |
e27e2160 MB |
552 | |
553 | if (!of_node) | |
554 | return; | |
555 | ||
556 | /* Configure the trickle charger. */ | |
e27e2160 MB |
557 | err = of_property_read_u32(of_node, "trickle-resistor-ohms", &ohms); |
558 | if (err) { | |
559 | /* Disable trickle charger. */ | |
39387dc2 | 560 | trickle_set_bits = 0; |
e27e2160 MB |
561 | } else { |
562 | /* Enable trickle charger. */ | |
563 | for (i = 0; i < ARRAY_SIZE(rv3029_trickle_tab); i++) { | |
564 | elem = &rv3029_trickle_tab[i]; | |
565 | if (elem->r >= ohms) | |
566 | break; | |
567 | } | |
39387dc2 | 568 | trickle_set_bits = elem->conf; |
e6e38082 | 569 | dev_info(dev, |
e27e2160 MB |
570 | "Trickle charger enabled at %d ohms resistance.\n", |
571 | elem->r); | |
572 | } | |
7518dd9a | 573 | err = rv3029_eeprom_update_bits(rv3029, RV3029_CONTROL_E2P_EECTRL, |
39387dc2 MB |
574 | RV3029_TRICKLE_MASK, |
575 | trickle_set_bits); | |
abe2f551 | 576 | if (err < 0) |
e6e38082 | 577 | dev_err(dev, "Failed to update trickle charger config\n"); |
e27e2160 MB |
578 | } |
579 | ||
a696b31e MB |
580 | #ifdef CONFIG_RTC_DRV_RV3029_HWMON |
581 | ||
7518dd9a | 582 | static int rv3029_read_temp(struct rv3029_data *rv3029, int *temp_mC) |
a696b31e | 583 | { |
7518dd9a | 584 | unsigned int temp; |
a696b31e | 585 | int ret; |
a696b31e | 586 | |
7518dd9a | 587 | ret = regmap_read(rv3029->regmap, RV3029_TEMP_PAGE, &temp); |
a696b31e MB |
588 | if (ret < 0) |
589 | return ret; | |
590 | ||
591 | *temp_mC = ((int)temp - 60) * 1000; | |
592 | ||
593 | return 0; | |
594 | } | |
595 | ||
596 | static ssize_t rv3029_hwmon_show_temp(struct device *dev, | |
597 | struct device_attribute *attr, | |
598 | char *buf) | |
599 | { | |
7518dd9a | 600 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
a696b31e MB |
601 | int ret, temp_mC; |
602 | ||
7518dd9a | 603 | ret = rv3029_read_temp(rv3029, &temp_mC); |
a696b31e MB |
604 | if (ret < 0) |
605 | return ret; | |
606 | ||
607 | return sprintf(buf, "%d\n", temp_mC); | |
608 | } | |
609 | ||
610 | static ssize_t rv3029_hwmon_set_update_interval(struct device *dev, | |
611 | struct device_attribute *attr, | |
612 | const char *buf, | |
613 | size_t count) | |
614 | { | |
7518dd9a AB |
615 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
616 | unsigned int th_set_bits = 0; | |
a696b31e MB |
617 | unsigned long interval_ms; |
618 | int ret; | |
a696b31e MB |
619 | |
620 | ret = kstrtoul(buf, 10, &interval_ms); | |
621 | if (ret < 0) | |
622 | return ret; | |
623 | ||
624 | if (interval_ms != 0) { | |
625 | th_set_bits |= RV3029_EECTRL_THE; | |
626 | if (interval_ms >= 16000) | |
627 | th_set_bits |= RV3029_EECTRL_THP; | |
628 | } | |
7518dd9a | 629 | ret = rv3029_eeprom_update_bits(rv3029, RV3029_CONTROL_E2P_EECTRL, |
a696b31e MB |
630 | RV3029_EECTRL_THE | RV3029_EECTRL_THP, |
631 | th_set_bits); | |
632 | if (ret < 0) | |
633 | return ret; | |
634 | ||
635 | return count; | |
636 | } | |
637 | ||
638 | static ssize_t rv3029_hwmon_show_update_interval(struct device *dev, | |
639 | struct device_attribute *attr, | |
640 | char *buf) | |
641 | { | |
7518dd9a | 642 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
a696b31e MB |
643 | int ret, interval_ms; |
644 | u8 eectrl; | |
645 | ||
7518dd9a | 646 | ret = rv3029_eeprom_read(rv3029, RV3029_CONTROL_E2P_EECTRL, |
a696b31e MB |
647 | &eectrl, 1); |
648 | if (ret < 0) | |
649 | return ret; | |
650 | ||
651 | if (eectrl & RV3029_EECTRL_THE) { | |
652 | if (eectrl & RV3029_EECTRL_THP) | |
653 | interval_ms = 16000; | |
654 | else | |
655 | interval_ms = 1000; | |
656 | } else { | |
657 | interval_ms = 0; | |
658 | } | |
659 | ||
660 | return sprintf(buf, "%d\n", interval_ms); | |
661 | } | |
662 | ||
663 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, rv3029_hwmon_show_temp, | |
664 | NULL, 0); | |
665 | static SENSOR_DEVICE_ATTR(update_interval, S_IWUSR | S_IRUGO, | |
666 | rv3029_hwmon_show_update_interval, | |
667 | rv3029_hwmon_set_update_interval, 0); | |
668 | ||
669 | static struct attribute *rv3029_hwmon_attrs[] = { | |
670 | &sensor_dev_attr_temp1_input.dev_attr.attr, | |
671 | &sensor_dev_attr_update_interval.dev_attr.attr, | |
672 | NULL, | |
673 | }; | |
674 | ATTRIBUTE_GROUPS(rv3029_hwmon); | |
675 | ||
e6e38082 | 676 | static void rv3029_hwmon_register(struct device *dev, const char *name) |
a696b31e | 677 | { |
e6e38082 | 678 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
a696b31e MB |
679 | struct device *hwmon_dev; |
680 | ||
e6e38082 MJ |
681 | hwmon_dev = devm_hwmon_device_register_with_groups(dev, name, rv3029, |
682 | rv3029_hwmon_groups); | |
a696b31e | 683 | if (IS_ERR(hwmon_dev)) { |
e6e38082 | 684 | dev_warn(dev, "unable to register hwmon device %ld\n", |
4e7f1a60 | 685 | PTR_ERR(hwmon_dev)); |
a696b31e MB |
686 | } |
687 | } | |
688 | ||
689 | #else /* CONFIG_RTC_DRV_RV3029_HWMON */ | |
690 | ||
e6e38082 | 691 | static void rv3029_hwmon_register(struct device *dev, const char *name) |
a696b31e MB |
692 | { |
693 | } | |
694 | ||
695 | #endif /* CONFIG_RTC_DRV_RV3029_HWMON */ | |
696 | ||
0ddc5b89 | 697 | static struct rtc_class_ops rv3029_rtc_ops = { |
e6e38082 MJ |
698 | .read_time = rv3029_read_time, |
699 | .set_time = rv3029_set_time, | |
f630f728 | 700 | .ioctl = rv3029_ioctl, |
52365230 HS |
701 | }; |
702 | ||
e6e38082 MJ |
703 | static int rv3029_probe(struct device *dev, struct regmap *regmap, int irq, |
704 | const char *name) | |
52365230 | 705 | { |
e6e38082 | 706 | struct rv3029_data *rv3029; |
ec923fcc AB |
707 | struct nvmem_config nvmem_cfg = { |
708 | .name = "rv3029_nvram", | |
709 | .word_size = 1, | |
710 | .stride = 1, | |
711 | .size = RV3029_RAM_SECTION_LEN, | |
712 | .type = NVMEM_TYPE_BATTERY_BACKED, | |
713 | .reg_read = rv3029_nvram_read, | |
714 | .reg_write = rv3029_nvram_write, | |
715 | }; | |
52365230 | 716 | int rc = 0; |
52365230 | 717 | |
e6e38082 MJ |
718 | rv3029 = devm_kzalloc(dev, sizeof(*rv3029), GFP_KERNEL); |
719 | if (!rv3029) | |
720 | return -ENOMEM; | |
721 | ||
722 | rv3029->regmap = regmap; | |
723 | rv3029->irq = irq; | |
724 | rv3029->dev = dev; | |
725 | dev_set_drvdata(dev, rv3029); | |
52365230 | 726 | |
e6e38082 MJ |
727 | rv3029_trickle_config(dev); |
728 | rv3029_hwmon_register(dev, name); | |
729 | ||
9346f870 AB |
730 | rv3029->rtc = devm_rtc_allocate_device(dev); |
731 | if (IS_ERR(rv3029->rtc)) | |
0ddc5b89 | 732 | return PTR_ERR(rv3029->rtc); |
e27e2160 | 733 | |
0ddc5b89 MJ |
734 | if (rv3029->irq > 0) { |
735 | rc = devm_request_threaded_irq(dev, rv3029->irq, | |
736 | NULL, rv3029_handle_irq, | |
737 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
738 | "rv3029", dev); | |
739 | if (rc) { | |
740 | dev_warn(dev, "unable to request IRQ, alarms disabled\n"); | |
741 | rv3029->irq = 0; | |
742 | } else { | |
743 | rv3029_rtc_ops.read_alarm = rv3029_read_alarm; | |
744 | rv3029_rtc_ops.set_alarm = rv3029_set_alarm; | |
745 | rv3029_rtc_ops.alarm_irq_enable = rv3029_alarm_irq_enable; | |
746 | } | |
747 | } | |
748 | ||
9346f870 | 749 | rv3029->rtc->ops = &rv3029_rtc_ops; |
cbc943eb AB |
750 | rv3029->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; |
751 | rv3029->rtc->range_max = RTC_TIMESTAMP_END_2079; | |
9346f870 | 752 | |
ec923fcc AB |
753 | rc = rtc_register_device(rv3029->rtc); |
754 | if (rc) | |
755 | return rc; | |
756 | ||
757 | nvmem_cfg.priv = rv3029->regmap; | |
758 | rtc_nvmem_register(rv3029->rtc, &nvmem_cfg); | |
759 | ||
760 | return 0; | |
e6e38082 | 761 | } |
52365230 | 762 | |
c509e434 AB |
763 | static const struct regmap_range rv3029_holes_range[] = { |
764 | regmap_reg_range(0x05, 0x07), | |
765 | regmap_reg_range(0x0f, 0x0f), | |
766 | regmap_reg_range(0x17, 0x17), | |
767 | regmap_reg_range(0x1a, 0x1f), | |
768 | regmap_reg_range(0x21, 0x27), | |
769 | regmap_reg_range(0x34, 0x37), | |
770 | }; | |
771 | ||
772 | static const struct regmap_access_table rv3029_regs = { | |
773 | .no_ranges = rv3029_holes_range, | |
774 | .n_no_ranges = ARRAY_SIZE(rv3029_holes_range), | |
775 | }; | |
776 | ||
777 | static const struct regmap_config config = { | |
778 | .reg_bits = 8, | |
779 | .val_bits = 8, | |
780 | .rd_table = &rv3029_regs, | |
781 | .wr_table = &rv3029_regs, | |
782 | .max_register = 0x3f, | |
783 | }; | |
784 | ||
c2a1c145 MJ |
785 | #if IS_ENABLED(CONFIG_I2C) |
786 | ||
e6e38082 MJ |
787 | static int rv3029_i2c_probe(struct i2c_client *client, |
788 | const struct i2c_device_id *id) | |
789 | { | |
790 | struct regmap *regmap; | |
e6e38082 MJ |
791 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | |
792 | I2C_FUNC_SMBUS_BYTE)) { | |
793 | dev_err(&client->dev, "Adapter does not support SMBUS_I2C_BLOCK or SMBUS_I2C_BYTE\n"); | |
794 | return -ENODEV; | |
795 | } | |
52365230 | 796 | |
e6e38082 | 797 | regmap = devm_regmap_init_i2c(client, &config); |
bd0d9379 | 798 | if (IS_ERR(regmap)) |
e6e38082 | 799 | return PTR_ERR(regmap); |
52365230 | 800 | |
e6e38082 | 801 | return rv3029_probe(&client->dev, regmap, client->irq, client->name); |
52365230 HS |
802 | } |
803 | ||
45a63518 | 804 | static const struct i2c_device_id rv3029_id[] = { |
814db2bc AB |
805 | { "rv3029", 0 }, |
806 | { "rv3029c2", 0 }, | |
807 | { } | |
808 | }; | |
809 | MODULE_DEVICE_TABLE(i2c, rv3029_id); | |
810 | ||
e696a1dd | 811 | static const struct of_device_id rv3029_of_match[] = { |
45b611c8 | 812 | { .compatible = "microcrystal,rv3029" }, |
e696a1dd JMC |
813 | { } |
814 | }; | |
815 | MODULE_DEVICE_TABLE(of, rv3029_of_match); | |
816 | ||
aba39d27 | 817 | static struct i2c_driver rv3029_driver = { |
52365230 | 818 | .driver = { |
9b45ef97 | 819 | .name = "rv3029", |
e696a1dd | 820 | .of_match_table = of_match_ptr(rv3029_of_match), |
52365230 | 821 | }, |
e6e38082 | 822 | .probe = rv3029_i2c_probe, |
aba39d27 | 823 | .id_table = rv3029_id, |
52365230 HS |
824 | }; |
825 | ||
fc219291 | 826 | static int __init rv3029_register_driver(void) |
c2a1c145 MJ |
827 | { |
828 | return i2c_add_driver(&rv3029_driver); | |
829 | } | |
830 | ||
831 | static void rv3029_unregister_driver(void) | |
832 | { | |
833 | i2c_del_driver(&rv3029_driver); | |
834 | } | |
835 | ||
836 | #else | |
837 | ||
fc219291 | 838 | static int __init rv3029_register_driver(void) |
c2a1c145 MJ |
839 | { |
840 | return 0; | |
841 | } | |
842 | ||
843 | static void rv3029_unregister_driver(void) | |
844 | { | |
845 | } | |
846 | ||
847 | #endif | |
848 | ||
849 | #if IS_ENABLED(CONFIG_SPI_MASTER) | |
850 | ||
851 | static int rv3049_probe(struct spi_device *spi) | |
852 | { | |
c2a1c145 MJ |
853 | struct regmap *regmap; |
854 | ||
855 | regmap = devm_regmap_init_spi(spi, &config); | |
bd0d9379 | 856 | if (IS_ERR(regmap)) |
c2a1c145 | 857 | return PTR_ERR(regmap); |
c2a1c145 MJ |
858 | |
859 | return rv3029_probe(&spi->dev, regmap, spi->irq, "rv3049"); | |
860 | } | |
861 | ||
862 | static struct spi_driver rv3049_driver = { | |
863 | .driver = { | |
864 | .name = "rv3049", | |
865 | }, | |
866 | .probe = rv3049_probe, | |
867 | }; | |
868 | ||
fc219291 | 869 | static int __init rv3049_register_driver(void) |
c2a1c145 MJ |
870 | { |
871 | return spi_register_driver(&rv3049_driver); | |
872 | } | |
873 | ||
fc219291 | 874 | static void __exit rv3049_unregister_driver(void) |
c2a1c145 MJ |
875 | { |
876 | spi_unregister_driver(&rv3049_driver); | |
877 | } | |
878 | ||
879 | #else | |
880 | ||
fc219291 | 881 | static int __init rv3049_register_driver(void) |
c2a1c145 MJ |
882 | { |
883 | return 0; | |
884 | } | |
885 | ||
fc219291 | 886 | static void __exit rv3049_unregister_driver(void) |
c2a1c145 MJ |
887 | { |
888 | } | |
889 | ||
890 | #endif | |
891 | ||
892 | static int __init rv30x9_init(void) | |
893 | { | |
894 | int ret; | |
895 | ||
896 | ret = rv3029_register_driver(); | |
bd0d9379 | 897 | if (ret) |
c2a1c145 | 898 | return ret; |
c2a1c145 MJ |
899 | |
900 | ret = rv3049_register_driver(); | |
bd0d9379 | 901 | if (ret) |
c2a1c145 | 902 | rv3029_unregister_driver(); |
c2a1c145 MJ |
903 | |
904 | return ret; | |
905 | } | |
906 | module_init(rv30x9_init) | |
907 | ||
908 | static void __exit rv30x9_exit(void) | |
909 | { | |
910 | rv3049_unregister_driver(); | |
911 | rv3029_unregister_driver(); | |
912 | } | |
913 | module_exit(rv30x9_exit) | |
52365230 HS |
914 | |
915 | MODULE_AUTHOR("Gregory Hermant <gregory.hermant@calao-systems.com>"); | |
2dca3d9e | 916 | MODULE_AUTHOR("Michael Buesch <m@bues.ch>"); |
c2a1c145 | 917 | MODULE_DESCRIPTION("Micro Crystal RV3029/RV3049 RTC driver"); |
52365230 | 918 | MODULE_LICENSE("GPL"); |
c2a1c145 | 919 | MODULE_ALIAS("spi:rv3049"); |