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libnvdimm/altmap: Track namespace boundaries in altmap
[linux-2.6-block.git] / drivers / rtc / rtc-rv3029c2.c
CommitLineData
d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
52365230 2/*
c2a1c145 3 * Micro Crystal RV-3029 / RV-3049 rtc class driver
52365230
HS		 4 *
5 * Author: Gregory Hermant <gregory.hermant@calao-systems.com>
2dca3d9e 6 * Michael Buesch <m@bues.ch>
52365230
HS		 7 *
8 * based on previously existing rtc class drivers
52365230
HS		 9 */
10
11#include <linux/module.h>
12#include <linux/i2c.h>
c2a1c145 13#include <linux/spi/spi.h>
52365230
HS		 14#include <linux/bcd.h>
15#include <linux/rtc.h>
a7f6e287
MB		 16#include <linux/delay.h>
17#include <linux/of.h>
a696b31e
MB		 18#include <linux/hwmon.h>
19#include <linux/hwmon-sysfs.h>
e6e38082 20#include <linux/regmap.h>
52365230
HS		 21
22/* Register map */
23/* control section */
aba39d27 24#define RV3029_ONOFF_CTRL 0x00
7697de35
MB		 25#define RV3029_ONOFF_CTRL_WE BIT(0)
26#define RV3029_ONOFF_CTRL_TE BIT(1)
27#define RV3029_ONOFF_CTRL_TAR BIT(2)
28#define RV3029_ONOFF_CTRL_EERE BIT(3)
29#define RV3029_ONOFF_CTRL_SRON BIT(4)
30#define RV3029_ONOFF_CTRL_TD0 BIT(5)
31#define RV3029_ONOFF_CTRL_TD1 BIT(6)
32#define RV3029_ONOFF_CTRL_CLKINT BIT(7)
aba39d27 33#define RV3029_IRQ_CTRL 0x01
7697de35
MB		 34#define RV3029_IRQ_CTRL_AIE BIT(0)
35#define RV3029_IRQ_CTRL_TIE BIT(1)
36#define RV3029_IRQ_CTRL_V1IE BIT(2)
37#define RV3029_IRQ_CTRL_V2IE BIT(3)
38#define RV3029_IRQ_CTRL_SRIE BIT(4)
aba39d27 39#define RV3029_IRQ_FLAGS 0x02
7697de35
MB		 40#define RV3029_IRQ_FLAGS_AF BIT(0)
41#define RV3029_IRQ_FLAGS_TF BIT(1)
42#define RV3029_IRQ_FLAGS_V1IF BIT(2)
43#define RV3029_IRQ_FLAGS_V2IF BIT(3)
44#define RV3029_IRQ_FLAGS_SRF BIT(4)
aba39d27 45#define RV3029_STATUS 0x03
7697de35
MB		 46#define RV3029_STATUS_VLOW1 BIT(2)
47#define RV3029_STATUS_VLOW2 BIT(3)
48#define RV3029_STATUS_SR BIT(4)
49#define RV3029_STATUS_PON BIT(5)
50#define RV3029_STATUS_EEBUSY BIT(7)
aba39d27 51#define RV3029_RST_CTRL 0x04
7697de35 52#define RV3029_RST_CTRL_SYSR BIT(4)
aba39d27 53#define RV3029_CONTROL_SECTION_LEN 0x05
52365230
HS		 54
55/* watch section */
aba39d27
MB		 56#define RV3029_W_SEC 0x08
57#define RV3029_W_MINUTES 0x09
58#define RV3029_W_HOURS 0x0A
7697de35
MB		 59#define RV3029_REG_HR_12_24 BIT(6) /* 24h/12h mode */
60#define RV3029_REG_HR_PM BIT(5) /* PM/AM bit in 12h mode */
aba39d27
MB		 61#define RV3029_W_DATE 0x0B
62#define RV3029_W_DAYS 0x0C
63#define RV3029_W_MONTHS 0x0D
64#define RV3029_W_YEARS 0x0E
65#define RV3029_WATCH_SECTION_LEN 0x07
52365230
HS		 66
67/* alarm section */
aba39d27
MB		 68#define RV3029_A_SC 0x10
69#define RV3029_A_MN 0x11
70#define RV3029_A_HR 0x12
71#define RV3029_A_DT 0x13
72#define RV3029_A_DW 0x14
73#define RV3029_A_MO 0x15
74#define RV3029_A_YR 0x16
dc492e86 75#define RV3029_A_AE_X BIT(7)
aba39d27 76#define RV3029_ALARM_SECTION_LEN 0x07
52365230
HS		 77
78/* timer section */
aba39d27
MB		 79#define RV3029_TIMER_LOW 0x18
80#define RV3029_TIMER_HIGH 0x19
52365230
HS		 81
82/* temperature section */
aba39d27 83#define RV3029_TEMP_PAGE 0x20
52365230
HS		 84
85/* eeprom data section */
aba39d27
MB		 86#define RV3029_E2P_EEDATA1 0x28
87#define RV3029_E2P_EEDATA2 0x29
7697de35 88#define RV3029_E2PDATA_SECTION_LEN 0x02
52365230
HS		 89
90/* eeprom control section */
aba39d27 91#define RV3029_CONTROL_E2P_EECTRL 0x30
7697de35
MB		 92#define RV3029_EECTRL_THP BIT(0) /* temp scan interval */
93#define RV3029_EECTRL_THE BIT(1) /* thermometer enable */
94#define RV3029_EECTRL_FD0 BIT(2) /* CLKOUT */
95#define RV3029_EECTRL_FD1 BIT(3) /* CLKOUT */
96#define RV3029_TRICKLE_1K BIT(4) /* 1.5K resistance */
97#define RV3029_TRICKLE_5K BIT(5) /* 5K resistance */
98#define RV3029_TRICKLE_20K BIT(6) /* 20K resistance */
99#define RV3029_TRICKLE_80K BIT(7) /* 80K resistance */
100#define RV3029_TRICKLE_MASK (RV3029_TRICKLE_1K |\
101 RV3029_TRICKLE_5K |\
102 RV3029_TRICKLE_20K |\
103 RV3029_TRICKLE_80K)
104#define RV3029_TRICKLE_SHIFT 4
105#define RV3029_CONTROL_E2P_XOFFS 0x31 /* XTAL offset */
106#define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */
107#define RV3029_CONTROL_E2P_QCOEF 0x32 /* XTAL temp drift coef */
108#define RV3029_CONTROL_E2P_TURNOVER 0x33 /* XTAL turnover temp (in *C) */
109#define RV3029_CONTROL_E2P_TOV_MASK 0x3F /* XTAL turnover temp mask */
52365230
HS		 110
111/* user ram section */
aba39d27
MB		 112#define RV3029_USR1_RAM_PAGE 0x38
113#define RV3029_USR1_SECTION_LEN 0x04
114#define RV3029_USR2_RAM_PAGE 0x3C
115#define RV3029_USR2_SECTION_LEN 0x04
52365230 116
e6e38082
MJ		 117struct rv3029_data {
118 struct device *dev;
119 struct rtc_device *rtc;
120 struct regmap *regmap;
121 int irq;
122};
123
124static int rv3029_read_regs(struct device *dev, u8 reg, u8 *buf,
abe2f551 125 unsigned int len)
52365230 126{
e6e38082 127 struct rv3029_data *rv3029 = dev_get_drvdata(dev);
52365230 128
aba39d27 129 if ((reg > RV3029_USR1_RAM_PAGE + 7) ||
abe2f551 130 (reg + len > RV3029_USR1_RAM_PAGE + 8))
52365230
HS		 131 return -EINVAL;
132
e6e38082 133 return regmap_bulk_read(rv3029->regmap, reg, buf, len);
52365230
HS		 134}
135
e6e38082 136static int rv3029_write_regs(struct device *dev, u8 reg, u8 const buf[],
abe2f551 137 unsigned int len)
52365230 138{
e6e38082
MJ		 139 struct rv3029_data *rv3029 = dev_get_drvdata(dev);
140
aba39d27 141 if ((reg > RV3029_USR1_RAM_PAGE + 7) ||
abe2f551 142 (reg + len > RV3029_USR1_RAM_PAGE + 8))
52365230
HS		 143 return -EINVAL;
144
e6e38082 145 return regmap_bulk_write(rv3029->regmap, reg, buf, len);
52365230
HS		 146}
147
e6e38082 148static int rv3029_update_bits(struct device *dev, u8 reg, u8 mask, u8 set)
2dca3d9e
MB		 149{
150 u8 buf;
151 int ret;
152
e6e38082 153 ret = rv3029_read_regs(dev, reg, &buf, 1);
2dca3d9e
MB		 154 if (ret < 0)
155 return ret;
156 buf &= ~mask;
157 buf |= set & mask;
e6e38082 158 ret = rv3029_write_regs(dev, reg, &buf, 1);
2dca3d9e
MB		 159 if (ret < 0)
160 return ret;
161
162 return 0;
163}
164
e6e38082 165static int rv3029_get_sr(struct device *dev, u8 *buf)
52365230 166{
e6e38082 167 int ret = rv3029_read_regs(dev, RV3029_STATUS, buf, 1);
52365230
HS		 168
169 if (ret < 0)
170 return -EIO;
e6e38082 171 dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]);
52365230
HS		 172 return 0;
173}
174
e6e38082 175static int rv3029_set_sr(struct device *dev, u8 val)
52365230
HS		 176{
177 u8 buf[1];
178 int sr;
179
180 buf[0] = val;
e6e38082
MJ		 181 sr = rv3029_write_regs(dev, RV3029_STATUS, buf, 1);
182 dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]);
52365230
HS		 183 if (sr < 0)
184 return -EIO;
185 return 0;
186}
187
e6e38082 188static int rv3029_eeprom_busywait(struct device *dev)
a7f6e287
MB		 189{
190 int i, ret;
191 u8 sr;
192
193 for (i = 100; i > 0; i--) {
e6e38082 194 ret = rv3029_get_sr(dev, &sr);
a7f6e287
MB		 195 if (ret < 0)
196 break;
197 if (!(sr & RV3029_STATUS_EEBUSY))
198 break;
199 usleep_range(1000, 10000);
200 }
201 if (i <= 0) {
e6e38082 202 dev_err(dev, "EEPROM busy wait timeout.\n");
a7f6e287
MB		 203 return -ETIMEDOUT;
204 }
205
206 return ret;
207}
208
e6e38082 209static int rv3029_eeprom_exit(struct device *dev)
a7f6e287
MB		 210{
211 /* Re-enable eeprom refresh */
e6e38082 212 return rv3029_update_bits(dev, RV3029_ONOFF_CTRL,
4e7f1a60
MJ		 213 RV3029_ONOFF_CTRL_EERE,
214 RV3029_ONOFF_CTRL_EERE);
a7f6e287
MB		 215}
216
e6e38082 217static int rv3029_eeprom_enter(struct device *dev)
a7f6e287
MB		 218{
219 int ret;
220 u8 sr;
221
222 /* Check whether we are in the allowed voltage range. */
e6e38082 223 ret = rv3029_get_sr(dev, &sr);
a7f6e287
MB		 224 if (ret < 0)
225 return ret;
226 if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) {
227 /* We clear the bits and retry once just in case
228 * we had a brown out in early startup.
229 */
230 sr &= ~RV3029_STATUS_VLOW1;
231 sr &= ~RV3029_STATUS_VLOW2;
e6e38082 232 ret = rv3029_set_sr(dev, sr);
a7f6e287
MB		 233 if (ret < 0)
234 return ret;
235 usleep_range(1000, 10000);
e6e38082 236 ret = rv3029_get_sr(dev, &sr);
a7f6e287
MB		 237 if (ret < 0)
238 return ret;
239 if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) {
e6e38082 240 dev_err(dev,
a7f6e287
MB		 241 "Supply voltage is too low to safely access the EEPROM.\n");
242 return -ENODEV;
243 }
244 }
245
246 /* Disable eeprom refresh. */
e6e38082
MJ		 247 ret = rv3029_update_bits(dev, RV3029_ONOFF_CTRL, RV3029_ONOFF_CTRL_EERE,
248 0);
a7f6e287
MB		 249 if (ret < 0)
250 return ret;
251
252 /* Wait for any previous eeprom accesses to finish. */
e6e38082 253 ret = rv3029_eeprom_busywait(dev);
a7f6e287 254 if (ret < 0)
e6e38082 255 rv3029_eeprom_exit(dev);
a7f6e287
MB		 256
257 return ret;
258}
259
e6e38082 260static int rv3029_eeprom_read(struct device *dev, u8 reg,
a7f6e287
MB		 261 u8 buf[], size_t len)
262{
263 int ret, err;
264
e6e38082 265 err = rv3029_eeprom_enter(dev);
a7f6e287
MB		 266 if (err < 0)
267 return err;
268
e6e38082 269 ret = rv3029_read_regs(dev, reg, buf, len);
a7f6e287 270
e6e38082 271 err = rv3029_eeprom_exit(dev);
a7f6e287
MB		 272 if (err < 0)
273 return err;
274
275 return ret;
276}
277
e6e38082 278static int rv3029_eeprom_write(struct device *dev, u8 reg,
a7f6e287
MB		 279 u8 const buf[], size_t len)
280{
97f5b037 281 int ret;
a7f6e287
MB		 282 size_t i;
283 u8 tmp;
284
97f5b037
DC		 285 ret = rv3029_eeprom_enter(dev);
286 if (ret < 0)
287 return ret;
a7f6e287
MB		 288
289 for (i = 0; i < len; i++, reg++) {
e6e38082 290 ret = rv3029_read_regs(dev, reg, &tmp, 1);
a7f6e287
MB		 291 if (ret < 0)
292 break;
293 if (tmp != buf[i]) {
e6e38082 294 ret = rv3029_write_regs(dev, reg, &buf[i], 1);
a7f6e287
MB		 295 if (ret < 0)
296 break;
297 }
e6e38082 298 ret = rv3029_eeprom_busywait(dev);
a7f6e287
MB		 299 if (ret < 0)
300 break;
301 }
302
97f5b037
DC		 303 ret = rv3029_eeprom_exit(dev);
304 if (ret < 0)
305 return ret;
a7f6e287 306
97f5b037 307 return 0;
a7f6e287
MB		 308}
309
e6e38082 310static int rv3029_eeprom_update_bits(struct device *dev,
39387dc2
MB		 311 u8 reg, u8 mask, u8 set)
312{
313 u8 buf;
314 int ret;
315
e6e38082 316 ret = rv3029_eeprom_read(dev, reg, &buf, 1);
39387dc2
MB		 317 if (ret < 0)
318 return ret;
319 buf &= ~mask;
320 buf |= set & mask;
e6e38082 321 ret = rv3029_eeprom_write(dev, reg, &buf, 1);
39387dc2
MB		 322 if (ret < 0)
323 return ret;
324
325 return 0;
326}
327
0ddc5b89
MJ		 328static irqreturn_t rv3029_handle_irq(int irq, void *dev_id)
329{
330 struct device *dev = dev_id;
331 struct rv3029_data *rv3029 = dev_get_drvdata(dev);
332 struct mutex *lock = &rv3029->rtc->ops_lock;
333 unsigned long events = 0;
334 u8 flags, controls;
335 int ret;
336
337 mutex_lock(lock);
338
339 ret = rv3029_read_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
340 if (ret) {
341 dev_warn(dev, "Read IRQ Control Register error %d\n", ret);
342 mutex_unlock(lock);
343 return IRQ_NONE;
344 }
345
346 ret = rv3029_read_regs(dev, RV3029_IRQ_FLAGS, &flags, 1);
347 if (ret) {
348 dev_warn(dev, "Read IRQ Flags Register error %d\n", ret);
349 mutex_unlock(lock);
350 return IRQ_NONE;
351 }
352
353 if (flags & RV3029_IRQ_FLAGS_AF) {
354 flags &= ~RV3029_IRQ_FLAGS_AF;
355 controls &= ~RV3029_IRQ_CTRL_AIE;
356 events |= RTC_AF;
357 }
358
359 if (events) {
360 rtc_update_irq(rv3029->rtc, 1, events);
361 rv3029_write_regs(dev, RV3029_IRQ_FLAGS, &flags, 1);
362 rv3029_write_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
363 }
364 mutex_unlock(lock);
365
366 return IRQ_HANDLED;
367}
368
e6e38082 369static int rv3029_read_time(struct device *dev, struct rtc_time *tm)
52365230
HS		 370{
371 u8 buf[1];
372 int ret;
aba39d27 373 u8 regs[RV3029_WATCH_SECTION_LEN] = { 0, };
52365230 374
e6e38082 375 ret = rv3029_get_sr(dev, buf);
52365230 376 if (ret < 0) {
e6e38082 377 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 378 return -EIO;
379 }
380
e6e38082 381 ret = rv3029_read_regs(dev, RV3029_W_SEC, regs,
4e7f1a60 382 RV3029_WATCH_SECTION_LEN);
52365230 383 if (ret < 0) {
e6e38082 384 dev_err(dev, "%s: reading RTC section failed\n", __func__);
52365230
HS		 385 return ret;
386 }
387
abe2f551
MJ		 388 tm->tm_sec = bcd2bin(regs[RV3029_W_SEC - RV3029_W_SEC]);
389 tm->tm_min = bcd2bin(regs[RV3029_W_MINUTES - RV3029_W_SEC]);
52365230
HS		 390
391 /* HR field has a more complex interpretation */
392 {
abe2f551 393 const u8 _hr = regs[RV3029_W_HOURS - RV3029_W_SEC];
aba39d27
MB		 394
395 if (_hr & RV3029_REG_HR_12_24) {
52365230
HS		 396 /* 12h format */
397 tm->tm_hour = bcd2bin(_hr & 0x1f);
aba39d27 398 if (_hr & RV3029_REG_HR_PM) /* PM flag set */
52365230
HS		 399 tm->tm_hour += 12;
400 } else /* 24h format */
401 tm->tm_hour = bcd2bin(_hr & 0x3f);
402 }
403
abe2f551
MJ		 404 tm->tm_mday = bcd2bin(regs[RV3029_W_DATE - RV3029_W_SEC]);
405 tm->tm_mon = bcd2bin(regs[RV3029_W_MONTHS - RV3029_W_SEC]) - 1;
406 tm->tm_year = bcd2bin(regs[RV3029_W_YEARS - RV3029_W_SEC]) + 100;
407 tm->tm_wday = bcd2bin(regs[RV3029_W_DAYS - RV3029_W_SEC]) - 1;
52365230
HS		 408
409 return 0;
410}
411
e6e38082 412static int rv3029_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
52365230
HS		 413{
414 struct rtc_time *const tm = &alarm->time;
415 int ret;
0ddc5b89 416 u8 regs[8], controls, flags;
52365230 417
e6e38082 418 ret = rv3029_get_sr(dev, regs);
52365230 419 if (ret < 0) {
e6e38082 420 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 421 return -EIO;
422 }
423
e6e38082 424 ret = rv3029_read_regs(dev, RV3029_A_SC, regs,
4e7f1a60 425 RV3029_ALARM_SECTION_LEN);
52365230
HS		 426
427 if (ret < 0) {
e6e38082 428 dev_err(dev, "%s: reading alarm section failed\n", __func__);
52365230
HS		 429 return ret;
430 }
431
0ddc5b89
MJ		 432 ret = rv3029_read_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
433 if (ret) {
434 dev_err(dev, "Read IRQ Control Register error %d\n", ret);
435 return ret;
436 }
437 ret = rv3029_read_regs(dev, RV3029_IRQ_FLAGS, &flags, 1);
438 if (ret < 0) {
439 dev_err(dev, "Read IRQ Flags Register error %d\n", ret);
440 return ret;
441 }
442
abe2f551
MJ		 443 tm->tm_sec = bcd2bin(regs[RV3029_A_SC - RV3029_A_SC] & 0x7f);
444 tm->tm_min = bcd2bin(regs[RV3029_A_MN - RV3029_A_SC] & 0x7f);
445 tm->tm_hour = bcd2bin(regs[RV3029_A_HR - RV3029_A_SC] & 0x3f);
446 tm->tm_mday = bcd2bin(regs[RV3029_A_DT - RV3029_A_SC] & 0x3f);
447 tm->tm_mon = bcd2bin(regs[RV3029_A_MO - RV3029_A_SC] & 0x1f) - 1;
448 tm->tm_year = bcd2bin(regs[RV3029_A_YR - RV3029_A_SC] & 0x7f) + 100;
449 tm->tm_wday = bcd2bin(regs[RV3029_A_DW - RV3029_A_SC] & 0x07) - 1;
52365230 450
0ddc5b89
MJ		 451 alarm->enabled = !!(controls & RV3029_IRQ_CTRL_AIE);
452 alarm->pending = (flags & RV3029_IRQ_FLAGS_AF) && alarm->enabled;
453
52365230
HS		 454 return 0;
455}
456
0ddc5b89 457static int rv3029_alarm_irq_enable(struct device *dev, unsigned int enable)
52365230
HS		 458{
459 int ret;
0ddc5b89
MJ		 460 u8 controls;
461
462 ret = rv3029_read_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
463 if (ret < 0) {
464 dev_warn(dev, "Read IRQ Control Register error %d\n", ret);
465 return ret;
466 }
52365230 467
2dca3d9e 468 /* enable/disable AIE irq */
0ddc5b89
MJ		 469 if (enable)
470 controls |= RV3029_IRQ_CTRL_AIE;
471 else
472 controls &= ~RV3029_IRQ_CTRL_AIE;
473
474 ret = rv3029_write_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
52365230 475 if (ret < 0) {
e6e38082 476 dev_err(dev, "can't update INT reg\n");
52365230
HS		 477 return ret;
478 }
479
480 return 0;
481}
482
e6e38082 483static int rv3029_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
52365230
HS		 484{
485 struct rtc_time *const tm = &alarm->time;
486 int ret;
487 u8 regs[8];
488
489 /*
490 * The clock has an 8 bit wide bcd-coded register (they never learn)
491 * for the year. tm_year is an offset from 1900 and we are interested
492 * in the 2000-2099 range, so any value less than 100 is invalid.
493 */
494 if (tm->tm_year < 100)
495 return -EINVAL;
496
e6e38082 497 ret = rv3029_get_sr(dev, regs);
52365230 498 if (ret < 0) {
e6e38082 499 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 500 return -EIO;
501 }
aba39d27 502
dc492e86
MJ		 503 /* Activate all the alarms with AE_x bit */
504 regs[RV3029_A_SC - RV3029_A_SC] = bin2bcd(tm->tm_sec) | RV3029_A_AE_X;
505 regs[RV3029_A_MN - RV3029_A_SC] = bin2bcd(tm->tm_min) | RV3029_A_AE_X;
506 regs[RV3029_A_HR - RV3029_A_SC] = (bin2bcd(tm->tm_hour) & 0x3f)
507 | RV3029_A_AE_X;
508 regs[RV3029_A_DT - RV3029_A_SC] = (bin2bcd(tm->tm_mday) & 0x3f)
509 | RV3029_A_AE_X;
510 regs[RV3029_A_MO - RV3029_A_SC] = (bin2bcd(tm->tm_mon + 1) & 0x1f)
511 | RV3029_A_AE_X;
512 regs[RV3029_A_DW - RV3029_A_SC] = (bin2bcd(tm->tm_wday + 1) & 0x7)
513 | RV3029_A_AE_X;
514 regs[RV3029_A_YR - RV3029_A_SC] = (bin2bcd(tm->tm_year - 100))
515 | RV3029_A_AE_X;
516
517 /* Write the alarm */
e6e38082 518 ret = rv3029_write_regs(dev, RV3029_A_SC, regs,
4e7f1a60 519 RV3029_ALARM_SECTION_LEN);
52365230
HS		 520 if (ret < 0)
521 return ret;
522
523 if (alarm->enabled) {
52365230 524 /* enable AIE irq */
0ddc5b89 525 ret = rv3029_alarm_irq_enable(dev, 1);
52365230
HS		 526 if (ret)
527 return ret;
52365230
HS		 528 } else {
529 /* disable AIE irq */
0ddc5b89 530 ret = rv3029_alarm_irq_enable(dev, 0);
52365230
HS		 531 if (ret)
532 return ret;
52365230
HS		 533 }
534
535 return 0;
536}
537
e6e38082 538static int rv3029_set_time(struct device *dev, struct rtc_time *tm)
52365230
HS		 539{
540 u8 regs[8];
541 int ret;
542
543 /*
544 * The clock has an 8 bit wide bcd-coded register (they never learn)
545 * for the year. tm_year is an offset from 1900 and we are interested
546 * in the 2000-2099 range, so any value less than 100 is invalid.
547 */
548 if (tm->tm_year < 100)
549 return -EINVAL;
550
abe2f551
MJ		 551 regs[RV3029_W_SEC - RV3029_W_SEC] = bin2bcd(tm->tm_sec);
552 regs[RV3029_W_MINUTES - RV3029_W_SEC] = bin2bcd(tm->tm_min);
553 regs[RV3029_W_HOURS - RV3029_W_SEC] = bin2bcd(tm->tm_hour);
554 regs[RV3029_W_DATE - RV3029_W_SEC] = bin2bcd(tm->tm_mday);
555 regs[RV3029_W_MONTHS - RV3029_W_SEC] = bin2bcd(tm->tm_mon + 1);
38201ca3 556 regs[RV3029_W_DAYS - RV3029_W_SEC] = bin2bcd(tm->tm_wday + 1) & 0x7;
abe2f551 557 regs[RV3029_W_YEARS - RV3029_W_SEC] = bin2bcd(tm->tm_year - 100);
52365230 558
e6e38082 559 ret = rv3029_write_regs(dev, RV3029_W_SEC, regs,
4e7f1a60 560 RV3029_WATCH_SECTION_LEN);
52365230
HS		 561 if (ret < 0)
562 return ret;
563
e6e38082 564 ret = rv3029_get_sr(dev, regs);
52365230 565 if (ret < 0) {
e6e38082 566 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 567 return ret;
568 }
569 /* clear PON bit */
e6e38082 570 ret = rv3029_set_sr(dev, (regs[0] & ~RV3029_STATUS_PON));
52365230 571 if (ret < 0) {
e6e38082 572 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 573 return ret;
574 }
575
576 return 0;
577}
abe2f551 578
e27e2160
MB		 579static const struct rv3029_trickle_tab_elem {
580 u32 r; /* resistance in ohms */
581 u8 conf; /* trickle config bits */
582} rv3029_trickle_tab[] = {
583 {
584 .r = 1076,
585 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
586 RV3029_TRICKLE_20K | RV3029_TRICKLE_80K,
587 }, {
588 .r = 1091,
589 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
590 RV3029_TRICKLE_20K,
591 }, {
592 .r = 1137,
593 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
594 RV3029_TRICKLE_80K,
595 }, {
596 .r = 1154,
597 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K,
598 }, {
599 .r = 1371,
600 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K |
601 RV3029_TRICKLE_80K,
602 }, {
603 .r = 1395,
604 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K,
605 }, {
606 .r = 1472,
607 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_80K,
608 }, {
609 .r = 1500,
610 .conf = RV3029_TRICKLE_1K,
611 }, {
612 .r = 3810,
613 .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K |
614 RV3029_TRICKLE_80K,
615 }, {
616 .r = 4000,
617 .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K,
618 }, {
619 .r = 4706,
620 .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_80K,
621 }, {
622 .r = 5000,
623 .conf = RV3029_TRICKLE_5K,
624 }, {
625 .r = 16000,
626 .conf = RV3029_TRICKLE_20K | RV3029_TRICKLE_80K,
627 }, {
628 .r = 20000,
629 .conf = RV3029_TRICKLE_20K,
630 }, {
631 .r = 80000,
632 .conf = RV3029_TRICKLE_80K,
633 },
634};
635
e6e38082 636static void rv3029_trickle_config(struct device *dev)
e27e2160 637{
e6e38082 638 struct device_node *of_node = dev->of_node;
e27e2160
MB		 639 const struct rv3029_trickle_tab_elem *elem;
640 int i, err;
641 u32 ohms;
39387dc2 642 u8 trickle_set_bits;
e27e2160
MB		 643
644 if (!of_node)
645 return;
646
647 /* Configure the trickle charger. */
e27e2160
MB		 648 err = of_property_read_u32(of_node, "trickle-resistor-ohms", &ohms);
649 if (err) {
650 /* Disable trickle charger. */
39387dc2 651 trickle_set_bits = 0;
e27e2160
MB		 652 } else {
653 /* Enable trickle charger. */
654 for (i = 0; i < ARRAY_SIZE(rv3029_trickle_tab); i++) {
655 elem = &rv3029_trickle_tab[i];
656 if (elem->r >= ohms)
657 break;
658 }
39387dc2 659 trickle_set_bits = elem->conf;
e6e38082 660 dev_info(dev,
e27e2160
MB		 661 "Trickle charger enabled at %d ohms resistance.\n",
662 elem->r);
663 }
e6e38082 664 err = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL,
39387dc2
MB		 665 RV3029_TRICKLE_MASK,
666 trickle_set_bits);
abe2f551 667 if (err < 0)
e6e38082 668 dev_err(dev, "Failed to update trickle charger config\n");
e27e2160
MB		 669}
670
a696b31e
MB		 671#ifdef CONFIG_RTC_DRV_RV3029_HWMON
672
e6e38082 673static int rv3029_read_temp(struct device *dev, int *temp_mC)
a696b31e
MB		 674{
675 int ret;
676 u8 temp;
677
e6e38082 678 ret = rv3029_read_regs(dev, RV3029_TEMP_PAGE, &temp, 1);
a696b31e
MB		 679 if (ret < 0)
680 return ret;
681
682 *temp_mC = ((int)temp - 60) * 1000;
683
684 return 0;
685}
686
687static ssize_t rv3029_hwmon_show_temp(struct device *dev,
688 struct device_attribute *attr,
689 char *buf)
690{
a696b31e
MB		 691 int ret, temp_mC;
692
e6e38082 693 ret = rv3029_read_temp(dev, &temp_mC);
a696b31e
MB		 694 if (ret < 0)
695 return ret;
696
697 return sprintf(buf, "%d\n", temp_mC);
698}
699
700static ssize_t rv3029_hwmon_set_update_interval(struct device *dev,
701 struct device_attribute *attr,
702 const char *buf,
703 size_t count)
704{
a696b31e
MB		 705 unsigned long interval_ms;
706 int ret;
707 u8 th_set_bits = 0;
708
709 ret = kstrtoul(buf, 10, &interval_ms);
710 if (ret < 0)
711 return ret;
712
713 if (interval_ms != 0) {
714 th_set_bits |= RV3029_EECTRL_THE;
715 if (interval_ms >= 16000)
716 th_set_bits |= RV3029_EECTRL_THP;
717 }
e6e38082 718 ret = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL,
a696b31e
MB		 719 RV3029_EECTRL_THE | RV3029_EECTRL_THP,
720 th_set_bits);
721 if (ret < 0)
722 return ret;
723
724 return count;
725}
726
727static ssize_t rv3029_hwmon_show_update_interval(struct device *dev,
728 struct device_attribute *attr,
729 char *buf)
730{
a696b31e
MB		 731 int ret, interval_ms;
732 u8 eectrl;
733
e6e38082 734 ret = rv3029_eeprom_read(dev, RV3029_CONTROL_E2P_EECTRL,
a696b31e
MB		 735 &eectrl, 1);
736 if (ret < 0)
737 return ret;
738
739 if (eectrl & RV3029_EECTRL_THE) {
740 if (eectrl & RV3029_EECTRL_THP)
741 interval_ms = 16000;
742 else
743 interval_ms = 1000;
744 } else {
745 interval_ms = 0;
746 }
747
748 return sprintf(buf, "%d\n", interval_ms);
749}
750
751static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, rv3029_hwmon_show_temp,
752 NULL, 0);
753static SENSOR_DEVICE_ATTR(update_interval, S_IWUSR | S_IRUGO,
754 rv3029_hwmon_show_update_interval,
755 rv3029_hwmon_set_update_interval, 0);
756
757static struct attribute *rv3029_hwmon_attrs[] = {
758 &sensor_dev_attr_temp1_input.dev_attr.attr,
759 &sensor_dev_attr_update_interval.dev_attr.attr,
760 NULL,
761};
762ATTRIBUTE_GROUPS(rv3029_hwmon);
763
e6e38082 764static void rv3029_hwmon_register(struct device *dev, const char *name)
a696b31e 765{
e6e38082 766 struct rv3029_data *rv3029 = dev_get_drvdata(dev);
a696b31e
MB		 767 struct device *hwmon_dev;
768
e6e38082
MJ		 769 hwmon_dev = devm_hwmon_device_register_with_groups(dev, name, rv3029,
770 rv3029_hwmon_groups);
a696b31e 771 if (IS_ERR(hwmon_dev)) {
e6e38082 772 dev_warn(dev, "unable to register hwmon device %ld\n",
4e7f1a60 773 PTR_ERR(hwmon_dev));
a696b31e
MB		 774 }
775}
776
777#else /* CONFIG_RTC_DRV_RV3029_HWMON */
778
e6e38082 779static void rv3029_hwmon_register(struct device *dev, const char *name)
a696b31e
MB		 780{
781}
782
783#endif /* CONFIG_RTC_DRV_RV3029_HWMON */
784
0ddc5b89 785static struct rtc_class_ops rv3029_rtc_ops = {
e6e38082
MJ		 786 .read_time = rv3029_read_time,
787 .set_time = rv3029_set_time,
52365230
HS		 788};
789
e6e38082
MJ		 790static int rv3029_probe(struct device *dev, struct regmap *regmap, int irq,
791 const char *name)
52365230 792{
e6e38082 793 struct rv3029_data *rv3029;
52365230
HS		 794 int rc = 0;
795 u8 buf[1];
796
e6e38082
MJ		 797 rv3029 = devm_kzalloc(dev, sizeof(*rv3029), GFP_KERNEL);
798 if (!rv3029)
799 return -ENOMEM;
800
801 rv3029->regmap = regmap;
802 rv3029->irq = irq;
803 rv3029->dev = dev;
804 dev_set_drvdata(dev, rv3029);
52365230 805
e6e38082 806 rc = rv3029_get_sr(dev, buf);
67ab2440 807 if (rc < 0) {
e6e38082 808 dev_err(dev, "reading status failed\n");
67ab2440
GH		 809 return rc;
810 }
811
e6e38082
MJ		 812 rv3029_trickle_config(dev);
813 rv3029_hwmon_register(dev, name);
814
815 rv3029->rtc = devm_rtc_device_register(dev, name, &rv3029_rtc_ops,
816 THIS_MODULE);
0ddc5b89
MJ		 817 if (IS_ERR(rv3029->rtc)) {
818 dev_err(dev, "unable to register the class device\n");
819 return PTR_ERR(rv3029->rtc);
820 }
e27e2160 821
0ddc5b89
MJ		 822 if (rv3029->irq > 0) {
823 rc = devm_request_threaded_irq(dev, rv3029->irq,
824 NULL, rv3029_handle_irq,
825 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
826 "rv3029", dev);
827 if (rc) {
828 dev_warn(dev, "unable to request IRQ, alarms disabled\n");
829 rv3029->irq = 0;
830 } else {
831 rv3029_rtc_ops.read_alarm = rv3029_read_alarm;
832 rv3029_rtc_ops.set_alarm = rv3029_set_alarm;
833 rv3029_rtc_ops.alarm_irq_enable = rv3029_alarm_irq_enable;
834 }
835 }
836
837 return 0;
e6e38082 838}
52365230 839
c2a1c145
MJ		 840#if IS_ENABLED(CONFIG_I2C)
841
e6e38082
MJ		 842static int rv3029_i2c_probe(struct i2c_client *client,
843 const struct i2c_device_id *id)
844{
845 struct regmap *regmap;
846 static const struct regmap_config config = {
847 .reg_bits = 8,
848 .val_bits = 8,
849 };
850
851 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK |
852 I2C_FUNC_SMBUS_BYTE)) {
853 dev_err(&client->dev, "Adapter does not support SMBUS_I2C_BLOCK or SMBUS_I2C_BYTE\n");
854 return -ENODEV;
855 }
52365230 856
e6e38082
MJ		 857 regmap = devm_regmap_init_i2c(client, &config);
858 if (IS_ERR(regmap)) {
859 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
860 __func__, PTR_ERR(regmap));
861 return PTR_ERR(regmap);
862 }
52365230 863
e6e38082 864 return rv3029_probe(&client->dev, regmap, client->irq, client->name);
52365230
HS		 865}
866
45a63518 867static const struct i2c_device_id rv3029_id[] = {
814db2bc
AB		 868 { "rv3029", 0 },
869 { "rv3029c2", 0 },
870 { }
871};
872MODULE_DEVICE_TABLE(i2c, rv3029_id);
873
e696a1dd 874static const struct of_device_id rv3029_of_match[] = {
45b611c8
AB		 875 { .compatible = "microcrystal,rv3029" },
876 /* Backward compatibility only, do not use compatibles below: */
e696a1dd
JMC		 877 { .compatible = "rv3029" },
878 { .compatible = "rv3029c2" },
879 { .compatible = "mc,rv3029c2" },
880 { }
881};
882MODULE_DEVICE_TABLE(of, rv3029_of_match);
883
aba39d27 884static struct i2c_driver rv3029_driver = {
52365230
HS		 885 .driver = {
886 .name = "rtc-rv3029c2",
e696a1dd 887 .of_match_table = of_match_ptr(rv3029_of_match),
52365230 888 },
e6e38082 889 .probe = rv3029_i2c_probe,
aba39d27 890 .id_table = rv3029_id,
52365230
HS		 891};
892
c2a1c145
MJ		 893static int rv3029_register_driver(void)
894{
895 return i2c_add_driver(&rv3029_driver);
896}
897
898static void rv3029_unregister_driver(void)
899{
900 i2c_del_driver(&rv3029_driver);
901}
902
903#else
904
905static int rv3029_register_driver(void)
906{
907 return 0;
908}
909
910static void rv3029_unregister_driver(void)
911{
912}
913
914#endif
915
916#if IS_ENABLED(CONFIG_SPI_MASTER)
917
918static int rv3049_probe(struct spi_device *spi)
919{
920 static const struct regmap_config config = {
921 .reg_bits = 8,
922 .val_bits = 8,
923 };
924 struct regmap *regmap;
925
926 regmap = devm_regmap_init_spi(spi, &config);
927 if (IS_ERR(regmap)) {
928 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
929 __func__, PTR_ERR(regmap));
930 return PTR_ERR(regmap);
931 }
932
933 return rv3029_probe(&spi->dev, regmap, spi->irq, "rv3049");
934}
935
936static struct spi_driver rv3049_driver = {
937 .driver = {
938 .name = "rv3049",
939 },
940 .probe = rv3049_probe,
941};
942
943static int rv3049_register_driver(void)
944{
945 return spi_register_driver(&rv3049_driver);
946}
947
948static void rv3049_unregister_driver(void)
949{
950 spi_unregister_driver(&rv3049_driver);
951}
952
953#else
954
955static int rv3049_register_driver(void)
956{
957 return 0;
958}
959
960static void rv3049_unregister_driver(void)
961{
962}
963
964#endif
965
966static int __init rv30x9_init(void)
967{
968 int ret;
969
970 ret = rv3029_register_driver();
971 if (ret) {
972 pr_err("Failed to register rv3029 driver: %d\n", ret);
973 return ret;
974 }
975
976 ret = rv3049_register_driver();
977 if (ret) {
978 pr_err("Failed to register rv3049 driver: %d\n", ret);
979 rv3029_unregister_driver();
980 }
981
982 return ret;
983}
984module_init(rv30x9_init)
985
986static void __exit rv30x9_exit(void)
987{
988 rv3049_unregister_driver();
989 rv3029_unregister_driver();
990}
991module_exit(rv30x9_exit)
52365230
HS		 992
993MODULE_AUTHOR("Gregory Hermant <gregory.hermant@calao-systems.com>");
2dca3d9e 994MODULE_AUTHOR("Michael Buesch <m@bues.ch>");
c2a1c145 995MODULE_DESCRIPTION("Micro Crystal RV3029/RV3049 RTC driver");
52365230 996MODULE_LICENSE("GPL");
c2a1c145 997MODULE_ALIAS("spi:rv3049");
Linux 6.x block layer and io_uring tree(s)