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e6e7376c AB |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * RTC driver for the Micro Crystal RV3028 | |
4 | * | |
5 | * Copyright (C) 2019 Micro Crystal SA | |
6 | * | |
7 | * Alexandre Belloni <alexandre.belloni@bootlin.com> | |
8 | * | |
9 | */ | |
10 | ||
f583c341 | 11 | #include <linux/clk-provider.h> |
e6e7376c | 12 | #include <linux/bcd.h> |
018d959b | 13 | #include <linux/bitfield.h> |
e6e7376c AB |
14 | #include <linux/bitops.h> |
15 | #include <linux/i2c.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/log2.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/of_device.h> | |
21 | #include <linux/regmap.h> | |
22 | #include <linux/rtc.h> | |
23 | ||
24 | #define RV3028_SEC 0x00 | |
25 | #define RV3028_MIN 0x01 | |
26 | #define RV3028_HOUR 0x02 | |
27 | #define RV3028_WDAY 0x03 | |
28 | #define RV3028_DAY 0x04 | |
29 | #define RV3028_MONTH 0x05 | |
30 | #define RV3028_YEAR 0x06 | |
31 | #define RV3028_ALARM_MIN 0x07 | |
32 | #define RV3028_ALARM_HOUR 0x08 | |
33 | #define RV3028_ALARM_DAY 0x09 | |
34 | #define RV3028_STATUS 0x0E | |
35 | #define RV3028_CTRL1 0x0F | |
36 | #define RV3028_CTRL2 0x10 | |
37 | #define RV3028_EVT_CTRL 0x13 | |
38 | #define RV3028_TS_COUNT 0x14 | |
39 | #define RV3028_TS_SEC 0x15 | |
40 | #define RV3028_RAM1 0x1F | |
41 | #define RV3028_EEPROM_ADDR 0x25 | |
42 | #define RV3028_EEPROM_DATA 0x26 | |
43 | #define RV3028_EEPROM_CMD 0x27 | |
44 | #define RV3028_CLKOUT 0x35 | |
45 | #define RV3028_OFFSET 0x36 | |
46 | #define RV3028_BACKUP 0x37 | |
47 | ||
48 | #define RV3028_STATUS_PORF BIT(0) | |
49 | #define RV3028_STATUS_EVF BIT(1) | |
50 | #define RV3028_STATUS_AF BIT(2) | |
51 | #define RV3028_STATUS_TF BIT(3) | |
52 | #define RV3028_STATUS_UF BIT(4) | |
53 | #define RV3028_STATUS_BSF BIT(5) | |
54 | #define RV3028_STATUS_CLKF BIT(6) | |
55 | #define RV3028_STATUS_EEBUSY BIT(7) | |
56 | ||
f583c341 PN |
57 | #define RV3028_CLKOUT_FD_MASK GENMASK(2, 0) |
58 | #define RV3028_CLKOUT_PORIE BIT(3) | |
59 | #define RV3028_CLKOUT_CLKSY BIT(6) | |
60 | #define RV3028_CLKOUT_CLKOE BIT(7) | |
61 | ||
e6e7376c AB |
62 | #define RV3028_CTRL1_EERD BIT(3) |
63 | #define RV3028_CTRL1_WADA BIT(5) | |
64 | ||
65 | #define RV3028_CTRL2_RESET BIT(0) | |
66 | #define RV3028_CTRL2_12_24 BIT(1) | |
67 | #define RV3028_CTRL2_EIE BIT(2) | |
68 | #define RV3028_CTRL2_AIE BIT(3) | |
69 | #define RV3028_CTRL2_TIE BIT(4) | |
70 | #define RV3028_CTRL2_UIE BIT(5) | |
71 | #define RV3028_CTRL2_TSE BIT(7) | |
72 | ||
73 | #define RV3028_EVT_CTRL_TSR BIT(2) | |
74 | ||
024e6f3d | 75 | #define RV3028_EEPROM_CMD_UPDATE 0x11 |
e6e7376c AB |
76 | #define RV3028_EEPROM_CMD_WRITE 0x21 |
77 | #define RV3028_EEPROM_CMD_READ 0x22 | |
78 | ||
79 | #define RV3028_EEBUSY_POLL 10000 | |
80 | #define RV3028_EEBUSY_TIMEOUT 100000 | |
81 | ||
82 | #define RV3028_BACKUP_TCE BIT(5) | |
83 | #define RV3028_BACKUP_TCR_MASK GENMASK(1,0) | |
018d959b AB |
84 | #define RV3028_BACKUP_BSM GENMASK(3,2) |
85 | ||
86 | #define RV3028_BACKUP_BSM_DSM 0x1 | |
87 | #define RV3028_BACKUP_BSM_LSM 0x3 | |
e6e7376c AB |
88 | |
89 | #define OFFSET_STEP_PPT 953674 | |
90 | ||
91 | enum rv3028_type { | |
92 | rv_3028, | |
93 | }; | |
94 | ||
95 | struct rv3028_data { | |
96 | struct regmap *regmap; | |
97 | struct rtc_device *rtc; | |
98 | enum rv3028_type type; | |
f583c341 PN |
99 | #ifdef CONFIG_COMMON_CLK |
100 | struct clk_hw clkout_hw; | |
101 | #endif | |
e6e7376c AB |
102 | }; |
103 | ||
c1efae14 | 104 | static u16 rv3028_trickle_resistors[] = {3000, 5000, 9000, 15000}; |
e6e7376c AB |
105 | |
106 | static ssize_t timestamp0_store(struct device *dev, | |
107 | struct device_attribute *attr, | |
108 | const char *buf, size_t count) | |
109 | { | |
110 | struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); | |
111 | ||
112 | regmap_update_bits(rv3028->regmap, RV3028_EVT_CTRL, RV3028_EVT_CTRL_TSR, | |
113 | RV3028_EVT_CTRL_TSR); | |
114 | ||
115 | return count; | |
116 | }; | |
117 | ||
118 | static ssize_t timestamp0_show(struct device *dev, | |
119 | struct device_attribute *attr, char *buf) | |
120 | { | |
121 | struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); | |
122 | struct rtc_time tm; | |
123 | int ret, count; | |
124 | u8 date[6]; | |
125 | ||
126 | ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count); | |
127 | if (ret) | |
128 | return ret; | |
129 | ||
130 | if (!count) | |
131 | return 0; | |
132 | ||
133 | ret = regmap_bulk_read(rv3028->regmap, RV3028_TS_SEC, date, | |
134 | sizeof(date)); | |
135 | if (ret) | |
136 | return ret; | |
137 | ||
138 | tm.tm_sec = bcd2bin(date[0]); | |
139 | tm.tm_min = bcd2bin(date[1]); | |
140 | tm.tm_hour = bcd2bin(date[2]); | |
141 | tm.tm_mday = bcd2bin(date[3]); | |
142 | tm.tm_mon = bcd2bin(date[4]) - 1; | |
143 | tm.tm_year = bcd2bin(date[5]) + 100; | |
144 | ||
145 | ret = rtc_valid_tm(&tm); | |
146 | if (ret) | |
147 | return ret; | |
148 | ||
149 | return sprintf(buf, "%llu\n", | |
150 | (unsigned long long)rtc_tm_to_time64(&tm)); | |
151 | }; | |
152 | ||
153 | static DEVICE_ATTR_RW(timestamp0); | |
154 | ||
155 | static ssize_t timestamp0_count_show(struct device *dev, | |
156 | struct device_attribute *attr, char *buf) | |
157 | { | |
158 | struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); | |
159 | int ret, count; | |
160 | ||
161 | ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count); | |
162 | if (ret) | |
163 | return ret; | |
164 | ||
165 | return sprintf(buf, "%u\n", count); | |
166 | }; | |
167 | ||
168 | static DEVICE_ATTR_RO(timestamp0_count); | |
169 | ||
170 | static struct attribute *rv3028_attrs[] = { | |
171 | &dev_attr_timestamp0.attr, | |
172 | &dev_attr_timestamp0_count.attr, | |
173 | NULL | |
174 | }; | |
175 | ||
176 | static const struct attribute_group rv3028_attr_group = { | |
177 | .attrs = rv3028_attrs, | |
178 | }; | |
179 | ||
de0ad60e AB |
180 | static int rv3028_exit_eerd(struct rv3028_data *rv3028, u32 eerd) |
181 | { | |
182 | if (eerd) | |
183 | return 0; | |
184 | ||
185 | return regmap_update_bits(rv3028->regmap, RV3028_CTRL1, RV3028_CTRL1_EERD, 0); | |
186 | } | |
187 | ||
188 | static int rv3028_enter_eerd(struct rv3028_data *rv3028, u32 *eerd) | |
189 | { | |
190 | u32 ctrl1, status; | |
191 | int ret; | |
192 | ||
193 | ret = regmap_read(rv3028->regmap, RV3028_CTRL1, &ctrl1); | |
194 | if (ret) | |
195 | return ret; | |
196 | ||
197 | *eerd = ctrl1 & RV3028_CTRL1_EERD; | |
198 | if (*eerd) | |
199 | return 0; | |
200 | ||
201 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1, | |
202 | RV3028_CTRL1_EERD, RV3028_CTRL1_EERD); | |
203 | if (ret) | |
204 | return ret; | |
205 | ||
206 | ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, | |
207 | !(status & RV3028_STATUS_EEBUSY), | |
208 | RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); | |
209 | if (ret) { | |
210 | rv3028_exit_eerd(rv3028, *eerd); | |
211 | ||
212 | return ret; | |
213 | } | |
214 | ||
215 | return 0; | |
216 | } | |
217 | ||
024e6f3d AB |
218 | static int rv3028_update_eeprom(struct rv3028_data *rv3028, u32 eerd) |
219 | { | |
220 | u32 status; | |
221 | int ret; | |
222 | ||
223 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0); | |
224 | if (ret) | |
225 | goto exit_eerd; | |
226 | ||
227 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, RV3028_EEPROM_CMD_UPDATE); | |
228 | if (ret) | |
229 | goto exit_eerd; | |
230 | ||
231 | usleep_range(63000, RV3028_EEBUSY_TIMEOUT); | |
232 | ||
233 | ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, | |
234 | !(status & RV3028_STATUS_EEBUSY), | |
235 | RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); | |
236 | ||
237 | exit_eerd: | |
238 | rv3028_exit_eerd(rv3028, eerd); | |
239 | ||
240 | return ret; | |
241 | } | |
242 | ||
243 | static int rv3028_update_cfg(struct rv3028_data *rv3028, unsigned int reg, | |
244 | unsigned int mask, unsigned int val) | |
245 | { | |
246 | u32 eerd; | |
247 | int ret; | |
248 | ||
249 | ret = rv3028_enter_eerd(rv3028, &eerd); | |
250 | if (ret) | |
251 | return ret; | |
252 | ||
253 | ret = regmap_update_bits(rv3028->regmap, reg, mask, val); | |
254 | if (ret) { | |
255 | rv3028_exit_eerd(rv3028, eerd); | |
256 | return ret; | |
257 | } | |
258 | ||
259 | return rv3028_update_eeprom(rv3028, eerd); | |
260 | } | |
261 | ||
e6e7376c AB |
262 | static irqreturn_t rv3028_handle_irq(int irq, void *dev_id) |
263 | { | |
264 | struct rv3028_data *rv3028 = dev_id; | |
265 | unsigned long events = 0; | |
266 | u32 status = 0, ctrl = 0; | |
267 | ||
268 | if (regmap_read(rv3028->regmap, RV3028_STATUS, &status) < 0 || | |
269 | status == 0) { | |
270 | return IRQ_NONE; | |
271 | } | |
272 | ||
f007c479 AB |
273 | status &= ~RV3028_STATUS_PORF; |
274 | ||
e6e7376c AB |
275 | if (status & RV3028_STATUS_TF) { |
276 | status |= RV3028_STATUS_TF; | |
277 | ctrl |= RV3028_CTRL2_TIE; | |
278 | events |= RTC_PF; | |
279 | } | |
280 | ||
281 | if (status & RV3028_STATUS_AF) { | |
282 | status |= RV3028_STATUS_AF; | |
283 | ctrl |= RV3028_CTRL2_AIE; | |
284 | events |= RTC_AF; | |
285 | } | |
286 | ||
287 | if (status & RV3028_STATUS_UF) { | |
288 | status |= RV3028_STATUS_UF; | |
289 | ctrl |= RV3028_CTRL2_UIE; | |
290 | events |= RTC_UF; | |
291 | } | |
292 | ||
293 | if (events) { | |
294 | rtc_update_irq(rv3028->rtc, 1, events); | |
295 | regmap_update_bits(rv3028->regmap, RV3028_STATUS, status, 0); | |
296 | regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ctrl, 0); | |
297 | } | |
298 | ||
299 | if (status & RV3028_STATUS_EVF) { | |
300 | sysfs_notify(&rv3028->rtc->dev.kobj, NULL, | |
301 | dev_attr_timestamp0.attr.name); | |
302 | dev_warn(&rv3028->rtc->dev, "event detected"); | |
303 | } | |
304 | ||
305 | return IRQ_HANDLED; | |
306 | } | |
307 | ||
308 | static int rv3028_get_time(struct device *dev, struct rtc_time *tm) | |
309 | { | |
310 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
311 | u8 date[7]; | |
312 | int ret, status; | |
313 | ||
314 | ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); | |
315 | if (ret < 0) | |
316 | return ret; | |
317 | ||
c37b6430 | 318 | if (status & RV3028_STATUS_PORF) |
e6e7376c | 319 | return -EINVAL; |
e6e7376c AB |
320 | |
321 | ret = regmap_bulk_read(rv3028->regmap, RV3028_SEC, date, sizeof(date)); | |
322 | if (ret) | |
323 | return ret; | |
324 | ||
325 | tm->tm_sec = bcd2bin(date[RV3028_SEC] & 0x7f); | |
326 | tm->tm_min = bcd2bin(date[RV3028_MIN] & 0x7f); | |
327 | tm->tm_hour = bcd2bin(date[RV3028_HOUR] & 0x3f); | |
6e00b6d0 | 328 | tm->tm_wday = date[RV3028_WDAY] & 0x7f; |
e6e7376c AB |
329 | tm->tm_mday = bcd2bin(date[RV3028_DAY] & 0x3f); |
330 | tm->tm_mon = bcd2bin(date[RV3028_MONTH] & 0x1f) - 1; | |
331 | tm->tm_year = bcd2bin(date[RV3028_YEAR]) + 100; | |
332 | ||
333 | return 0; | |
334 | } | |
335 | ||
336 | static int rv3028_set_time(struct device *dev, struct rtc_time *tm) | |
337 | { | |
338 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
339 | u8 date[7]; | |
340 | int ret; | |
341 | ||
342 | date[RV3028_SEC] = bin2bcd(tm->tm_sec); | |
343 | date[RV3028_MIN] = bin2bcd(tm->tm_min); | |
344 | date[RV3028_HOUR] = bin2bcd(tm->tm_hour); | |
6e00b6d0 | 345 | date[RV3028_WDAY] = tm->tm_wday; |
e6e7376c AB |
346 | date[RV3028_DAY] = bin2bcd(tm->tm_mday); |
347 | date[RV3028_MONTH] = bin2bcd(tm->tm_mon + 1); | |
348 | date[RV3028_YEAR] = bin2bcd(tm->tm_year - 100); | |
349 | ||
350 | /* | |
351 | * Writing to the Seconds register has the same effect as setting RESET | |
352 | * bit to 1 | |
353 | */ | |
354 | ret = regmap_bulk_write(rv3028->regmap, RV3028_SEC, date, | |
355 | sizeof(date)); | |
356 | if (ret) | |
357 | return ret; | |
358 | ||
359 | ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, | |
360 | RV3028_STATUS_PORF, 0); | |
361 | ||
362 | return ret; | |
363 | } | |
364 | ||
365 | static int rv3028_get_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
366 | { | |
367 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
368 | u8 alarmvals[3]; | |
369 | int status, ctrl, ret; | |
370 | ||
371 | ret = regmap_bulk_read(rv3028->regmap, RV3028_ALARM_MIN, alarmvals, | |
372 | sizeof(alarmvals)); | |
373 | if (ret) | |
374 | return ret; | |
375 | ||
376 | ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); | |
377 | if (ret < 0) | |
378 | return ret; | |
379 | ||
380 | ret = regmap_read(rv3028->regmap, RV3028_CTRL2, &ctrl); | |
381 | if (ret < 0) | |
382 | return ret; | |
383 | ||
384 | alrm->time.tm_sec = 0; | |
385 | alrm->time.tm_min = bcd2bin(alarmvals[0] & 0x7f); | |
386 | alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f); | |
387 | alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f); | |
388 | ||
389 | alrm->enabled = !!(ctrl & RV3028_CTRL2_AIE); | |
390 | alrm->pending = (status & RV3028_STATUS_AF) && alrm->enabled; | |
391 | ||
392 | return 0; | |
393 | } | |
394 | ||
395 | static int rv3028_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
396 | { | |
397 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
398 | u8 alarmvals[3]; | |
399 | u8 ctrl = 0; | |
400 | int ret; | |
401 | ||
402 | /* The alarm has no seconds, round up to nearest minute */ | |
403 | if (alrm->time.tm_sec) { | |
404 | time64_t alarm_time = rtc_tm_to_time64(&alrm->time); | |
405 | ||
406 | alarm_time += 60 - alrm->time.tm_sec; | |
407 | rtc_time64_to_tm(alarm_time, &alrm->time); | |
408 | } | |
409 | ||
410 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, | |
411 | RV3028_CTRL2_AIE | RV3028_CTRL2_UIE, 0); | |
412 | if (ret) | |
413 | return ret; | |
414 | ||
415 | alarmvals[0] = bin2bcd(alrm->time.tm_min); | |
416 | alarmvals[1] = bin2bcd(alrm->time.tm_hour); | |
417 | alarmvals[2] = bin2bcd(alrm->time.tm_mday); | |
418 | ||
419 | ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, | |
420 | RV3028_STATUS_AF, 0); | |
421 | if (ret) | |
422 | return ret; | |
423 | ||
424 | ret = regmap_bulk_write(rv3028->regmap, RV3028_ALARM_MIN, alarmvals, | |
425 | sizeof(alarmvals)); | |
426 | if (ret) | |
427 | return ret; | |
428 | ||
429 | if (alrm->enabled) { | |
430 | if (rv3028->rtc->uie_rtctimer.enabled) | |
431 | ctrl |= RV3028_CTRL2_UIE; | |
432 | if (rv3028->rtc->aie_timer.enabled) | |
433 | ctrl |= RV3028_CTRL2_AIE; | |
434 | } | |
435 | ||
436 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, | |
437 | RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl); | |
438 | ||
439 | return ret; | |
440 | } | |
441 | ||
442 | static int rv3028_alarm_irq_enable(struct device *dev, unsigned int enabled) | |
443 | { | |
444 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
445 | int ctrl = 0, ret; | |
446 | ||
447 | if (enabled) { | |
448 | if (rv3028->rtc->uie_rtctimer.enabled) | |
449 | ctrl |= RV3028_CTRL2_UIE; | |
450 | if (rv3028->rtc->aie_timer.enabled) | |
451 | ctrl |= RV3028_CTRL2_AIE; | |
452 | } | |
453 | ||
454 | ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, | |
455 | RV3028_STATUS_AF | RV3028_STATUS_UF, 0); | |
456 | if (ret) | |
457 | return ret; | |
458 | ||
459 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, | |
460 | RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl); | |
461 | if (ret) | |
462 | return ret; | |
463 | ||
464 | return 0; | |
465 | } | |
466 | ||
467 | static int rv3028_read_offset(struct device *dev, long *offset) | |
468 | { | |
469 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
470 | int ret, value, steps; | |
471 | ||
472 | ret = regmap_read(rv3028->regmap, RV3028_OFFSET, &value); | |
473 | if (ret < 0) | |
474 | return ret; | |
475 | ||
476 | steps = sign_extend32(value << 1, 8); | |
477 | ||
478 | ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value); | |
479 | if (ret < 0) | |
480 | return ret; | |
481 | ||
482 | steps += value >> 7; | |
483 | ||
484 | *offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000); | |
485 | ||
486 | return 0; | |
487 | } | |
488 | ||
489 | static int rv3028_set_offset(struct device *dev, long offset) | |
490 | { | |
491 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
024e6f3d | 492 | u32 eerd; |
e6e7376c AB |
493 | int ret; |
494 | ||
495 | offset = clamp(offset, -244141L, 243187L) * 1000; | |
496 | offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT); | |
497 | ||
024e6f3d AB |
498 | ret = rv3028_enter_eerd(rv3028, &eerd); |
499 | if (ret) | |
500 | return ret; | |
501 | ||
e6e7376c AB |
502 | ret = regmap_write(rv3028->regmap, RV3028_OFFSET, offset >> 1); |
503 | if (ret < 0) | |
024e6f3d AB |
504 | goto exit_eerd; |
505 | ||
506 | ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP, BIT(7), | |
507 | offset << 7); | |
508 | if (ret < 0) | |
509 | goto exit_eerd; | |
510 | ||
511 | return rv3028_update_eeprom(rv3028, eerd); | |
512 | ||
513 | exit_eerd: | |
514 | rv3028_exit_eerd(rv3028, eerd); | |
515 | ||
516 | return ret; | |
e6e7376c | 517 | |
e6e7376c AB |
518 | } |
519 | ||
018d959b AB |
520 | static int rv3028_param_get(struct device *dev, struct rtc_param *param) |
521 | { | |
522 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
523 | int ret; | |
e5f12a39 | 524 | u32 value; |
018d959b AB |
525 | |
526 | switch(param->param) { | |
018d959b AB |
527 | case RTC_PARAM_BACKUP_SWITCH_MODE: |
528 | ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value); | |
529 | if (ret < 0) | |
530 | return ret; | |
531 | ||
532 | value = FIELD_GET(RV3028_BACKUP_BSM, value); | |
533 | ||
534 | switch(value) { | |
535 | case RV3028_BACKUP_BSM_DSM: | |
536 | param->uvalue = RTC_BSM_DIRECT; | |
537 | break; | |
538 | case RV3028_BACKUP_BSM_LSM: | |
539 | param->uvalue = RTC_BSM_LEVEL; | |
540 | break; | |
541 | default: | |
542 | param->uvalue = RTC_BSM_DISABLED; | |
543 | } | |
544 | break; | |
545 | ||
546 | default: | |
547 | return -EINVAL; | |
548 | } | |
549 | ||
550 | return 0; | |
551 | } | |
552 | ||
553 | static int rv3028_param_set(struct device *dev, struct rtc_param *param) | |
554 | { | |
555 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
e5f12a39 | 556 | u8 mode; |
018d959b AB |
557 | |
558 | switch(param->param) { | |
018d959b AB |
559 | case RTC_PARAM_BACKUP_SWITCH_MODE: |
560 | switch (param->uvalue) { | |
561 | case RTC_BSM_DISABLED: | |
562 | mode = 0; | |
563 | break; | |
564 | case RTC_BSM_DIRECT: | |
565 | mode = RV3028_BACKUP_BSM_DSM; | |
566 | break; | |
567 | case RTC_BSM_LEVEL: | |
568 | mode = RV3028_BACKUP_BSM_LSM; | |
569 | break; | |
570 | default: | |
571 | return -EINVAL; | |
572 | } | |
573 | ||
574 | return rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_BSM, | |
575 | FIELD_PREP(RV3028_BACKUP_BSM, mode)); | |
576 | ||
577 | default: | |
578 | return -EINVAL; | |
579 | } | |
580 | ||
581 | return 0; | |
582 | } | |
583 | ||
e6e7376c AB |
584 | static int rv3028_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) |
585 | { | |
586 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
587 | int status, ret = 0; | |
588 | ||
589 | switch (cmd) { | |
590 | case RTC_VL_READ: | |
591 | ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); | |
592 | if (ret < 0) | |
593 | return ret; | |
594 | ||
86e655f9 AB |
595 | status = status & RV3028_STATUS_PORF ? RTC_VL_DATA_INVALID : 0; |
596 | return put_user(status, (unsigned int __user *)arg); | |
e6e7376c | 597 | |
e6e7376c AB |
598 | default: |
599 | return -ENOIOCTLCMD; | |
600 | } | |
601 | } | |
602 | ||
603 | static int rv3028_nvram_write(void *priv, unsigned int offset, void *val, | |
604 | size_t bytes) | |
605 | { | |
606 | return regmap_bulk_write(priv, RV3028_RAM1 + offset, val, bytes); | |
607 | } | |
608 | ||
609 | static int rv3028_nvram_read(void *priv, unsigned int offset, void *val, | |
610 | size_t bytes) | |
611 | { | |
612 | return regmap_bulk_read(priv, RV3028_RAM1 + offset, val, bytes); | |
613 | } | |
614 | ||
615 | static int rv3028_eeprom_write(void *priv, unsigned int offset, void *val, | |
616 | size_t bytes) | |
617 | { | |
de0ad60e AB |
618 | struct rv3028_data *rv3028 = priv; |
619 | u32 status, eerd; | |
620 | int i, ret; | |
e6e7376c AB |
621 | u8 *buf = val; |
622 | ||
de0ad60e | 623 | ret = rv3028_enter_eerd(rv3028, &eerd); |
e6e7376c AB |
624 | if (ret) |
625 | return ret; | |
626 | ||
e6e7376c | 627 | for (i = 0; i < bytes; i++) { |
de0ad60e | 628 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i); |
e6e7376c AB |
629 | if (ret) |
630 | goto restore_eerd; | |
631 | ||
de0ad60e | 632 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_DATA, buf[i]); |
e6e7376c AB |
633 | if (ret) |
634 | goto restore_eerd; | |
635 | ||
de0ad60e | 636 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0); |
e6e7376c AB |
637 | if (ret) |
638 | goto restore_eerd; | |
639 | ||
de0ad60e | 640 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, |
e6e7376c AB |
641 | RV3028_EEPROM_CMD_WRITE); |
642 | if (ret) | |
643 | goto restore_eerd; | |
644 | ||
645 | usleep_range(RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); | |
646 | ||
de0ad60e | 647 | ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, |
e6e7376c AB |
648 | !(status & RV3028_STATUS_EEBUSY), |
649 | RV3028_EEBUSY_POLL, | |
650 | RV3028_EEBUSY_TIMEOUT); | |
651 | if (ret) | |
652 | goto restore_eerd; | |
653 | } | |
654 | ||
655 | restore_eerd: | |
de0ad60e | 656 | rv3028_exit_eerd(rv3028, eerd); |
e6e7376c AB |
657 | |
658 | return ret; | |
659 | } | |
660 | ||
661 | static int rv3028_eeprom_read(void *priv, unsigned int offset, void *val, | |
662 | size_t bytes) | |
663 | { | |
de0ad60e AB |
664 | struct rv3028_data *rv3028 = priv; |
665 | u32 status, eerd, data; | |
666 | int i, ret; | |
e6e7376c AB |
667 | u8 *buf = val; |
668 | ||
de0ad60e | 669 | ret = rv3028_enter_eerd(rv3028, &eerd); |
e6e7376c AB |
670 | if (ret) |
671 | return ret; | |
672 | ||
e6e7376c | 673 | for (i = 0; i < bytes; i++) { |
de0ad60e | 674 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i); |
e6e7376c AB |
675 | if (ret) |
676 | goto restore_eerd; | |
677 | ||
de0ad60e | 678 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0); |
e6e7376c AB |
679 | if (ret) |
680 | goto restore_eerd; | |
681 | ||
de0ad60e | 682 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, |
e6e7376c AB |
683 | RV3028_EEPROM_CMD_READ); |
684 | if (ret) | |
685 | goto restore_eerd; | |
686 | ||
de0ad60e | 687 | ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, |
e6e7376c AB |
688 | !(status & RV3028_STATUS_EEBUSY), |
689 | RV3028_EEBUSY_POLL, | |
690 | RV3028_EEBUSY_TIMEOUT); | |
691 | if (ret) | |
692 | goto restore_eerd; | |
693 | ||
de0ad60e | 694 | ret = regmap_read(rv3028->regmap, RV3028_EEPROM_DATA, &data); |
e6e7376c AB |
695 | if (ret) |
696 | goto restore_eerd; | |
697 | buf[i] = data; | |
698 | } | |
699 | ||
700 | restore_eerd: | |
de0ad60e | 701 | rv3028_exit_eerd(rv3028, eerd); |
e6e7376c AB |
702 | |
703 | return ret; | |
704 | } | |
705 | ||
f583c341 PN |
706 | #ifdef CONFIG_COMMON_CLK |
707 | #define clkout_hw_to_rv3028(hw) container_of(hw, struct rv3028_data, clkout_hw) | |
708 | ||
709 | static int clkout_rates[] = { | |
710 | 32768, | |
711 | 8192, | |
712 | 1024, | |
713 | 64, | |
714 | 32, | |
715 | 1, | |
716 | }; | |
717 | ||
718 | static unsigned long rv3028_clkout_recalc_rate(struct clk_hw *hw, | |
719 | unsigned long parent_rate) | |
720 | { | |
721 | int clkout, ret; | |
722 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); | |
723 | ||
724 | ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout); | |
725 | if (ret < 0) | |
726 | return 0; | |
727 | ||
728 | clkout &= RV3028_CLKOUT_FD_MASK; | |
729 | return clkout_rates[clkout]; | |
730 | } | |
731 | ||
732 | static long rv3028_clkout_round_rate(struct clk_hw *hw, unsigned long rate, | |
733 | unsigned long *prate) | |
734 | { | |
735 | int i; | |
736 | ||
737 | for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) | |
738 | if (clkout_rates[i] <= rate) | |
739 | return clkout_rates[i]; | |
740 | ||
741 | return 0; | |
742 | } | |
743 | ||
744 | static int rv3028_clkout_set_rate(struct clk_hw *hw, unsigned long rate, | |
745 | unsigned long parent_rate) | |
746 | { | |
747 | int i, ret; | |
00e8e87f | 748 | u32 enabled; |
f583c341 PN |
749 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); |
750 | ||
00e8e87f AB |
751 | ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &enabled); |
752 | if (ret < 0) | |
753 | return ret; | |
754 | ||
f583c341 PN |
755 | ret = regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0); |
756 | if (ret < 0) | |
757 | return ret; | |
758 | ||
00e8e87f | 759 | enabled &= RV3028_CLKOUT_CLKOE; |
f583c341 | 760 | |
00e8e87f AB |
761 | for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) |
762 | if (clkout_rates[i] == rate) | |
024e6f3d AB |
763 | return rv3028_update_cfg(rv3028, RV3028_CLKOUT, 0xff, |
764 | RV3028_CLKOUT_CLKSY | enabled | i); | |
f583c341 PN |
765 | |
766 | return -EINVAL; | |
767 | } | |
768 | ||
769 | static int rv3028_clkout_prepare(struct clk_hw *hw) | |
770 | { | |
771 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); | |
772 | ||
773 | return regmap_write(rv3028->regmap, RV3028_CLKOUT, | |
774 | RV3028_CLKOUT_CLKSY | RV3028_CLKOUT_CLKOE); | |
775 | } | |
776 | ||
777 | static void rv3028_clkout_unprepare(struct clk_hw *hw) | |
778 | { | |
779 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); | |
780 | ||
781 | regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0); | |
782 | regmap_update_bits(rv3028->regmap, RV3028_STATUS, | |
783 | RV3028_STATUS_CLKF, 0); | |
784 | } | |
785 | ||
786 | static int rv3028_clkout_is_prepared(struct clk_hw *hw) | |
787 | { | |
788 | int clkout, ret; | |
789 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); | |
790 | ||
791 | ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout); | |
792 | if (ret < 0) | |
793 | return ret; | |
794 | ||
795 | return !!(clkout & RV3028_CLKOUT_CLKOE); | |
796 | } | |
797 | ||
798 | static const struct clk_ops rv3028_clkout_ops = { | |
799 | .prepare = rv3028_clkout_prepare, | |
800 | .unprepare = rv3028_clkout_unprepare, | |
801 | .is_prepared = rv3028_clkout_is_prepared, | |
802 | .recalc_rate = rv3028_clkout_recalc_rate, | |
803 | .round_rate = rv3028_clkout_round_rate, | |
804 | .set_rate = rv3028_clkout_set_rate, | |
805 | }; | |
806 | ||
807 | static int rv3028_clkout_register_clk(struct rv3028_data *rv3028, | |
808 | struct i2c_client *client) | |
809 | { | |
810 | int ret; | |
811 | struct clk *clk; | |
812 | struct clk_init_data init; | |
813 | struct device_node *node = client->dev.of_node; | |
814 | ||
815 | ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, | |
816 | RV3028_STATUS_CLKF, 0); | |
817 | if (ret < 0) | |
818 | return ret; | |
819 | ||
820 | init.name = "rv3028-clkout"; | |
821 | init.ops = &rv3028_clkout_ops; | |
822 | init.flags = 0; | |
823 | init.parent_names = NULL; | |
824 | init.num_parents = 0; | |
825 | rv3028->clkout_hw.init = &init; | |
826 | ||
827 | /* optional override of the clockname */ | |
828 | of_property_read_string(node, "clock-output-names", &init.name); | |
829 | ||
830 | /* register the clock */ | |
831 | clk = devm_clk_register(&client->dev, &rv3028->clkout_hw); | |
832 | if (!IS_ERR(clk)) | |
833 | of_clk_add_provider(node, of_clk_src_simple_get, clk); | |
834 | ||
835 | return 0; | |
836 | } | |
837 | #endif | |
838 | ||
0f769569 | 839 | static const struct rtc_class_ops rv3028_rtc_ops = { |
e6e7376c AB |
840 | .read_time = rv3028_get_time, |
841 | .set_time = rv3028_set_time, | |
0f769569 AB |
842 | .read_alarm = rv3028_get_alarm, |
843 | .set_alarm = rv3028_set_alarm, | |
844 | .alarm_irq_enable = rv3028_alarm_irq_enable, | |
e6e7376c AB |
845 | .read_offset = rv3028_read_offset, |
846 | .set_offset = rv3028_set_offset, | |
847 | .ioctl = rv3028_ioctl, | |
018d959b AB |
848 | .param_get = rv3028_param_get, |
849 | .param_set = rv3028_param_set, | |
e6e7376c AB |
850 | }; |
851 | ||
852 | static const struct regmap_config regmap_config = { | |
853 | .reg_bits = 8, | |
854 | .val_bits = 8, | |
855 | .max_register = 0x37, | |
856 | }; | |
857 | ||
858 | static int rv3028_probe(struct i2c_client *client) | |
859 | { | |
860 | struct rv3028_data *rv3028; | |
861 | int ret, status; | |
862 | u32 ohms; | |
863 | struct nvmem_config nvmem_cfg = { | |
864 | .name = "rv3028_nvram", | |
865 | .word_size = 1, | |
866 | .stride = 1, | |
867 | .size = 2, | |
868 | .type = NVMEM_TYPE_BATTERY_BACKED, | |
869 | .reg_read = rv3028_nvram_read, | |
870 | .reg_write = rv3028_nvram_write, | |
871 | }; | |
872 | struct nvmem_config eeprom_cfg = { | |
873 | .name = "rv3028_eeprom", | |
874 | .word_size = 1, | |
875 | .stride = 1, | |
876 | .size = 43, | |
877 | .type = NVMEM_TYPE_EEPROM, | |
878 | .reg_read = rv3028_eeprom_read, | |
879 | .reg_write = rv3028_eeprom_write, | |
880 | }; | |
881 | ||
882 | rv3028 = devm_kzalloc(&client->dev, sizeof(struct rv3028_data), | |
883 | GFP_KERNEL); | |
884 | if (!rv3028) | |
885 | return -ENOMEM; | |
886 | ||
887 | rv3028->regmap = devm_regmap_init_i2c(client, ®map_config); | |
c3b29bf6 CY |
888 | if (IS_ERR(rv3028->regmap)) |
889 | return PTR_ERR(rv3028->regmap); | |
e6e7376c AB |
890 | |
891 | i2c_set_clientdata(client, rv3028); | |
892 | ||
893 | ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); | |
894 | if (ret < 0) | |
895 | return ret; | |
896 | ||
e6e7376c AB |
897 | if (status & RV3028_STATUS_AF) |
898 | dev_warn(&client->dev, "An alarm may have been missed.\n"); | |
899 | ||
900 | rv3028->rtc = devm_rtc_allocate_device(&client->dev); | |
44c638ce | 901 | if (IS_ERR(rv3028->rtc)) |
e6e7376c | 902 | return PTR_ERR(rv3028->rtc); |
e6e7376c AB |
903 | |
904 | if (client->irq > 0) { | |
16b26f60 WE |
905 | unsigned long flags; |
906 | ||
907 | /* | |
908 | * If flags = 0, devm_request_threaded_irq() will use IRQ flags | |
909 | * obtained from device tree. | |
910 | */ | |
911 | if (dev_fwnode(&client->dev)) | |
912 | flags = 0; | |
913 | else | |
914 | flags = IRQF_TRIGGER_LOW; | |
915 | ||
e6e7376c AB |
916 | ret = devm_request_threaded_irq(&client->dev, client->irq, |
917 | NULL, rv3028_handle_irq, | |
16b26f60 | 918 | flags | IRQF_ONESHOT, |
e6e7376c AB |
919 | "rv3028", rv3028); |
920 | if (ret) { | |
921 | dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); | |
922 | client->irq = 0; | |
e6e7376c AB |
923 | } |
924 | } | |
0f769569 AB |
925 | if (!client->irq) |
926 | clear_bit(RTC_FEATURE_ALARM, rv3028->rtc->features); | |
e6e7376c AB |
927 | |
928 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1, | |
929 | RV3028_CTRL1_WADA, RV3028_CTRL1_WADA); | |
930 | if (ret) | |
931 | return ret; | |
932 | ||
933 | /* setup timestamping */ | |
934 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, | |
935 | RV3028_CTRL2_EIE | RV3028_CTRL2_TSE, | |
936 | RV3028_CTRL2_EIE | RV3028_CTRL2_TSE); | |
937 | if (ret) | |
938 | return ret; | |
939 | ||
940 | /* setup trickle charger */ | |
941 | if (!device_property_read_u32(&client->dev, "trickle-resistor-ohms", | |
942 | &ohms)) { | |
943 | int i; | |
944 | ||
945 | for (i = 0; i < ARRAY_SIZE(rv3028_trickle_resistors); i++) | |
946 | if (ohms == rv3028_trickle_resistors[i]) | |
947 | break; | |
948 | ||
949 | if (i < ARRAY_SIZE(rv3028_trickle_resistors)) { | |
024e6f3d AB |
950 | ret = rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_TCE | |
951 | RV3028_BACKUP_TCR_MASK, RV3028_BACKUP_TCE | i); | |
e6e7376c AB |
952 | if (ret) |
953 | return ret; | |
954 | } else { | |
955 | dev_warn(&client->dev, "invalid trickle resistor value\n"); | |
956 | } | |
957 | } | |
958 | ||
959 | ret = rtc_add_group(rv3028->rtc, &rv3028_attr_group); | |
960 | if (ret) | |
961 | return ret; | |
962 | ||
018d959b AB |
963 | set_bit(RTC_FEATURE_BACKUP_SWITCH_MODE, rv3028->rtc->features); |
964 | ||
e6e7376c AB |
965 | rv3028->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; |
966 | rv3028->rtc->range_max = RTC_TIMESTAMP_END_2099; | |
967 | rv3028->rtc->ops = &rv3028_rtc_ops; | |
fdcfd854 | 968 | ret = devm_rtc_register_device(rv3028->rtc); |
e6e7376c AB |
969 | if (ret) |
970 | return ret; | |
971 | ||
972 | nvmem_cfg.priv = rv3028->regmap; | |
3a905c2d | 973 | devm_rtc_nvmem_register(rv3028->rtc, &nvmem_cfg); |
de0ad60e | 974 | eeprom_cfg.priv = rv3028; |
3a905c2d | 975 | devm_rtc_nvmem_register(rv3028->rtc, &eeprom_cfg); |
e6e7376c AB |
976 | |
977 | rv3028->rtc->max_user_freq = 1; | |
978 | ||
f583c341 PN |
979 | #ifdef CONFIG_COMMON_CLK |
980 | rv3028_clkout_register_clk(rv3028, client); | |
981 | #endif | |
e6e7376c AB |
982 | return 0; |
983 | } | |
984 | ||
b6ef5d4a AB |
985 | static const struct acpi_device_id rv3028_i2c_acpi_match[] = { |
986 | { "MCRY3028" }, | |
987 | { } | |
988 | }; | |
989 | MODULE_DEVICE_TABLE(acpi, rv3028_i2c_acpi_match); | |
990 | ||
dff31b0b | 991 | static const __maybe_unused struct of_device_id rv3028_of_match[] = { |
e6e7376c AB |
992 | { .compatible = "microcrystal,rv3028", }, |
993 | { } | |
994 | }; | |
995 | MODULE_DEVICE_TABLE(of, rv3028_of_match); | |
996 | ||
997 | static struct i2c_driver rv3028_driver = { | |
998 | .driver = { | |
999 | .name = "rtc-rv3028", | |
b6ef5d4a | 1000 | .acpi_match_table = rv3028_i2c_acpi_match, |
e6e7376c AB |
1001 | .of_match_table = of_match_ptr(rv3028_of_match), |
1002 | }, | |
1003 | .probe_new = rv3028_probe, | |
1004 | }; | |
1005 | module_i2c_driver(rv3028_driver); | |
1006 | ||
1007 | MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>"); | |
1008 | MODULE_DESCRIPTION("Micro Crystal RV3028 RTC driver"); | |
1009 | MODULE_LICENSE("GPL v2"); |