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e6e7376c AB |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * RTC driver for the Micro Crystal RV3028 | |
4 | * | |
5 | * Copyright (C) 2019 Micro Crystal SA | |
6 | * | |
7 | * Alexandre Belloni <alexandre.belloni@bootlin.com> | |
8 | * | |
9 | */ | |
10 | ||
f583c341 | 11 | #include <linux/clk-provider.h> |
e6e7376c AB |
12 | #include <linux/bcd.h> |
13 | #include <linux/bitops.h> | |
14 | #include <linux/i2c.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/log2.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/of_device.h> | |
20 | #include <linux/regmap.h> | |
21 | #include <linux/rtc.h> | |
22 | ||
23 | #define RV3028_SEC 0x00 | |
24 | #define RV3028_MIN 0x01 | |
25 | #define RV3028_HOUR 0x02 | |
26 | #define RV3028_WDAY 0x03 | |
27 | #define RV3028_DAY 0x04 | |
28 | #define RV3028_MONTH 0x05 | |
29 | #define RV3028_YEAR 0x06 | |
30 | #define RV3028_ALARM_MIN 0x07 | |
31 | #define RV3028_ALARM_HOUR 0x08 | |
32 | #define RV3028_ALARM_DAY 0x09 | |
33 | #define RV3028_STATUS 0x0E | |
34 | #define RV3028_CTRL1 0x0F | |
35 | #define RV3028_CTRL2 0x10 | |
36 | #define RV3028_EVT_CTRL 0x13 | |
37 | #define RV3028_TS_COUNT 0x14 | |
38 | #define RV3028_TS_SEC 0x15 | |
39 | #define RV3028_RAM1 0x1F | |
40 | #define RV3028_EEPROM_ADDR 0x25 | |
41 | #define RV3028_EEPROM_DATA 0x26 | |
42 | #define RV3028_EEPROM_CMD 0x27 | |
43 | #define RV3028_CLKOUT 0x35 | |
44 | #define RV3028_OFFSET 0x36 | |
45 | #define RV3028_BACKUP 0x37 | |
46 | ||
47 | #define RV3028_STATUS_PORF BIT(0) | |
48 | #define RV3028_STATUS_EVF BIT(1) | |
49 | #define RV3028_STATUS_AF BIT(2) | |
50 | #define RV3028_STATUS_TF BIT(3) | |
51 | #define RV3028_STATUS_UF BIT(4) | |
52 | #define RV3028_STATUS_BSF BIT(5) | |
53 | #define RV3028_STATUS_CLKF BIT(6) | |
54 | #define RV3028_STATUS_EEBUSY BIT(7) | |
55 | ||
f583c341 PN |
56 | #define RV3028_CLKOUT_FD_MASK GENMASK(2, 0) |
57 | #define RV3028_CLKOUT_PORIE BIT(3) | |
58 | #define RV3028_CLKOUT_CLKSY BIT(6) | |
59 | #define RV3028_CLKOUT_CLKOE BIT(7) | |
60 | ||
e6e7376c AB |
61 | #define RV3028_CTRL1_EERD BIT(3) |
62 | #define RV3028_CTRL1_WADA BIT(5) | |
63 | ||
64 | #define RV3028_CTRL2_RESET BIT(0) | |
65 | #define RV3028_CTRL2_12_24 BIT(1) | |
66 | #define RV3028_CTRL2_EIE BIT(2) | |
67 | #define RV3028_CTRL2_AIE BIT(3) | |
68 | #define RV3028_CTRL2_TIE BIT(4) | |
69 | #define RV3028_CTRL2_UIE BIT(5) | |
70 | #define RV3028_CTRL2_TSE BIT(7) | |
71 | ||
72 | #define RV3028_EVT_CTRL_TSR BIT(2) | |
73 | ||
74 | #define RV3028_EEPROM_CMD_WRITE 0x21 | |
75 | #define RV3028_EEPROM_CMD_READ 0x22 | |
76 | ||
77 | #define RV3028_EEBUSY_POLL 10000 | |
78 | #define RV3028_EEBUSY_TIMEOUT 100000 | |
79 | ||
80 | #define RV3028_BACKUP_TCE BIT(5) | |
81 | #define RV3028_BACKUP_TCR_MASK GENMASK(1,0) | |
82 | ||
83 | #define OFFSET_STEP_PPT 953674 | |
84 | ||
85 | enum rv3028_type { | |
86 | rv_3028, | |
87 | }; | |
88 | ||
89 | struct rv3028_data { | |
90 | struct regmap *regmap; | |
91 | struct rtc_device *rtc; | |
92 | enum rv3028_type type; | |
f583c341 PN |
93 | #ifdef CONFIG_COMMON_CLK |
94 | struct clk_hw clkout_hw; | |
95 | #endif | |
e6e7376c AB |
96 | }; |
97 | ||
98 | static u16 rv3028_trickle_resistors[] = {1000, 3000, 6000, 11000}; | |
99 | ||
100 | static ssize_t timestamp0_store(struct device *dev, | |
101 | struct device_attribute *attr, | |
102 | const char *buf, size_t count) | |
103 | { | |
104 | struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); | |
105 | ||
106 | regmap_update_bits(rv3028->regmap, RV3028_EVT_CTRL, RV3028_EVT_CTRL_TSR, | |
107 | RV3028_EVT_CTRL_TSR); | |
108 | ||
109 | return count; | |
110 | }; | |
111 | ||
112 | static ssize_t timestamp0_show(struct device *dev, | |
113 | struct device_attribute *attr, char *buf) | |
114 | { | |
115 | struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); | |
116 | struct rtc_time tm; | |
117 | int ret, count; | |
118 | u8 date[6]; | |
119 | ||
120 | ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count); | |
121 | if (ret) | |
122 | return ret; | |
123 | ||
124 | if (!count) | |
125 | return 0; | |
126 | ||
127 | ret = regmap_bulk_read(rv3028->regmap, RV3028_TS_SEC, date, | |
128 | sizeof(date)); | |
129 | if (ret) | |
130 | return ret; | |
131 | ||
132 | tm.tm_sec = bcd2bin(date[0]); | |
133 | tm.tm_min = bcd2bin(date[1]); | |
134 | tm.tm_hour = bcd2bin(date[2]); | |
135 | tm.tm_mday = bcd2bin(date[3]); | |
136 | tm.tm_mon = bcd2bin(date[4]) - 1; | |
137 | tm.tm_year = bcd2bin(date[5]) + 100; | |
138 | ||
139 | ret = rtc_valid_tm(&tm); | |
140 | if (ret) | |
141 | return ret; | |
142 | ||
143 | return sprintf(buf, "%llu\n", | |
144 | (unsigned long long)rtc_tm_to_time64(&tm)); | |
145 | }; | |
146 | ||
147 | static DEVICE_ATTR_RW(timestamp0); | |
148 | ||
149 | static ssize_t timestamp0_count_show(struct device *dev, | |
150 | struct device_attribute *attr, char *buf) | |
151 | { | |
152 | struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); | |
153 | int ret, count; | |
154 | ||
155 | ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count); | |
156 | if (ret) | |
157 | return ret; | |
158 | ||
159 | return sprintf(buf, "%u\n", count); | |
160 | }; | |
161 | ||
162 | static DEVICE_ATTR_RO(timestamp0_count); | |
163 | ||
164 | static struct attribute *rv3028_attrs[] = { | |
165 | &dev_attr_timestamp0.attr, | |
166 | &dev_attr_timestamp0_count.attr, | |
167 | NULL | |
168 | }; | |
169 | ||
170 | static const struct attribute_group rv3028_attr_group = { | |
171 | .attrs = rv3028_attrs, | |
172 | }; | |
173 | ||
174 | static irqreturn_t rv3028_handle_irq(int irq, void *dev_id) | |
175 | { | |
176 | struct rv3028_data *rv3028 = dev_id; | |
177 | unsigned long events = 0; | |
178 | u32 status = 0, ctrl = 0; | |
179 | ||
180 | if (regmap_read(rv3028->regmap, RV3028_STATUS, &status) < 0 || | |
181 | status == 0) { | |
182 | return IRQ_NONE; | |
183 | } | |
184 | ||
185 | if (status & RV3028_STATUS_PORF) | |
186 | dev_warn(&rv3028->rtc->dev, "Voltage low, data loss detected.\n"); | |
187 | ||
188 | if (status & RV3028_STATUS_TF) { | |
189 | status |= RV3028_STATUS_TF; | |
190 | ctrl |= RV3028_CTRL2_TIE; | |
191 | events |= RTC_PF; | |
192 | } | |
193 | ||
194 | if (status & RV3028_STATUS_AF) { | |
195 | status |= RV3028_STATUS_AF; | |
196 | ctrl |= RV3028_CTRL2_AIE; | |
197 | events |= RTC_AF; | |
198 | } | |
199 | ||
200 | if (status & RV3028_STATUS_UF) { | |
201 | status |= RV3028_STATUS_UF; | |
202 | ctrl |= RV3028_CTRL2_UIE; | |
203 | events |= RTC_UF; | |
204 | } | |
205 | ||
206 | if (events) { | |
207 | rtc_update_irq(rv3028->rtc, 1, events); | |
208 | regmap_update_bits(rv3028->regmap, RV3028_STATUS, status, 0); | |
209 | regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ctrl, 0); | |
210 | } | |
211 | ||
212 | if (status & RV3028_STATUS_EVF) { | |
213 | sysfs_notify(&rv3028->rtc->dev.kobj, NULL, | |
214 | dev_attr_timestamp0.attr.name); | |
215 | dev_warn(&rv3028->rtc->dev, "event detected"); | |
216 | } | |
217 | ||
218 | return IRQ_HANDLED; | |
219 | } | |
220 | ||
221 | static int rv3028_get_time(struct device *dev, struct rtc_time *tm) | |
222 | { | |
223 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
224 | u8 date[7]; | |
225 | int ret, status; | |
226 | ||
227 | ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); | |
228 | if (ret < 0) | |
229 | return ret; | |
230 | ||
231 | if (status & RV3028_STATUS_PORF) { | |
232 | dev_warn(dev, "Voltage low, data is invalid.\n"); | |
233 | return -EINVAL; | |
234 | } | |
235 | ||
236 | ret = regmap_bulk_read(rv3028->regmap, RV3028_SEC, date, sizeof(date)); | |
237 | if (ret) | |
238 | return ret; | |
239 | ||
240 | tm->tm_sec = bcd2bin(date[RV3028_SEC] & 0x7f); | |
241 | tm->tm_min = bcd2bin(date[RV3028_MIN] & 0x7f); | |
242 | tm->tm_hour = bcd2bin(date[RV3028_HOUR] & 0x3f); | |
243 | tm->tm_wday = ilog2(date[RV3028_WDAY] & 0x7f); | |
244 | tm->tm_mday = bcd2bin(date[RV3028_DAY] & 0x3f); | |
245 | tm->tm_mon = bcd2bin(date[RV3028_MONTH] & 0x1f) - 1; | |
246 | tm->tm_year = bcd2bin(date[RV3028_YEAR]) + 100; | |
247 | ||
248 | return 0; | |
249 | } | |
250 | ||
251 | static int rv3028_set_time(struct device *dev, struct rtc_time *tm) | |
252 | { | |
253 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
254 | u8 date[7]; | |
255 | int ret; | |
256 | ||
257 | date[RV3028_SEC] = bin2bcd(tm->tm_sec); | |
258 | date[RV3028_MIN] = bin2bcd(tm->tm_min); | |
259 | date[RV3028_HOUR] = bin2bcd(tm->tm_hour); | |
260 | date[RV3028_WDAY] = 1 << (tm->tm_wday); | |
261 | date[RV3028_DAY] = bin2bcd(tm->tm_mday); | |
262 | date[RV3028_MONTH] = bin2bcd(tm->tm_mon + 1); | |
263 | date[RV3028_YEAR] = bin2bcd(tm->tm_year - 100); | |
264 | ||
265 | /* | |
266 | * Writing to the Seconds register has the same effect as setting RESET | |
267 | * bit to 1 | |
268 | */ | |
269 | ret = regmap_bulk_write(rv3028->regmap, RV3028_SEC, date, | |
270 | sizeof(date)); | |
271 | if (ret) | |
272 | return ret; | |
273 | ||
274 | ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, | |
275 | RV3028_STATUS_PORF, 0); | |
276 | ||
277 | return ret; | |
278 | } | |
279 | ||
280 | static int rv3028_get_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
281 | { | |
282 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
283 | u8 alarmvals[3]; | |
284 | int status, ctrl, ret; | |
285 | ||
286 | ret = regmap_bulk_read(rv3028->regmap, RV3028_ALARM_MIN, alarmvals, | |
287 | sizeof(alarmvals)); | |
288 | if (ret) | |
289 | return ret; | |
290 | ||
291 | ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); | |
292 | if (ret < 0) | |
293 | return ret; | |
294 | ||
295 | ret = regmap_read(rv3028->regmap, RV3028_CTRL2, &ctrl); | |
296 | if (ret < 0) | |
297 | return ret; | |
298 | ||
299 | alrm->time.tm_sec = 0; | |
300 | alrm->time.tm_min = bcd2bin(alarmvals[0] & 0x7f); | |
301 | alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f); | |
302 | alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f); | |
303 | ||
304 | alrm->enabled = !!(ctrl & RV3028_CTRL2_AIE); | |
305 | alrm->pending = (status & RV3028_STATUS_AF) && alrm->enabled; | |
306 | ||
307 | return 0; | |
308 | } | |
309 | ||
310 | static int rv3028_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
311 | { | |
312 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
313 | u8 alarmvals[3]; | |
314 | u8 ctrl = 0; | |
315 | int ret; | |
316 | ||
317 | /* The alarm has no seconds, round up to nearest minute */ | |
318 | if (alrm->time.tm_sec) { | |
319 | time64_t alarm_time = rtc_tm_to_time64(&alrm->time); | |
320 | ||
321 | alarm_time += 60 - alrm->time.tm_sec; | |
322 | rtc_time64_to_tm(alarm_time, &alrm->time); | |
323 | } | |
324 | ||
325 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, | |
326 | RV3028_CTRL2_AIE | RV3028_CTRL2_UIE, 0); | |
327 | if (ret) | |
328 | return ret; | |
329 | ||
330 | alarmvals[0] = bin2bcd(alrm->time.tm_min); | |
331 | alarmvals[1] = bin2bcd(alrm->time.tm_hour); | |
332 | alarmvals[2] = bin2bcd(alrm->time.tm_mday); | |
333 | ||
334 | ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, | |
335 | RV3028_STATUS_AF, 0); | |
336 | if (ret) | |
337 | return ret; | |
338 | ||
339 | ret = regmap_bulk_write(rv3028->regmap, RV3028_ALARM_MIN, alarmvals, | |
340 | sizeof(alarmvals)); | |
341 | if (ret) | |
342 | return ret; | |
343 | ||
344 | if (alrm->enabled) { | |
345 | if (rv3028->rtc->uie_rtctimer.enabled) | |
346 | ctrl |= RV3028_CTRL2_UIE; | |
347 | if (rv3028->rtc->aie_timer.enabled) | |
348 | ctrl |= RV3028_CTRL2_AIE; | |
349 | } | |
350 | ||
351 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, | |
352 | RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl); | |
353 | ||
354 | return ret; | |
355 | } | |
356 | ||
357 | static int rv3028_alarm_irq_enable(struct device *dev, unsigned int enabled) | |
358 | { | |
359 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
360 | int ctrl = 0, ret; | |
361 | ||
362 | if (enabled) { | |
363 | if (rv3028->rtc->uie_rtctimer.enabled) | |
364 | ctrl |= RV3028_CTRL2_UIE; | |
365 | if (rv3028->rtc->aie_timer.enabled) | |
366 | ctrl |= RV3028_CTRL2_AIE; | |
367 | } | |
368 | ||
369 | ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, | |
370 | RV3028_STATUS_AF | RV3028_STATUS_UF, 0); | |
371 | if (ret) | |
372 | return ret; | |
373 | ||
374 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, | |
375 | RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl); | |
376 | if (ret) | |
377 | return ret; | |
378 | ||
379 | return 0; | |
380 | } | |
381 | ||
382 | static int rv3028_read_offset(struct device *dev, long *offset) | |
383 | { | |
384 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
385 | int ret, value, steps; | |
386 | ||
387 | ret = regmap_read(rv3028->regmap, RV3028_OFFSET, &value); | |
388 | if (ret < 0) | |
389 | return ret; | |
390 | ||
391 | steps = sign_extend32(value << 1, 8); | |
392 | ||
393 | ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value); | |
394 | if (ret < 0) | |
395 | return ret; | |
396 | ||
397 | steps += value >> 7; | |
398 | ||
399 | *offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000); | |
400 | ||
401 | return 0; | |
402 | } | |
403 | ||
404 | static int rv3028_set_offset(struct device *dev, long offset) | |
405 | { | |
406 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
407 | int ret; | |
408 | ||
409 | offset = clamp(offset, -244141L, 243187L) * 1000; | |
410 | offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT); | |
411 | ||
412 | ret = regmap_write(rv3028->regmap, RV3028_OFFSET, offset >> 1); | |
413 | if (ret < 0) | |
414 | return ret; | |
415 | ||
416 | return regmap_update_bits(rv3028->regmap, RV3028_BACKUP, BIT(7), | |
417 | offset << 7); | |
418 | } | |
419 | ||
420 | static int rv3028_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |
421 | { | |
422 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); | |
423 | int status, ret = 0; | |
424 | ||
425 | switch (cmd) { | |
426 | case RTC_VL_READ: | |
427 | ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); | |
428 | if (ret < 0) | |
429 | return ret; | |
430 | ||
86e655f9 AB |
431 | status = status & RV3028_STATUS_PORF ? RTC_VL_DATA_INVALID : 0; |
432 | return put_user(status, (unsigned int __user *)arg); | |
e6e7376c | 433 | |
e6e7376c AB |
434 | default: |
435 | return -ENOIOCTLCMD; | |
436 | } | |
437 | } | |
438 | ||
439 | static int rv3028_nvram_write(void *priv, unsigned int offset, void *val, | |
440 | size_t bytes) | |
441 | { | |
442 | return regmap_bulk_write(priv, RV3028_RAM1 + offset, val, bytes); | |
443 | } | |
444 | ||
445 | static int rv3028_nvram_read(void *priv, unsigned int offset, void *val, | |
446 | size_t bytes) | |
447 | { | |
448 | return regmap_bulk_read(priv, RV3028_RAM1 + offset, val, bytes); | |
449 | } | |
450 | ||
451 | static int rv3028_eeprom_write(void *priv, unsigned int offset, void *val, | |
452 | size_t bytes) | |
453 | { | |
454 | u32 status, ctrl1; | |
455 | int i, ret, err; | |
456 | u8 *buf = val; | |
457 | ||
458 | ret = regmap_read(priv, RV3028_CTRL1, &ctrl1); | |
459 | if (ret) | |
460 | return ret; | |
461 | ||
462 | if (!(ctrl1 & RV3028_CTRL1_EERD)) { | |
463 | ret = regmap_update_bits(priv, RV3028_CTRL1, | |
464 | RV3028_CTRL1_EERD, RV3028_CTRL1_EERD); | |
465 | if (ret) | |
466 | return ret; | |
467 | ||
468 | ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status, | |
469 | !(status & RV3028_STATUS_EEBUSY), | |
470 | RV3028_EEBUSY_POLL, | |
471 | RV3028_EEBUSY_TIMEOUT); | |
472 | if (ret) | |
473 | goto restore_eerd; | |
474 | } | |
475 | ||
476 | for (i = 0; i < bytes; i++) { | |
477 | ret = regmap_write(priv, RV3028_EEPROM_ADDR, offset + i); | |
478 | if (ret) | |
479 | goto restore_eerd; | |
480 | ||
481 | ret = regmap_write(priv, RV3028_EEPROM_DATA, buf[i]); | |
482 | if (ret) | |
483 | goto restore_eerd; | |
484 | ||
485 | ret = regmap_write(priv, RV3028_EEPROM_CMD, 0x0); | |
486 | if (ret) | |
487 | goto restore_eerd; | |
488 | ||
489 | ret = regmap_write(priv, RV3028_EEPROM_CMD, | |
490 | RV3028_EEPROM_CMD_WRITE); | |
491 | if (ret) | |
492 | goto restore_eerd; | |
493 | ||
494 | usleep_range(RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); | |
495 | ||
496 | ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status, | |
497 | !(status & RV3028_STATUS_EEBUSY), | |
498 | RV3028_EEBUSY_POLL, | |
499 | RV3028_EEBUSY_TIMEOUT); | |
500 | if (ret) | |
501 | goto restore_eerd; | |
502 | } | |
503 | ||
504 | restore_eerd: | |
505 | if (!(ctrl1 & RV3028_CTRL1_EERD)) | |
506 | { | |
507 | err = regmap_update_bits(priv, RV3028_CTRL1, RV3028_CTRL1_EERD, | |
508 | 0); | |
509 | if (err && !ret) | |
510 | ret = err; | |
511 | } | |
512 | ||
513 | return ret; | |
514 | } | |
515 | ||
516 | static int rv3028_eeprom_read(void *priv, unsigned int offset, void *val, | |
517 | size_t bytes) | |
518 | { | |
519 | u32 status, ctrl1, data; | |
520 | int i, ret, err; | |
521 | u8 *buf = val; | |
522 | ||
523 | ret = regmap_read(priv, RV3028_CTRL1, &ctrl1); | |
524 | if (ret) | |
525 | return ret; | |
526 | ||
527 | if (!(ctrl1 & RV3028_CTRL1_EERD)) { | |
528 | ret = regmap_update_bits(priv, RV3028_CTRL1, | |
529 | RV3028_CTRL1_EERD, RV3028_CTRL1_EERD); | |
530 | if (ret) | |
531 | return ret; | |
532 | ||
533 | ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status, | |
534 | !(status & RV3028_STATUS_EEBUSY), | |
535 | RV3028_EEBUSY_POLL, | |
536 | RV3028_EEBUSY_TIMEOUT); | |
537 | if (ret) | |
538 | goto restore_eerd; | |
539 | } | |
540 | ||
541 | for (i = 0; i < bytes; i++) { | |
542 | ret = regmap_write(priv, RV3028_EEPROM_ADDR, offset + i); | |
543 | if (ret) | |
544 | goto restore_eerd; | |
545 | ||
546 | ret = regmap_write(priv, RV3028_EEPROM_CMD, 0x0); | |
547 | if (ret) | |
548 | goto restore_eerd; | |
549 | ||
550 | ret = regmap_write(priv, RV3028_EEPROM_CMD, | |
551 | RV3028_EEPROM_CMD_READ); | |
552 | if (ret) | |
553 | goto restore_eerd; | |
554 | ||
555 | ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status, | |
556 | !(status & RV3028_STATUS_EEBUSY), | |
557 | RV3028_EEBUSY_POLL, | |
558 | RV3028_EEBUSY_TIMEOUT); | |
559 | if (ret) | |
560 | goto restore_eerd; | |
561 | ||
562 | ret = regmap_read(priv, RV3028_EEPROM_DATA, &data); | |
563 | if (ret) | |
564 | goto restore_eerd; | |
565 | buf[i] = data; | |
566 | } | |
567 | ||
568 | restore_eerd: | |
569 | if (!(ctrl1 & RV3028_CTRL1_EERD)) | |
570 | { | |
571 | err = regmap_update_bits(priv, RV3028_CTRL1, RV3028_CTRL1_EERD, | |
572 | 0); | |
573 | if (err && !ret) | |
574 | ret = err; | |
575 | } | |
576 | ||
577 | return ret; | |
578 | } | |
579 | ||
f583c341 PN |
580 | #ifdef CONFIG_COMMON_CLK |
581 | #define clkout_hw_to_rv3028(hw) container_of(hw, struct rv3028_data, clkout_hw) | |
582 | ||
583 | static int clkout_rates[] = { | |
584 | 32768, | |
585 | 8192, | |
586 | 1024, | |
587 | 64, | |
588 | 32, | |
589 | 1, | |
590 | }; | |
591 | ||
592 | static unsigned long rv3028_clkout_recalc_rate(struct clk_hw *hw, | |
593 | unsigned long parent_rate) | |
594 | { | |
595 | int clkout, ret; | |
596 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); | |
597 | ||
598 | ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout); | |
599 | if (ret < 0) | |
600 | return 0; | |
601 | ||
602 | clkout &= RV3028_CLKOUT_FD_MASK; | |
603 | return clkout_rates[clkout]; | |
604 | } | |
605 | ||
606 | static long rv3028_clkout_round_rate(struct clk_hw *hw, unsigned long rate, | |
607 | unsigned long *prate) | |
608 | { | |
609 | int i; | |
610 | ||
611 | for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) | |
612 | if (clkout_rates[i] <= rate) | |
613 | return clkout_rates[i]; | |
614 | ||
615 | return 0; | |
616 | } | |
617 | ||
618 | static int rv3028_clkout_set_rate(struct clk_hw *hw, unsigned long rate, | |
619 | unsigned long parent_rate) | |
620 | { | |
621 | int i, ret; | |
00e8e87f | 622 | u32 enabled; |
f583c341 PN |
623 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); |
624 | ||
00e8e87f AB |
625 | ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &enabled); |
626 | if (ret < 0) | |
627 | return ret; | |
628 | ||
f583c341 PN |
629 | ret = regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0); |
630 | if (ret < 0) | |
631 | return ret; | |
632 | ||
00e8e87f | 633 | enabled &= RV3028_CLKOUT_CLKOE; |
f583c341 | 634 | |
00e8e87f AB |
635 | for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) |
636 | if (clkout_rates[i] == rate) | |
f583c341 | 637 | return regmap_write(rv3028->regmap, RV3028_CLKOUT, |
00e8e87f | 638 | RV3028_CLKOUT_CLKSY | enabled | i); |
f583c341 PN |
639 | |
640 | return -EINVAL; | |
641 | } | |
642 | ||
643 | static int rv3028_clkout_prepare(struct clk_hw *hw) | |
644 | { | |
645 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); | |
646 | ||
647 | return regmap_write(rv3028->regmap, RV3028_CLKOUT, | |
648 | RV3028_CLKOUT_CLKSY | RV3028_CLKOUT_CLKOE); | |
649 | } | |
650 | ||
651 | static void rv3028_clkout_unprepare(struct clk_hw *hw) | |
652 | { | |
653 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); | |
654 | ||
655 | regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0); | |
656 | regmap_update_bits(rv3028->regmap, RV3028_STATUS, | |
657 | RV3028_STATUS_CLKF, 0); | |
658 | } | |
659 | ||
660 | static int rv3028_clkout_is_prepared(struct clk_hw *hw) | |
661 | { | |
662 | int clkout, ret; | |
663 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); | |
664 | ||
665 | ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout); | |
666 | if (ret < 0) | |
667 | return ret; | |
668 | ||
669 | return !!(clkout & RV3028_CLKOUT_CLKOE); | |
670 | } | |
671 | ||
672 | static const struct clk_ops rv3028_clkout_ops = { | |
673 | .prepare = rv3028_clkout_prepare, | |
674 | .unprepare = rv3028_clkout_unprepare, | |
675 | .is_prepared = rv3028_clkout_is_prepared, | |
676 | .recalc_rate = rv3028_clkout_recalc_rate, | |
677 | .round_rate = rv3028_clkout_round_rate, | |
678 | .set_rate = rv3028_clkout_set_rate, | |
679 | }; | |
680 | ||
681 | static int rv3028_clkout_register_clk(struct rv3028_data *rv3028, | |
682 | struct i2c_client *client) | |
683 | { | |
684 | int ret; | |
685 | struct clk *clk; | |
686 | struct clk_init_data init; | |
687 | struct device_node *node = client->dev.of_node; | |
688 | ||
689 | ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, | |
690 | RV3028_STATUS_CLKF, 0); | |
691 | if (ret < 0) | |
692 | return ret; | |
693 | ||
694 | init.name = "rv3028-clkout"; | |
695 | init.ops = &rv3028_clkout_ops; | |
696 | init.flags = 0; | |
697 | init.parent_names = NULL; | |
698 | init.num_parents = 0; | |
699 | rv3028->clkout_hw.init = &init; | |
700 | ||
701 | /* optional override of the clockname */ | |
702 | of_property_read_string(node, "clock-output-names", &init.name); | |
703 | ||
704 | /* register the clock */ | |
705 | clk = devm_clk_register(&client->dev, &rv3028->clkout_hw); | |
706 | if (!IS_ERR(clk)) | |
707 | of_clk_add_provider(node, of_clk_src_simple_get, clk); | |
708 | ||
709 | return 0; | |
710 | } | |
711 | #endif | |
712 | ||
e6e7376c AB |
713 | static struct rtc_class_ops rv3028_rtc_ops = { |
714 | .read_time = rv3028_get_time, | |
715 | .set_time = rv3028_set_time, | |
716 | .read_offset = rv3028_read_offset, | |
717 | .set_offset = rv3028_set_offset, | |
718 | .ioctl = rv3028_ioctl, | |
719 | }; | |
720 | ||
721 | static const struct regmap_config regmap_config = { | |
722 | .reg_bits = 8, | |
723 | .val_bits = 8, | |
724 | .max_register = 0x37, | |
725 | }; | |
726 | ||
727 | static int rv3028_probe(struct i2c_client *client) | |
728 | { | |
729 | struct rv3028_data *rv3028; | |
730 | int ret, status; | |
731 | u32 ohms; | |
732 | struct nvmem_config nvmem_cfg = { | |
733 | .name = "rv3028_nvram", | |
734 | .word_size = 1, | |
735 | .stride = 1, | |
736 | .size = 2, | |
737 | .type = NVMEM_TYPE_BATTERY_BACKED, | |
738 | .reg_read = rv3028_nvram_read, | |
739 | .reg_write = rv3028_nvram_write, | |
740 | }; | |
741 | struct nvmem_config eeprom_cfg = { | |
742 | .name = "rv3028_eeprom", | |
743 | .word_size = 1, | |
744 | .stride = 1, | |
745 | .size = 43, | |
746 | .type = NVMEM_TYPE_EEPROM, | |
747 | .reg_read = rv3028_eeprom_read, | |
748 | .reg_write = rv3028_eeprom_write, | |
749 | }; | |
750 | ||
751 | rv3028 = devm_kzalloc(&client->dev, sizeof(struct rv3028_data), | |
752 | GFP_KERNEL); | |
753 | if (!rv3028) | |
754 | return -ENOMEM; | |
755 | ||
756 | rv3028->regmap = devm_regmap_init_i2c(client, ®map_config); | |
c3b29bf6 CY |
757 | if (IS_ERR(rv3028->regmap)) |
758 | return PTR_ERR(rv3028->regmap); | |
e6e7376c AB |
759 | |
760 | i2c_set_clientdata(client, rv3028); | |
761 | ||
762 | ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); | |
763 | if (ret < 0) | |
764 | return ret; | |
765 | ||
766 | if (status & RV3028_STATUS_PORF) | |
767 | dev_warn(&client->dev, "Voltage low, data loss detected.\n"); | |
768 | ||
769 | if (status & RV3028_STATUS_AF) | |
770 | dev_warn(&client->dev, "An alarm may have been missed.\n"); | |
771 | ||
772 | rv3028->rtc = devm_rtc_allocate_device(&client->dev); | |
44c638ce | 773 | if (IS_ERR(rv3028->rtc)) |
e6e7376c | 774 | return PTR_ERR(rv3028->rtc); |
e6e7376c AB |
775 | |
776 | if (client->irq > 0) { | |
777 | ret = devm_request_threaded_irq(&client->dev, client->irq, | |
778 | NULL, rv3028_handle_irq, | |
779 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
780 | "rv3028", rv3028); | |
781 | if (ret) { | |
782 | dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); | |
783 | client->irq = 0; | |
784 | } else { | |
785 | rv3028_rtc_ops.read_alarm = rv3028_get_alarm; | |
786 | rv3028_rtc_ops.set_alarm = rv3028_set_alarm; | |
787 | rv3028_rtc_ops.alarm_irq_enable = rv3028_alarm_irq_enable; | |
788 | } | |
789 | } | |
790 | ||
791 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1, | |
792 | RV3028_CTRL1_WADA, RV3028_CTRL1_WADA); | |
793 | if (ret) | |
794 | return ret; | |
795 | ||
796 | /* setup timestamping */ | |
797 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, | |
798 | RV3028_CTRL2_EIE | RV3028_CTRL2_TSE, | |
799 | RV3028_CTRL2_EIE | RV3028_CTRL2_TSE); | |
800 | if (ret) | |
801 | return ret; | |
802 | ||
803 | /* setup trickle charger */ | |
804 | if (!device_property_read_u32(&client->dev, "trickle-resistor-ohms", | |
805 | &ohms)) { | |
806 | int i; | |
807 | ||
808 | for (i = 0; i < ARRAY_SIZE(rv3028_trickle_resistors); i++) | |
809 | if (ohms == rv3028_trickle_resistors[i]) | |
810 | break; | |
811 | ||
812 | if (i < ARRAY_SIZE(rv3028_trickle_resistors)) { | |
813 | ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP, | |
814 | RV3028_BACKUP_TCE | | |
815 | RV3028_BACKUP_TCR_MASK, | |
816 | RV3028_BACKUP_TCE | i); | |
817 | if (ret) | |
818 | return ret; | |
819 | } else { | |
820 | dev_warn(&client->dev, "invalid trickle resistor value\n"); | |
821 | } | |
822 | } | |
823 | ||
824 | ret = rtc_add_group(rv3028->rtc, &rv3028_attr_group); | |
825 | if (ret) | |
826 | return ret; | |
827 | ||
828 | rv3028->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; | |
829 | rv3028->rtc->range_max = RTC_TIMESTAMP_END_2099; | |
830 | rv3028->rtc->ops = &rv3028_rtc_ops; | |
831 | ret = rtc_register_device(rv3028->rtc); | |
832 | if (ret) | |
833 | return ret; | |
834 | ||
835 | nvmem_cfg.priv = rv3028->regmap; | |
836 | rtc_nvmem_register(rv3028->rtc, &nvmem_cfg); | |
837 | eeprom_cfg.priv = rv3028->regmap; | |
838 | rtc_nvmem_register(rv3028->rtc, &eeprom_cfg); | |
839 | ||
840 | rv3028->rtc->max_user_freq = 1; | |
841 | ||
f583c341 PN |
842 | #ifdef CONFIG_COMMON_CLK |
843 | rv3028_clkout_register_clk(rv3028, client); | |
844 | #endif | |
e6e7376c AB |
845 | return 0; |
846 | } | |
847 | ||
848 | static const struct of_device_id rv3028_of_match[] = { | |
849 | { .compatible = "microcrystal,rv3028", }, | |
850 | { } | |
851 | }; | |
852 | MODULE_DEVICE_TABLE(of, rv3028_of_match); | |
853 | ||
854 | static struct i2c_driver rv3028_driver = { | |
855 | .driver = { | |
856 | .name = "rtc-rv3028", | |
857 | .of_match_table = of_match_ptr(rv3028_of_match), | |
858 | }, | |
859 | .probe_new = rv3028_probe, | |
860 | }; | |
861 | module_i2c_driver(rv3028_driver); | |
862 | ||
863 | MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>"); | |
864 | MODULE_DESCRIPTION("Micro Crystal RV3028 RTC driver"); | |
865 | MODULE_LICENSE("GPL v2"); |