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1 | /* |
2 | * Ricoh RP5C01 RTC Driver | |
3 | * | |
4 | * Copyright 2009 Geert Uytterhoeven | |
5 | * | |
6 | * Based on the A3000 TOD code in arch/m68k/amiga/config.c | |
7 | * Copyright (C) 1993 Hamish Macdonald | |
8 | */ | |
9 | ||
10 | #include <linux/io.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/module.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/rtc.h> | |
5a0e3ad6 | 15 | #include <linux/slab.h> |
4f672ce2 GU |
16 | |
17 | ||
18 | enum { | |
19 | RP5C01_1_SECOND = 0x0, /* MODE 00 */ | |
20 | RP5C01_10_SECOND = 0x1, /* MODE 00 */ | |
21 | RP5C01_1_MINUTE = 0x2, /* MODE 00 and MODE 01 */ | |
22 | RP5C01_10_MINUTE = 0x3, /* MODE 00 and MODE 01 */ | |
23 | RP5C01_1_HOUR = 0x4, /* MODE 00 and MODE 01 */ | |
24 | RP5C01_10_HOUR = 0x5, /* MODE 00 and MODE 01 */ | |
25 | RP5C01_DAY_OF_WEEK = 0x6, /* MODE 00 and MODE 01 */ | |
26 | RP5C01_1_DAY = 0x7, /* MODE 00 and MODE 01 */ | |
27 | RP5C01_10_DAY = 0x8, /* MODE 00 and MODE 01 */ | |
28 | RP5C01_1_MONTH = 0x9, /* MODE 00 */ | |
29 | RP5C01_10_MONTH = 0xa, /* MODE 00 */ | |
30 | RP5C01_1_YEAR = 0xb, /* MODE 00 */ | |
31 | RP5C01_10_YEAR = 0xc, /* MODE 00 */ | |
32 | ||
33 | RP5C01_12_24_SELECT = 0xa, /* MODE 01 */ | |
34 | RP5C01_LEAP_YEAR = 0xb, /* MODE 01 */ | |
35 | ||
36 | RP5C01_MODE = 0xd, /* all modes */ | |
37 | RP5C01_TEST = 0xe, /* all modes */ | |
38 | RP5C01_RESET = 0xf, /* all modes */ | |
39 | }; | |
40 | ||
41 | #define RP5C01_12_24_SELECT_12 (0 << 0) | |
42 | #define RP5C01_12_24_SELECT_24 (1 << 0) | |
43 | ||
44 | #define RP5C01_10_HOUR_AM (0 << 1) | |
45 | #define RP5C01_10_HOUR_PM (1 << 1) | |
46 | ||
47 | #define RP5C01_MODE_TIMER_EN (1 << 3) /* timer enable */ | |
48 | #define RP5C01_MODE_ALARM_EN (1 << 2) /* alarm enable */ | |
49 | ||
50 | #define RP5C01_MODE_MODE_MASK (3 << 0) | |
51 | #define RP5C01_MODE_MODE00 (0 << 0) /* time */ | |
52 | #define RP5C01_MODE_MODE01 (1 << 0) /* alarm, 12h/24h, leap year */ | |
53 | #define RP5C01_MODE_RAM_BLOCK10 (2 << 0) /* RAM 4 bits x 13 */ | |
54 | #define RP5C01_MODE_RAM_BLOCK11 (3 << 0) /* RAM 4 bits x 13 */ | |
55 | ||
56 | #define RP5C01_RESET_1HZ_PULSE (1 << 3) | |
57 | #define RP5C01_RESET_16HZ_PULSE (1 << 2) | |
58 | #define RP5C01_RESET_SECOND (1 << 1) /* reset divider stages for */ | |
59 | /* seconds or smaller units */ | |
60 | #define RP5C01_RESET_ALARM (1 << 0) /* reset all alarm registers */ | |
61 | ||
62 | ||
63 | struct rp5c01_priv { | |
64 | u32 __iomem *regs; | |
65 | struct rtc_device *rtc; | |
66 | }; | |
67 | ||
68 | static inline unsigned int rp5c01_read(struct rp5c01_priv *priv, | |
69 | unsigned int reg) | |
70 | { | |
71 | return __raw_readl(&priv->regs[reg]) & 0xf; | |
72 | } | |
73 | ||
74 | static inline void rp5c01_write(struct rp5c01_priv *priv, unsigned int val, | |
75 | unsigned int reg) | |
76 | { | |
77 | return __raw_writel(val, &priv->regs[reg]); | |
78 | } | |
79 | ||
80 | static void rp5c01_lock(struct rp5c01_priv *priv) | |
81 | { | |
82 | rp5c01_write(priv, RP5C01_MODE_MODE00, RP5C01_MODE); | |
83 | } | |
84 | ||
85 | static void rp5c01_unlock(struct rp5c01_priv *priv) | |
86 | { | |
87 | rp5c01_write(priv, RP5C01_MODE_TIMER_EN | RP5C01_MODE_MODE01, | |
88 | RP5C01_MODE); | |
89 | } | |
90 | ||
91 | static int rp5c01_read_time(struct device *dev, struct rtc_time *tm) | |
92 | { | |
93 | struct rp5c01_priv *priv = dev_get_drvdata(dev); | |
94 | ||
95 | rp5c01_lock(priv); | |
96 | ||
97 | tm->tm_sec = rp5c01_read(priv, RP5C01_10_SECOND) * 10 + | |
98 | rp5c01_read(priv, RP5C01_1_SECOND); | |
99 | tm->tm_min = rp5c01_read(priv, RP5C01_10_MINUTE) * 10 + | |
100 | rp5c01_read(priv, RP5C01_1_MINUTE); | |
101 | tm->tm_hour = rp5c01_read(priv, RP5C01_10_HOUR) * 10 + | |
102 | rp5c01_read(priv, RP5C01_1_HOUR); | |
103 | tm->tm_mday = rp5c01_read(priv, RP5C01_10_DAY) * 10 + | |
104 | rp5c01_read(priv, RP5C01_1_DAY); | |
105 | tm->tm_wday = rp5c01_read(priv, RP5C01_DAY_OF_WEEK); | |
106 | tm->tm_mon = rp5c01_read(priv, RP5C01_10_MONTH) * 10 + | |
107 | rp5c01_read(priv, RP5C01_1_MONTH) - 1; | |
108 | tm->tm_year = rp5c01_read(priv, RP5C01_10_YEAR) * 10 + | |
109 | rp5c01_read(priv, RP5C01_1_YEAR); | |
110 | if (tm->tm_year <= 69) | |
111 | tm->tm_year += 100; | |
112 | ||
113 | rp5c01_unlock(priv); | |
114 | ||
115 | return rtc_valid_tm(tm); | |
116 | } | |
117 | ||
118 | static int rp5c01_set_time(struct device *dev, struct rtc_time *tm) | |
119 | { | |
120 | struct rp5c01_priv *priv = dev_get_drvdata(dev); | |
121 | ||
122 | rp5c01_lock(priv); | |
123 | ||
124 | rp5c01_write(priv, tm->tm_sec / 10, RP5C01_10_SECOND); | |
125 | rp5c01_write(priv, tm->tm_sec % 10, RP5C01_1_SECOND); | |
126 | rp5c01_write(priv, tm->tm_min / 10, RP5C01_10_MINUTE); | |
127 | rp5c01_write(priv, tm->tm_min % 10, RP5C01_1_MINUTE); | |
128 | rp5c01_write(priv, tm->tm_hour / 10, RP5C01_10_HOUR); | |
129 | rp5c01_write(priv, tm->tm_hour % 10, RP5C01_1_HOUR); | |
130 | rp5c01_write(priv, tm->tm_mday / 10, RP5C01_10_DAY); | |
131 | rp5c01_write(priv, tm->tm_mday % 10, RP5C01_1_DAY); | |
132 | if (tm->tm_wday != -1) | |
133 | rp5c01_write(priv, tm->tm_wday, RP5C01_DAY_OF_WEEK); | |
134 | rp5c01_write(priv, (tm->tm_mon + 1) / 10, RP5C01_10_MONTH); | |
135 | rp5c01_write(priv, (tm->tm_mon + 1) % 10, RP5C01_1_MONTH); | |
136 | if (tm->tm_year >= 100) | |
137 | tm->tm_year -= 100; | |
138 | rp5c01_write(priv, tm->tm_year / 10, RP5C01_10_YEAR); | |
139 | rp5c01_write(priv, tm->tm_year % 10, RP5C01_1_YEAR); | |
140 | ||
141 | rp5c01_unlock(priv); | |
142 | return 0; | |
143 | } | |
144 | ||
145 | static const struct rtc_class_ops rp5c01_rtc_ops = { | |
146 | .read_time = rp5c01_read_time, | |
147 | .set_time = rp5c01_set_time, | |
148 | }; | |
149 | ||
150 | static int __init rp5c01_rtc_probe(struct platform_device *dev) | |
151 | { | |
152 | struct resource *res; | |
153 | struct rp5c01_priv *priv; | |
154 | struct rtc_device *rtc; | |
155 | int error; | |
156 | ||
157 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); | |
158 | if (!res) | |
159 | return -ENODEV; | |
160 | ||
161 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | |
162 | if (!priv) | |
163 | return -ENOMEM; | |
164 | ||
165 | priv->regs = ioremap(res->start, resource_size(res)); | |
166 | if (!priv->regs) { | |
167 | error = -ENOMEM; | |
168 | goto out_free_priv; | |
169 | } | |
170 | ||
171 | rtc = rtc_device_register("rtc-rp5c01", &dev->dev, &rp5c01_rtc_ops, | |
172 | THIS_MODULE); | |
173 | if (IS_ERR(rtc)) { | |
174 | error = PTR_ERR(rtc); | |
175 | goto out_unmap; | |
176 | } | |
177 | ||
178 | priv->rtc = rtc; | |
179 | platform_set_drvdata(dev, priv); | |
180 | return 0; | |
181 | ||
182 | out_unmap: | |
183 | iounmap(priv->regs); | |
184 | out_free_priv: | |
185 | kfree(priv); | |
186 | return error; | |
187 | } | |
188 | ||
189 | static int __exit rp5c01_rtc_remove(struct platform_device *dev) | |
190 | { | |
191 | struct rp5c01_priv *priv = platform_get_drvdata(dev); | |
192 | ||
193 | rtc_device_unregister(priv->rtc); | |
194 | iounmap(priv->regs); | |
195 | kfree(priv); | |
196 | return 0; | |
197 | } | |
198 | ||
199 | static struct platform_driver rp5c01_rtc_driver = { | |
200 | .driver = { | |
201 | .name = "rtc-rp5c01", | |
202 | .owner = THIS_MODULE, | |
203 | }, | |
204 | .remove = __exit_p(rp5c01_rtc_remove), | |
205 | }; | |
206 | ||
207 | static int __init rp5c01_rtc_init(void) | |
208 | { | |
209 | return platform_driver_probe(&rp5c01_rtc_driver, rp5c01_rtc_probe); | |
210 | } | |
211 | ||
212 | static void __exit rp5c01_rtc_fini(void) | |
213 | { | |
214 | platform_driver_unregister(&rp5c01_rtc_driver); | |
215 | } | |
216 | ||
217 | module_init(rp5c01_rtc_init); | |
218 | module_exit(rp5c01_rtc_fini); | |
219 | ||
220 | MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>"); | |
221 | MODULE_LICENSE("GPL"); | |
222 | MODULE_DESCRIPTION("Ricoh RP5C01 RTC driver"); | |
223 | MODULE_ALIAS("platform:rtc-rp5c01"); |