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2025cf9e | 1 | // SPDX-License-Identifier: GPL-2.0-only |
3ca1e326 CZ |
2 | /* |
3 | * RTC driver for Rockchip RK808 | |
4 | * | |
5 | * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd | |
6 | * | |
7 | * Author: Chris Zhong <zyw@rock-chips.com> | |
8 | * Author: Zhang Qing <zhangqing@rock-chips.com> | |
3ca1e326 CZ |
9 | */ |
10 | ||
11 | #include <linux/module.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/rtc.h> | |
14 | #include <linux/bcd.h> | |
15 | #include <linux/mfd/rk808.h> | |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/i2c.h> | |
18 | ||
19 | /* RTC_CTRL_REG bitfields */ | |
20 | #define BIT_RTC_CTRL_REG_STOP_RTC_M BIT(0) | |
21 | ||
22 | /* RK808 has a shadowed register for saving a "frozen" RTC time. | |
23 | * When user setting "GET_TIME" to 1, the time will save in this shadowed | |
24 | * register. If set "READSEL" to 1, user read rtc time register, actually | |
25 | * get the time of that moment. If we need the real time, clr this bit. | |
26 | */ | |
27 | #define BIT_RTC_CTRL_REG_RTC_GET_TIME BIT(6) | |
28 | #define BIT_RTC_CTRL_REG_RTC_READSEL_M BIT(7) | |
29 | #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M BIT(3) | |
30 | #define RTC_STATUS_MASK 0xFE | |
31 | ||
32 | #define SECONDS_REG_MSK 0x7F | |
33 | #define MINUTES_REG_MAK 0x7F | |
34 | #define HOURS_REG_MSK 0x3F | |
35 | #define DAYS_REG_MSK 0x3F | |
36 | #define MONTHS_REG_MSK 0x1F | |
37 | #define YEARS_REG_MSK 0xFF | |
38 | #define WEEKS_REG_MSK 0x7 | |
39 | ||
40 | /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */ | |
41 | ||
42 | #define NUM_TIME_REGS (RK808_WEEKS_REG - RK808_SECONDS_REG + 1) | |
43 | #define NUM_ALARM_REGS (RK808_ALARM_YEARS_REG - RK808_ALARM_SECONDS_REG + 1) | |
44 | ||
dc79054a TX |
45 | struct rk_rtc_compat_reg { |
46 | unsigned int ctrl_reg; | |
47 | unsigned int status_reg; | |
48 | unsigned int alarm_seconds_reg; | |
49 | unsigned int int_reg; | |
50 | unsigned int seconds_reg; | |
51 | }; | |
52 | ||
3ca1e326 CZ |
53 | struct rk808_rtc { |
54 | struct rk808 *rk808; | |
55 | struct rtc_device *rtc; | |
dc79054a | 56 | struct rk_rtc_compat_reg *creg; |
3ca1e326 CZ |
57 | int irq; |
58 | }; | |
59 | ||
f076ef44 JW |
60 | /* |
61 | * The Rockchip calendar used by the RK808 counts November with 31 days. We use | |
62 | * these translation functions to convert its dates to/from the Gregorian | |
63 | * calendar used by the rest of the world. We arbitrarily define Jan 1st, 2016 | |
64 | * as the day when both calendars were in sync, and treat all other dates | |
65 | * relative to that. | |
66 | * NOTE: Other system software (e.g. firmware) that reads the same hardware must | |
67 | * implement this exact same conversion algorithm, with the same anchor date. | |
68 | */ | |
69 | static time64_t nov2dec_transitions(struct rtc_time *tm) | |
70 | { | |
71 | return (tm->tm_year + 1900) - 2016 + (tm->tm_mon + 1 > 11 ? 1 : 0); | |
72 | } | |
73 | ||
74 | static void rockchip_to_gregorian(struct rtc_time *tm) | |
75 | { | |
76 | /* If it's Nov 31st, rtc_tm_to_time64() will count that like Dec 1st */ | |
77 | time64_t time = rtc_tm_to_time64(tm); | |
78 | rtc_time64_to_tm(time + nov2dec_transitions(tm) * 86400, tm); | |
79 | } | |
80 | ||
81 | static void gregorian_to_rockchip(struct rtc_time *tm) | |
82 | { | |
83 | time64_t extra_days = nov2dec_transitions(tm); | |
84 | time64_t time = rtc_tm_to_time64(tm); | |
85 | rtc_time64_to_tm(time - extra_days * 86400, tm); | |
86 | ||
87 | /* Compensate if we went back over Nov 31st (will work up to 2381) */ | |
88 | if (nov2dec_transitions(tm) < extra_days) { | |
89 | if (tm->tm_mon + 1 == 11) | |
90 | tm->tm_mday++; /* This may result in 31! */ | |
91 | else | |
92 | rtc_time64_to_tm(time - (extra_days - 1) * 86400, tm); | |
93 | } | |
94 | } | |
95 | ||
3ca1e326 CZ |
96 | /* Read current time and date in RTC */ |
97 | static int rk808_rtc_readtime(struct device *dev, struct rtc_time *tm) | |
98 | { | |
99 | struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev); | |
100 | struct rk808 *rk808 = rk808_rtc->rk808; | |
101 | u8 rtc_data[NUM_TIME_REGS]; | |
102 | int ret; | |
103 | ||
104 | /* Force an update of the shadowed registers right now */ | |
dc79054a | 105 | ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, |
3ca1e326 | 106 | BIT_RTC_CTRL_REG_RTC_GET_TIME, |
c412c603 | 107 | BIT_RTC_CTRL_REG_RTC_GET_TIME); |
3ca1e326 CZ |
108 | if (ret) { |
109 | dev_err(dev, "Failed to update bits rtc_ctrl: %d\n", ret); | |
110 | return ret; | |
111 | } | |
112 | ||
c412c603 CZ |
113 | /* |
114 | * After we set the GET_TIME bit, the rtc time can't be read | |
115 | * immediately. So we should wait up to 31.25 us, about one cycle of | |
116 | * 32khz. If we clear the GET_TIME bit here, the time of i2c transfer | |
117 | * certainly more than 31.25us: 16 * 2.5us at 400kHz bus frequency. | |
118 | */ | |
dc79054a | 119 | ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, |
3ca1e326 | 120 | BIT_RTC_CTRL_REG_RTC_GET_TIME, |
c412c603 | 121 | 0); |
3ca1e326 CZ |
122 | if (ret) { |
123 | dev_err(dev, "Failed to update bits rtc_ctrl: %d\n", ret); | |
124 | return ret; | |
125 | } | |
126 | ||
dc79054a | 127 | ret = regmap_bulk_read(rk808->regmap, rk808_rtc->creg->seconds_reg, |
3ca1e326 CZ |
128 | rtc_data, NUM_TIME_REGS); |
129 | if (ret) { | |
130 | dev_err(dev, "Failed to bulk read rtc_data: %d\n", ret); | |
131 | return ret; | |
132 | } | |
133 | ||
134 | tm->tm_sec = bcd2bin(rtc_data[0] & SECONDS_REG_MSK); | |
135 | tm->tm_min = bcd2bin(rtc_data[1] & MINUTES_REG_MAK); | |
136 | tm->tm_hour = bcd2bin(rtc_data[2] & HOURS_REG_MSK); | |
137 | tm->tm_mday = bcd2bin(rtc_data[3] & DAYS_REG_MSK); | |
138 | tm->tm_mon = (bcd2bin(rtc_data[4] & MONTHS_REG_MSK)) - 1; | |
139 | tm->tm_year = (bcd2bin(rtc_data[5] & YEARS_REG_MSK)) + 100; | |
140 | tm->tm_wday = bcd2bin(rtc_data[6] & WEEKS_REG_MSK); | |
f076ef44 | 141 | rockchip_to_gregorian(tm); |
0991e754 | 142 | dev_dbg(dev, "RTC date/time %ptRd(%d) %ptRt\n", tm, tm->tm_wday, tm); |
3ca1e326 CZ |
143 | |
144 | return ret; | |
145 | } | |
146 | ||
147 | /* Set current time and date in RTC */ | |
148 | static int rk808_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
149 | { | |
150 | struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev); | |
151 | struct rk808 *rk808 = rk808_rtc->rk808; | |
152 | u8 rtc_data[NUM_TIME_REGS]; | |
153 | int ret; | |
154 | ||
0991e754 | 155 | dev_dbg(dev, "set RTC date/time %ptRd(%d) %ptRt\n", tm, tm->tm_wday, tm); |
f076ef44 | 156 | gregorian_to_rockchip(tm); |
3ca1e326 CZ |
157 | rtc_data[0] = bin2bcd(tm->tm_sec); |
158 | rtc_data[1] = bin2bcd(tm->tm_min); | |
159 | rtc_data[2] = bin2bcd(tm->tm_hour); | |
160 | rtc_data[3] = bin2bcd(tm->tm_mday); | |
161 | rtc_data[4] = bin2bcd(tm->tm_mon + 1); | |
162 | rtc_data[5] = bin2bcd(tm->tm_year - 100); | |
163 | rtc_data[6] = bin2bcd(tm->tm_wday); | |
3ca1e326 CZ |
164 | |
165 | /* Stop RTC while updating the RTC registers */ | |
dc79054a | 166 | ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, |
3ca1e326 CZ |
167 | BIT_RTC_CTRL_REG_STOP_RTC_M, |
168 | BIT_RTC_CTRL_REG_STOP_RTC_M); | |
169 | if (ret) { | |
170 | dev_err(dev, "Failed to update RTC control: %d\n", ret); | |
171 | return ret; | |
172 | } | |
173 | ||
dc79054a | 174 | ret = regmap_bulk_write(rk808->regmap, rk808_rtc->creg->seconds_reg, |
3ca1e326 CZ |
175 | rtc_data, NUM_TIME_REGS); |
176 | if (ret) { | |
177 | dev_err(dev, "Failed to bull write rtc_data: %d\n", ret); | |
178 | return ret; | |
179 | } | |
180 | /* Start RTC again */ | |
dc79054a | 181 | ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, |
3ca1e326 CZ |
182 | BIT_RTC_CTRL_REG_STOP_RTC_M, 0); |
183 | if (ret) { | |
184 | dev_err(dev, "Failed to update RTC control: %d\n", ret); | |
185 | return ret; | |
186 | } | |
187 | return 0; | |
188 | } | |
189 | ||
190 | /* Read alarm time and date in RTC */ | |
191 | static int rk808_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
192 | { | |
193 | struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev); | |
194 | struct rk808 *rk808 = rk808_rtc->rk808; | |
195 | u8 alrm_data[NUM_ALARM_REGS]; | |
196 | uint32_t int_reg; | |
197 | int ret; | |
198 | ||
dc79054a TX |
199 | ret = regmap_bulk_read(rk808->regmap, |
200 | rk808_rtc->creg->alarm_seconds_reg, | |
3ca1e326 | 201 | alrm_data, NUM_ALARM_REGS); |
dc79054a TX |
202 | if (ret) { |
203 | dev_err(dev, "Failed to read RTC alarm date REG: %d\n", ret); | |
204 | return ret; | |
205 | } | |
3ca1e326 CZ |
206 | |
207 | alrm->time.tm_sec = bcd2bin(alrm_data[0] & SECONDS_REG_MSK); | |
208 | alrm->time.tm_min = bcd2bin(alrm_data[1] & MINUTES_REG_MAK); | |
209 | alrm->time.tm_hour = bcd2bin(alrm_data[2] & HOURS_REG_MSK); | |
210 | alrm->time.tm_mday = bcd2bin(alrm_data[3] & DAYS_REG_MSK); | |
211 | alrm->time.tm_mon = (bcd2bin(alrm_data[4] & MONTHS_REG_MSK)) - 1; | |
212 | alrm->time.tm_year = (bcd2bin(alrm_data[5] & YEARS_REG_MSK)) + 100; | |
f076ef44 | 213 | rockchip_to_gregorian(&alrm->time); |
3ca1e326 | 214 | |
dc79054a | 215 | ret = regmap_read(rk808->regmap, rk808_rtc->creg->int_reg, &int_reg); |
3ca1e326 CZ |
216 | if (ret) { |
217 | dev_err(dev, "Failed to read RTC INT REG: %d\n", ret); | |
218 | return ret; | |
219 | } | |
220 | ||
0991e754 AS |
221 | dev_dbg(dev, "alrm read RTC date/time %ptRd(%d) %ptRt\n", |
222 | &alrm->time, alrm->time.tm_wday, &alrm->time); | |
3ca1e326 CZ |
223 | |
224 | alrm->enabled = (int_reg & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M) ? 1 : 0; | |
225 | ||
226 | return 0; | |
227 | } | |
228 | ||
229 | static int rk808_rtc_stop_alarm(struct rk808_rtc *rk808_rtc) | |
230 | { | |
231 | struct rk808 *rk808 = rk808_rtc->rk808; | |
232 | int ret; | |
233 | ||
dc79054a | 234 | ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->int_reg, |
3ca1e326 CZ |
235 | BIT_RTC_INTERRUPTS_REG_IT_ALARM_M, 0); |
236 | ||
237 | return ret; | |
238 | } | |
239 | ||
240 | static int rk808_rtc_start_alarm(struct rk808_rtc *rk808_rtc) | |
241 | { | |
242 | struct rk808 *rk808 = rk808_rtc->rk808; | |
243 | int ret; | |
244 | ||
dc79054a | 245 | ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->int_reg, |
3ca1e326 CZ |
246 | BIT_RTC_INTERRUPTS_REG_IT_ALARM_M, |
247 | BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); | |
248 | ||
249 | return ret; | |
250 | } | |
251 | ||
252 | static int rk808_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
253 | { | |
254 | struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev); | |
255 | struct rk808 *rk808 = rk808_rtc->rk808; | |
256 | u8 alrm_data[NUM_ALARM_REGS]; | |
257 | int ret; | |
258 | ||
259 | ret = rk808_rtc_stop_alarm(rk808_rtc); | |
260 | if (ret) { | |
261 | dev_err(dev, "Failed to stop alarm: %d\n", ret); | |
262 | return ret; | |
263 | } | |
0991e754 AS |
264 | dev_dbg(dev, "alrm set RTC date/time %ptRd(%d) %ptRt\n", |
265 | &alrm->time, alrm->time.tm_wday, &alrm->time); | |
3ca1e326 | 266 | |
f076ef44 | 267 | gregorian_to_rockchip(&alrm->time); |
3ca1e326 CZ |
268 | alrm_data[0] = bin2bcd(alrm->time.tm_sec); |
269 | alrm_data[1] = bin2bcd(alrm->time.tm_min); | |
270 | alrm_data[2] = bin2bcd(alrm->time.tm_hour); | |
271 | alrm_data[3] = bin2bcd(alrm->time.tm_mday); | |
272 | alrm_data[4] = bin2bcd(alrm->time.tm_mon + 1); | |
273 | alrm_data[5] = bin2bcd(alrm->time.tm_year - 100); | |
274 | ||
dc79054a TX |
275 | ret = regmap_bulk_write(rk808->regmap, |
276 | rk808_rtc->creg->alarm_seconds_reg, | |
3ca1e326 CZ |
277 | alrm_data, NUM_ALARM_REGS); |
278 | if (ret) { | |
279 | dev_err(dev, "Failed to bulk write: %d\n", ret); | |
280 | return ret; | |
281 | } | |
282 | if (alrm->enabled) { | |
283 | ret = rk808_rtc_start_alarm(rk808_rtc); | |
284 | if (ret) { | |
285 | dev_err(dev, "Failed to start alarm: %d\n", ret); | |
286 | return ret; | |
287 | } | |
288 | } | |
289 | return 0; | |
290 | } | |
291 | ||
292 | static int rk808_rtc_alarm_irq_enable(struct device *dev, | |
293 | unsigned int enabled) | |
294 | { | |
295 | struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev); | |
296 | ||
297 | if (enabled) | |
298 | return rk808_rtc_start_alarm(rk808_rtc); | |
299 | ||
300 | return rk808_rtc_stop_alarm(rk808_rtc); | |
301 | } | |
302 | ||
303 | /* | |
304 | * We will just handle setting the frequency and make use the framework for | |
305 | * reading the periodic interupts. | |
306 | * | |
307 | * @freq: Current periodic IRQ freq: | |
308 | * bit 0: every second | |
309 | * bit 1: every minute | |
310 | * bit 2: every hour | |
311 | * bit 3: every day | |
312 | */ | |
313 | static irqreturn_t rk808_alarm_irq(int irq, void *data) | |
314 | { | |
315 | struct rk808_rtc *rk808_rtc = data; | |
316 | struct rk808 *rk808 = rk808_rtc->rk808; | |
317 | struct i2c_client *client = rk808->i2c; | |
318 | int ret; | |
319 | ||
dc79054a | 320 | ret = regmap_write(rk808->regmap, rk808_rtc->creg->status_reg, |
3ca1e326 CZ |
321 | RTC_STATUS_MASK); |
322 | if (ret) { | |
323 | dev_err(&client->dev, | |
324 | "%s:Failed to update RTC status: %d\n", __func__, ret); | |
325 | return ret; | |
326 | } | |
327 | ||
328 | rtc_update_irq(rk808_rtc->rtc, 1, RTC_IRQF | RTC_AF); | |
329 | dev_dbg(&client->dev, | |
330 | "%s:irq=%d\n", __func__, irq); | |
331 | return IRQ_HANDLED; | |
332 | } | |
333 | ||
334 | static const struct rtc_class_ops rk808_rtc_ops = { | |
335 | .read_time = rk808_rtc_readtime, | |
336 | .set_time = rk808_rtc_set_time, | |
337 | .read_alarm = rk808_rtc_readalarm, | |
338 | .set_alarm = rk808_rtc_setalarm, | |
339 | .alarm_irq_enable = rk808_rtc_alarm_irq_enable, | |
340 | }; | |
341 | ||
342 | #ifdef CONFIG_PM_SLEEP | |
343 | /* Turn off the alarm if it should not be a wake source. */ | |
344 | static int rk808_rtc_suspend(struct device *dev) | |
345 | { | |
527bd754 | 346 | struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev); |
3ca1e326 CZ |
347 | |
348 | if (device_may_wakeup(dev)) | |
349 | enable_irq_wake(rk808_rtc->irq); | |
350 | ||
351 | return 0; | |
352 | } | |
353 | ||
354 | /* Enable the alarm if it should be enabled (in case it was disabled to | |
355 | * prevent use as a wake source). | |
356 | */ | |
357 | static int rk808_rtc_resume(struct device *dev) | |
358 | { | |
527bd754 | 359 | struct rk808_rtc *rk808_rtc = dev_get_drvdata(dev); |
3ca1e326 CZ |
360 | |
361 | if (device_may_wakeup(dev)) | |
362 | disable_irq_wake(rk808_rtc->irq); | |
363 | ||
364 | return 0; | |
365 | } | |
366 | #endif | |
367 | ||
368 | static SIMPLE_DEV_PM_OPS(rk808_rtc_pm_ops, | |
369 | rk808_rtc_suspend, rk808_rtc_resume); | |
370 | ||
dc79054a TX |
371 | static struct rk_rtc_compat_reg rk808_creg = { |
372 | .ctrl_reg = RK808_RTC_CTRL_REG, | |
373 | .status_reg = RK808_RTC_STATUS_REG, | |
374 | .alarm_seconds_reg = RK808_ALARM_SECONDS_REG, | |
375 | .int_reg = RK808_RTC_INT_REG, | |
376 | .seconds_reg = RK808_SECONDS_REG, | |
377 | }; | |
378 | ||
379 | static struct rk_rtc_compat_reg rk817_creg = { | |
380 | .ctrl_reg = RK817_RTC_CTRL_REG, | |
381 | .status_reg = RK817_RTC_STATUS_REG, | |
382 | .alarm_seconds_reg = RK817_ALARM_SECONDS_REG, | |
383 | .int_reg = RK817_RTC_INT_REG, | |
384 | .seconds_reg = RK817_SECONDS_REG, | |
385 | }; | |
386 | ||
3ca1e326 CZ |
387 | static int rk808_rtc_probe(struct platform_device *pdev) |
388 | { | |
389 | struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent); | |
390 | struct rk808_rtc *rk808_rtc; | |
3ca1e326 CZ |
391 | int ret; |
392 | ||
393 | rk808_rtc = devm_kzalloc(&pdev->dev, sizeof(*rk808_rtc), GFP_KERNEL); | |
394 | if (rk808_rtc == NULL) | |
395 | return -ENOMEM; | |
396 | ||
dc79054a TX |
397 | switch (rk808->variant) { |
398 | case RK809_ID: | |
399 | case RK817_ID: | |
400 | rk808_rtc->creg = &rk817_creg; | |
401 | break; | |
402 | default: | |
403 | rk808_rtc->creg = &rk808_creg; | |
404 | break; | |
405 | } | |
3ca1e326 CZ |
406 | platform_set_drvdata(pdev, rk808_rtc); |
407 | rk808_rtc->rk808 = rk808; | |
408 | ||
409 | /* start rtc running by default, and use shadowed timer. */ | |
dc79054a | 410 | ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, |
3ca1e326 CZ |
411 | BIT_RTC_CTRL_REG_STOP_RTC_M | |
412 | BIT_RTC_CTRL_REG_RTC_READSEL_M, | |
413 | BIT_RTC_CTRL_REG_RTC_READSEL_M); | |
414 | if (ret) { | |
415 | dev_err(&pdev->dev, | |
416 | "Failed to update RTC control: %d\n", ret); | |
417 | return ret; | |
418 | } | |
419 | ||
dc79054a | 420 | ret = regmap_write(rk808->regmap, rk808_rtc->creg->status_reg, |
3ca1e326 CZ |
421 | RTC_STATUS_MASK); |
422 | if (ret) { | |
423 | dev_err(&pdev->dev, | |
424 | "Failed to write RTC status: %d\n", ret); | |
725412d9 | 425 | return ret; |
3ca1e326 CZ |
426 | } |
427 | ||
3ca1e326 CZ |
428 | device_init_wakeup(&pdev->dev, 1); |
429 | ||
201fac95 AB |
430 | rk808_rtc->rtc = devm_rtc_allocate_device(&pdev->dev); |
431 | if (IS_ERR(rk808_rtc->rtc)) | |
432 | return PTR_ERR(rk808_rtc->rtc); | |
433 | ||
434 | rk808_rtc->rtc->ops = &rk808_rtc_ops; | |
3ca1e326 CZ |
435 | |
436 | rk808_rtc->irq = platform_get_irq(pdev, 0); | |
faac9102 | 437 | if (rk808_rtc->irq < 0) |
3ca1e326 | 438 | return rk808_rtc->irq; |
3ca1e326 CZ |
439 | |
440 | /* request alarm irq of rk808 */ | |
441 | ret = devm_request_threaded_irq(&pdev->dev, rk808_rtc->irq, NULL, | |
442 | rk808_alarm_irq, 0, | |
443 | "RTC alarm", rk808_rtc); | |
444 | if (ret) { | |
445 | dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n", | |
446 | rk808_rtc->irq, ret); | |
201fac95 | 447 | return ret; |
3ca1e326 CZ |
448 | } |
449 | ||
201fac95 | 450 | return rtc_register_device(rk808_rtc->rtc); |
3ca1e326 CZ |
451 | } |
452 | ||
453 | static struct platform_driver rk808_rtc_driver = { | |
454 | .probe = rk808_rtc_probe, | |
455 | .driver = { | |
456 | .name = "rk808-rtc", | |
457 | .pm = &rk808_rtc_pm_ops, | |
458 | }, | |
459 | }; | |
460 | ||
461 | module_platform_driver(rk808_rtc_driver); | |
462 | ||
463 | MODULE_DESCRIPTION("RTC driver for the rk808 series PMICs"); | |
464 | MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>"); | |
465 | MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>"); | |
466 | MODULE_LICENSE("GPL"); | |
467 | MODULE_ALIAS("platform:rk808-rtc"); |