[linux-2.6-block.git] / drivers / rtc / rtc-mt6397.c

// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2014-2015 MediaTek Inc.
* Author: Tianping.Fang <tianping.fang@mediatek.com>
*/

#include <linux/delay.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/rtc.h>
#include <linux/mfd/mt6397/rtc.h>

static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc)
{
	unsigned long timeout = jiffies + HZ;
	int ret;
	u32 data;

	ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_WRTGR, 1);
	if (ret < 0)
		return ret;

	while (1) {
		ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_BBPU,
				  &data);
		if (ret < 0)
			break;
		if (!(data & RTC_BBPU_CBUSY))
			break;
		if (time_after(jiffies, timeout)) {
			ret = -ETIMEDOUT;
			break;
		}
		cpu_relax();
	}

	return ret;
}

static irqreturn_t mtk_rtc_irq_handler_thread(int irq, void *data)
{
	struct mt6397_rtc *rtc = data;
	u32 irqsta, irqen;
	int ret;

	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_STA, &irqsta);
	if ((ret >= 0) && (irqsta & RTC_IRQ_STA_AL)) {
		rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
		irqen = irqsta & ~RTC_IRQ_EN_AL;
		mutex_lock(&rtc->lock);
		if (regmap_write(rtc->regmap, rtc->addr_base + RTC_IRQ_EN,
				 irqen) < 0)
			mtk_rtc_write_trigger(rtc);
		mutex_unlock(&rtc->lock);

		return IRQ_HANDLED;
	}

	return IRQ_NONE;
}

static int __mtk_rtc_read_time(struct mt6397_rtc *rtc,
			       struct rtc_time *tm, int *sec)
{
	int ret;
	u16 data[RTC_OFFSET_COUNT];

	mutex_lock(&rtc->lock);
	ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
			       data, RTC_OFFSET_COUNT);
	if (ret < 0)
		goto exit;

	tm->tm_sec = data[RTC_OFFSET_SEC];
	tm->tm_min = data[RTC_OFFSET_MIN];
	tm->tm_hour = data[RTC_OFFSET_HOUR];
	tm->tm_mday = data[RTC_OFFSET_DOM];
	tm->tm_mon = data[RTC_OFFSET_MTH];
	tm->tm_year = data[RTC_OFFSET_YEAR];

	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, sec);
exit:
	mutex_unlock(&rtc->lock);
	return ret;
}

static int mtk_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	time64_t time;
	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	int days, sec, ret;

	do {
		ret = __mtk_rtc_read_time(rtc, tm, &sec);
		if (ret < 0)
			goto exit;
	} while (sec < tm->tm_sec);

	/* HW register use 7 bits to store year data, minus
	 * RTC_MIN_YEAR_OFFSET before write year data to register, and plus
	 * RTC_MIN_YEAR_OFFSET back after read year from register
	 */
	tm->tm_year += RTC_MIN_YEAR_OFFSET;

	/* HW register start mon from one, but tm_mon start from zero. */
	tm->tm_mon--;
	time = rtc_tm_to_time64(tm);

	/* rtc_tm_to_time64 covert Gregorian date to seconds since
	 * 01-01-1970 00:00:00, and this date is Thursday.
	 */
	days = div_s64(time, 86400);
	tm->tm_wday = (days + 4) % 7;

exit:
	return ret;
}

static int mtk_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	int ret;
	u16 data[RTC_OFFSET_COUNT];

	tm->tm_year -= RTC_MIN_YEAR_OFFSET;
	tm->tm_mon++;

	data[RTC_OFFSET_SEC] = tm->tm_sec;
	data[RTC_OFFSET_MIN] = tm->tm_min;
	data[RTC_OFFSET_HOUR] = tm->tm_hour;
	data[RTC_OFFSET_DOM] = tm->tm_mday;
	data[RTC_OFFSET_MTH] = tm->tm_mon;
	data[RTC_OFFSET_YEAR] = tm->tm_year;

	mutex_lock(&rtc->lock);
	ret = regmap_bulk_write(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
				data, RTC_OFFSET_COUNT);
	if (ret < 0)
		goto exit;

	/* Time register write to hardware after call trigger function */
	ret = mtk_rtc_write_trigger(rtc);

exit:
	mutex_unlock(&rtc->lock);
	return ret;
}

static int mtk_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	struct rtc_time *tm = &alm->time;
	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	u32 irqen, pdn2;
	int ret;
	u16 data[RTC_OFFSET_COUNT];

	mutex_lock(&rtc->lock);
	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_EN, &irqen);
	if (ret < 0)
		goto err_exit;
	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_PDN2, &pdn2);
	if (ret < 0)
		goto err_exit;

	ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC,
			       data, RTC_OFFSET_COUNT);
	if (ret < 0)
		goto err_exit;

	alm->enabled = !!(irqen & RTC_IRQ_EN_AL);
	alm->pending = !!(pdn2 & RTC_PDN2_PWRON_ALARM);
	mutex_unlock(&rtc->lock);

	tm->tm_sec = data[RTC_OFFSET_SEC];
	tm->tm_min = data[RTC_OFFSET_MIN];
	tm->tm_hour = data[RTC_OFFSET_HOUR];
	tm->tm_mday = data[RTC_OFFSET_DOM];
	tm->tm_mon = data[RTC_OFFSET_MTH];
	tm->tm_year = data[RTC_OFFSET_YEAR];

	tm->tm_year += RTC_MIN_YEAR_OFFSET;
	tm->tm_mon--;

	return 0;
err_exit:
	mutex_unlock(&rtc->lock);
	return ret;
}

static int mtk_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	struct rtc_time *tm = &alm->time;
	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	int ret;
	u16 data[RTC_OFFSET_COUNT];

	tm->tm_year -= RTC_MIN_YEAR_OFFSET;
	tm->tm_mon++;

	data[RTC_OFFSET_SEC] = tm->tm_sec;
	data[RTC_OFFSET_MIN] = tm->tm_min;
	data[RTC_OFFSET_HOUR] = tm->tm_hour;
	data[RTC_OFFSET_DOM] = tm->tm_mday;
	data[RTC_OFFSET_MTH] = tm->tm_mon;
	data[RTC_OFFSET_YEAR] = tm->tm_year;

	mutex_lock(&rtc->lock);
	if (alm->enabled) {
		ret = regmap_bulk_write(rtc->regmap,
					rtc->addr_base + RTC_AL_SEC,
					data, RTC_OFFSET_COUNT);
		if (ret < 0)
			goto exit;
		ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_AL_MASK,
				   RTC_AL_MASK_DOW);
		if (ret < 0)
			goto exit;
		ret = regmap_update_bits(rtc->regmap,
					 rtc->addr_base + RTC_IRQ_EN,
					 RTC_IRQ_EN_ONESHOT_AL,
					 RTC_IRQ_EN_ONESHOT_AL);
		if (ret < 0)
			goto exit;
	} else {
		ret = regmap_update_bits(rtc->regmap,
					 rtc->addr_base + RTC_IRQ_EN,
					 RTC_IRQ_EN_ONESHOT_AL, 0);
		if (ret < 0)
			goto exit;
	}

	/* All alarm time register write to hardware after calling
	 * mtk_rtc_write_trigger. This can avoid race condition if alarm
	 * occur happen during writing alarm time register.
	 */
	ret = mtk_rtc_write_trigger(rtc);
exit:
	mutex_unlock(&rtc->lock);
	return ret;
}

static const struct rtc_class_ops mtk_rtc_ops = {
	.read_time  = mtk_rtc_read_time,
	.set_time   = mtk_rtc_set_time,
	.read_alarm = mtk_rtc_read_alarm,
	.set_alarm  = mtk_rtc_set_alarm,
};

static int mtk_rtc_probe(struct platform_device *pdev)
{
	struct resource *res;
	struct mt6397_chip *mt6397_chip = dev_get_drvdata(pdev->dev.parent);
	struct mt6397_rtc *rtc;
	int ret;

	rtc = devm_kzalloc(&pdev->dev, sizeof(struct mt6397_rtc), GFP_KERNEL);
	if (!rtc)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	rtc->addr_base = res->start;

	rtc->irq = platform_get_irq(pdev, 0);
	if (rtc->irq < 0)
		return rtc->irq;

	rtc->regmap = mt6397_chip->regmap;
	rtc->dev = &pdev->dev;
	mutex_init(&rtc->lock);

	platform_set_drvdata(pdev, rtc);

	rtc->rtc_dev = devm_rtc_allocate_device(rtc->dev);
	if (IS_ERR(rtc->rtc_dev))
		return PTR_ERR(rtc->rtc_dev);

	ret = request_threaded_irq(rtc->irq, NULL,
				   mtk_rtc_irq_handler_thread,
				   IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
				   "mt6397-rtc", rtc);
	if (ret) {
		dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
			rtc->irq, ret);
		return ret;
	}

	device_init_wakeup(&pdev->dev, 1);

	rtc->rtc_dev->ops = &mtk_rtc_ops;

	ret = rtc_register_device(rtc->rtc_dev);
	if (ret)
		goto out_free_irq;

	return 0;

out_free_irq:
	free_irq(rtc->irq, rtc);
	return ret;
}

static int mtk_rtc_remove(struct platform_device *pdev)
{
	struct mt6397_rtc *rtc = platform_get_drvdata(pdev);

	free_irq(rtc->irq, rtc);

	return 0;
}

#ifdef CONFIG_PM_SLEEP
static int mt6397_rtc_suspend(struct device *dev)
{
	struct mt6397_rtc *rtc = dev_get_drvdata(dev);

	if (device_may_wakeup(dev))
		enable_irq_wake(rtc->irq);

	return 0;
}

static int mt6397_rtc_resume(struct device *dev)
{
	struct mt6397_rtc *rtc = dev_get_drvdata(dev);

	if (device_may_wakeup(dev))
		disable_irq_wake(rtc->irq);

	return 0;
}
#endif

static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend,
			mt6397_rtc_resume);

static const struct of_device_id mt6397_rtc_of_match[] = {
	{ .compatible = "mediatek,mt6397-rtc", },
	{ }
};
MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match);

static struct platform_driver mtk_rtc_driver = {
	.driver = {
		.name = "mt6397-rtc",
		.of_match_table = mt6397_rtc_of_match,
		.pm = &mt6397_pm_ops,
	},
	.probe	= mtk_rtc_probe,
	.remove = mtk_rtc_remove,
};

module_platform_driver(mtk_rtc_driver);

MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>");
MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC");
Commit	Line	Data
1802d0be	1	// SPDX-License-Identifier: GPL-2.0-only
fc297911 TF	2	/*
	3	* Copyright (c) 2014-2015 MediaTek Inc.
	4	* Author: Tianping.Fang <tianping.fang@mediatek.com>
fc297911 TF	5	*/
	6
	7	#include <linux/delay.h>
	8	#include <linux/init.h>
	9	#include <linux/module.h>
	10	#include <linux/regmap.h>
	11	#include <linux/rtc.h>
c512995c	12	#include <linux/mfd/mt6397/rtc.h>
fc297911 TF	13
	14	static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc)
	15	{
	16	unsigned long timeout = jiffies + HZ;
	17	int ret;
	18	u32 data;
	19
	20	ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_WRTGR, 1);
	21	if (ret < 0)
	22	return ret;
	23
	24	while (1) {
	25	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_BBPU,
	26	&data);
	27	if (ret < 0)
	28	break;
	29	if (!(data & RTC_BBPU_CBUSY))
	30	break;
	31	if (time_after(jiffies, timeout)) {
	32	ret = -ETIMEDOUT;
	33	break;
	34	}
	35	cpu_relax();
	36	}
	37
	38	return ret;
	39	}
	40
	41	static irqreturn_t mtk_rtc_irq_handler_thread(int irq, void *data)
	42	{
	43	struct mt6397_rtc *rtc = data;
	44	u32 irqsta, irqen;
	45	int ret;
	46
	47	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_STA, &irqsta);
	48	if ((ret >= 0) && (irqsta & RTC_IRQ_STA_AL)) {
	49	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF \| RTC_AF);
	50	irqen = irqsta & ~RTC_IRQ_EN_AL;
	51	mutex_lock(&rtc->lock);
	52	if (regmap_write(rtc->regmap, rtc->addr_base + RTC_IRQ_EN,
	53	irqen) < 0)
	54	mtk_rtc_write_trigger(rtc);
	55	mutex_unlock(&rtc->lock);
	56
	57	return IRQ_HANDLED;
	58	}
	59
	60	return IRQ_NONE;
	61	}
	62
	63	static int __mtk_rtc_read_time(struct mt6397_rtc *rtc,
	64	struct rtc_time tm, int sec)
	65	{
	66	int ret;
	67	u16 data[RTC_OFFSET_COUNT];
	68
	69	mutex_lock(&rtc->lock);
	70	ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
	71	data, RTC_OFFSET_COUNT);
	72	if (ret < 0)
	73	goto exit;
	74
	75	tm->tm_sec = data[RTC_OFFSET_SEC];
	76	tm->tm_min = data[RTC_OFFSET_MIN];
77	tm->tm_hour = data[RTC_OFFSET_HOUR];
78	tm->tm_mday = data[RTC_OFFSET_DOM];
79	tm->tm_mon = data[RTC_OFFSET_MTH];
80	tm->tm_year = data[RTC_OFFSET_YEAR];
81
82	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, sec);
83	exit:
84	mutex_unlock(&rtc->lock);
85	return ret;
86	}
87
88	static int mtk_rtc_read_time(struct device dev, struct rtc_time tm)
89	{
90	time64_t time;
91	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
93939967	92	int days, sec, ret;
fc297911 TF	93
	94	do {
	95	ret = __mtk_rtc_read_time(rtc, tm, &sec);
	96	if (ret < 0)
	97	goto exit;
	98	} while (sec < tm->tm_sec);
	99
	100	/* HW register use 7 bits to store year data, minus
	101	* RTC_MIN_YEAR_OFFSET before write year data to register, and plus
	102	* RTC_MIN_YEAR_OFFSET back after read year from register
	103	*/
	104	tm->tm_year += RTC_MIN_YEAR_OFFSET;
	105
	106	/* HW register start mon from one, but tm_mon start from zero. */
	107	tm->tm_mon--;
	108	time = rtc_tm_to_time64(tm);
	109
	110	/* rtc_tm_to_time64 covert Gregorian date to seconds since
	111	* 01-01-1970 00:00:00, and this date is Thursday.
	112	*/
93939967 AB	113	days = div_s64(time, 86400);
93939967 AB	114	tm->tm_wday = (days + 4) % 7;
fc297911 TF	115
	116	exit:
	117	return ret;
	118	}
	119
	120	static int mtk_rtc_set_time(struct device dev, struct rtc_time tm)
	121	{
	122	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	123	int ret;
	124	u16 data[RTC_OFFSET_COUNT];
	125
	126	tm->tm_year -= RTC_MIN_YEAR_OFFSET;
	127	tm->tm_mon++;
	128
	129	data[RTC_OFFSET_SEC] = tm->tm_sec;
	130	data[RTC_OFFSET_MIN] = tm->tm_min;
	131	data[RTC_OFFSET_HOUR] = tm->tm_hour;
	132	data[RTC_OFFSET_DOM] = tm->tm_mday;
	133	data[RTC_OFFSET_MTH] = tm->tm_mon;
	134	data[RTC_OFFSET_YEAR] = tm->tm_year;
	135
	136	mutex_lock(&rtc->lock);
	137	ret = regmap_bulk_write(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
	138	data, RTC_OFFSET_COUNT);
	139	if (ret < 0)
	140	goto exit;
	141
	142	/* Time register write to hardware after call trigger function */
	143	ret = mtk_rtc_write_trigger(rtc);
	144
	145	exit:
	146	mutex_unlock(&rtc->lock);
	147	return ret;
	148	}
	149
	150	static int mtk_rtc_read_alarm(struct device dev, struct rtc_wkalrm alm)
	151	{
	152	struct rtc_time *tm = &alm->time;
	153	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	154	u32 irqen, pdn2;
	155	int ret;
	156	u16 data[RTC_OFFSET_COUNT];
	157
	158	mutex_lock(&rtc->lock);
	159	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_EN, &irqen);
	160	if (ret < 0)
	161	goto err_exit;
	162	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_PDN2, &pdn2);
	163	if (ret < 0)
	164	goto err_exit;
	165
	166	ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC,
	167	data, RTC_OFFSET_COUNT);
	168	if (ret < 0)
	169	goto err_exit;
	170
	171	alm->enabled = !!(irqen & RTC_IRQ_EN_AL);
	172	alm->pending = !!(pdn2 & RTC_PDN2_PWRON_ALARM);
	173	mutex_unlock(&rtc->lock);
	174
	175	tm->tm_sec = data[RTC_OFFSET_SEC];
	176	tm->tm_min = data[RTC_OFFSET_MIN];
	177	tm->tm_hour = data[RTC_OFFSET_HOUR];
	178	tm->tm_mday = data[RTC_OFFSET_DOM];
179	tm->tm_mon = data[RTC_OFFSET_MTH];
180	tm->tm_year = data[RTC_OFFSET_YEAR];
181
182	tm->tm_year += RTC_MIN_YEAR_OFFSET;
183	tm->tm_mon--;
184
185	return 0;
186	err_exit:
187	mutex_unlock(&rtc->lock);
188	return ret;
189	}
190
191	static int mtk_rtc_set_alarm(struct device dev, struct rtc_wkalrm alm)
192	{
193	struct rtc_time *tm = &alm->time;
194	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
195	int ret;
196	u16 data[RTC_OFFSET_COUNT];
197
198	tm->tm_year -= RTC_MIN_YEAR_OFFSET;
199	tm->tm_mon++;
200
201	data[RTC_OFFSET_SEC] = tm->tm_sec;
202	data[RTC_OFFSET_MIN] = tm->tm_min;
203	data[RTC_OFFSET_HOUR] = tm->tm_hour;
204	data[RTC_OFFSET_DOM] = tm->tm_mday;
205	data[RTC_OFFSET_MTH] = tm->tm_mon;
206	data[RTC_OFFSET_YEAR] = tm->tm_year;
207
208	mutex_lock(&rtc->lock);
209	if (alm->enabled) {
210	ret = regmap_bulk_write(rtc->regmap,
211	rtc->addr_base + RTC_AL_SEC,
212	data, RTC_OFFSET_COUNT);
213	if (ret < 0)
214	goto exit;
215	ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_AL_MASK,
216	RTC_AL_MASK_DOW);
217	if (ret < 0)
218	goto exit;
219	ret = regmap_update_bits(rtc->regmap,
220	rtc->addr_base + RTC_IRQ_EN,
221	RTC_IRQ_EN_ONESHOT_AL,
222	RTC_IRQ_EN_ONESHOT_AL);
223	if (ret < 0)
224	goto exit;
225	} else {
226	ret = regmap_update_bits(rtc->regmap,
227	rtc->addr_base + RTC_IRQ_EN,
228	RTC_IRQ_EN_ONESHOT_AL, 0);
229	if (ret < 0)
230	goto exit;
231	}
232
233	/* All alarm time register write to hardware after calling
234	* mtk_rtc_write_trigger. This can avoid race condition if alarm
235	* occur happen during writing alarm time register.
236	*/
237	ret = mtk_rtc_write_trigger(rtc);
238	exit:
239	mutex_unlock(&rtc->lock);
240	return ret;
241	}
242
34c7b3ac	243	static const struct rtc_class_ops mtk_rtc_ops = {
fc297911 TF	244	.read_time = mtk_rtc_read_time,
	245	.set_time = mtk_rtc_set_time,
	246	.read_alarm = mtk_rtc_read_alarm,
	247	.set_alarm = mtk_rtc_set_alarm,
	248	};
	249
	250	static int mtk_rtc_probe(struct platform_device *pdev)
	251	{
	252	struct resource *res;
	253	struct mt6397_chip *mt6397_chip = dev_get_drvdata(pdev->dev.parent);
	254	struct mt6397_rtc *rtc;
	255	int ret;
	256
	257	rtc = devm_kzalloc(&pdev->dev, sizeof(struct mt6397_rtc), GFP_KERNEL);
	258	if (!rtc)
	259	return -ENOMEM;
	260
	261	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	262	rtc->addr_base = res->start;
	263
e695d3a0 CZ	264	rtc->irq = platform_get_irq(pdev, 0);
	265	if (rtc->irq < 0)
	266	return rtc->irq;
fc297911 TF	267
	268	rtc->regmap = mt6397_chip->regmap;
	269	rtc->dev = &pdev->dev;
	270	mutex_init(&rtc->lock);
	271
	272	platform_set_drvdata(pdev, rtc);
	273
babab2f8 AB	274	rtc->rtc_dev = devm_rtc_allocate_device(rtc->dev);
	275	if (IS_ERR(rtc->rtc_dev))
	276	return PTR_ERR(rtc->rtc_dev);
	277
fc297911 TF	278	ret = request_threaded_irq(rtc->irq, NULL,
	279	mtk_rtc_irq_handler_thread,
	280	IRQF_ONESHOT \| IRQF_TRIGGER_HIGH,
	281	"mt6397-rtc", rtc);
	282	if (ret) {
	283	dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
	284	rtc->irq, ret);
24db953e	285	return ret;
fc297911 TF	286	}
fc297911 TF	287
baeca449 WNH	288	device_init_wakeup(&pdev->dev, 1);
baeca449 WNH	289
babab2f8 AB	290	rtc->rtc_dev->ops = &mtk_rtc_ops;
	291
	292	ret = rtc_register_device(rtc->rtc_dev);
44c638ce	293	if (ret)
fc297911	294	goto out_free_irq;
fc297911	295
fc297911 TF	296	return 0;
	297
	298	out_free_irq:
24db953e	299	free_irq(rtc->irq, rtc);
fc297911 TF	300	return ret;
	301	}
	302
	303	static int mtk_rtc_remove(struct platform_device *pdev)
	304	{
	305	struct mt6397_rtc *rtc = platform_get_drvdata(pdev);
	306
24db953e	307	free_irq(rtc->irq, rtc);
fc297911 TF	308
	309	return 0;
	310	}
	311
d7f9777d HC	312	#ifdef CONFIG_PM_SLEEP
	313	static int mt6397_rtc_suspend(struct device *dev)
	314	{
	315	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	316
	317	if (device_may_wakeup(dev))
	318	enable_irq_wake(rtc->irq);
	319
	320	return 0;
	321	}
	322
	323	static int mt6397_rtc_resume(struct device *dev)
	324	{
	325	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	326
	327	if (device_may_wakeup(dev))
	328	disable_irq_wake(rtc->irq);
	329
	330	return 0;
	331	}
	332	#endif
	333
	334	static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend,
	335	mt6397_rtc_resume);
	336
fc297911 TF	337	static const struct of_device_id mt6397_rtc_of_match[] = {
	338	{ .compatible = "mediatek,mt6397-rtc", },
	339	{ }
	340	};
73798d5c	341	MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match);
fc297911 TF	342
	343	static struct platform_driver mtk_rtc_driver = {
	344	.driver = {
	345	.name = "mt6397-rtc",
	346	.of_match_table = mt6397_rtc_of_match,
d7f9777d	347	.pm = &mt6397_pm_ops,
fc297911 TF	348	},
	349	.probe = mtk_rtc_probe,
	350	.remove = mtk_rtc_remove,
	351	};
	352
	353	module_platform_driver(mtk_rtc_driver);
	354
	355	MODULE_LICENSE("GPL v2");
	356	MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>");
	357	MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC");