Commit | Line | Data |
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fca1dd03 JL |
1 | /* |
2 | * RTC driver for Maxim MAX77686 | |
3 | * | |
4 | * Copyright (C) 2012 Samsung Electronics Co.Ltd | |
5 | * | |
6 | * based on rtc-max8997.c | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/slab.h> | |
16 | #include <linux/rtc.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/mutex.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/mfd/max77686-private.h> | |
22 | #include <linux/irqdomain.h> | |
23 | #include <linux/regmap.h> | |
24 | ||
25 | /* RTC Control Register */ | |
26 | #define BCD_EN_SHIFT 0 | |
ac60bf31 | 27 | #define BCD_EN_MASK (1 << BCD_EN_SHIFT) |
fca1dd03 JL |
28 | #define MODEL24_SHIFT 1 |
29 | #define MODEL24_MASK (1 << MODEL24_SHIFT) | |
30 | /* RTC Update Register1 */ | |
31 | #define RTC_UDR_SHIFT 0 | |
32 | #define RTC_UDR_MASK (1 << RTC_UDR_SHIFT) | |
33 | #define RTC_RBUDR_SHIFT 4 | |
34 | #define RTC_RBUDR_MASK (1 << RTC_RBUDR_SHIFT) | |
35 | /* WTSR and SMPL Register */ | |
ac60bf31 JH |
36 | #define WTSRT_SHIFT 0 |
37 | #define SMPLT_SHIFT 2 | |
fca1dd03 JL |
38 | #define WTSR_EN_SHIFT 6 |
39 | #define SMPL_EN_SHIFT 7 | |
ac60bf31 JH |
40 | #define WTSRT_MASK (3 << WTSRT_SHIFT) |
41 | #define SMPLT_MASK (3 << SMPLT_SHIFT) | |
fca1dd03 JL |
42 | #define WTSR_EN_MASK (1 << WTSR_EN_SHIFT) |
43 | #define SMPL_EN_MASK (1 << SMPL_EN_SHIFT) | |
44 | /* RTC Hour register */ | |
45 | #define HOUR_PM_SHIFT 6 | |
46 | #define HOUR_PM_MASK (1 << HOUR_PM_SHIFT) | |
47 | /* RTC Alarm Enable */ | |
48 | #define ALARM_ENABLE_SHIFT 7 | |
49 | #define ALARM_ENABLE_MASK (1 << ALARM_ENABLE_SHIFT) | |
50 | ||
51 | #define MAX77686_RTC_UPDATE_DELAY 16 | |
52 | #undef MAX77686_RTC_WTSR_SMPL | |
53 | ||
54 | enum { | |
55 | RTC_SEC = 0, | |
56 | RTC_MIN, | |
57 | RTC_HOUR, | |
58 | RTC_WEEKDAY, | |
59 | RTC_MONTH, | |
60 | RTC_YEAR, | |
61 | RTC_DATE, | |
62 | RTC_NR_TIME | |
63 | }; | |
64 | ||
65 | struct max77686_rtc_info { | |
66 | struct device *dev; | |
67 | struct max77686_dev *max77686; | |
68 | struct i2c_client *rtc; | |
69 | struct rtc_device *rtc_dev; | |
70 | struct mutex lock; | |
71 | ||
72 | struct regmap *regmap; | |
73 | ||
74 | int virq; | |
75 | int rtc_24hr_mode; | |
76 | }; | |
77 | ||
78 | enum MAX77686_RTC_OP { | |
79 | MAX77686_RTC_WRITE, | |
80 | MAX77686_RTC_READ, | |
81 | }; | |
82 | ||
83 | static inline int max77686_rtc_calculate_wday(u8 shifted) | |
84 | { | |
85 | int counter = -1; | |
86 | while (shifted) { | |
87 | shifted >>= 1; | |
88 | counter++; | |
89 | } | |
90 | return counter; | |
91 | } | |
92 | ||
93 | static void max77686_rtc_data_to_tm(u8 *data, struct rtc_time *tm, | |
94 | int rtc_24hr_mode) | |
95 | { | |
96 | tm->tm_sec = data[RTC_SEC] & 0x7f; | |
97 | tm->tm_min = data[RTC_MIN] & 0x7f; | |
98 | if (rtc_24hr_mode) | |
99 | tm->tm_hour = data[RTC_HOUR] & 0x1f; | |
100 | else { | |
101 | tm->tm_hour = data[RTC_HOUR] & 0x0f; | |
102 | if (data[RTC_HOUR] & HOUR_PM_MASK) | |
103 | tm->tm_hour += 12; | |
104 | } | |
105 | ||
106 | tm->tm_wday = max77686_rtc_calculate_wday(data[RTC_WEEKDAY] & 0x7f); | |
107 | tm->tm_mday = data[RTC_DATE] & 0x1f; | |
108 | tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1; | |
109 | tm->tm_year = (data[RTC_YEAR] & 0x7f) + 100; | |
110 | tm->tm_yday = 0; | |
111 | tm->tm_isdst = 0; | |
112 | } | |
113 | ||
114 | static int max77686_rtc_tm_to_data(struct rtc_time *tm, u8 *data) | |
115 | { | |
116 | data[RTC_SEC] = tm->tm_sec; | |
117 | data[RTC_MIN] = tm->tm_min; | |
118 | data[RTC_HOUR] = tm->tm_hour; | |
119 | data[RTC_WEEKDAY] = 1 << tm->tm_wday; | |
120 | data[RTC_DATE] = tm->tm_mday; | |
121 | data[RTC_MONTH] = tm->tm_mon + 1; | |
cdf5f4ac | 122 | data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0; |
fca1dd03 JL |
123 | |
124 | if (tm->tm_year < 100) { | |
125 | pr_warn("%s: MAX77686 RTC cannot handle the year %d." | |
126 | "Assume it's 2000.\n", __func__, 1900 + tm->tm_year); | |
127 | return -EINVAL; | |
128 | } | |
129 | return 0; | |
130 | } | |
131 | ||
132 | static int max77686_rtc_update(struct max77686_rtc_info *info, | |
133 | enum MAX77686_RTC_OP op) | |
134 | { | |
135 | int ret; | |
136 | unsigned int data; | |
137 | ||
138 | if (op == MAX77686_RTC_WRITE) | |
139 | data = 1 << RTC_UDR_SHIFT; | |
140 | else | |
141 | data = 1 << RTC_RBUDR_SHIFT; | |
142 | ||
143 | ret = regmap_update_bits(info->max77686->rtc_regmap, | |
144 | MAX77686_RTC_UPDATE0, data, data); | |
145 | if (ret < 0) | |
146 | dev_err(info->dev, "%s: fail to write update reg(ret=%d, data=0x%x)\n", | |
147 | __func__, ret, data); | |
148 | else { | |
149 | /* Minimum 16ms delay required before RTC update. */ | |
150 | msleep(MAX77686_RTC_UPDATE_DELAY); | |
151 | } | |
152 | ||
153 | return ret; | |
154 | } | |
155 | ||
156 | static int max77686_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
157 | { | |
158 | struct max77686_rtc_info *info = dev_get_drvdata(dev); | |
159 | u8 data[RTC_NR_TIME]; | |
160 | int ret; | |
161 | ||
162 | mutex_lock(&info->lock); | |
163 | ||
164 | ret = max77686_rtc_update(info, MAX77686_RTC_READ); | |
165 | if (ret < 0) | |
166 | goto out; | |
167 | ||
168 | ret = regmap_bulk_read(info->max77686->rtc_regmap, | |
169 | MAX77686_RTC_SEC, data, RTC_NR_TIME); | |
170 | if (ret < 0) { | |
171 | dev_err(info->dev, "%s: fail to read time reg(%d)\n", __func__, ret); | |
172 | goto out; | |
173 | } | |
174 | ||
175 | max77686_rtc_data_to_tm(data, tm, info->rtc_24hr_mode); | |
176 | ||
177 | ret = rtc_valid_tm(tm); | |
178 | ||
179 | out: | |
180 | mutex_unlock(&info->lock); | |
181 | return ret; | |
182 | } | |
183 | ||
184 | static int max77686_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
185 | { | |
186 | struct max77686_rtc_info *info = dev_get_drvdata(dev); | |
187 | u8 data[RTC_NR_TIME]; | |
188 | int ret; | |
189 | ||
190 | ret = max77686_rtc_tm_to_data(tm, data); | |
191 | if (ret < 0) | |
192 | return ret; | |
193 | ||
194 | mutex_lock(&info->lock); | |
195 | ||
196 | ret = regmap_bulk_write(info->max77686->rtc_regmap, | |
197 | MAX77686_RTC_SEC, data, RTC_NR_TIME); | |
198 | if (ret < 0) { | |
199 | dev_err(info->dev, "%s: fail to write time reg(%d)\n", __func__, | |
200 | ret); | |
201 | goto out; | |
202 | } | |
203 | ||
204 | ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); | |
205 | ||
206 | out: | |
207 | mutex_unlock(&info->lock); | |
208 | return ret; | |
209 | } | |
210 | ||
211 | static int max77686_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
212 | { | |
213 | struct max77686_rtc_info *info = dev_get_drvdata(dev); | |
214 | u8 data[RTC_NR_TIME]; | |
215 | unsigned int val; | |
216 | int i, ret; | |
217 | ||
218 | mutex_lock(&info->lock); | |
219 | ||
220 | ret = max77686_rtc_update(info, MAX77686_RTC_READ); | |
221 | if (ret < 0) | |
222 | goto out; | |
223 | ||
224 | ret = regmap_bulk_read(info->max77686->rtc_regmap, | |
225 | MAX77686_ALARM1_SEC, data, RTC_NR_TIME); | |
226 | if (ret < 0) { | |
227 | dev_err(info->dev, "%s:%d fail to read alarm reg(%d)\n", | |
228 | __func__, __LINE__, ret); | |
229 | goto out; | |
230 | } | |
231 | ||
232 | max77686_rtc_data_to_tm(data, &alrm->time, info->rtc_24hr_mode); | |
233 | ||
234 | alrm->enabled = 0; | |
235 | for (i = 0; i < RTC_NR_TIME; i++) { | |
236 | if (data[i] & ALARM_ENABLE_MASK) { | |
237 | alrm->enabled = 1; | |
238 | break; | |
239 | } | |
240 | } | |
241 | ||
242 | alrm->pending = 0; | |
1748cbf7 | 243 | ret = regmap_read(info->max77686->regmap, MAX77686_REG_STATUS2, &val); |
fca1dd03 | 244 | if (ret < 0) { |
1748cbf7 | 245 | dev_err(info->dev, "%s:%d fail to read status2 reg(%d)\n", |
fca1dd03 JL |
246 | __func__, __LINE__, ret); |
247 | goto out; | |
248 | } | |
249 | ||
250 | if (val & (1 << 4)) /* RTCA1 */ | |
251 | alrm->pending = 1; | |
252 | ||
253 | out: | |
254 | mutex_unlock(&info->lock); | |
255 | return 0; | |
256 | } | |
257 | ||
258 | static int max77686_rtc_stop_alarm(struct max77686_rtc_info *info) | |
259 | { | |
260 | u8 data[RTC_NR_TIME]; | |
261 | int ret, i; | |
262 | struct rtc_time tm; | |
263 | ||
264 | if (!mutex_is_locked(&info->lock)) | |
265 | dev_warn(info->dev, "%s: should have mutex locked\n", __func__); | |
266 | ||
267 | ret = max77686_rtc_update(info, MAX77686_RTC_READ); | |
268 | if (ret < 0) | |
269 | goto out; | |
270 | ||
271 | ret = regmap_bulk_read(info->max77686->rtc_regmap, | |
272 | MAX77686_ALARM1_SEC, data, RTC_NR_TIME); | |
273 | if (ret < 0) { | |
274 | dev_err(info->dev, "%s: fail to read alarm reg(%d)\n", | |
275 | __func__, ret); | |
276 | goto out; | |
277 | } | |
278 | ||
279 | max77686_rtc_data_to_tm(data, &tm, info->rtc_24hr_mode); | |
280 | ||
281 | for (i = 0; i < RTC_NR_TIME; i++) | |
282 | data[i] &= ~ALARM_ENABLE_MASK; | |
283 | ||
284 | ret = regmap_bulk_write(info->max77686->rtc_regmap, | |
285 | MAX77686_ALARM1_SEC, data, RTC_NR_TIME); | |
286 | if (ret < 0) { | |
287 | dev_err(info->dev, "%s: fail to write alarm reg(%d)\n", | |
288 | __func__, ret); | |
289 | goto out; | |
290 | } | |
291 | ||
292 | ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); | |
293 | out: | |
294 | return ret; | |
295 | } | |
296 | ||
297 | static int max77686_rtc_start_alarm(struct max77686_rtc_info *info) | |
298 | { | |
299 | u8 data[RTC_NR_TIME]; | |
300 | int ret; | |
301 | struct rtc_time tm; | |
302 | ||
303 | if (!mutex_is_locked(&info->lock)) | |
304 | dev_warn(info->dev, "%s: should have mutex locked\n", __func__); | |
305 | ||
306 | ret = max77686_rtc_update(info, MAX77686_RTC_READ); | |
307 | if (ret < 0) | |
308 | goto out; | |
309 | ||
310 | ret = regmap_bulk_read(info->max77686->rtc_regmap, | |
311 | MAX77686_ALARM1_SEC, data, RTC_NR_TIME); | |
312 | if (ret < 0) { | |
313 | dev_err(info->dev, "%s: fail to read alarm reg(%d)\n", | |
314 | __func__, ret); | |
315 | goto out; | |
316 | } | |
317 | ||
318 | max77686_rtc_data_to_tm(data, &tm, info->rtc_24hr_mode); | |
319 | ||
320 | data[RTC_SEC] |= (1 << ALARM_ENABLE_SHIFT); | |
321 | data[RTC_MIN] |= (1 << ALARM_ENABLE_SHIFT); | |
322 | data[RTC_HOUR] |= (1 << ALARM_ENABLE_SHIFT); | |
323 | data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK; | |
324 | if (data[RTC_MONTH] & 0xf) | |
325 | data[RTC_MONTH] |= (1 << ALARM_ENABLE_SHIFT); | |
326 | if (data[RTC_YEAR] & 0x7f) | |
327 | data[RTC_YEAR] |= (1 << ALARM_ENABLE_SHIFT); | |
328 | if (data[RTC_DATE] & 0x1f) | |
329 | data[RTC_DATE] |= (1 << ALARM_ENABLE_SHIFT); | |
330 | ||
331 | ret = regmap_bulk_write(info->max77686->rtc_regmap, | |
332 | MAX77686_ALARM1_SEC, data, RTC_NR_TIME); | |
333 | if (ret < 0) { | |
334 | dev_err(info->dev, "%s: fail to write alarm reg(%d)\n", | |
335 | __func__, ret); | |
336 | goto out; | |
337 | } | |
338 | ||
339 | ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); | |
340 | out: | |
341 | return ret; | |
342 | } | |
343 | ||
344 | static int max77686_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
345 | { | |
346 | struct max77686_rtc_info *info = dev_get_drvdata(dev); | |
347 | u8 data[RTC_NR_TIME]; | |
348 | int ret; | |
349 | ||
350 | ret = max77686_rtc_tm_to_data(&alrm->time, data); | |
351 | if (ret < 0) | |
352 | return ret; | |
353 | ||
354 | mutex_lock(&info->lock); | |
355 | ||
356 | ret = max77686_rtc_stop_alarm(info); | |
357 | if (ret < 0) | |
358 | goto out; | |
359 | ||
360 | ret = regmap_bulk_write(info->max77686->rtc_regmap, | |
361 | MAX77686_ALARM1_SEC, data, RTC_NR_TIME); | |
362 | ||
363 | if (ret < 0) { | |
364 | dev_err(info->dev, "%s: fail to write alarm reg(%d)\n", | |
365 | __func__, ret); | |
366 | goto out; | |
367 | } | |
368 | ||
369 | ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); | |
370 | if (ret < 0) | |
371 | goto out; | |
372 | ||
373 | if (alrm->enabled) | |
374 | ret = max77686_rtc_start_alarm(info); | |
375 | out: | |
376 | mutex_unlock(&info->lock); | |
377 | return ret; | |
378 | } | |
379 | ||
380 | static int max77686_rtc_alarm_irq_enable(struct device *dev, | |
381 | unsigned int enabled) | |
382 | { | |
383 | struct max77686_rtc_info *info = dev_get_drvdata(dev); | |
384 | int ret; | |
385 | ||
386 | mutex_lock(&info->lock); | |
387 | if (enabled) | |
388 | ret = max77686_rtc_start_alarm(info); | |
389 | else | |
390 | ret = max77686_rtc_stop_alarm(info); | |
391 | mutex_unlock(&info->lock); | |
392 | ||
393 | return ret; | |
394 | } | |
395 | ||
396 | static irqreturn_t max77686_rtc_alarm_irq(int irq, void *data) | |
397 | { | |
398 | struct max77686_rtc_info *info = data; | |
399 | ||
400 | dev_info(info->dev, "%s:irq(%d)\n", __func__, irq); | |
401 | ||
402 | rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF); | |
403 | ||
404 | return IRQ_HANDLED; | |
405 | } | |
406 | ||
407 | static const struct rtc_class_ops max77686_rtc_ops = { | |
408 | .read_time = max77686_rtc_read_time, | |
409 | .set_time = max77686_rtc_set_time, | |
410 | .read_alarm = max77686_rtc_read_alarm, | |
411 | .set_alarm = max77686_rtc_set_alarm, | |
412 | .alarm_irq_enable = max77686_rtc_alarm_irq_enable, | |
413 | }; | |
414 | ||
415 | #ifdef MAX77686_RTC_WTSR_SMPL | |
416 | static void max77686_rtc_enable_wtsr(struct max77686_rtc_info *info, bool enable) | |
417 | { | |
418 | int ret; | |
419 | unsigned int val, mask; | |
420 | ||
421 | if (enable) | |
422 | val = (1 << WTSR_EN_SHIFT) | (3 << WTSRT_SHIFT); | |
423 | else | |
424 | val = 0; | |
425 | ||
426 | mask = WTSR_EN_MASK | WTSRT_MASK; | |
427 | ||
428 | dev_info(info->dev, "%s: %s WTSR\n", __func__, | |
429 | enable ? "enable" : "disable"); | |
430 | ||
431 | ret = regmap_update_bits(info->max77686->rtc_regmap, | |
432 | MAX77686_WTSR_SMPL_CNTL, mask, val); | |
433 | if (ret < 0) { | |
434 | dev_err(info->dev, "%s: fail to update WTSR reg(%d)\n", | |
435 | __func__, ret); | |
436 | return; | |
437 | } | |
438 | ||
439 | max77686_rtc_update(info, MAX77686_RTC_WRITE); | |
440 | } | |
441 | ||
442 | static void max77686_rtc_enable_smpl(struct max77686_rtc_info *info, bool enable) | |
443 | { | |
444 | int ret; | |
445 | unsigned int val, mask; | |
446 | ||
447 | if (enable) | |
448 | val = (1 << SMPL_EN_SHIFT) | (0 << SMPLT_SHIFT); | |
449 | else | |
450 | val = 0; | |
451 | ||
452 | mask = SMPL_EN_MASK | SMPLT_MASK; | |
453 | ||
454 | dev_info(info->dev, "%s: %s SMPL\n", __func__, | |
455 | enable ? "enable" : "disable"); | |
456 | ||
457 | ret = regmap_update_bits(info->max77686->rtc_regmap, | |
458 | MAX77686_WTSR_SMPL_CNTL, mask, val); | |
459 | if (ret < 0) { | |
460 | dev_err(info->dev, "%s: fail to update SMPL reg(%d)\n", | |
461 | __func__, ret); | |
462 | return; | |
463 | } | |
464 | ||
465 | max77686_rtc_update(info, MAX77686_RTC_WRITE); | |
466 | ||
467 | val = 0; | |
468 | regmap_read(info->max77686->rtc_regmap, MAX77686_WTSR_SMPL_CNTL, &val); | |
e2bf1151 | 469 | dev_info(info->dev, "%s: WTSR_SMPL(0x%02x)\n", __func__, val); |
fca1dd03 JL |
470 | } |
471 | #endif /* MAX77686_RTC_WTSR_SMPL */ | |
472 | ||
473 | static int max77686_rtc_init_reg(struct max77686_rtc_info *info) | |
474 | { | |
475 | u8 data[2]; | |
476 | int ret; | |
477 | ||
478 | /* Set RTC control register : Binary mode, 24hour mdoe */ | |
479 | data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); | |
480 | data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); | |
481 | ||
482 | info->rtc_24hr_mode = 1; | |
483 | ||
484 | ret = regmap_bulk_write(info->max77686->rtc_regmap, MAX77686_RTC_CONTROLM, data, 2); | |
485 | if (ret < 0) { | |
486 | dev_err(info->dev, "%s: fail to write controlm reg(%d)\n", | |
487 | __func__, ret); | |
488 | return ret; | |
489 | } | |
490 | ||
491 | ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); | |
492 | return ret; | |
493 | } | |
494 | ||
fca1dd03 JL |
495 | static int max77686_rtc_probe(struct platform_device *pdev) |
496 | { | |
497 | struct max77686_dev *max77686 = dev_get_drvdata(pdev->dev.parent); | |
498 | struct max77686_rtc_info *info; | |
6f1c1e71 | 499 | int ret; |
fca1dd03 | 500 | |
3cebeb53 | 501 | dev_info(&pdev->dev, "%s\n", __func__); |
fca1dd03 | 502 | |
0f64f853 JH |
503 | info = devm_kzalloc(&pdev->dev, sizeof(struct max77686_rtc_info), |
504 | GFP_KERNEL); | |
fca1dd03 JL |
505 | if (!info) |
506 | return -ENOMEM; | |
507 | ||
508 | mutex_init(&info->lock); | |
509 | info->dev = &pdev->dev; | |
510 | info->max77686 = max77686; | |
511 | info->rtc = max77686->rtc; | |
6f1c1e71 | 512 | |
fca1dd03 JL |
513 | platform_set_drvdata(pdev, info); |
514 | ||
515 | ret = max77686_rtc_init_reg(info); | |
516 | ||
517 | if (ret < 0) { | |
518 | dev_err(&pdev->dev, "Failed to initialize RTC reg:%d\n", ret); | |
519 | goto err_rtc; | |
520 | } | |
521 | ||
522 | #ifdef MAX77686_RTC_WTSR_SMPL | |
523 | max77686_rtc_enable_wtsr(info, true); | |
524 | max77686_rtc_enable_smpl(info, true); | |
525 | #endif | |
526 | ||
527 | device_init_wakeup(&pdev->dev, 1); | |
528 | ||
f56950ec JH |
529 | info->rtc_dev = devm_rtc_device_register(&pdev->dev, "max77686-rtc", |
530 | &max77686_rtc_ops, THIS_MODULE); | |
fca1dd03 JL |
531 | |
532 | if (IS_ERR(info->rtc_dev)) { | |
3cebeb53 | 533 | dev_info(&pdev->dev, "%s: fail\n", __func__); |
fca1dd03 JL |
534 | |
535 | ret = PTR_ERR(info->rtc_dev); | |
536 | dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret); | |
537 | if (ret == 0) | |
538 | ret = -EINVAL; | |
539 | goto err_rtc; | |
540 | } | |
6f1c1e71 JMC |
541 | |
542 | info->virq = regmap_irq_get_virq(max77686->rtc_irq_data, | |
543 | MAX77686_RTCIRQ_RTCA1); | |
544 | if (!info->virq) { | |
ad819039 | 545 | ret = -ENXIO; |
fca1dd03 | 546 | goto err_rtc; |
ad819039 | 547 | } |
fca1dd03 | 548 | |
6f1c1e71 JMC |
549 | ret = devm_request_threaded_irq(&pdev->dev, info->virq, NULL, |
550 | max77686_rtc_alarm_irq, 0, "rtc-alarm1", info); | |
ad819039 | 551 | if (ret < 0) |
fca1dd03 JL |
552 | dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n", |
553 | info->virq, ret); | |
fca1dd03 | 554 | |
fca1dd03 | 555 | err_rtc: |
fca1dd03 JL |
556 | return ret; |
557 | } | |
558 | ||
fca1dd03 JL |
559 | static void max77686_rtc_shutdown(struct platform_device *pdev) |
560 | { | |
561 | #ifdef MAX77686_RTC_WTSR_SMPL | |
562 | struct max77686_rtc_info *info = platform_get_drvdata(pdev); | |
563 | int i; | |
564 | u8 val = 0; | |
565 | ||
566 | for (i = 0; i < 3; i++) { | |
567 | max77686_rtc_enable_wtsr(info, false); | |
568 | regmap_read(info->max77686->rtc_regmap, MAX77686_WTSR_SMPL_CNTL, &val); | |
e2bf1151 JH |
569 | dev_info(info->dev, "%s: WTSR_SMPL reg(0x%02x)\n", __func__, |
570 | val); | |
571 | if (val & WTSR_EN_MASK) { | |
572 | dev_emerg(info->dev, "%s: fail to disable WTSR\n", | |
573 | __func__); | |
574 | } else { | |
575 | dev_info(info->dev, "%s: success to disable WTSR\n", | |
576 | __func__); | |
fca1dd03 JL |
577 | break; |
578 | } | |
579 | } | |
580 | ||
581 | /* Disable SMPL when power off */ | |
582 | max77686_rtc_enable_smpl(info, false); | |
583 | #endif /* MAX77686_RTC_WTSR_SMPL */ | |
584 | } | |
585 | ||
586 | static const struct platform_device_id rtc_id[] = { | |
587 | { "max77686-rtc", 0 }, | |
588 | {}, | |
589 | }; | |
590 | ||
591 | static struct platform_driver max77686_rtc_driver = { | |
592 | .driver = { | |
593 | .name = "max77686-rtc", | |
594 | .owner = THIS_MODULE, | |
595 | }, | |
596 | .probe = max77686_rtc_probe, | |
fca1dd03 JL |
597 | .shutdown = max77686_rtc_shutdown, |
598 | .id_table = rtc_id, | |
599 | }; | |
600 | ||
0c58ff58 | 601 | module_platform_driver(max77686_rtc_driver); |
fca1dd03 JL |
602 | |
603 | MODULE_DESCRIPTION("Maxim MAX77686 RTC driver"); | |
f5b1d3c5 | 604 | MODULE_AUTHOR("Chiwoong Byun <woong.byun@samsung.com>"); |
fca1dd03 | 605 | MODULE_LICENSE("GPL"); |