Commit | Line | Data |
---|---|---|
2e774c7c MZ |
1 | /* |
2 | * ST M48T59 RTC driver | |
3 | * | |
4 | * Copyright (c) 2007 Wind River Systems, Inc. | |
5 | * | |
6 | * Author: Mark Zhan <rongkai.zhan@windriver.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/io.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/rtc.h> | |
20 | #include <linux/rtc/m48t59.h> | |
21 | #include <linux/bcd.h> | |
22 | ||
23 | #ifndef NO_IRQ | |
24 | #define NO_IRQ (-1) | |
25 | #endif | |
26 | ||
94fe7424 KH |
27 | #define M48T59_READ(reg) (pdata->read_byte(dev, pdata->offset + reg)) |
28 | #define M48T59_WRITE(val, reg) \ | |
29 | (pdata->write_byte(dev, pdata->offset + reg, val)) | |
2e774c7c MZ |
30 | |
31 | #define M48T59_SET_BITS(mask, reg) \ | |
32 | M48T59_WRITE((M48T59_READ(reg) | (mask)), (reg)) | |
33 | #define M48T59_CLEAR_BITS(mask, reg) \ | |
34 | M48T59_WRITE((M48T59_READ(reg) & ~(mask)), (reg)) | |
35 | ||
36 | struct m48t59_private { | |
37 | void __iomem *ioaddr; | |
0439208a | 38 | int irq; |
2e774c7c MZ |
39 | struct rtc_device *rtc; |
40 | spinlock_t lock; /* serialize the NVRAM and RTC access */ | |
41 | }; | |
42 | ||
43 | /* | |
44 | * This is the generic access method when the chip is memory-mapped | |
45 | */ | |
46 | static void | |
47 | m48t59_mem_writeb(struct device *dev, u32 ofs, u8 val) | |
48 | { | |
49 | struct platform_device *pdev = to_platform_device(dev); | |
50 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
51 | ||
52 | writeb(val, m48t59->ioaddr+ofs); | |
53 | } | |
54 | ||
55 | static u8 | |
56 | m48t59_mem_readb(struct device *dev, u32 ofs) | |
57 | { | |
58 | struct platform_device *pdev = to_platform_device(dev); | |
59 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
60 | ||
61 | return readb(m48t59->ioaddr+ofs); | |
62 | } | |
63 | ||
64 | /* | |
65 | * NOTE: M48T59 only uses BCD mode | |
66 | */ | |
67 | static int m48t59_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
68 | { | |
69 | struct platform_device *pdev = to_platform_device(dev); | |
70 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; | |
71 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
72 | unsigned long flags; | |
73 | u8 val; | |
74 | ||
75 | spin_lock_irqsave(&m48t59->lock, flags); | |
76 | /* Issue the READ command */ | |
77 | M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL); | |
78 | ||
79 | tm->tm_year = BCD2BIN(M48T59_READ(M48T59_YEAR)); | |
80 | /* tm_mon is 0-11 */ | |
81 | tm->tm_mon = BCD2BIN(M48T59_READ(M48T59_MONTH)) - 1; | |
82 | tm->tm_mday = BCD2BIN(M48T59_READ(M48T59_MDAY)); | |
83 | ||
84 | val = M48T59_READ(M48T59_WDAY); | |
85 | if ((val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) { | |
86 | dev_dbg(dev, "Century bit is enabled\n"); | |
87 | tm->tm_year += 100; /* one century */ | |
88 | } | |
89 | ||
90 | tm->tm_wday = BCD2BIN(val & 0x07); | |
91 | tm->tm_hour = BCD2BIN(M48T59_READ(M48T59_HOUR) & 0x3F); | |
92 | tm->tm_min = BCD2BIN(M48T59_READ(M48T59_MIN) & 0x7F); | |
93 | tm->tm_sec = BCD2BIN(M48T59_READ(M48T59_SEC) & 0x7F); | |
94 | ||
95 | /* Clear the READ bit */ | |
96 | M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL); | |
97 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
98 | ||
99 | dev_dbg(dev, "RTC read time %04d-%02d-%02d %02d/%02d/%02d\n", | |
100 | tm->tm_year + 1900, tm->tm_mon, tm->tm_mday, | |
101 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
102 | return 0; | |
103 | } | |
104 | ||
105 | static int m48t59_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
106 | { | |
107 | struct platform_device *pdev = to_platform_device(dev); | |
108 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; | |
109 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
110 | unsigned long flags; | |
111 | u8 val = 0; | |
112 | ||
113 | dev_dbg(dev, "RTC set time %04d-%02d-%02d %02d/%02d/%02d\n", | |
114 | tm->tm_year + 1900, tm->tm_mon, tm->tm_mday, | |
115 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
116 | ||
117 | spin_lock_irqsave(&m48t59->lock, flags); | |
118 | /* Issue the WRITE command */ | |
119 | M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); | |
120 | ||
121 | M48T59_WRITE((BIN2BCD(tm->tm_sec) & 0x7F), M48T59_SEC); | |
122 | M48T59_WRITE((BIN2BCD(tm->tm_min) & 0x7F), M48T59_MIN); | |
123 | M48T59_WRITE((BIN2BCD(tm->tm_hour) & 0x3F), M48T59_HOUR); | |
124 | M48T59_WRITE((BIN2BCD(tm->tm_mday) & 0x3F), M48T59_MDAY); | |
125 | /* tm_mon is 0-11 */ | |
126 | M48T59_WRITE((BIN2BCD(tm->tm_mon + 1) & 0x1F), M48T59_MONTH); | |
127 | M48T59_WRITE(BIN2BCD(tm->tm_year % 100), M48T59_YEAR); | |
128 | ||
129 | if (tm->tm_year/100) | |
130 | val = (M48T59_WDAY_CEB | M48T59_WDAY_CB); | |
131 | val |= (BIN2BCD(tm->tm_wday) & 0x07); | |
132 | M48T59_WRITE(val, M48T59_WDAY); | |
133 | ||
134 | /* Clear the WRITE bit */ | |
135 | M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); | |
136 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
137 | return 0; | |
138 | } | |
139 | ||
140 | /* | |
141 | * Read alarm time and date in RTC | |
142 | */ | |
143 | static int m48t59_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
144 | { | |
145 | struct platform_device *pdev = to_platform_device(dev); | |
146 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; | |
147 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
148 | struct rtc_time *tm = &alrm->time; | |
149 | unsigned long flags; | |
150 | u8 val; | |
151 | ||
152 | /* If no irq, we don't support ALARM */ | |
153 | if (m48t59->irq == NO_IRQ) | |
154 | return -EIO; | |
155 | ||
156 | spin_lock_irqsave(&m48t59->lock, flags); | |
157 | /* Issue the READ command */ | |
158 | M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL); | |
159 | ||
160 | tm->tm_year = BCD2BIN(M48T59_READ(M48T59_YEAR)); | |
161 | /* tm_mon is 0-11 */ | |
162 | tm->tm_mon = BCD2BIN(M48T59_READ(M48T59_MONTH)) - 1; | |
163 | ||
164 | val = M48T59_READ(M48T59_WDAY); | |
165 | if ((val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) | |
166 | tm->tm_year += 100; /* one century */ | |
167 | ||
168 | tm->tm_mday = BCD2BIN(M48T59_READ(M48T59_ALARM_DATE)); | |
169 | tm->tm_hour = BCD2BIN(M48T59_READ(M48T59_ALARM_HOUR)); | |
170 | tm->tm_min = BCD2BIN(M48T59_READ(M48T59_ALARM_MIN)); | |
171 | tm->tm_sec = BCD2BIN(M48T59_READ(M48T59_ALARM_SEC)); | |
172 | ||
173 | /* Clear the READ bit */ | |
174 | M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL); | |
175 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
176 | ||
177 | dev_dbg(dev, "RTC read alarm time %04d-%02d-%02d %02d/%02d/%02d\n", | |
178 | tm->tm_year + 1900, tm->tm_mon, tm->tm_mday, | |
179 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
180 | return 0; | |
181 | } | |
182 | ||
183 | /* | |
184 | * Set alarm time and date in RTC | |
185 | */ | |
186 | static int m48t59_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
187 | { | |
188 | struct platform_device *pdev = to_platform_device(dev); | |
189 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; | |
190 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
191 | struct rtc_time *tm = &alrm->time; | |
192 | u8 mday, hour, min, sec; | |
193 | unsigned long flags; | |
194 | ||
195 | /* If no irq, we don't support ALARM */ | |
196 | if (m48t59->irq == NO_IRQ) | |
197 | return -EIO; | |
198 | ||
199 | /* | |
200 | * 0xff means "always match" | |
201 | */ | |
202 | mday = tm->tm_mday; | |
203 | mday = (mday >= 1 && mday <= 31) ? BIN2BCD(mday) : 0xff; | |
204 | if (mday == 0xff) | |
205 | mday = M48T59_READ(M48T59_MDAY); | |
206 | ||
207 | hour = tm->tm_hour; | |
208 | hour = (hour < 24) ? BIN2BCD(hour) : 0x00; | |
209 | ||
210 | min = tm->tm_min; | |
211 | min = (min < 60) ? BIN2BCD(min) : 0x00; | |
212 | ||
213 | sec = tm->tm_sec; | |
214 | sec = (sec < 60) ? BIN2BCD(sec) : 0x00; | |
215 | ||
216 | spin_lock_irqsave(&m48t59->lock, flags); | |
217 | /* Issue the WRITE command */ | |
218 | M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); | |
219 | ||
220 | M48T59_WRITE(mday, M48T59_ALARM_DATE); | |
221 | M48T59_WRITE(hour, M48T59_ALARM_HOUR); | |
222 | M48T59_WRITE(min, M48T59_ALARM_MIN); | |
223 | M48T59_WRITE(sec, M48T59_ALARM_SEC); | |
224 | ||
225 | /* Clear the WRITE bit */ | |
226 | M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); | |
227 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
228 | ||
229 | dev_dbg(dev, "RTC set alarm time %04d-%02d-%02d %02d/%02d/%02d\n", | |
230 | tm->tm_year + 1900, tm->tm_mon, tm->tm_mday, | |
231 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
232 | return 0; | |
233 | } | |
234 | ||
235 | /* | |
236 | * Handle commands from user-space | |
237 | */ | |
238 | static int m48t59_rtc_ioctl(struct device *dev, unsigned int cmd, | |
239 | unsigned long arg) | |
240 | { | |
241 | struct platform_device *pdev = to_platform_device(dev); | |
242 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; | |
243 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
244 | unsigned long flags; | |
245 | int ret = 0; | |
246 | ||
247 | spin_lock_irqsave(&m48t59->lock, flags); | |
248 | switch (cmd) { | |
249 | case RTC_AIE_OFF: /* alarm interrupt off */ | |
250 | M48T59_WRITE(0x00, M48T59_INTR); | |
251 | break; | |
252 | case RTC_AIE_ON: /* alarm interrupt on */ | |
253 | M48T59_WRITE(M48T59_INTR_AFE, M48T59_INTR); | |
254 | break; | |
255 | default: | |
256 | ret = -ENOIOCTLCMD; | |
257 | break; | |
258 | } | |
259 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
260 | ||
261 | return ret; | |
262 | } | |
263 | ||
264 | static int m48t59_rtc_proc(struct device *dev, struct seq_file *seq) | |
265 | { | |
266 | struct platform_device *pdev = to_platform_device(dev); | |
267 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; | |
268 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
269 | unsigned long flags; | |
270 | u8 val; | |
271 | ||
272 | spin_lock_irqsave(&m48t59->lock, flags); | |
273 | val = M48T59_READ(M48T59_FLAGS); | |
274 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
275 | ||
276 | seq_printf(seq, "battery\t\t: %s\n", | |
277 | (val & M48T59_FLAGS_BF) ? "low" : "normal"); | |
278 | return 0; | |
279 | } | |
280 | ||
281 | /* | |
282 | * IRQ handler for the RTC | |
283 | */ | |
284 | static irqreturn_t m48t59_rtc_interrupt(int irq, void *dev_id) | |
285 | { | |
286 | struct device *dev = (struct device *)dev_id; | |
287 | struct platform_device *pdev = to_platform_device(dev); | |
288 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; | |
289 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
290 | u8 event; | |
291 | ||
292 | spin_lock(&m48t59->lock); | |
293 | event = M48T59_READ(M48T59_FLAGS); | |
294 | spin_unlock(&m48t59->lock); | |
295 | ||
296 | if (event & M48T59_FLAGS_AF) { | |
297 | rtc_update_irq(m48t59->rtc, 1, (RTC_AF | RTC_IRQF)); | |
298 | return IRQ_HANDLED; | |
299 | } | |
300 | ||
301 | return IRQ_NONE; | |
302 | } | |
303 | ||
304 | static const struct rtc_class_ops m48t59_rtc_ops = { | |
305 | .ioctl = m48t59_rtc_ioctl, | |
306 | .read_time = m48t59_rtc_read_time, | |
307 | .set_time = m48t59_rtc_set_time, | |
308 | .read_alarm = m48t59_rtc_readalarm, | |
309 | .set_alarm = m48t59_rtc_setalarm, | |
310 | .proc = m48t59_rtc_proc, | |
311 | }; | |
312 | ||
94fe7424 KH |
313 | static const struct rtc_class_ops m48t02_rtc_ops = { |
314 | .read_time = m48t59_rtc_read_time, | |
315 | .set_time = m48t59_rtc_set_time, | |
316 | }; | |
317 | ||
2e774c7c MZ |
318 | static ssize_t m48t59_nvram_read(struct kobject *kobj, |
319 | struct bin_attribute *bin_attr, | |
320 | char *buf, loff_t pos, size_t size) | |
321 | { | |
322 | struct device *dev = container_of(kobj, struct device, kobj); | |
323 | struct platform_device *pdev = to_platform_device(dev); | |
324 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; | |
325 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
326 | ssize_t cnt = 0; | |
327 | unsigned long flags; | |
328 | ||
94fe7424 | 329 | for (; size > 0 && pos < pdata->offset; cnt++, size--) { |
2e774c7c MZ |
330 | spin_lock_irqsave(&m48t59->lock, flags); |
331 | *buf++ = M48T59_READ(cnt); | |
332 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
333 | } | |
334 | ||
335 | return cnt; | |
336 | } | |
337 | ||
338 | static ssize_t m48t59_nvram_write(struct kobject *kobj, | |
339 | struct bin_attribute *bin_attr, | |
340 | char *buf, loff_t pos, size_t size) | |
341 | { | |
342 | struct device *dev = container_of(kobj, struct device, kobj); | |
343 | struct platform_device *pdev = to_platform_device(dev); | |
344 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; | |
345 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
346 | ssize_t cnt = 0; | |
347 | unsigned long flags; | |
348 | ||
94fe7424 | 349 | for (; size > 0 && pos < pdata->offset; cnt++, size--) { |
2e774c7c MZ |
350 | spin_lock_irqsave(&m48t59->lock, flags); |
351 | M48T59_WRITE(*buf++, cnt); | |
352 | spin_unlock_irqrestore(&m48t59->lock, flags); | |
353 | } | |
354 | ||
355 | return cnt; | |
356 | } | |
357 | ||
358 | static struct bin_attribute m48t59_nvram_attr = { | |
359 | .attr = { | |
360 | .name = "nvram", | |
a4b1d50e | 361 | .mode = S_IRUGO | S_IWUSR, |
2e774c7c MZ |
362 | .owner = THIS_MODULE, |
363 | }, | |
364 | .read = m48t59_nvram_read, | |
365 | .write = m48t59_nvram_write, | |
366 | }; | |
367 | ||
368 | static int __devinit m48t59_rtc_probe(struct platform_device *pdev) | |
369 | { | |
370 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; | |
371 | struct m48t59_private *m48t59 = NULL; | |
372 | struct resource *res; | |
373 | int ret = -ENOMEM; | |
94fe7424 KH |
374 | char *name; |
375 | const struct rtc_class_ops *ops; | |
2e774c7c MZ |
376 | |
377 | /* This chip could be memory-mapped or I/O-mapped */ | |
378 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
379 | if (!res) { | |
380 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
381 | if (!res) | |
382 | return -EINVAL; | |
383 | } | |
384 | ||
385 | if (res->flags & IORESOURCE_IO) { | |
386 | /* If we are I/O-mapped, the platform should provide | |
387 | * the operations accessing chip registers. | |
388 | */ | |
389 | if (!pdata || !pdata->write_byte || !pdata->read_byte) | |
390 | return -EINVAL; | |
391 | } else if (res->flags & IORESOURCE_MEM) { | |
392 | /* we are memory-mapped */ | |
393 | if (!pdata) { | |
394 | pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); | |
395 | if (!pdata) | |
396 | return -ENOMEM; | |
397 | /* Ensure we only kmalloc platform data once */ | |
398 | pdev->dev.platform_data = pdata; | |
399 | } | |
94fe7424 KH |
400 | if (!pdata->type) |
401 | pdata->type = M48T59RTC_TYPE_M48T59; | |
2e774c7c MZ |
402 | |
403 | /* Try to use the generic memory read/write ops */ | |
404 | if (!pdata->write_byte) | |
405 | pdata->write_byte = m48t59_mem_writeb; | |
406 | if (!pdata->read_byte) | |
407 | pdata->read_byte = m48t59_mem_readb; | |
408 | } | |
409 | ||
410 | m48t59 = kzalloc(sizeof(*m48t59), GFP_KERNEL); | |
411 | if (!m48t59) | |
412 | return -ENOMEM; | |
413 | ||
3ca60f6e | 414 | m48t59->ioaddr = ioremap(res->start, res->end - res->start + 1); |
2e774c7c MZ |
415 | if (!m48t59->ioaddr) |
416 | goto out; | |
417 | ||
418 | /* Try to get irq number. We also can work in | |
419 | * the mode without IRQ. | |
420 | */ | |
421 | m48t59->irq = platform_get_irq(pdev, 0); | |
422 | if (m48t59->irq < 0) | |
423 | m48t59->irq = NO_IRQ; | |
424 | ||
425 | if (m48t59->irq != NO_IRQ) { | |
426 | ret = request_irq(m48t59->irq, m48t59_rtc_interrupt, | |
427 | IRQF_SHARED, "rtc-m48t59", &pdev->dev); | |
428 | if (ret) | |
429 | goto out; | |
430 | } | |
94fe7424 KH |
431 | switch (pdata->type) { |
432 | case M48T59RTC_TYPE_M48T59: | |
433 | name = "m48t59"; | |
434 | ops = &m48t59_rtc_ops; | |
435 | pdata->offset = 0x1ff0; | |
436 | break; | |
437 | case M48T59RTC_TYPE_M48T02: | |
438 | name = "m48t02"; | |
439 | ops = &m48t02_rtc_ops; | |
440 | pdata->offset = 0x7f0; | |
441 | break; | |
442 | case M48T59RTC_TYPE_M48T08: | |
443 | name = "m48t08"; | |
444 | ops = &m48t02_rtc_ops; | |
445 | pdata->offset = 0x1ff0; | |
446 | break; | |
447 | default: | |
448 | dev_err(&pdev->dev, "Unknown RTC type\n"); | |
449 | ret = -ENODEV; | |
450 | goto out; | |
451 | } | |
2e774c7c | 452 | |
94fe7424 | 453 | m48t59->rtc = rtc_device_register(name, &pdev->dev, ops, THIS_MODULE); |
2e774c7c MZ |
454 | if (IS_ERR(m48t59->rtc)) { |
455 | ret = PTR_ERR(m48t59->rtc); | |
456 | goto out; | |
457 | } | |
458 | ||
94fe7424 KH |
459 | m48t59_nvram_attr.size = pdata->offset; |
460 | ||
2e774c7c MZ |
461 | ret = sysfs_create_bin_file(&pdev->dev.kobj, &m48t59_nvram_attr); |
462 | if (ret) | |
463 | goto out; | |
464 | ||
465 | spin_lock_init(&m48t59->lock); | |
466 | platform_set_drvdata(pdev, m48t59); | |
467 | return 0; | |
468 | ||
469 | out: | |
470 | if (!IS_ERR(m48t59->rtc)) | |
471 | rtc_device_unregister(m48t59->rtc); | |
472 | if (m48t59->irq != NO_IRQ) | |
473 | free_irq(m48t59->irq, &pdev->dev); | |
474 | if (m48t59->ioaddr) | |
475 | iounmap(m48t59->ioaddr); | |
476 | if (m48t59) | |
477 | kfree(m48t59); | |
478 | return ret; | |
479 | } | |
480 | ||
481 | static int __devexit m48t59_rtc_remove(struct platform_device *pdev) | |
482 | { | |
483 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | |
484 | ||
485 | sysfs_remove_bin_file(&pdev->dev.kobj, &m48t59_nvram_attr); | |
486 | if (!IS_ERR(m48t59->rtc)) | |
487 | rtc_device_unregister(m48t59->rtc); | |
488 | if (m48t59->ioaddr) | |
489 | iounmap(m48t59->ioaddr); | |
490 | if (m48t59->irq != NO_IRQ) | |
491 | free_irq(m48t59->irq, &pdev->dev); | |
492 | platform_set_drvdata(pdev, NULL); | |
493 | kfree(m48t59); | |
494 | return 0; | |
495 | } | |
496 | ||
ad28a07b KS |
497 | /* work with hotplug and coldplug */ |
498 | MODULE_ALIAS("platform:rtc-m48t59"); | |
499 | ||
12730926 | 500 | static struct platform_driver m48t59_rtc_driver = { |
2e774c7c MZ |
501 | .driver = { |
502 | .name = "rtc-m48t59", | |
503 | .owner = THIS_MODULE, | |
504 | }, | |
505 | .probe = m48t59_rtc_probe, | |
506 | .remove = __devexit_p(m48t59_rtc_remove), | |
507 | }; | |
508 | ||
509 | static int __init m48t59_rtc_init(void) | |
510 | { | |
12730926 | 511 | return platform_driver_register(&m48t59_rtc_driver); |
2e774c7c MZ |
512 | } |
513 | ||
514 | static void __exit m48t59_rtc_exit(void) | |
515 | { | |
12730926 | 516 | platform_driver_unregister(&m48t59_rtc_driver); |
2e774c7c MZ |
517 | } |
518 | ||
519 | module_init(m48t59_rtc_init); | |
520 | module_exit(m48t59_rtc_exit); | |
521 | ||
522 | MODULE_AUTHOR("Mark Zhan <rongkai.zhan@windriver.com>"); | |
94fe7424 | 523 | MODULE_DESCRIPTION("M48T59/M48T02/M48T08 RTC driver"); |
2e774c7c | 524 | MODULE_LICENSE("GPL"); |