Commit | Line | Data |
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caaff562 AN |
1 | /* |
2 | * I2C client/driver for the ST M41T80 family of i2c rtc chips. | |
3 | * | |
4 | * Author: Alexander Bigga <ab@mycable.de> | |
5 | * | |
6 | * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com> | |
7 | * | |
8 | * 2006 (c) mycable GmbH | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | */ | |
15 | ||
a737e835 JP |
16 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
17 | ||
35aa64f3 MR |
18 | #include <linux/bcd.h> |
19 | #include <linux/i2c.h> | |
caaff562 | 20 | #include <linux/init.h> |
9fb1f68d | 21 | #include <linux/kernel.h> |
35aa64f3 MR |
22 | #include <linux/module.h> |
23 | #include <linux/rtc.h> | |
caaff562 | 24 | #include <linux/slab.h> |
613655fa | 25 | #include <linux/mutex.h> |
caaff562 | 26 | #include <linux/string.h> |
617780d2 | 27 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
617780d2 AN |
28 | #include <linux/fs.h> |
29 | #include <linux/ioctl.h> | |
35aa64f3 MR |
30 | #include <linux/miscdevice.h> |
31 | #include <linux/reboot.h> | |
32 | #include <linux/watchdog.h> | |
617780d2 | 33 | #endif |
caaff562 | 34 | |
f2b84ee8 MJ |
35 | #define M41T80_REG_SSEC 0x00 |
36 | #define M41T80_REG_SEC 0x01 | |
37 | #define M41T80_REG_MIN 0x02 | |
38 | #define M41T80_REG_HOUR 0x03 | |
39 | #define M41T80_REG_WDAY 0x04 | |
40 | #define M41T80_REG_DAY 0x05 | |
41 | #define M41T80_REG_MON 0x06 | |
42 | #define M41T80_REG_YEAR 0x07 | |
43 | #define M41T80_REG_ALARM_MON 0x0a | |
44 | #define M41T80_REG_ALARM_DAY 0x0b | |
45 | #define M41T80_REG_ALARM_HOUR 0x0c | |
46 | #define M41T80_REG_ALARM_MIN 0x0d | |
47 | #define M41T80_REG_ALARM_SEC 0x0e | |
48 | #define M41T80_REG_FLAGS 0x0f | |
49 | #define M41T80_REG_SQW 0x13 | |
caaff562 AN |
50 | |
51 | #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1) | |
52 | #define M41T80_ALARM_REG_SIZE \ | |
53 | (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON) | |
54 | ||
54339f3b MJ |
55 | #define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */ |
56 | #define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */ | |
57 | #define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */ | |
58 | #define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */ | |
59 | #define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */ | |
60 | #define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */ | |
61 | #define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */ | |
62 | #define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */ | |
63 | #define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */ | |
caaff562 | 64 | |
54339f3b MJ |
65 | #define M41T80_FEATURE_HT BIT(0) /* Halt feature */ |
66 | #define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */ | |
67 | #define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */ | |
68 | #define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */ | |
69 | #define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */ | |
caaff562 | 70 | |
613655fa | 71 | static DEFINE_MUTEX(m41t80_rtc_mutex); |
3760f736 | 72 | static const struct i2c_device_id m41t80_id[] = { |
f30281f4 | 73 | { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT }, |
d3a126fc SF |
74 | { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD }, |
75 | { "m41t80", M41T80_FEATURE_SQ }, | |
76 | { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ}, | |
77 | { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
78 | { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
79 | { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
80 | { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
81 | { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
82 | { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
6b1a5235 | 83 | { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT }, |
3760f736 | 84 | { } |
caaff562 | 85 | }; |
3760f736 | 86 | MODULE_DEVICE_TABLE(i2c, m41t80_id); |
caaff562 AN |
87 | |
88 | struct m41t80_data { | |
3760f736 | 89 | u8 features; |
caaff562 AN |
90 | struct rtc_device *rtc; |
91 | }; | |
92 | ||
9c6dfed9 MJ |
93 | static irqreturn_t m41t80_handle_irq(int irq, void *dev_id) |
94 | { | |
95 | struct i2c_client *client = dev_id; | |
96 | struct m41t80_data *m41t80 = i2c_get_clientdata(client); | |
97 | struct mutex *lock = &m41t80->rtc->ops_lock; | |
98 | unsigned long events = 0; | |
99 | int flags, flags_afe; | |
100 | ||
101 | mutex_lock(lock); | |
102 | ||
103 | flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | |
104 | if (flags_afe < 0) { | |
105 | mutex_unlock(lock); | |
106 | return IRQ_NONE; | |
107 | } | |
108 | ||
109 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
110 | if (flags <= 0) { | |
111 | mutex_unlock(lock); | |
112 | return IRQ_NONE; | |
113 | } | |
114 | ||
115 | if (flags & M41T80_FLAGS_AF) { | |
116 | flags &= ~M41T80_FLAGS_AF; | |
117 | flags_afe &= ~M41T80_ALMON_AFE; | |
118 | events |= RTC_AF; | |
119 | } | |
120 | ||
121 | if (events) { | |
122 | rtc_update_irq(m41t80->rtc, 1, events); | |
123 | i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags); | |
124 | i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
125 | flags_afe); | |
126 | } | |
127 | ||
128 | mutex_unlock(lock); | |
129 | ||
130 | return IRQ_HANDLED; | |
131 | } | |
132 | ||
caaff562 AN |
133 | static int m41t80_get_datetime(struct i2c_client *client, |
134 | struct rtc_time *tm) | |
135 | { | |
f2b84ee8 MJ |
136 | unsigned char buf[8]; |
137 | int err; | |
caaff562 | 138 | |
f2b84ee8 MJ |
139 | err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC, |
140 | sizeof(buf), buf); | |
141 | if (err < 0) { | |
142 | dev_err(&client->dev, "Unable to read date\n"); | |
caaff562 AN |
143 | return -EIO; |
144 | } | |
145 | ||
fe20ba70 AB |
146 | tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f); |
147 | tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f); | |
148 | tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f); | |
149 | tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f); | |
caaff562 | 150 | tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07; |
fe20ba70 | 151 | tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1; |
caaff562 AN |
152 | |
153 | /* assume 20YY not 19YY, and ignore the Century Bit */ | |
fe20ba70 | 154 | tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100; |
b485fe5e | 155 | return rtc_valid_tm(tm); |
caaff562 AN |
156 | } |
157 | ||
158 | /* Sets the given date and time to the real time clock. */ | |
159 | static int m41t80_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |
160 | { | |
f2b84ee8 MJ |
161 | unsigned char buf[8]; |
162 | int err; | |
caaff562 | 163 | |
f2b84ee8 MJ |
164 | if (tm->tm_year < 100 || tm->tm_year > 199) |
165 | return -EINVAL; | |
caaff562 | 166 | |
caaff562 | 167 | buf[M41T80_REG_SSEC] = 0; |
f2b84ee8 MJ |
168 | buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec); |
169 | buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min); | |
170 | buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour); | |
171 | buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday); | |
172 | buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1); | |
173 | buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100); | |
174 | buf[M41T80_REG_WDAY] = tm->tm_wday; | |
175 | ||
176 | err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC, | |
177 | sizeof(buf), buf); | |
178 | if (err < 0) { | |
179 | dev_err(&client->dev, "Unable to write to date registers\n"); | |
180 | return err; | |
bcebd81d | 181 | } |
caaff562 | 182 | |
f2b84ee8 | 183 | return err; |
caaff562 AN |
184 | } |
185 | ||
caaff562 AN |
186 | static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq) |
187 | { | |
188 | struct i2c_client *client = to_i2c_client(dev); | |
189 | struct m41t80_data *clientdata = i2c_get_clientdata(client); | |
190 | u8 reg; | |
191 | ||
3760f736 | 192 | if (clientdata->features & M41T80_FEATURE_BL) { |
caaff562 AN |
193 | reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); |
194 | seq_printf(seq, "battery\t\t: %s\n", | |
195 | (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok"); | |
196 | } | |
197 | return 0; | |
198 | } | |
caaff562 AN |
199 | |
200 | static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
201 | { | |
202 | return m41t80_get_datetime(to_i2c_client(dev), tm); | |
203 | } | |
204 | ||
205 | static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
206 | { | |
207 | return m41t80_set_datetime(to_i2c_client(dev), tm); | |
208 | } | |
209 | ||
9c6dfed9 MJ |
210 | static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled) |
211 | { | |
212 | struct i2c_client *client = to_i2c_client(dev); | |
213 | int flags, retval; | |
214 | ||
215 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | |
216 | if (flags < 0) | |
217 | return flags; | |
218 | ||
219 | if (enabled) | |
220 | flags |= M41T80_ALMON_AFE; | |
221 | else | |
222 | flags &= ~M41T80_ALMON_AFE; | |
223 | ||
224 | retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags); | |
225 | if (retval < 0) { | |
226 | dev_info(dev, "Unable to enable alarm IRQ %d\n", retval); | |
227 | return retval; | |
228 | } | |
229 | return 0; | |
230 | } | |
231 | ||
232 | static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
233 | { | |
234 | struct i2c_client *client = to_i2c_client(dev); | |
235 | u8 alarmvals[5]; | |
236 | int ret, err; | |
237 | ||
238 | alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1); | |
239 | alarmvals[1] = bin2bcd(alrm->time.tm_mday); | |
240 | alarmvals[2] = bin2bcd(alrm->time.tm_hour); | |
241 | alarmvals[3] = bin2bcd(alrm->time.tm_min); | |
242 | alarmvals[4] = bin2bcd(alrm->time.tm_sec); | |
243 | ||
244 | /* Clear AF and AFE flags */ | |
245 | ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | |
246 | if (ret < 0) | |
247 | return ret; | |
248 | err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
249 | ret & ~(M41T80_ALMON_AFE)); | |
250 | if (err < 0) { | |
251 | dev_err(dev, "Unable to clear AFE bit\n"); | |
252 | return err; | |
253 | } | |
254 | ||
255 | ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
256 | if (ret < 0) | |
257 | return ret; | |
258 | ||
259 | err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, | |
260 | ret & ~(M41T80_FLAGS_AF)); | |
261 | if (err < 0) { | |
262 | dev_err(dev, "Unable to clear AF bit\n"); | |
263 | return err; | |
264 | } | |
265 | ||
266 | /* Write the alarm */ | |
267 | err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON, | |
268 | 5, alarmvals); | |
269 | if (err) | |
270 | return err; | |
271 | ||
272 | /* Enable the alarm interrupt */ | |
273 | if (alrm->enabled) { | |
274 | alarmvals[0] |= M41T80_ALMON_AFE; | |
275 | err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
276 | alarmvals[0]); | |
277 | if (err) | |
278 | return err; | |
279 | } | |
280 | ||
281 | return 0; | |
282 | } | |
283 | ||
284 | static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
285 | { | |
286 | struct i2c_client *client = to_i2c_client(dev); | |
287 | u8 alarmvals[5]; | |
288 | int flags, ret; | |
289 | ||
290 | ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON, | |
291 | 5, alarmvals); | |
292 | if (ret != 5) | |
293 | return ret < 0 ? ret : -EIO; | |
294 | ||
295 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
296 | if (flags < 0) | |
297 | return flags; | |
298 | ||
299 | alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f); | |
300 | alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f); | |
301 | alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f); | |
302 | alrm->time.tm_wday = -1; | |
303 | alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f); | |
304 | alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f); | |
305 | alrm->time.tm_year = -1; | |
306 | ||
307 | alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE); | |
308 | alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled; | |
309 | ||
310 | return 0; | |
311 | } | |
312 | ||
caaff562 AN |
313 | static struct rtc_class_ops m41t80_rtc_ops = { |
314 | .read_time = m41t80_rtc_read_time, | |
315 | .set_time = m41t80_rtc_set_time, | |
caaff562 | 316 | .proc = m41t80_rtc_proc, |
caaff562 AN |
317 | }; |
318 | ||
ef6b3125 MJ |
319 | static ssize_t flags_show(struct device *dev, |
320 | struct device_attribute *attr, char *buf) | |
caaff562 AN |
321 | { |
322 | struct i2c_client *client = to_i2c_client(dev); | |
323 | int val; | |
324 | ||
325 | val = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
326 | if (val < 0) | |
85d77047 | 327 | return val; |
caaff562 AN |
328 | return sprintf(buf, "%#x\n", val); |
329 | } | |
ef6b3125 | 330 | static DEVICE_ATTR_RO(flags); |
caaff562 | 331 | |
ef6b3125 MJ |
332 | static ssize_t sqwfreq_show(struct device *dev, |
333 | struct device_attribute *attr, char *buf) | |
caaff562 AN |
334 | { |
335 | struct i2c_client *client = to_i2c_client(dev); | |
d3a126fc | 336 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
f30281f4 | 337 | int val, reg_sqw; |
caaff562 | 338 | |
d3a126fc SF |
339 | if (!(clientdata->features & M41T80_FEATURE_SQ)) |
340 | return -EINVAL; | |
341 | ||
f30281f4 DG |
342 | reg_sqw = M41T80_REG_SQW; |
343 | if (clientdata->features & M41T80_FEATURE_SQ_ALT) | |
344 | reg_sqw = M41T80_REG_WDAY; | |
345 | val = i2c_smbus_read_byte_data(client, reg_sqw); | |
caaff562 | 346 | if (val < 0) |
85d77047 | 347 | return val; |
caaff562 AN |
348 | val = (val >> 4) & 0xf; |
349 | switch (val) { | |
350 | case 0: | |
351 | break; | |
352 | case 1: | |
353 | val = 32768; | |
354 | break; | |
355 | default: | |
356 | val = 32768 >> val; | |
357 | } | |
358 | return sprintf(buf, "%d\n", val); | |
359 | } | |
ef6b3125 MJ |
360 | |
361 | static ssize_t sqwfreq_store(struct device *dev, | |
362 | struct device_attribute *attr, | |
363 | const char *buf, size_t count) | |
caaff562 AN |
364 | { |
365 | struct i2c_client *client = to_i2c_client(dev); | |
d3a126fc | 366 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
85d77047 | 367 | int almon, sqw, reg_sqw, rc; |
fc99b901 MJ |
368 | unsigned long val; |
369 | ||
370 | rc = kstrtoul(buf, 0, &val); | |
371 | if (rc < 0) | |
372 | return rc; | |
caaff562 | 373 | |
d3a126fc SF |
374 | if (!(clientdata->features & M41T80_FEATURE_SQ)) |
375 | return -EINVAL; | |
376 | ||
caaff562 AN |
377 | if (val) { |
378 | if (!is_power_of_2(val)) | |
379 | return -EINVAL; | |
380 | val = ilog2(val); | |
381 | if (val == 15) | |
382 | val = 1; | |
383 | else if (val < 14) | |
384 | val = 15 - val; | |
385 | else | |
386 | return -EINVAL; | |
387 | } | |
388 | /* disable SQW, set SQW frequency & re-enable */ | |
389 | almon = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | |
390 | if (almon < 0) | |
85d77047 | 391 | return almon; |
f30281f4 DG |
392 | reg_sqw = M41T80_REG_SQW; |
393 | if (clientdata->features & M41T80_FEATURE_SQ_ALT) | |
394 | reg_sqw = M41T80_REG_WDAY; | |
395 | sqw = i2c_smbus_read_byte_data(client, reg_sqw); | |
caaff562 | 396 | if (sqw < 0) |
85d77047 | 397 | return sqw; |
caaff562 | 398 | sqw = (sqw & 0x0f) | (val << 4); |
85d77047 WS |
399 | |
400 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
fc99b901 | 401 | almon & ~M41T80_ALMON_SQWE); |
85d77047 WS |
402 | if (rc < 0) |
403 | return rc; | |
404 | ||
405 | if (val) { | |
406 | rc = i2c_smbus_write_byte_data(client, reg_sqw, sqw); | |
407 | if (rc < 0) | |
408 | return rc; | |
409 | ||
410 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
fc99b901 MJ |
411 | almon | M41T80_ALMON_SQWE); |
412 | if (rc < 0) | |
85d77047 WS |
413 | return rc; |
414 | } | |
caaff562 AN |
415 | return count; |
416 | } | |
ef6b3125 | 417 | static DEVICE_ATTR_RW(sqwfreq); |
caaff562 AN |
418 | |
419 | static struct attribute *attrs[] = { | |
420 | &dev_attr_flags.attr, | |
421 | &dev_attr_sqwfreq.attr, | |
422 | NULL, | |
423 | }; | |
fc99b901 | 424 | |
caaff562 AN |
425 | static struct attribute_group attr_group = { |
426 | .attrs = attrs, | |
427 | }; | |
428 | ||
617780d2 AN |
429 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
430 | /* | |
431 | ***************************************************************************** | |
432 | * | |
433 | * Watchdog Driver | |
434 | * | |
435 | ***************************************************************************** | |
436 | */ | |
437 | static struct i2c_client *save_client; | |
438 | ||
439 | /* Default margin */ | |
440 | #define WD_TIMO 60 /* 1..31 seconds */ | |
441 | ||
442 | static int wdt_margin = WD_TIMO; | |
443 | module_param(wdt_margin, int, 0); | |
444 | MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)"); | |
445 | ||
446 | static unsigned long wdt_is_open; | |
447 | static int boot_flag; | |
448 | ||
449 | /** | |
450 | * wdt_ping: | |
451 | * | |
452 | * Reload counter one with the watchdog timeout. We don't bother reloading | |
453 | * the cascade counter. | |
454 | */ | |
455 | static void wdt_ping(void) | |
456 | { | |
457 | unsigned char i2c_data[2]; | |
458 | struct i2c_msg msgs1[1] = { | |
459 | { | |
460 | .addr = save_client->addr, | |
461 | .flags = 0, | |
462 | .len = 2, | |
463 | .buf = i2c_data, | |
464 | }, | |
465 | }; | |
d3a126fc SF |
466 | struct m41t80_data *clientdata = i2c_get_clientdata(save_client); |
467 | ||
617780d2 AN |
468 | i2c_data[0] = 0x09; /* watchdog register */ |
469 | ||
470 | if (wdt_margin > 31) | |
471 | i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */ | |
472 | else | |
473 | /* | |
474 | * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02) | |
475 | */ | |
fc99b901 | 476 | i2c_data[1] = wdt_margin << 2 | 0x82; |
617780d2 | 477 | |
d3a126fc SF |
478 | /* |
479 | * M41T65 has three bits for watchdog resolution. Don't set bit 7, as | |
480 | * that would be an invalid resolution. | |
481 | */ | |
482 | if (clientdata->features & M41T80_FEATURE_WD) | |
483 | i2c_data[1] &= ~M41T80_WATCHDOG_RB2; | |
484 | ||
617780d2 AN |
485 | i2c_transfer(save_client->adapter, msgs1, 1); |
486 | } | |
487 | ||
488 | /** | |
489 | * wdt_disable: | |
490 | * | |
491 | * disables watchdog. | |
492 | */ | |
493 | static void wdt_disable(void) | |
494 | { | |
495 | unsigned char i2c_data[2], i2c_buf[0x10]; | |
496 | struct i2c_msg msgs0[2] = { | |
497 | { | |
498 | .addr = save_client->addr, | |
499 | .flags = 0, | |
500 | .len = 1, | |
501 | .buf = i2c_data, | |
502 | }, | |
503 | { | |
504 | .addr = save_client->addr, | |
505 | .flags = I2C_M_RD, | |
506 | .len = 1, | |
507 | .buf = i2c_buf, | |
508 | }, | |
509 | }; | |
510 | struct i2c_msg msgs1[1] = { | |
511 | { | |
512 | .addr = save_client->addr, | |
513 | .flags = 0, | |
514 | .len = 2, | |
515 | .buf = i2c_data, | |
516 | }, | |
517 | }; | |
518 | ||
519 | i2c_data[0] = 0x09; | |
520 | i2c_transfer(save_client->adapter, msgs0, 2); | |
521 | ||
522 | i2c_data[0] = 0x09; | |
523 | i2c_data[1] = 0x00; | |
524 | i2c_transfer(save_client->adapter, msgs1, 1); | |
525 | } | |
526 | ||
527 | /** | |
528 | * wdt_write: | |
529 | * @file: file handle to the watchdog | |
530 | * @buf: buffer to write (unused as data does not matter here | |
531 | * @count: count of bytes | |
532 | * @ppos: pointer to the position to write. No seeks allowed | |
533 | * | |
534 | * A write to a watchdog device is defined as a keepalive signal. Any | |
535 | * write of data will do, as we we don't define content meaning. | |
536 | */ | |
537 | static ssize_t wdt_write(struct file *file, const char __user *buf, | |
538 | size_t count, loff_t *ppos) | |
539 | { | |
617780d2 AN |
540 | if (count) { |
541 | wdt_ping(); | |
542 | return 1; | |
543 | } | |
544 | return 0; | |
545 | } | |
546 | ||
547 | static ssize_t wdt_read(struct file *file, char __user *buf, | |
548 | size_t count, loff_t *ppos) | |
549 | { | |
550 | return 0; | |
551 | } | |
552 | ||
553 | /** | |
554 | * wdt_ioctl: | |
555 | * @inode: inode of the device | |
556 | * @file: file handle to the device | |
557 | * @cmd: watchdog command | |
558 | * @arg: argument pointer | |
559 | * | |
560 | * The watchdog API defines a common set of functions for all watchdogs | |
561 | * according to their available features. We only actually usefully support | |
562 | * querying capabilities and current status. | |
563 | */ | |
55929332 | 564 | static int wdt_ioctl(struct file *file, unsigned int cmd, |
617780d2 AN |
565 | unsigned long arg) |
566 | { | |
567 | int new_margin, rv; | |
568 | static struct watchdog_info ident = { | |
569 | .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING | | |
570 | WDIOF_SETTIMEOUT, | |
571 | .firmware_version = 1, | |
572 | .identity = "M41T80 WTD" | |
573 | }; | |
574 | ||
575 | switch (cmd) { | |
576 | case WDIOC_GETSUPPORT: | |
577 | return copy_to_user((struct watchdog_info __user *)arg, &ident, | |
578 | sizeof(ident)) ? -EFAULT : 0; | |
579 | ||
580 | case WDIOC_GETSTATUS: | |
581 | case WDIOC_GETBOOTSTATUS: | |
582 | return put_user(boot_flag, (int __user *)arg); | |
583 | case WDIOC_KEEPALIVE: | |
584 | wdt_ping(); | |
585 | return 0; | |
586 | case WDIOC_SETTIMEOUT: | |
587 | if (get_user(new_margin, (int __user *)arg)) | |
588 | return -EFAULT; | |
589 | /* Arbitrary, can't find the card's limits */ | |
590 | if (new_margin < 1 || new_margin > 124) | |
591 | return -EINVAL; | |
592 | wdt_margin = new_margin; | |
593 | wdt_ping(); | |
594 | /* Fall */ | |
595 | case WDIOC_GETTIMEOUT: | |
596 | return put_user(wdt_margin, (int __user *)arg); | |
597 | ||
598 | case WDIOC_SETOPTIONS: | |
599 | if (copy_from_user(&rv, (int __user *)arg, sizeof(int))) | |
600 | return -EFAULT; | |
601 | ||
602 | if (rv & WDIOS_DISABLECARD) { | |
a737e835 | 603 | pr_info("disable watchdog\n"); |
617780d2 AN |
604 | wdt_disable(); |
605 | } | |
606 | ||
607 | if (rv & WDIOS_ENABLECARD) { | |
a737e835 | 608 | pr_info("enable watchdog\n"); |
617780d2 AN |
609 | wdt_ping(); |
610 | } | |
611 | ||
612 | return -EINVAL; | |
613 | } | |
614 | return -ENOTTY; | |
615 | } | |
616 | ||
55929332 AB |
617 | static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd, |
618 | unsigned long arg) | |
619 | { | |
620 | int ret; | |
621 | ||
613655fa | 622 | mutex_lock(&m41t80_rtc_mutex); |
55929332 | 623 | ret = wdt_ioctl(file, cmd, arg); |
613655fa | 624 | mutex_unlock(&m41t80_rtc_mutex); |
55929332 AB |
625 | |
626 | return ret; | |
627 | } | |
628 | ||
617780d2 AN |
629 | /** |
630 | * wdt_open: | |
631 | * @inode: inode of device | |
632 | * @file: file handle to device | |
633 | * | |
634 | */ | |
635 | static int wdt_open(struct inode *inode, struct file *file) | |
636 | { | |
637 | if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) { | |
613655fa | 638 | mutex_lock(&m41t80_rtc_mutex); |
41012735 | 639 | if (test_and_set_bit(0, &wdt_is_open)) { |
613655fa | 640 | mutex_unlock(&m41t80_rtc_mutex); |
617780d2 | 641 | return -EBUSY; |
41012735 | 642 | } |
617780d2 AN |
643 | /* |
644 | * Activate | |
645 | */ | |
646 | wdt_is_open = 1; | |
613655fa | 647 | mutex_unlock(&m41t80_rtc_mutex); |
09eeb1f5 | 648 | return nonseekable_open(inode, file); |
617780d2 AN |
649 | } |
650 | return -ENODEV; | |
651 | } | |
652 | ||
653 | /** | |
654 | * wdt_close: | |
655 | * @inode: inode to board | |
656 | * @file: file handle to board | |
657 | * | |
658 | */ | |
659 | static int wdt_release(struct inode *inode, struct file *file) | |
660 | { | |
661 | if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) | |
662 | clear_bit(0, &wdt_is_open); | |
663 | return 0; | |
664 | } | |
665 | ||
666 | /** | |
667 | * notify_sys: | |
668 | * @this: our notifier block | |
669 | * @code: the event being reported | |
670 | * @unused: unused | |
671 | * | |
672 | * Our notifier is called on system shutdowns. We want to turn the card | |
673 | * off at reboot otherwise the machine will reboot again during memory | |
674 | * test or worse yet during the following fsck. This would suck, in fact | |
675 | * trust me - if it happens it does suck. | |
676 | */ | |
677 | static int wdt_notify_sys(struct notifier_block *this, unsigned long code, | |
678 | void *unused) | |
679 | { | |
680 | if (code == SYS_DOWN || code == SYS_HALT) | |
681 | /* Disable Watchdog */ | |
682 | wdt_disable(); | |
683 | return NOTIFY_DONE; | |
684 | } | |
685 | ||
686 | static const struct file_operations wdt_fops = { | |
687 | .owner = THIS_MODULE, | |
688 | .read = wdt_read, | |
55929332 | 689 | .unlocked_ioctl = wdt_unlocked_ioctl, |
617780d2 AN |
690 | .write = wdt_write, |
691 | .open = wdt_open, | |
692 | .release = wdt_release, | |
6038f373 | 693 | .llseek = no_llseek, |
617780d2 AN |
694 | }; |
695 | ||
696 | static struct miscdevice wdt_dev = { | |
697 | .minor = WATCHDOG_MINOR, | |
698 | .name = "watchdog", | |
699 | .fops = &wdt_fops, | |
700 | }; | |
701 | ||
702 | /* | |
703 | * The WDT card needs to learn about soft shutdowns in order to | |
704 | * turn the timebomb registers off. | |
705 | */ | |
706 | static struct notifier_block wdt_notifier = { | |
707 | .notifier_call = wdt_notify_sys, | |
708 | }; | |
709 | #endif /* CONFIG_RTC_DRV_M41T80_WDT */ | |
710 | ||
caaff562 AN |
711 | /* |
712 | ***************************************************************************** | |
713 | * | |
714 | * Driver Interface | |
715 | * | |
716 | ***************************************************************************** | |
717 | */ | |
ef6b3125 MJ |
718 | |
719 | static void m41t80_remove_sysfs_group(void *_dev) | |
720 | { | |
721 | struct device *dev = _dev; | |
722 | ||
723 | sysfs_remove_group(&dev->kobj, &attr_group); | |
724 | } | |
725 | ||
d2653e92 JD |
726 | static int m41t80_probe(struct i2c_client *client, |
727 | const struct i2c_device_id *id) | |
caaff562 | 728 | { |
f2b84ee8 | 729 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); |
3760f736 | 730 | int rc = 0; |
caaff562 AN |
731 | struct rtc_device *rtc = NULL; |
732 | struct rtc_time tm; | |
9c6dfed9 | 733 | struct m41t80_data *m41t80_data = NULL; |
caaff562 | 734 | |
f2b84ee8 MJ |
735 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | |
736 | I2C_FUNC_SMBUS_BYTE_DATA)) { | |
737 | dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n"); | |
c67fedfa | 738 | return -ENODEV; |
f2b84ee8 | 739 | } |
caaff562 | 740 | |
9c6dfed9 MJ |
741 | m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data), |
742 | GFP_KERNEL); | |
743 | if (!m41t80_data) | |
c67fedfa | 744 | return -ENOMEM; |
caaff562 | 745 | |
9c6dfed9 MJ |
746 | m41t80_data->features = id->driver_data; |
747 | i2c_set_clientdata(client, m41t80_data); | |
748 | ||
749 | if (client->irq > 0) { | |
750 | rc = devm_request_threaded_irq(&client->dev, client->irq, | |
751 | NULL, m41t80_handle_irq, | |
752 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
753 | "m41t80", client); | |
754 | if (rc) { | |
755 | dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); | |
756 | client->irq = 0; | |
757 | } else { | |
758 | m41t80_rtc_ops.read_alarm = m41t80_read_alarm; | |
759 | m41t80_rtc_ops.set_alarm = m41t80_set_alarm; | |
760 | m41t80_rtc_ops.alarm_irq_enable = m41t80_alarm_irq_enable; | |
761 | } | |
762 | } | |
a015dbc1 | 763 | |
4ebabb78 | 764 | rtc = devm_rtc_device_register(&client->dev, client->name, |
fc99b901 | 765 | &m41t80_rtc_ops, THIS_MODULE); |
c67fedfa WS |
766 | if (IS_ERR(rtc)) |
767 | return PTR_ERR(rtc); | |
caaff562 | 768 | |
9c6dfed9 | 769 | m41t80_data->rtc = rtc; |
caaff562 AN |
770 | |
771 | /* Make sure HT (Halt Update) bit is cleared */ | |
772 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR); | |
caaff562 | 773 | |
c67fedfa | 774 | if (rc >= 0 && rc & M41T80_ALHOUR_HT) { |
9c6dfed9 | 775 | if (m41t80_data->features & M41T80_FEATURE_HT) { |
caaff562 AN |
776 | m41t80_get_datetime(client, &tm); |
777 | dev_info(&client->dev, "HT bit was set!\n"); | |
778 | dev_info(&client->dev, | |
fc99b901 | 779 | "Power Down at %04i-%02i-%02i %02i:%02i:%02i\n", |
caaff562 AN |
780 | tm.tm_year + 1900, |
781 | tm.tm_mon + 1, tm.tm_mday, tm.tm_hour, | |
782 | tm.tm_min, tm.tm_sec); | |
783 | } | |
c67fedfa | 784 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR, |
fc99b901 | 785 | rc & ~M41T80_ALHOUR_HT); |
c67fedfa WS |
786 | } |
787 | ||
788 | if (rc < 0) { | |
789 | dev_err(&client->dev, "Can't clear HT bit\n"); | |
85d77047 | 790 | return rc; |
caaff562 AN |
791 | } |
792 | ||
793 | /* Make sure ST (stop) bit is cleared */ | |
794 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC); | |
caaff562 | 795 | |
c67fedfa WS |
796 | if (rc >= 0 && rc & M41T80_SEC_ST) |
797 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, | |
fc99b901 | 798 | rc & ~M41T80_SEC_ST); |
c67fedfa WS |
799 | if (rc < 0) { |
800 | dev_err(&client->dev, "Can't clear ST bit\n"); | |
85d77047 | 801 | return rc; |
caaff562 AN |
802 | } |
803 | ||
ef6b3125 MJ |
804 | /* Export sysfs entries */ |
805 | rc = sysfs_create_group(&(&client->dev)->kobj, &attr_group); | |
806 | if (rc) { | |
807 | dev_err(&client->dev, "Failed to create sysfs group: %d\n", rc); | |
c67fedfa | 808 | return rc; |
ef6b3125 MJ |
809 | } |
810 | ||
811 | rc = devm_add_action(&client->dev, m41t80_remove_sysfs_group, | |
812 | &client->dev); | |
813 | if (rc) { | |
814 | m41t80_remove_sysfs_group(&client->dev); | |
815 | dev_err(&client->dev, | |
816 | "Failed to add sysfs cleanup action: %d\n", rc); | |
817 | return rc; | |
818 | } | |
caaff562 | 819 | |
617780d2 | 820 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
9c6dfed9 | 821 | if (m41t80_data->features & M41T80_FEATURE_HT) { |
417607d0 | 822 | save_client = client; |
617780d2 AN |
823 | rc = misc_register(&wdt_dev); |
824 | if (rc) | |
c67fedfa | 825 | return rc; |
617780d2 AN |
826 | rc = register_reboot_notifier(&wdt_notifier); |
827 | if (rc) { | |
828 | misc_deregister(&wdt_dev); | |
c67fedfa | 829 | return rc; |
617780d2 | 830 | } |
617780d2 AN |
831 | } |
832 | #endif | |
caaff562 | 833 | return 0; |
caaff562 AN |
834 | } |
835 | ||
836 | static int m41t80_remove(struct i2c_client *client) | |
837 | { | |
4ebabb78 | 838 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
caaff562 | 839 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
caaff562 | 840 | |
3760f736 | 841 | if (clientdata->features & M41T80_FEATURE_HT) { |
617780d2 AN |
842 | misc_deregister(&wdt_dev); |
843 | unregister_reboot_notifier(&wdt_notifier); | |
844 | } | |
845 | #endif | |
caaff562 AN |
846 | |
847 | return 0; | |
848 | } | |
849 | ||
850 | static struct i2c_driver m41t80_driver = { | |
851 | .driver = { | |
afe1ab4d | 852 | .name = "rtc-m41t80", |
caaff562 AN |
853 | }, |
854 | .probe = m41t80_probe, | |
855 | .remove = m41t80_remove, | |
3760f736 | 856 | .id_table = m41t80_id, |
caaff562 AN |
857 | }; |
858 | ||
0abc9201 | 859 | module_i2c_driver(m41t80_driver); |
caaff562 AN |
860 | |
861 | MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>"); | |
862 | MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver"); | |
863 | MODULE_LICENSE("GPL"); |