Commit | Line | Data |
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caaff562 AN |
1 | /* |
2 | * I2C client/driver for the ST M41T80 family of i2c rtc chips. | |
3 | * | |
4 | * Author: Alexander Bigga <ab@mycable.de> | |
5 | * | |
6 | * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com> | |
7 | * | |
8 | * 2006 (c) mycable GmbH | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | */ | |
15 | ||
a737e835 JP |
16 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
17 | ||
35aa64f3 MR |
18 | #include <linux/bcd.h> |
19 | #include <linux/i2c.h> | |
caaff562 | 20 | #include <linux/init.h> |
9fb1f68d | 21 | #include <linux/kernel.h> |
35aa64f3 MR |
22 | #include <linux/module.h> |
23 | #include <linux/rtc.h> | |
caaff562 | 24 | #include <linux/slab.h> |
613655fa | 25 | #include <linux/mutex.h> |
caaff562 | 26 | #include <linux/string.h> |
617780d2 | 27 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
617780d2 AN |
28 | #include <linux/fs.h> |
29 | #include <linux/ioctl.h> | |
35aa64f3 MR |
30 | #include <linux/miscdevice.h> |
31 | #include <linux/reboot.h> | |
32 | #include <linux/watchdog.h> | |
617780d2 | 33 | #endif |
caaff562 | 34 | |
f2b84ee8 MJ |
35 | #define M41T80_REG_SSEC 0x00 |
36 | #define M41T80_REG_SEC 0x01 | |
37 | #define M41T80_REG_MIN 0x02 | |
38 | #define M41T80_REG_HOUR 0x03 | |
39 | #define M41T80_REG_WDAY 0x04 | |
40 | #define M41T80_REG_DAY 0x05 | |
41 | #define M41T80_REG_MON 0x06 | |
42 | #define M41T80_REG_YEAR 0x07 | |
43 | #define M41T80_REG_ALARM_MON 0x0a | |
44 | #define M41T80_REG_ALARM_DAY 0x0b | |
45 | #define M41T80_REG_ALARM_HOUR 0x0c | |
46 | #define M41T80_REG_ALARM_MIN 0x0d | |
47 | #define M41T80_REG_ALARM_SEC 0x0e | |
48 | #define M41T80_REG_FLAGS 0x0f | |
49 | #define M41T80_REG_SQW 0x13 | |
caaff562 AN |
50 | |
51 | #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1) | |
52 | #define M41T80_ALARM_REG_SIZE \ | |
53 | (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON) | |
54 | ||
54339f3b MJ |
55 | #define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */ |
56 | #define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */ | |
57 | #define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */ | |
58 | #define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */ | |
05a7f27a | 59 | #define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */ |
54339f3b MJ |
60 | #define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */ |
61 | #define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */ | |
62 | #define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */ | |
63 | #define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */ | |
64 | #define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */ | |
caaff562 | 65 | |
54339f3b MJ |
66 | #define M41T80_FEATURE_HT BIT(0) /* Halt feature */ |
67 | #define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */ | |
68 | #define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */ | |
69 | #define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */ | |
70 | #define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */ | |
caaff562 | 71 | |
613655fa | 72 | static DEFINE_MUTEX(m41t80_rtc_mutex); |
3760f736 | 73 | static const struct i2c_device_id m41t80_id[] = { |
f30281f4 | 74 | { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT }, |
d3a126fc SF |
75 | { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD }, |
76 | { "m41t80", M41T80_FEATURE_SQ }, | |
77 | { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ}, | |
78 | { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
79 | { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
80 | { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
81 | { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
82 | { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
83 | { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
6b1a5235 | 84 | { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT }, |
3760f736 | 85 | { } |
caaff562 | 86 | }; |
3760f736 | 87 | MODULE_DEVICE_TABLE(i2c, m41t80_id); |
caaff562 AN |
88 | |
89 | struct m41t80_data { | |
3760f736 | 90 | u8 features; |
caaff562 AN |
91 | struct rtc_device *rtc; |
92 | }; | |
93 | ||
9c6dfed9 MJ |
94 | static irqreturn_t m41t80_handle_irq(int irq, void *dev_id) |
95 | { | |
96 | struct i2c_client *client = dev_id; | |
97 | struct m41t80_data *m41t80 = i2c_get_clientdata(client); | |
98 | struct mutex *lock = &m41t80->rtc->ops_lock; | |
99 | unsigned long events = 0; | |
100 | int flags, flags_afe; | |
101 | ||
102 | mutex_lock(lock); | |
103 | ||
104 | flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | |
105 | if (flags_afe < 0) { | |
106 | mutex_unlock(lock); | |
107 | return IRQ_NONE; | |
108 | } | |
109 | ||
110 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
111 | if (flags <= 0) { | |
112 | mutex_unlock(lock); | |
113 | return IRQ_NONE; | |
114 | } | |
115 | ||
116 | if (flags & M41T80_FLAGS_AF) { | |
117 | flags &= ~M41T80_FLAGS_AF; | |
118 | flags_afe &= ~M41T80_ALMON_AFE; | |
119 | events |= RTC_AF; | |
120 | } | |
121 | ||
122 | if (events) { | |
123 | rtc_update_irq(m41t80->rtc, 1, events); | |
124 | i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags); | |
125 | i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
126 | flags_afe); | |
127 | } | |
128 | ||
129 | mutex_unlock(lock); | |
130 | ||
131 | return IRQ_HANDLED; | |
132 | } | |
133 | ||
caaff562 AN |
134 | static int m41t80_get_datetime(struct i2c_client *client, |
135 | struct rtc_time *tm) | |
136 | { | |
f2b84ee8 | 137 | unsigned char buf[8]; |
05a7f27a MJ |
138 | int err, flags; |
139 | ||
140 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
141 | if (flags < 0) | |
142 | return flags; | |
143 | ||
144 | if (flags & M41T80_FLAGS_OF) { | |
145 | dev_err(&client->dev, "Oscillator failure, data is invalid.\n"); | |
146 | return -EINVAL; | |
147 | } | |
caaff562 | 148 | |
f2b84ee8 MJ |
149 | err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC, |
150 | sizeof(buf), buf); | |
151 | if (err < 0) { | |
152 | dev_err(&client->dev, "Unable to read date\n"); | |
caaff562 AN |
153 | return -EIO; |
154 | } | |
155 | ||
fe20ba70 AB |
156 | tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f); |
157 | tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f); | |
158 | tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f); | |
159 | tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f); | |
caaff562 | 160 | tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07; |
fe20ba70 | 161 | tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1; |
caaff562 AN |
162 | |
163 | /* assume 20YY not 19YY, and ignore the Century Bit */ | |
fe20ba70 | 164 | tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100; |
b485fe5e | 165 | return rtc_valid_tm(tm); |
caaff562 AN |
166 | } |
167 | ||
168 | /* Sets the given date and time to the real time clock. */ | |
169 | static int m41t80_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |
170 | { | |
f2b84ee8 | 171 | unsigned char buf[8]; |
05a7f27a | 172 | int err, flags; |
caaff562 | 173 | |
f2b84ee8 MJ |
174 | if (tm->tm_year < 100 || tm->tm_year > 199) |
175 | return -EINVAL; | |
caaff562 | 176 | |
caaff562 | 177 | buf[M41T80_REG_SSEC] = 0; |
f2b84ee8 MJ |
178 | buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec); |
179 | buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min); | |
180 | buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour); | |
181 | buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday); | |
182 | buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1); | |
183 | buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100); | |
184 | buf[M41T80_REG_WDAY] = tm->tm_wday; | |
185 | ||
186 | err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC, | |
187 | sizeof(buf), buf); | |
188 | if (err < 0) { | |
189 | dev_err(&client->dev, "Unable to write to date registers\n"); | |
190 | return err; | |
bcebd81d | 191 | } |
caaff562 | 192 | |
05a7f27a MJ |
193 | /* Clear the OF bit of Flags Register */ |
194 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
195 | if (flags < 0) | |
196 | return flags; | |
197 | ||
198 | if (i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, | |
199 | flags & ~M41T80_FLAGS_OF)) { | |
200 | dev_err(&client->dev, "Unable to write flags register\n"); | |
201 | return -EIO; | |
202 | } | |
203 | ||
f2b84ee8 | 204 | return err; |
caaff562 AN |
205 | } |
206 | ||
caaff562 AN |
207 | static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq) |
208 | { | |
209 | struct i2c_client *client = to_i2c_client(dev); | |
210 | struct m41t80_data *clientdata = i2c_get_clientdata(client); | |
211 | u8 reg; | |
212 | ||
3760f736 | 213 | if (clientdata->features & M41T80_FEATURE_BL) { |
caaff562 AN |
214 | reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); |
215 | seq_printf(seq, "battery\t\t: %s\n", | |
216 | (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok"); | |
217 | } | |
218 | return 0; | |
219 | } | |
caaff562 AN |
220 | |
221 | static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
222 | { | |
223 | return m41t80_get_datetime(to_i2c_client(dev), tm); | |
224 | } | |
225 | ||
226 | static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
227 | { | |
228 | return m41t80_set_datetime(to_i2c_client(dev), tm); | |
229 | } | |
230 | ||
9c6dfed9 MJ |
231 | static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled) |
232 | { | |
233 | struct i2c_client *client = to_i2c_client(dev); | |
234 | int flags, retval; | |
235 | ||
236 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | |
237 | if (flags < 0) | |
238 | return flags; | |
239 | ||
240 | if (enabled) | |
241 | flags |= M41T80_ALMON_AFE; | |
242 | else | |
243 | flags &= ~M41T80_ALMON_AFE; | |
244 | ||
245 | retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags); | |
246 | if (retval < 0) { | |
247 | dev_info(dev, "Unable to enable alarm IRQ %d\n", retval); | |
248 | return retval; | |
249 | } | |
250 | return 0; | |
251 | } | |
252 | ||
253 | static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
254 | { | |
255 | struct i2c_client *client = to_i2c_client(dev); | |
256 | u8 alarmvals[5]; | |
257 | int ret, err; | |
258 | ||
259 | alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1); | |
260 | alarmvals[1] = bin2bcd(alrm->time.tm_mday); | |
261 | alarmvals[2] = bin2bcd(alrm->time.tm_hour); | |
262 | alarmvals[3] = bin2bcd(alrm->time.tm_min); | |
263 | alarmvals[4] = bin2bcd(alrm->time.tm_sec); | |
264 | ||
265 | /* Clear AF and AFE flags */ | |
266 | ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | |
267 | if (ret < 0) | |
268 | return ret; | |
269 | err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
270 | ret & ~(M41T80_ALMON_AFE)); | |
271 | if (err < 0) { | |
272 | dev_err(dev, "Unable to clear AFE bit\n"); | |
273 | return err; | |
274 | } | |
275 | ||
276 | ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
277 | if (ret < 0) | |
278 | return ret; | |
279 | ||
280 | err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, | |
281 | ret & ~(M41T80_FLAGS_AF)); | |
282 | if (err < 0) { | |
283 | dev_err(dev, "Unable to clear AF bit\n"); | |
284 | return err; | |
285 | } | |
286 | ||
287 | /* Write the alarm */ | |
288 | err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON, | |
289 | 5, alarmvals); | |
290 | if (err) | |
291 | return err; | |
292 | ||
293 | /* Enable the alarm interrupt */ | |
294 | if (alrm->enabled) { | |
295 | alarmvals[0] |= M41T80_ALMON_AFE; | |
296 | err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
297 | alarmvals[0]); | |
298 | if (err) | |
299 | return err; | |
300 | } | |
301 | ||
302 | return 0; | |
303 | } | |
304 | ||
305 | static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
306 | { | |
307 | struct i2c_client *client = to_i2c_client(dev); | |
308 | u8 alarmvals[5]; | |
309 | int flags, ret; | |
310 | ||
311 | ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON, | |
312 | 5, alarmvals); | |
313 | if (ret != 5) | |
314 | return ret < 0 ? ret : -EIO; | |
315 | ||
316 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
317 | if (flags < 0) | |
318 | return flags; | |
319 | ||
320 | alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f); | |
321 | alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f); | |
322 | alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f); | |
323 | alrm->time.tm_wday = -1; | |
324 | alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f); | |
325 | alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f); | |
326 | alrm->time.tm_year = -1; | |
327 | ||
328 | alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE); | |
329 | alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled; | |
330 | ||
331 | return 0; | |
332 | } | |
333 | ||
caaff562 AN |
334 | static struct rtc_class_ops m41t80_rtc_ops = { |
335 | .read_time = m41t80_rtc_read_time, | |
336 | .set_time = m41t80_rtc_set_time, | |
caaff562 | 337 | .proc = m41t80_rtc_proc, |
caaff562 AN |
338 | }; |
339 | ||
ef6b3125 MJ |
340 | static ssize_t flags_show(struct device *dev, |
341 | struct device_attribute *attr, char *buf) | |
caaff562 AN |
342 | { |
343 | struct i2c_client *client = to_i2c_client(dev); | |
344 | int val; | |
345 | ||
346 | val = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
347 | if (val < 0) | |
85d77047 | 348 | return val; |
caaff562 AN |
349 | return sprintf(buf, "%#x\n", val); |
350 | } | |
ef6b3125 | 351 | static DEVICE_ATTR_RO(flags); |
caaff562 | 352 | |
ef6b3125 MJ |
353 | static ssize_t sqwfreq_show(struct device *dev, |
354 | struct device_attribute *attr, char *buf) | |
caaff562 AN |
355 | { |
356 | struct i2c_client *client = to_i2c_client(dev); | |
d3a126fc | 357 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
f30281f4 | 358 | int val, reg_sqw; |
caaff562 | 359 | |
d3a126fc SF |
360 | if (!(clientdata->features & M41T80_FEATURE_SQ)) |
361 | return -EINVAL; | |
362 | ||
f30281f4 DG |
363 | reg_sqw = M41T80_REG_SQW; |
364 | if (clientdata->features & M41T80_FEATURE_SQ_ALT) | |
365 | reg_sqw = M41T80_REG_WDAY; | |
366 | val = i2c_smbus_read_byte_data(client, reg_sqw); | |
caaff562 | 367 | if (val < 0) |
85d77047 | 368 | return val; |
caaff562 AN |
369 | val = (val >> 4) & 0xf; |
370 | switch (val) { | |
371 | case 0: | |
372 | break; | |
373 | case 1: | |
374 | val = 32768; | |
375 | break; | |
376 | default: | |
377 | val = 32768 >> val; | |
378 | } | |
379 | return sprintf(buf, "%d\n", val); | |
380 | } | |
ef6b3125 MJ |
381 | |
382 | static ssize_t sqwfreq_store(struct device *dev, | |
383 | struct device_attribute *attr, | |
384 | const char *buf, size_t count) | |
caaff562 AN |
385 | { |
386 | struct i2c_client *client = to_i2c_client(dev); | |
d3a126fc | 387 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
85d77047 | 388 | int almon, sqw, reg_sqw, rc; |
fc99b901 MJ |
389 | unsigned long val; |
390 | ||
391 | rc = kstrtoul(buf, 0, &val); | |
392 | if (rc < 0) | |
393 | return rc; | |
caaff562 | 394 | |
d3a126fc SF |
395 | if (!(clientdata->features & M41T80_FEATURE_SQ)) |
396 | return -EINVAL; | |
397 | ||
caaff562 AN |
398 | if (val) { |
399 | if (!is_power_of_2(val)) | |
400 | return -EINVAL; | |
401 | val = ilog2(val); | |
402 | if (val == 15) | |
403 | val = 1; | |
404 | else if (val < 14) | |
405 | val = 15 - val; | |
406 | else | |
407 | return -EINVAL; | |
408 | } | |
409 | /* disable SQW, set SQW frequency & re-enable */ | |
410 | almon = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | |
411 | if (almon < 0) | |
85d77047 | 412 | return almon; |
f30281f4 DG |
413 | reg_sqw = M41T80_REG_SQW; |
414 | if (clientdata->features & M41T80_FEATURE_SQ_ALT) | |
415 | reg_sqw = M41T80_REG_WDAY; | |
416 | sqw = i2c_smbus_read_byte_data(client, reg_sqw); | |
caaff562 | 417 | if (sqw < 0) |
85d77047 | 418 | return sqw; |
caaff562 | 419 | sqw = (sqw & 0x0f) | (val << 4); |
85d77047 WS |
420 | |
421 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
fc99b901 | 422 | almon & ~M41T80_ALMON_SQWE); |
85d77047 WS |
423 | if (rc < 0) |
424 | return rc; | |
425 | ||
426 | if (val) { | |
427 | rc = i2c_smbus_write_byte_data(client, reg_sqw, sqw); | |
428 | if (rc < 0) | |
429 | return rc; | |
430 | ||
431 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
fc99b901 MJ |
432 | almon | M41T80_ALMON_SQWE); |
433 | if (rc < 0) | |
85d77047 WS |
434 | return rc; |
435 | } | |
caaff562 AN |
436 | return count; |
437 | } | |
ef6b3125 | 438 | static DEVICE_ATTR_RW(sqwfreq); |
caaff562 AN |
439 | |
440 | static struct attribute *attrs[] = { | |
441 | &dev_attr_flags.attr, | |
442 | &dev_attr_sqwfreq.attr, | |
443 | NULL, | |
444 | }; | |
fc99b901 | 445 | |
caaff562 AN |
446 | static struct attribute_group attr_group = { |
447 | .attrs = attrs, | |
448 | }; | |
449 | ||
617780d2 AN |
450 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
451 | /* | |
452 | ***************************************************************************** | |
453 | * | |
454 | * Watchdog Driver | |
455 | * | |
456 | ***************************************************************************** | |
457 | */ | |
458 | static struct i2c_client *save_client; | |
459 | ||
460 | /* Default margin */ | |
461 | #define WD_TIMO 60 /* 1..31 seconds */ | |
462 | ||
463 | static int wdt_margin = WD_TIMO; | |
464 | module_param(wdt_margin, int, 0); | |
465 | MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)"); | |
466 | ||
467 | static unsigned long wdt_is_open; | |
468 | static int boot_flag; | |
469 | ||
470 | /** | |
471 | * wdt_ping: | |
472 | * | |
473 | * Reload counter one with the watchdog timeout. We don't bother reloading | |
474 | * the cascade counter. | |
475 | */ | |
476 | static void wdt_ping(void) | |
477 | { | |
478 | unsigned char i2c_data[2]; | |
479 | struct i2c_msg msgs1[1] = { | |
480 | { | |
481 | .addr = save_client->addr, | |
482 | .flags = 0, | |
483 | .len = 2, | |
484 | .buf = i2c_data, | |
485 | }, | |
486 | }; | |
d3a126fc SF |
487 | struct m41t80_data *clientdata = i2c_get_clientdata(save_client); |
488 | ||
617780d2 AN |
489 | i2c_data[0] = 0x09; /* watchdog register */ |
490 | ||
491 | if (wdt_margin > 31) | |
492 | i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */ | |
493 | else | |
494 | /* | |
495 | * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02) | |
496 | */ | |
fc99b901 | 497 | i2c_data[1] = wdt_margin << 2 | 0x82; |
617780d2 | 498 | |
d3a126fc SF |
499 | /* |
500 | * M41T65 has three bits for watchdog resolution. Don't set bit 7, as | |
501 | * that would be an invalid resolution. | |
502 | */ | |
503 | if (clientdata->features & M41T80_FEATURE_WD) | |
504 | i2c_data[1] &= ~M41T80_WATCHDOG_RB2; | |
505 | ||
617780d2 AN |
506 | i2c_transfer(save_client->adapter, msgs1, 1); |
507 | } | |
508 | ||
509 | /** | |
510 | * wdt_disable: | |
511 | * | |
512 | * disables watchdog. | |
513 | */ | |
514 | static void wdt_disable(void) | |
515 | { | |
516 | unsigned char i2c_data[2], i2c_buf[0x10]; | |
517 | struct i2c_msg msgs0[2] = { | |
518 | { | |
519 | .addr = save_client->addr, | |
520 | .flags = 0, | |
521 | .len = 1, | |
522 | .buf = i2c_data, | |
523 | }, | |
524 | { | |
525 | .addr = save_client->addr, | |
526 | .flags = I2C_M_RD, | |
527 | .len = 1, | |
528 | .buf = i2c_buf, | |
529 | }, | |
530 | }; | |
531 | struct i2c_msg msgs1[1] = { | |
532 | { | |
533 | .addr = save_client->addr, | |
534 | .flags = 0, | |
535 | .len = 2, | |
536 | .buf = i2c_data, | |
537 | }, | |
538 | }; | |
539 | ||
540 | i2c_data[0] = 0x09; | |
541 | i2c_transfer(save_client->adapter, msgs0, 2); | |
542 | ||
543 | i2c_data[0] = 0x09; | |
544 | i2c_data[1] = 0x00; | |
545 | i2c_transfer(save_client->adapter, msgs1, 1); | |
546 | } | |
547 | ||
548 | /** | |
549 | * wdt_write: | |
550 | * @file: file handle to the watchdog | |
551 | * @buf: buffer to write (unused as data does not matter here | |
552 | * @count: count of bytes | |
553 | * @ppos: pointer to the position to write. No seeks allowed | |
554 | * | |
555 | * A write to a watchdog device is defined as a keepalive signal. Any | |
556 | * write of data will do, as we we don't define content meaning. | |
557 | */ | |
558 | static ssize_t wdt_write(struct file *file, const char __user *buf, | |
559 | size_t count, loff_t *ppos) | |
560 | { | |
617780d2 AN |
561 | if (count) { |
562 | wdt_ping(); | |
563 | return 1; | |
564 | } | |
565 | return 0; | |
566 | } | |
567 | ||
568 | static ssize_t wdt_read(struct file *file, char __user *buf, | |
569 | size_t count, loff_t *ppos) | |
570 | { | |
571 | return 0; | |
572 | } | |
573 | ||
574 | /** | |
575 | * wdt_ioctl: | |
576 | * @inode: inode of the device | |
577 | * @file: file handle to the device | |
578 | * @cmd: watchdog command | |
579 | * @arg: argument pointer | |
580 | * | |
581 | * The watchdog API defines a common set of functions for all watchdogs | |
582 | * according to their available features. We only actually usefully support | |
583 | * querying capabilities and current status. | |
584 | */ | |
55929332 | 585 | static int wdt_ioctl(struct file *file, unsigned int cmd, |
617780d2 AN |
586 | unsigned long arg) |
587 | { | |
588 | int new_margin, rv; | |
589 | static struct watchdog_info ident = { | |
590 | .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING | | |
591 | WDIOF_SETTIMEOUT, | |
592 | .firmware_version = 1, | |
593 | .identity = "M41T80 WTD" | |
594 | }; | |
595 | ||
596 | switch (cmd) { | |
597 | case WDIOC_GETSUPPORT: | |
598 | return copy_to_user((struct watchdog_info __user *)arg, &ident, | |
599 | sizeof(ident)) ? -EFAULT : 0; | |
600 | ||
601 | case WDIOC_GETSTATUS: | |
602 | case WDIOC_GETBOOTSTATUS: | |
603 | return put_user(boot_flag, (int __user *)arg); | |
604 | case WDIOC_KEEPALIVE: | |
605 | wdt_ping(); | |
606 | return 0; | |
607 | case WDIOC_SETTIMEOUT: | |
608 | if (get_user(new_margin, (int __user *)arg)) | |
609 | return -EFAULT; | |
610 | /* Arbitrary, can't find the card's limits */ | |
611 | if (new_margin < 1 || new_margin > 124) | |
612 | return -EINVAL; | |
613 | wdt_margin = new_margin; | |
614 | wdt_ping(); | |
615 | /* Fall */ | |
616 | case WDIOC_GETTIMEOUT: | |
617 | return put_user(wdt_margin, (int __user *)arg); | |
618 | ||
619 | case WDIOC_SETOPTIONS: | |
620 | if (copy_from_user(&rv, (int __user *)arg, sizeof(int))) | |
621 | return -EFAULT; | |
622 | ||
623 | if (rv & WDIOS_DISABLECARD) { | |
a737e835 | 624 | pr_info("disable watchdog\n"); |
617780d2 AN |
625 | wdt_disable(); |
626 | } | |
627 | ||
628 | if (rv & WDIOS_ENABLECARD) { | |
a737e835 | 629 | pr_info("enable watchdog\n"); |
617780d2 AN |
630 | wdt_ping(); |
631 | } | |
632 | ||
633 | return -EINVAL; | |
634 | } | |
635 | return -ENOTTY; | |
636 | } | |
637 | ||
55929332 AB |
638 | static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd, |
639 | unsigned long arg) | |
640 | { | |
641 | int ret; | |
642 | ||
613655fa | 643 | mutex_lock(&m41t80_rtc_mutex); |
55929332 | 644 | ret = wdt_ioctl(file, cmd, arg); |
613655fa | 645 | mutex_unlock(&m41t80_rtc_mutex); |
55929332 AB |
646 | |
647 | return ret; | |
648 | } | |
649 | ||
617780d2 AN |
650 | /** |
651 | * wdt_open: | |
652 | * @inode: inode of device | |
653 | * @file: file handle to device | |
654 | * | |
655 | */ | |
656 | static int wdt_open(struct inode *inode, struct file *file) | |
657 | { | |
658 | if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) { | |
613655fa | 659 | mutex_lock(&m41t80_rtc_mutex); |
41012735 | 660 | if (test_and_set_bit(0, &wdt_is_open)) { |
613655fa | 661 | mutex_unlock(&m41t80_rtc_mutex); |
617780d2 | 662 | return -EBUSY; |
41012735 | 663 | } |
617780d2 AN |
664 | /* |
665 | * Activate | |
666 | */ | |
667 | wdt_is_open = 1; | |
613655fa | 668 | mutex_unlock(&m41t80_rtc_mutex); |
09eeb1f5 | 669 | return nonseekable_open(inode, file); |
617780d2 AN |
670 | } |
671 | return -ENODEV; | |
672 | } | |
673 | ||
674 | /** | |
675 | * wdt_close: | |
676 | * @inode: inode to board | |
677 | * @file: file handle to board | |
678 | * | |
679 | */ | |
680 | static int wdt_release(struct inode *inode, struct file *file) | |
681 | { | |
682 | if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) | |
683 | clear_bit(0, &wdt_is_open); | |
684 | return 0; | |
685 | } | |
686 | ||
687 | /** | |
688 | * notify_sys: | |
689 | * @this: our notifier block | |
690 | * @code: the event being reported | |
691 | * @unused: unused | |
692 | * | |
693 | * Our notifier is called on system shutdowns. We want to turn the card | |
694 | * off at reboot otherwise the machine will reboot again during memory | |
695 | * test or worse yet during the following fsck. This would suck, in fact | |
696 | * trust me - if it happens it does suck. | |
697 | */ | |
698 | static int wdt_notify_sys(struct notifier_block *this, unsigned long code, | |
699 | void *unused) | |
700 | { | |
701 | if (code == SYS_DOWN || code == SYS_HALT) | |
702 | /* Disable Watchdog */ | |
703 | wdt_disable(); | |
704 | return NOTIFY_DONE; | |
705 | } | |
706 | ||
707 | static const struct file_operations wdt_fops = { | |
708 | .owner = THIS_MODULE, | |
709 | .read = wdt_read, | |
55929332 | 710 | .unlocked_ioctl = wdt_unlocked_ioctl, |
617780d2 AN |
711 | .write = wdt_write, |
712 | .open = wdt_open, | |
713 | .release = wdt_release, | |
6038f373 | 714 | .llseek = no_llseek, |
617780d2 AN |
715 | }; |
716 | ||
717 | static struct miscdevice wdt_dev = { | |
718 | .minor = WATCHDOG_MINOR, | |
719 | .name = "watchdog", | |
720 | .fops = &wdt_fops, | |
721 | }; | |
722 | ||
723 | /* | |
724 | * The WDT card needs to learn about soft shutdowns in order to | |
725 | * turn the timebomb registers off. | |
726 | */ | |
727 | static struct notifier_block wdt_notifier = { | |
728 | .notifier_call = wdt_notify_sys, | |
729 | }; | |
730 | #endif /* CONFIG_RTC_DRV_M41T80_WDT */ | |
731 | ||
caaff562 AN |
732 | /* |
733 | ***************************************************************************** | |
734 | * | |
735 | * Driver Interface | |
736 | * | |
737 | ***************************************************************************** | |
738 | */ | |
ef6b3125 MJ |
739 | |
740 | static void m41t80_remove_sysfs_group(void *_dev) | |
741 | { | |
742 | struct device *dev = _dev; | |
743 | ||
744 | sysfs_remove_group(&dev->kobj, &attr_group); | |
745 | } | |
746 | ||
d2653e92 JD |
747 | static int m41t80_probe(struct i2c_client *client, |
748 | const struct i2c_device_id *id) | |
caaff562 | 749 | { |
f2b84ee8 | 750 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); |
3760f736 | 751 | int rc = 0; |
caaff562 AN |
752 | struct rtc_device *rtc = NULL; |
753 | struct rtc_time tm; | |
9c6dfed9 | 754 | struct m41t80_data *m41t80_data = NULL; |
caaff562 | 755 | |
f2b84ee8 MJ |
756 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | |
757 | I2C_FUNC_SMBUS_BYTE_DATA)) { | |
758 | dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n"); | |
c67fedfa | 759 | return -ENODEV; |
f2b84ee8 | 760 | } |
caaff562 | 761 | |
9c6dfed9 MJ |
762 | m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data), |
763 | GFP_KERNEL); | |
764 | if (!m41t80_data) | |
c67fedfa | 765 | return -ENOMEM; |
caaff562 | 766 | |
9c6dfed9 MJ |
767 | m41t80_data->features = id->driver_data; |
768 | i2c_set_clientdata(client, m41t80_data); | |
769 | ||
770 | if (client->irq > 0) { | |
771 | rc = devm_request_threaded_irq(&client->dev, client->irq, | |
772 | NULL, m41t80_handle_irq, | |
773 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
774 | "m41t80", client); | |
775 | if (rc) { | |
776 | dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); | |
777 | client->irq = 0; | |
778 | } else { | |
779 | m41t80_rtc_ops.read_alarm = m41t80_read_alarm; | |
780 | m41t80_rtc_ops.set_alarm = m41t80_set_alarm; | |
781 | m41t80_rtc_ops.alarm_irq_enable = m41t80_alarm_irq_enable; | |
3726a218 MJ |
782 | /* Enable the wakealarm */ |
783 | device_init_wakeup(&client->dev, true); | |
9c6dfed9 MJ |
784 | } |
785 | } | |
a015dbc1 | 786 | |
4ebabb78 | 787 | rtc = devm_rtc_device_register(&client->dev, client->name, |
fc99b901 | 788 | &m41t80_rtc_ops, THIS_MODULE); |
c67fedfa WS |
789 | if (IS_ERR(rtc)) |
790 | return PTR_ERR(rtc); | |
caaff562 | 791 | |
9c6dfed9 | 792 | m41t80_data->rtc = rtc; |
caaff562 AN |
793 | |
794 | /* Make sure HT (Halt Update) bit is cleared */ | |
795 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR); | |
caaff562 | 796 | |
c67fedfa | 797 | if (rc >= 0 && rc & M41T80_ALHOUR_HT) { |
9c6dfed9 | 798 | if (m41t80_data->features & M41T80_FEATURE_HT) { |
caaff562 AN |
799 | m41t80_get_datetime(client, &tm); |
800 | dev_info(&client->dev, "HT bit was set!\n"); | |
801 | dev_info(&client->dev, | |
fc99b901 | 802 | "Power Down at %04i-%02i-%02i %02i:%02i:%02i\n", |
caaff562 AN |
803 | tm.tm_year + 1900, |
804 | tm.tm_mon + 1, tm.tm_mday, tm.tm_hour, | |
805 | tm.tm_min, tm.tm_sec); | |
806 | } | |
c67fedfa | 807 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR, |
fc99b901 | 808 | rc & ~M41T80_ALHOUR_HT); |
c67fedfa WS |
809 | } |
810 | ||
811 | if (rc < 0) { | |
812 | dev_err(&client->dev, "Can't clear HT bit\n"); | |
85d77047 | 813 | return rc; |
caaff562 AN |
814 | } |
815 | ||
816 | /* Make sure ST (stop) bit is cleared */ | |
817 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC); | |
caaff562 | 818 | |
c67fedfa WS |
819 | if (rc >= 0 && rc & M41T80_SEC_ST) |
820 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, | |
fc99b901 | 821 | rc & ~M41T80_SEC_ST); |
c67fedfa WS |
822 | if (rc < 0) { |
823 | dev_err(&client->dev, "Can't clear ST bit\n"); | |
85d77047 | 824 | return rc; |
caaff562 AN |
825 | } |
826 | ||
ef6b3125 MJ |
827 | /* Export sysfs entries */ |
828 | rc = sysfs_create_group(&(&client->dev)->kobj, &attr_group); | |
829 | if (rc) { | |
830 | dev_err(&client->dev, "Failed to create sysfs group: %d\n", rc); | |
c67fedfa | 831 | return rc; |
ef6b3125 MJ |
832 | } |
833 | ||
834 | rc = devm_add_action(&client->dev, m41t80_remove_sysfs_group, | |
835 | &client->dev); | |
836 | if (rc) { | |
837 | m41t80_remove_sysfs_group(&client->dev); | |
838 | dev_err(&client->dev, | |
839 | "Failed to add sysfs cleanup action: %d\n", rc); | |
840 | return rc; | |
841 | } | |
caaff562 | 842 | |
617780d2 | 843 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
9c6dfed9 | 844 | if (m41t80_data->features & M41T80_FEATURE_HT) { |
417607d0 | 845 | save_client = client; |
617780d2 AN |
846 | rc = misc_register(&wdt_dev); |
847 | if (rc) | |
c67fedfa | 848 | return rc; |
617780d2 AN |
849 | rc = register_reboot_notifier(&wdt_notifier); |
850 | if (rc) { | |
851 | misc_deregister(&wdt_dev); | |
c67fedfa | 852 | return rc; |
617780d2 | 853 | } |
617780d2 AN |
854 | } |
855 | #endif | |
caaff562 | 856 | return 0; |
caaff562 AN |
857 | } |
858 | ||
859 | static int m41t80_remove(struct i2c_client *client) | |
860 | { | |
4ebabb78 | 861 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
caaff562 | 862 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
caaff562 | 863 | |
3760f736 | 864 | if (clientdata->features & M41T80_FEATURE_HT) { |
617780d2 AN |
865 | misc_deregister(&wdt_dev); |
866 | unregister_reboot_notifier(&wdt_notifier); | |
867 | } | |
868 | #endif | |
caaff562 AN |
869 | |
870 | return 0; | |
871 | } | |
872 | ||
873 | static struct i2c_driver m41t80_driver = { | |
874 | .driver = { | |
afe1ab4d | 875 | .name = "rtc-m41t80", |
caaff562 AN |
876 | }, |
877 | .probe = m41t80_probe, | |
878 | .remove = m41t80_remove, | |
3760f736 | 879 | .id_table = m41t80_id, |
caaff562 AN |
880 | }; |
881 | ||
0abc9201 | 882 | module_i2c_driver(m41t80_driver); |
caaff562 AN |
883 | |
884 | MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>"); | |
885 | MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver"); | |
886 | MODULE_LICENSE("GPL"); |