Commit | Line | Data |
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caaff562 AN |
1 | /* |
2 | * I2C client/driver for the ST M41T80 family of i2c rtc chips. | |
3 | * | |
4 | * Author: Alexander Bigga <ab@mycable.de> | |
5 | * | |
6 | * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com> | |
7 | * | |
8 | * 2006 (c) mycable GmbH | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | */ | |
15 | ||
35aa64f3 MR |
16 | #include <linux/bcd.h> |
17 | #include <linux/i2c.h> | |
caaff562 | 18 | #include <linux/init.h> |
9fb1f68d | 19 | #include <linux/kernel.h> |
35aa64f3 MR |
20 | #include <linux/module.h> |
21 | #include <linux/rtc.h> | |
caaff562 | 22 | #include <linux/slab.h> |
613655fa | 23 | #include <linux/mutex.h> |
caaff562 | 24 | #include <linux/string.h> |
617780d2 | 25 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
617780d2 AN |
26 | #include <linux/fs.h> |
27 | #include <linux/ioctl.h> | |
35aa64f3 MR |
28 | #include <linux/miscdevice.h> |
29 | #include <linux/reboot.h> | |
30 | #include <linux/watchdog.h> | |
617780d2 | 31 | #endif |
caaff562 AN |
32 | |
33 | #define M41T80_REG_SSEC 0 | |
34 | #define M41T80_REG_SEC 1 | |
35 | #define M41T80_REG_MIN 2 | |
36 | #define M41T80_REG_HOUR 3 | |
37 | #define M41T80_REG_WDAY 4 | |
38 | #define M41T80_REG_DAY 5 | |
39 | #define M41T80_REG_MON 6 | |
40 | #define M41T80_REG_YEAR 7 | |
41 | #define M41T80_REG_ALARM_MON 0xa | |
42 | #define M41T80_REG_ALARM_DAY 0xb | |
43 | #define M41T80_REG_ALARM_HOUR 0xc | |
44 | #define M41T80_REG_ALARM_MIN 0xd | |
45 | #define M41T80_REG_ALARM_SEC 0xe | |
46 | #define M41T80_REG_FLAGS 0xf | |
47 | #define M41T80_REG_SQW 0x13 | |
48 | ||
49 | #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1) | |
50 | #define M41T80_ALARM_REG_SIZE \ | |
51 | (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON) | |
52 | ||
53 | #define M41T80_SEC_ST (1 << 7) /* ST: Stop Bit */ | |
54 | #define M41T80_ALMON_AFE (1 << 7) /* AFE: AF Enable Bit */ | |
55 | #define M41T80_ALMON_SQWE (1 << 6) /* SQWE: SQW Enable Bit */ | |
56 | #define M41T80_ALHOUR_HT (1 << 6) /* HT: Halt Update Bit */ | |
57 | #define M41T80_FLAGS_AF (1 << 6) /* AF: Alarm Flag Bit */ | |
58 | #define M41T80_FLAGS_BATT_LOW (1 << 4) /* BL: Battery Low Bit */ | |
d3a126fc SF |
59 | #define M41T80_WATCHDOG_RB2 (1 << 7) /* RB: Watchdog resolution */ |
60 | #define M41T80_WATCHDOG_RB1 (1 << 1) /* RB: Watchdog resolution */ | |
61 | #define M41T80_WATCHDOG_RB0 (1 << 0) /* RB: Watchdog resolution */ | |
caaff562 | 62 | |
d3a126fc SF |
63 | #define M41T80_FEATURE_HT (1 << 0) /* Halt feature */ |
64 | #define M41T80_FEATURE_BL (1 << 1) /* Battery low indicator */ | |
65 | #define M41T80_FEATURE_SQ (1 << 2) /* Squarewave feature */ | |
66 | #define M41T80_FEATURE_WD (1 << 3) /* Extra watchdog resolution */ | |
f30281f4 | 67 | #define M41T80_FEATURE_SQ_ALT (1 << 4) /* RSx bits are in reg 4 */ |
caaff562 | 68 | |
613655fa | 69 | static DEFINE_MUTEX(m41t80_rtc_mutex); |
3760f736 | 70 | static const struct i2c_device_id m41t80_id[] = { |
f30281f4 | 71 | { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT }, |
d3a126fc SF |
72 | { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD }, |
73 | { "m41t80", M41T80_FEATURE_SQ }, | |
74 | { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ}, | |
75 | { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
76 | { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
77 | { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
78 | { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
79 | { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
80 | { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
6b1a5235 | 81 | { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT }, |
3760f736 | 82 | { } |
caaff562 | 83 | }; |
3760f736 | 84 | MODULE_DEVICE_TABLE(i2c, m41t80_id); |
caaff562 AN |
85 | |
86 | struct m41t80_data { | |
3760f736 | 87 | u8 features; |
caaff562 AN |
88 | struct rtc_device *rtc; |
89 | }; | |
90 | ||
91 | static int m41t80_get_datetime(struct i2c_client *client, | |
92 | struct rtc_time *tm) | |
93 | { | |
94 | u8 buf[M41T80_DATETIME_REG_SIZE], dt_addr[1] = { M41T80_REG_SEC }; | |
95 | struct i2c_msg msgs[] = { | |
96 | { | |
97 | .addr = client->addr, | |
98 | .flags = 0, | |
99 | .len = 1, | |
100 | .buf = dt_addr, | |
101 | }, | |
102 | { | |
103 | .addr = client->addr, | |
104 | .flags = I2C_M_RD, | |
105 | .len = M41T80_DATETIME_REG_SIZE - M41T80_REG_SEC, | |
106 | .buf = buf + M41T80_REG_SEC, | |
107 | }, | |
108 | }; | |
109 | ||
110 | if (i2c_transfer(client->adapter, msgs, 2) < 0) { | |
111 | dev_err(&client->dev, "read error\n"); | |
112 | return -EIO; | |
113 | } | |
114 | ||
fe20ba70 AB |
115 | tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f); |
116 | tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f); | |
117 | tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f); | |
118 | tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f); | |
caaff562 | 119 | tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07; |
fe20ba70 | 120 | tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1; |
caaff562 AN |
121 | |
122 | /* assume 20YY not 19YY, and ignore the Century Bit */ | |
fe20ba70 | 123 | tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100; |
b485fe5e | 124 | return rtc_valid_tm(tm); |
caaff562 AN |
125 | } |
126 | ||
127 | /* Sets the given date and time to the real time clock. */ | |
128 | static int m41t80_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |
129 | { | |
130 | u8 wbuf[1 + M41T80_DATETIME_REG_SIZE]; | |
131 | u8 *buf = &wbuf[1]; | |
132 | u8 dt_addr[1] = { M41T80_REG_SEC }; | |
133 | struct i2c_msg msgs_in[] = { | |
134 | { | |
135 | .addr = client->addr, | |
136 | .flags = 0, | |
137 | .len = 1, | |
138 | .buf = dt_addr, | |
139 | }, | |
140 | { | |
141 | .addr = client->addr, | |
142 | .flags = I2C_M_RD, | |
143 | .len = M41T80_DATETIME_REG_SIZE - M41T80_REG_SEC, | |
144 | .buf = buf + M41T80_REG_SEC, | |
145 | }, | |
146 | }; | |
147 | struct i2c_msg msgs[] = { | |
148 | { | |
149 | .addr = client->addr, | |
150 | .flags = 0, | |
151 | .len = 1 + M41T80_DATETIME_REG_SIZE, | |
152 | .buf = wbuf, | |
153 | }, | |
154 | }; | |
155 | ||
156 | /* Read current reg values into buf[1..7] */ | |
157 | if (i2c_transfer(client->adapter, msgs_in, 2) < 0) { | |
158 | dev_err(&client->dev, "read error\n"); | |
159 | return -EIO; | |
160 | } | |
161 | ||
162 | wbuf[0] = 0; /* offset into rtc's regs */ | |
163 | /* Merge time-data and register flags into buf[0..7] */ | |
164 | buf[M41T80_REG_SSEC] = 0; | |
165 | buf[M41T80_REG_SEC] = | |
fe20ba70 | 166 | bin2bcd(tm->tm_sec) | (buf[M41T80_REG_SEC] & ~0x7f); |
caaff562 | 167 | buf[M41T80_REG_MIN] = |
fe20ba70 | 168 | bin2bcd(tm->tm_min) | (buf[M41T80_REG_MIN] & ~0x7f); |
caaff562 | 169 | buf[M41T80_REG_HOUR] = |
e46527d2 | 170 | bin2bcd(tm->tm_hour) | (buf[M41T80_REG_HOUR] & ~0x3f); |
caaff562 AN |
171 | buf[M41T80_REG_WDAY] = |
172 | (tm->tm_wday & 0x07) | (buf[M41T80_REG_WDAY] & ~0x07); | |
173 | buf[M41T80_REG_DAY] = | |
fe20ba70 | 174 | bin2bcd(tm->tm_mday) | (buf[M41T80_REG_DAY] & ~0x3f); |
caaff562 | 175 | buf[M41T80_REG_MON] = |
fe20ba70 | 176 | bin2bcd(tm->tm_mon + 1) | (buf[M41T80_REG_MON] & ~0x1f); |
caaff562 | 177 | /* assume 20YY not 19YY */ |
fe20ba70 | 178 | buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year % 100); |
caaff562 AN |
179 | |
180 | if (i2c_transfer(client->adapter, msgs, 1) != 1) { | |
181 | dev_err(&client->dev, "write error\n"); | |
182 | return -EIO; | |
183 | } | |
184 | return 0; | |
185 | } | |
186 | ||
187 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) | |
188 | static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq) | |
189 | { | |
190 | struct i2c_client *client = to_i2c_client(dev); | |
191 | struct m41t80_data *clientdata = i2c_get_clientdata(client); | |
192 | u8 reg; | |
193 | ||
3760f736 | 194 | if (clientdata->features & M41T80_FEATURE_BL) { |
caaff562 AN |
195 | reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); |
196 | seq_printf(seq, "battery\t\t: %s\n", | |
197 | (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok"); | |
198 | } | |
199 | return 0; | |
200 | } | |
201 | #else | |
202 | #define m41t80_rtc_proc NULL | |
203 | #endif | |
204 | ||
205 | static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
206 | { | |
207 | return m41t80_get_datetime(to_i2c_client(dev), tm); | |
208 | } | |
209 | ||
210 | static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
211 | { | |
212 | return m41t80_set_datetime(to_i2c_client(dev), tm); | |
213 | } | |
214 | ||
48e97667 PB |
215 | /* |
216 | * XXX - m41t80 alarm functionality is reported broken. | |
217 | * until it is fixed, don't register alarm functions. | |
218 | */ | |
caaff562 AN |
219 | static struct rtc_class_ops m41t80_rtc_ops = { |
220 | .read_time = m41t80_rtc_read_time, | |
221 | .set_time = m41t80_rtc_set_time, | |
caaff562 | 222 | .proc = m41t80_rtc_proc, |
caaff562 AN |
223 | }; |
224 | ||
225 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) | |
226 | static ssize_t m41t80_sysfs_show_flags(struct device *dev, | |
227 | struct device_attribute *attr, char *buf) | |
228 | { | |
229 | struct i2c_client *client = to_i2c_client(dev); | |
230 | int val; | |
231 | ||
232 | val = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
233 | if (val < 0) | |
85d77047 | 234 | return val; |
caaff562 AN |
235 | return sprintf(buf, "%#x\n", val); |
236 | } | |
237 | static DEVICE_ATTR(flags, S_IRUGO, m41t80_sysfs_show_flags, NULL); | |
238 | ||
239 | static ssize_t m41t80_sysfs_show_sqwfreq(struct device *dev, | |
240 | struct device_attribute *attr, char *buf) | |
241 | { | |
242 | struct i2c_client *client = to_i2c_client(dev); | |
d3a126fc | 243 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
f30281f4 | 244 | int val, reg_sqw; |
caaff562 | 245 | |
d3a126fc SF |
246 | if (!(clientdata->features & M41T80_FEATURE_SQ)) |
247 | return -EINVAL; | |
248 | ||
f30281f4 DG |
249 | reg_sqw = M41T80_REG_SQW; |
250 | if (clientdata->features & M41T80_FEATURE_SQ_ALT) | |
251 | reg_sqw = M41T80_REG_WDAY; | |
252 | val = i2c_smbus_read_byte_data(client, reg_sqw); | |
caaff562 | 253 | if (val < 0) |
85d77047 | 254 | return val; |
caaff562 AN |
255 | val = (val >> 4) & 0xf; |
256 | switch (val) { | |
257 | case 0: | |
258 | break; | |
259 | case 1: | |
260 | val = 32768; | |
261 | break; | |
262 | default: | |
263 | val = 32768 >> val; | |
264 | } | |
265 | return sprintf(buf, "%d\n", val); | |
266 | } | |
267 | static ssize_t m41t80_sysfs_set_sqwfreq(struct device *dev, | |
268 | struct device_attribute *attr, | |
269 | const char *buf, size_t count) | |
270 | { | |
271 | struct i2c_client *client = to_i2c_client(dev); | |
d3a126fc | 272 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
85d77047 | 273 | int almon, sqw, reg_sqw, rc; |
caaff562 AN |
274 | int val = simple_strtoul(buf, NULL, 0); |
275 | ||
d3a126fc SF |
276 | if (!(clientdata->features & M41T80_FEATURE_SQ)) |
277 | return -EINVAL; | |
278 | ||
caaff562 AN |
279 | if (val) { |
280 | if (!is_power_of_2(val)) | |
281 | return -EINVAL; | |
282 | val = ilog2(val); | |
283 | if (val == 15) | |
284 | val = 1; | |
285 | else if (val < 14) | |
286 | val = 15 - val; | |
287 | else | |
288 | return -EINVAL; | |
289 | } | |
290 | /* disable SQW, set SQW frequency & re-enable */ | |
291 | almon = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | |
292 | if (almon < 0) | |
85d77047 | 293 | return almon; |
f30281f4 DG |
294 | reg_sqw = M41T80_REG_SQW; |
295 | if (clientdata->features & M41T80_FEATURE_SQ_ALT) | |
296 | reg_sqw = M41T80_REG_WDAY; | |
297 | sqw = i2c_smbus_read_byte_data(client, reg_sqw); | |
caaff562 | 298 | if (sqw < 0) |
85d77047 | 299 | return sqw; |
caaff562 | 300 | sqw = (sqw & 0x0f) | (val << 4); |
85d77047 WS |
301 | |
302 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
303 | almon & ~M41T80_ALMON_SQWE); | |
304 | if (rc < 0) | |
305 | return rc; | |
306 | ||
307 | if (val) { | |
308 | rc = i2c_smbus_write_byte_data(client, reg_sqw, sqw); | |
309 | if (rc < 0) | |
310 | return rc; | |
311 | ||
312 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
313 | almon | M41T80_ALMON_SQWE); | |
314 | if (rc <0) | |
315 | return rc; | |
316 | } | |
caaff562 AN |
317 | return count; |
318 | } | |
319 | static DEVICE_ATTR(sqwfreq, S_IRUGO | S_IWUSR, | |
320 | m41t80_sysfs_show_sqwfreq, m41t80_sysfs_set_sqwfreq); | |
321 | ||
322 | static struct attribute *attrs[] = { | |
323 | &dev_attr_flags.attr, | |
324 | &dev_attr_sqwfreq.attr, | |
325 | NULL, | |
326 | }; | |
327 | static struct attribute_group attr_group = { | |
328 | .attrs = attrs, | |
329 | }; | |
330 | ||
331 | static int m41t80_sysfs_register(struct device *dev) | |
332 | { | |
333 | return sysfs_create_group(&dev->kobj, &attr_group); | |
334 | } | |
335 | #else | |
336 | static int m41t80_sysfs_register(struct device *dev) | |
337 | { | |
338 | return 0; | |
339 | } | |
340 | #endif | |
341 | ||
617780d2 AN |
342 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
343 | /* | |
344 | ***************************************************************************** | |
345 | * | |
346 | * Watchdog Driver | |
347 | * | |
348 | ***************************************************************************** | |
349 | */ | |
350 | static struct i2c_client *save_client; | |
351 | ||
352 | /* Default margin */ | |
353 | #define WD_TIMO 60 /* 1..31 seconds */ | |
354 | ||
355 | static int wdt_margin = WD_TIMO; | |
356 | module_param(wdt_margin, int, 0); | |
357 | MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)"); | |
358 | ||
359 | static unsigned long wdt_is_open; | |
360 | static int boot_flag; | |
361 | ||
362 | /** | |
363 | * wdt_ping: | |
364 | * | |
365 | * Reload counter one with the watchdog timeout. We don't bother reloading | |
366 | * the cascade counter. | |
367 | */ | |
368 | static void wdt_ping(void) | |
369 | { | |
370 | unsigned char i2c_data[2]; | |
371 | struct i2c_msg msgs1[1] = { | |
372 | { | |
373 | .addr = save_client->addr, | |
374 | .flags = 0, | |
375 | .len = 2, | |
376 | .buf = i2c_data, | |
377 | }, | |
378 | }; | |
d3a126fc SF |
379 | struct m41t80_data *clientdata = i2c_get_clientdata(save_client); |
380 | ||
617780d2 AN |
381 | i2c_data[0] = 0x09; /* watchdog register */ |
382 | ||
383 | if (wdt_margin > 31) | |
384 | i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */ | |
385 | else | |
386 | /* | |
387 | * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02) | |
388 | */ | |
389 | i2c_data[1] = wdt_margin<<2 | 0x82; | |
390 | ||
d3a126fc SF |
391 | /* |
392 | * M41T65 has three bits for watchdog resolution. Don't set bit 7, as | |
393 | * that would be an invalid resolution. | |
394 | */ | |
395 | if (clientdata->features & M41T80_FEATURE_WD) | |
396 | i2c_data[1] &= ~M41T80_WATCHDOG_RB2; | |
397 | ||
617780d2 AN |
398 | i2c_transfer(save_client->adapter, msgs1, 1); |
399 | } | |
400 | ||
401 | /** | |
402 | * wdt_disable: | |
403 | * | |
404 | * disables watchdog. | |
405 | */ | |
406 | static void wdt_disable(void) | |
407 | { | |
408 | unsigned char i2c_data[2], i2c_buf[0x10]; | |
409 | struct i2c_msg msgs0[2] = { | |
410 | { | |
411 | .addr = save_client->addr, | |
412 | .flags = 0, | |
413 | .len = 1, | |
414 | .buf = i2c_data, | |
415 | }, | |
416 | { | |
417 | .addr = save_client->addr, | |
418 | .flags = I2C_M_RD, | |
419 | .len = 1, | |
420 | .buf = i2c_buf, | |
421 | }, | |
422 | }; | |
423 | struct i2c_msg msgs1[1] = { | |
424 | { | |
425 | .addr = save_client->addr, | |
426 | .flags = 0, | |
427 | .len = 2, | |
428 | .buf = i2c_data, | |
429 | }, | |
430 | }; | |
431 | ||
432 | i2c_data[0] = 0x09; | |
433 | i2c_transfer(save_client->adapter, msgs0, 2); | |
434 | ||
435 | i2c_data[0] = 0x09; | |
436 | i2c_data[1] = 0x00; | |
437 | i2c_transfer(save_client->adapter, msgs1, 1); | |
438 | } | |
439 | ||
440 | /** | |
441 | * wdt_write: | |
442 | * @file: file handle to the watchdog | |
443 | * @buf: buffer to write (unused as data does not matter here | |
444 | * @count: count of bytes | |
445 | * @ppos: pointer to the position to write. No seeks allowed | |
446 | * | |
447 | * A write to a watchdog device is defined as a keepalive signal. Any | |
448 | * write of data will do, as we we don't define content meaning. | |
449 | */ | |
450 | static ssize_t wdt_write(struct file *file, const char __user *buf, | |
451 | size_t count, loff_t *ppos) | |
452 | { | |
617780d2 AN |
453 | if (count) { |
454 | wdt_ping(); | |
455 | return 1; | |
456 | } | |
457 | return 0; | |
458 | } | |
459 | ||
460 | static ssize_t wdt_read(struct file *file, char __user *buf, | |
461 | size_t count, loff_t *ppos) | |
462 | { | |
463 | return 0; | |
464 | } | |
465 | ||
466 | /** | |
467 | * wdt_ioctl: | |
468 | * @inode: inode of the device | |
469 | * @file: file handle to the device | |
470 | * @cmd: watchdog command | |
471 | * @arg: argument pointer | |
472 | * | |
473 | * The watchdog API defines a common set of functions for all watchdogs | |
474 | * according to their available features. We only actually usefully support | |
475 | * querying capabilities and current status. | |
476 | */ | |
55929332 | 477 | static int wdt_ioctl(struct file *file, unsigned int cmd, |
617780d2 AN |
478 | unsigned long arg) |
479 | { | |
480 | int new_margin, rv; | |
481 | static struct watchdog_info ident = { | |
482 | .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING | | |
483 | WDIOF_SETTIMEOUT, | |
484 | .firmware_version = 1, | |
485 | .identity = "M41T80 WTD" | |
486 | }; | |
487 | ||
488 | switch (cmd) { | |
489 | case WDIOC_GETSUPPORT: | |
490 | return copy_to_user((struct watchdog_info __user *)arg, &ident, | |
491 | sizeof(ident)) ? -EFAULT : 0; | |
492 | ||
493 | case WDIOC_GETSTATUS: | |
494 | case WDIOC_GETBOOTSTATUS: | |
495 | return put_user(boot_flag, (int __user *)arg); | |
496 | case WDIOC_KEEPALIVE: | |
497 | wdt_ping(); | |
498 | return 0; | |
499 | case WDIOC_SETTIMEOUT: | |
500 | if (get_user(new_margin, (int __user *)arg)) | |
501 | return -EFAULT; | |
502 | /* Arbitrary, can't find the card's limits */ | |
503 | if (new_margin < 1 || new_margin > 124) | |
504 | return -EINVAL; | |
505 | wdt_margin = new_margin; | |
506 | wdt_ping(); | |
507 | /* Fall */ | |
508 | case WDIOC_GETTIMEOUT: | |
509 | return put_user(wdt_margin, (int __user *)arg); | |
510 | ||
511 | case WDIOC_SETOPTIONS: | |
512 | if (copy_from_user(&rv, (int __user *)arg, sizeof(int))) | |
513 | return -EFAULT; | |
514 | ||
515 | if (rv & WDIOS_DISABLECARD) { | |
4c228db0 | 516 | pr_info("rtc-m41t80: disable watchdog\n"); |
617780d2 AN |
517 | wdt_disable(); |
518 | } | |
519 | ||
520 | if (rv & WDIOS_ENABLECARD) { | |
4c228db0 | 521 | pr_info("rtc-m41t80: enable watchdog\n"); |
617780d2 AN |
522 | wdt_ping(); |
523 | } | |
524 | ||
525 | return -EINVAL; | |
526 | } | |
527 | return -ENOTTY; | |
528 | } | |
529 | ||
55929332 AB |
530 | static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd, |
531 | unsigned long arg) | |
532 | { | |
533 | int ret; | |
534 | ||
613655fa | 535 | mutex_lock(&m41t80_rtc_mutex); |
55929332 | 536 | ret = wdt_ioctl(file, cmd, arg); |
613655fa | 537 | mutex_unlock(&m41t80_rtc_mutex); |
55929332 AB |
538 | |
539 | return ret; | |
540 | } | |
541 | ||
617780d2 AN |
542 | /** |
543 | * wdt_open: | |
544 | * @inode: inode of device | |
545 | * @file: file handle to device | |
546 | * | |
547 | */ | |
548 | static int wdt_open(struct inode *inode, struct file *file) | |
549 | { | |
550 | if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) { | |
613655fa | 551 | mutex_lock(&m41t80_rtc_mutex); |
41012735 | 552 | if (test_and_set_bit(0, &wdt_is_open)) { |
613655fa | 553 | mutex_unlock(&m41t80_rtc_mutex); |
617780d2 | 554 | return -EBUSY; |
41012735 | 555 | } |
617780d2 AN |
556 | /* |
557 | * Activate | |
558 | */ | |
559 | wdt_is_open = 1; | |
613655fa | 560 | mutex_unlock(&m41t80_rtc_mutex); |
09eeb1f5 | 561 | return nonseekable_open(inode, file); |
617780d2 AN |
562 | } |
563 | return -ENODEV; | |
564 | } | |
565 | ||
566 | /** | |
567 | * wdt_close: | |
568 | * @inode: inode to board | |
569 | * @file: file handle to board | |
570 | * | |
571 | */ | |
572 | static int wdt_release(struct inode *inode, struct file *file) | |
573 | { | |
574 | if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) | |
575 | clear_bit(0, &wdt_is_open); | |
576 | return 0; | |
577 | } | |
578 | ||
579 | /** | |
580 | * notify_sys: | |
581 | * @this: our notifier block | |
582 | * @code: the event being reported | |
583 | * @unused: unused | |
584 | * | |
585 | * Our notifier is called on system shutdowns. We want to turn the card | |
586 | * off at reboot otherwise the machine will reboot again during memory | |
587 | * test or worse yet during the following fsck. This would suck, in fact | |
588 | * trust me - if it happens it does suck. | |
589 | */ | |
590 | static int wdt_notify_sys(struct notifier_block *this, unsigned long code, | |
591 | void *unused) | |
592 | { | |
593 | if (code == SYS_DOWN || code == SYS_HALT) | |
594 | /* Disable Watchdog */ | |
595 | wdt_disable(); | |
596 | return NOTIFY_DONE; | |
597 | } | |
598 | ||
599 | static const struct file_operations wdt_fops = { | |
600 | .owner = THIS_MODULE, | |
601 | .read = wdt_read, | |
55929332 | 602 | .unlocked_ioctl = wdt_unlocked_ioctl, |
617780d2 AN |
603 | .write = wdt_write, |
604 | .open = wdt_open, | |
605 | .release = wdt_release, | |
6038f373 | 606 | .llseek = no_llseek, |
617780d2 AN |
607 | }; |
608 | ||
609 | static struct miscdevice wdt_dev = { | |
610 | .minor = WATCHDOG_MINOR, | |
611 | .name = "watchdog", | |
612 | .fops = &wdt_fops, | |
613 | }; | |
614 | ||
615 | /* | |
616 | * The WDT card needs to learn about soft shutdowns in order to | |
617 | * turn the timebomb registers off. | |
618 | */ | |
619 | static struct notifier_block wdt_notifier = { | |
620 | .notifier_call = wdt_notify_sys, | |
621 | }; | |
622 | #endif /* CONFIG_RTC_DRV_M41T80_WDT */ | |
623 | ||
caaff562 AN |
624 | /* |
625 | ***************************************************************************** | |
626 | * | |
627 | * Driver Interface | |
628 | * | |
629 | ***************************************************************************** | |
630 | */ | |
d2653e92 JD |
631 | static int m41t80_probe(struct i2c_client *client, |
632 | const struct i2c_device_id *id) | |
caaff562 | 633 | { |
3760f736 | 634 | int rc = 0; |
caaff562 AN |
635 | struct rtc_device *rtc = NULL; |
636 | struct rtc_time tm; | |
caaff562 AN |
637 | struct m41t80_data *clientdata = NULL; |
638 | ||
639 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C | |
c67fedfa WS |
640 | | I2C_FUNC_SMBUS_BYTE_DATA)) |
641 | return -ENODEV; | |
caaff562 | 642 | |
4ebabb78 JH |
643 | clientdata = devm_kzalloc(&client->dev, sizeof(*clientdata), |
644 | GFP_KERNEL); | |
c67fedfa WS |
645 | if (!clientdata) |
646 | return -ENOMEM; | |
caaff562 | 647 | |
a015dbc1 JS |
648 | clientdata->features = id->driver_data; |
649 | i2c_set_clientdata(client, clientdata); | |
650 | ||
4ebabb78 JH |
651 | rtc = devm_rtc_device_register(&client->dev, client->name, |
652 | &m41t80_rtc_ops, THIS_MODULE); | |
c67fedfa WS |
653 | if (IS_ERR(rtc)) |
654 | return PTR_ERR(rtc); | |
caaff562 AN |
655 | |
656 | clientdata->rtc = rtc; | |
caaff562 AN |
657 | |
658 | /* Make sure HT (Halt Update) bit is cleared */ | |
659 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR); | |
caaff562 | 660 | |
c67fedfa | 661 | if (rc >= 0 && rc & M41T80_ALHOUR_HT) { |
3760f736 | 662 | if (clientdata->features & M41T80_FEATURE_HT) { |
caaff562 AN |
663 | m41t80_get_datetime(client, &tm); |
664 | dev_info(&client->dev, "HT bit was set!\n"); | |
665 | dev_info(&client->dev, | |
666 | "Power Down at " | |
667 | "%04i-%02i-%02i %02i:%02i:%02i\n", | |
668 | tm.tm_year + 1900, | |
669 | tm.tm_mon + 1, tm.tm_mday, tm.tm_hour, | |
670 | tm.tm_min, tm.tm_sec); | |
671 | } | |
c67fedfa WS |
672 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR, |
673 | rc & ~M41T80_ALHOUR_HT); | |
674 | } | |
675 | ||
676 | if (rc < 0) { | |
677 | dev_err(&client->dev, "Can't clear HT bit\n"); | |
85d77047 | 678 | return rc; |
caaff562 AN |
679 | } |
680 | ||
681 | /* Make sure ST (stop) bit is cleared */ | |
682 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC); | |
caaff562 | 683 | |
c67fedfa WS |
684 | if (rc >= 0 && rc & M41T80_SEC_ST) |
685 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, | |
686 | rc & ~M41T80_SEC_ST); | |
687 | if (rc < 0) { | |
688 | dev_err(&client->dev, "Can't clear ST bit\n"); | |
85d77047 | 689 | return rc; |
caaff562 AN |
690 | } |
691 | ||
692 | rc = m41t80_sysfs_register(&client->dev); | |
693 | if (rc) | |
c67fedfa | 694 | return rc; |
caaff562 | 695 | |
617780d2 | 696 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
3760f736 | 697 | if (clientdata->features & M41T80_FEATURE_HT) { |
417607d0 | 698 | save_client = client; |
617780d2 AN |
699 | rc = misc_register(&wdt_dev); |
700 | if (rc) | |
c67fedfa | 701 | return rc; |
617780d2 AN |
702 | rc = register_reboot_notifier(&wdt_notifier); |
703 | if (rc) { | |
704 | misc_deregister(&wdt_dev); | |
c67fedfa | 705 | return rc; |
617780d2 | 706 | } |
617780d2 AN |
707 | } |
708 | #endif | |
caaff562 | 709 | return 0; |
caaff562 AN |
710 | } |
711 | ||
712 | static int m41t80_remove(struct i2c_client *client) | |
713 | { | |
4ebabb78 | 714 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
caaff562 | 715 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
caaff562 | 716 | |
3760f736 | 717 | if (clientdata->features & M41T80_FEATURE_HT) { |
617780d2 AN |
718 | misc_deregister(&wdt_dev); |
719 | unregister_reboot_notifier(&wdt_notifier); | |
720 | } | |
721 | #endif | |
caaff562 AN |
722 | |
723 | return 0; | |
724 | } | |
725 | ||
726 | static struct i2c_driver m41t80_driver = { | |
727 | .driver = { | |
afe1ab4d | 728 | .name = "rtc-m41t80", |
caaff562 AN |
729 | }, |
730 | .probe = m41t80_probe, | |
731 | .remove = m41t80_remove, | |
3760f736 | 732 | .id_table = m41t80_id, |
caaff562 AN |
733 | }; |
734 | ||
0abc9201 | 735 | module_i2c_driver(m41t80_driver); |
caaff562 AN |
736 | |
737 | MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>"); | |
738 | MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver"); | |
739 | MODULE_LICENSE("GPL"); |