Commit | Line | Data |
---|---|---|
7e56a7dc HVR |
1 | /* |
2 | * Intersil ISL1208 rtc class driver | |
3 | * | |
4 | * Copyright 2005,2006 Hebert Valerio Riedel <hvr@gnu.org> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; either version 2 of the License, or (at your | |
9 | * option) any later version. | |
10 | * | |
11 | */ | |
12 | ||
7e56a7dc | 13 | #include <linux/bcd.h> |
4b3a6a3a AB |
14 | #include <linux/i2c.h> |
15 | #include <linux/module.h> | |
9ece7cd8 | 16 | #include <linux/of_irq.h> |
4b3a6a3a | 17 | #include <linux/rtc.h> |
7e56a7dc | 18 | |
7e56a7dc HVR |
19 | /* Register map */ |
20 | /* rtc section */ | |
21 | #define ISL1208_REG_SC 0x00 | |
22 | #define ISL1208_REG_MN 0x01 | |
23 | #define ISL1208_REG_HR 0x02 | |
9edae7bc AZ |
24 | #define ISL1208_REG_HR_MIL (1<<7) /* 24h/12h mode */ |
25 | #define ISL1208_REG_HR_PM (1<<5) /* PM/AM bit in 12h mode */ | |
7e56a7dc HVR |
26 | #define ISL1208_REG_DT 0x03 |
27 | #define ISL1208_REG_MO 0x04 | |
28 | #define ISL1208_REG_YR 0x05 | |
29 | #define ISL1208_REG_DW 0x06 | |
30 | #define ISL1208_RTC_SECTION_LEN 7 | |
31 | ||
32 | /* control/status section */ | |
33 | #define ISL1208_REG_SR 0x07 | |
9edae7bc AZ |
34 | #define ISL1208_REG_SR_ARST (1<<7) /* auto reset */ |
35 | #define ISL1208_REG_SR_XTOSCB (1<<6) /* crystal oscillator */ | |
36 | #define ISL1208_REG_SR_WRTC (1<<4) /* write rtc */ | |
dd35bdb0 | 37 | #define ISL1208_REG_SR_EVT (1<<3) /* event */ |
9edae7bc AZ |
38 | #define ISL1208_REG_SR_ALM (1<<2) /* alarm */ |
39 | #define ISL1208_REG_SR_BAT (1<<1) /* battery */ | |
40 | #define ISL1208_REG_SR_RTCF (1<<0) /* rtc fail */ | |
7e56a7dc | 41 | #define ISL1208_REG_INT 0x08 |
cf044f0e RM |
42 | #define ISL1208_REG_INT_ALME (1<<6) /* alarm enable */ |
43 | #define ISL1208_REG_INT_IM (1<<7) /* interrupt/alarm mode */ | |
dd35bdb0 MG |
44 | #define ISL1219_REG_EV 0x09 |
45 | #define ISL1219_REG_EV_EVEN (1<<4) /* event detection enable */ | |
cfa30622 | 46 | #define ISL1219_REG_EV_EVIENB (1<<7) /* event in pull-up disable */ |
7e56a7dc HVR |
47 | #define ISL1208_REG_ATR 0x0a |
48 | #define ISL1208_REG_DTR 0x0b | |
49 | ||
50 | /* alarm section */ | |
51 | #define ISL1208_REG_SCA 0x0c | |
52 | #define ISL1208_REG_MNA 0x0d | |
53 | #define ISL1208_REG_HRA 0x0e | |
54 | #define ISL1208_REG_DTA 0x0f | |
55 | #define ISL1208_REG_MOA 0x10 | |
56 | #define ISL1208_REG_DWA 0x11 | |
57 | #define ISL1208_ALARM_SECTION_LEN 6 | |
58 | ||
59 | /* user section */ | |
60 | #define ISL1208_REG_USR1 0x12 | |
61 | #define ISL1208_REG_USR2 0x13 | |
62 | #define ISL1208_USR_SECTION_LEN 2 | |
63 | ||
dd35bdb0 MG |
64 | /* event section */ |
65 | #define ISL1219_REG_SCT 0x14 | |
66 | #define ISL1219_REG_MNT 0x15 | |
67 | #define ISL1219_REG_HRT 0x16 | |
68 | #define ISL1219_REG_DTT 0x17 | |
69 | #define ISL1219_REG_MOT 0x18 | |
70 | #define ISL1219_REG_YRT 0x19 | |
71 | #define ISL1219_EVT_SECTION_LEN 6 | |
72 | ||
9edae7bc | 73 | static struct i2c_driver isl1208_driver; |
7e56a7dc | 74 | |
dd35bdb0 MG |
75 | /* ISL1208 various variants */ |
76 | enum { | |
77 | TYPE_ISL1208 = 0, | |
78 | TYPE_ISL1218, | |
79 | TYPE_ISL1219, | |
80 | }; | |
81 | ||
7e56a7dc HVR |
82 | /* block read */ |
83 | static int | |
84 | isl1208_i2c_read_regs(struct i2c_client *client, u8 reg, u8 buf[], | |
9edae7bc | 85 | unsigned len) |
7e56a7dc | 86 | { |
7e56a7dc HVR |
87 | int ret; |
88 | ||
dd35bdb0 MG |
89 | WARN_ON(reg > ISL1219_REG_YRT); |
90 | WARN_ON(reg + len > ISL1219_REG_YRT + 1); | |
7e56a7dc | 91 | |
facc23b8 TP |
92 | ret = i2c_smbus_read_i2c_block_data(client, reg, len, buf); |
93 | return (ret < 0) ? ret : 0; | |
7e56a7dc HVR |
94 | } |
95 | ||
96 | /* block write */ | |
97 | static int | |
98 | isl1208_i2c_set_regs(struct i2c_client *client, u8 reg, u8 const buf[], | |
9edae7bc | 99 | unsigned len) |
7e56a7dc | 100 | { |
7e56a7dc HVR |
101 | int ret; |
102 | ||
dd35bdb0 MG |
103 | WARN_ON(reg > ISL1219_REG_YRT); |
104 | WARN_ON(reg + len > ISL1219_REG_YRT + 1); | |
7e56a7dc | 105 | |
facc23b8 TP |
106 | ret = i2c_smbus_write_i2c_block_data(client, reg, len, buf); |
107 | return (ret < 0) ? ret : 0; | |
7e56a7dc HVR |
108 | } |
109 | ||
48fc7f7e | 110 | /* simple check to see whether we have a isl1208 */ |
9edae7bc AZ |
111 | static int |
112 | isl1208_i2c_validate_client(struct i2c_client *client) | |
7e56a7dc HVR |
113 | { |
114 | u8 regs[ISL1208_RTC_SECTION_LEN] = { 0, }; | |
115 | u8 zero_mask[ISL1208_RTC_SECTION_LEN] = { | |
116 | 0x80, 0x80, 0x40, 0xc0, 0xe0, 0x00, 0xf8 | |
117 | }; | |
118 | int i; | |
119 | int ret; | |
120 | ||
121 | ret = isl1208_i2c_read_regs(client, 0, regs, ISL1208_RTC_SECTION_LEN); | |
122 | if (ret < 0) | |
123 | return ret; | |
124 | ||
125 | for (i = 0; i < ISL1208_RTC_SECTION_LEN; ++i) { | |
9edae7bc | 126 | if (regs[i] & zero_mask[i]) /* check if bits are cleared */ |
7e56a7dc HVR |
127 | return -ENODEV; |
128 | } | |
129 | ||
130 | return 0; | |
131 | } | |
132 | ||
9edae7bc AZ |
133 | static int |
134 | isl1208_i2c_get_sr(struct i2c_client *client) | |
7e56a7dc | 135 | { |
c91fd91d | 136 | return i2c_smbus_read_byte_data(client, ISL1208_REG_SR); |
7e56a7dc HVR |
137 | } |
138 | ||
9edae7bc AZ |
139 | static int |
140 | isl1208_i2c_get_atr(struct i2c_client *client) | |
7e56a7dc HVR |
141 | { |
142 | int atr = i2c_smbus_read_byte_data(client, ISL1208_REG_ATR); | |
7e56a7dc | 143 | if (atr < 0) |
9edae7bc | 144 | return atr; |
7e56a7dc HVR |
145 | |
146 | /* The 6bit value in the ATR register controls the load | |
147 | * capacitance C_load * in steps of 0.25pF | |
148 | * | |
149 | * bit (1<<5) of the ATR register is inverted | |
150 | * | |
151 | * C_load(ATR=0x20) = 4.50pF | |
152 | * C_load(ATR=0x00) = 12.50pF | |
153 | * C_load(ATR=0x1f) = 20.25pF | |
154 | * | |
155 | */ | |
156 | ||
9edae7bc AZ |
157 | atr &= 0x3f; /* mask out lsb */ |
158 | atr ^= 1 << 5; /* invert 6th bit */ | |
159 | atr += 2 * 9; /* add offset of 4.5pF; unit[atr] = 0.25pF */ | |
7e56a7dc HVR |
160 | |
161 | return atr; | |
162 | } | |
163 | ||
9edae7bc AZ |
164 | static int |
165 | isl1208_i2c_get_dtr(struct i2c_client *client) | |
7e56a7dc HVR |
166 | { |
167 | int dtr = i2c_smbus_read_byte_data(client, ISL1208_REG_DTR); | |
7e56a7dc HVR |
168 | if (dtr < 0) |
169 | return -EIO; | |
170 | ||
171 | /* dtr encodes adjustments of {-60,-40,-20,0,20,40,60} ppm */ | |
9edae7bc | 172 | dtr = ((dtr & 0x3) * 20) * (dtr & (1 << 2) ? -1 : 1); |
7e56a7dc HVR |
173 | |
174 | return dtr; | |
175 | } | |
176 | ||
9edae7bc AZ |
177 | static int |
178 | isl1208_i2c_get_usr(struct i2c_client *client) | |
7e56a7dc HVR |
179 | { |
180 | u8 buf[ISL1208_USR_SECTION_LEN] = { 0, }; | |
181 | int ret; | |
182 | ||
9edae7bc AZ |
183 | ret = isl1208_i2c_read_regs(client, ISL1208_REG_USR1, buf, |
184 | ISL1208_USR_SECTION_LEN); | |
7e56a7dc HVR |
185 | if (ret < 0) |
186 | return ret; | |
187 | ||
188 | return (buf[1] << 8) | buf[0]; | |
189 | } | |
190 | ||
9edae7bc AZ |
191 | static int |
192 | isl1208_i2c_set_usr(struct i2c_client *client, u16 usr) | |
7e56a7dc HVR |
193 | { |
194 | u8 buf[ISL1208_USR_SECTION_LEN]; | |
195 | ||
196 | buf[0] = usr & 0xff; | |
197 | buf[1] = (usr >> 8) & 0xff; | |
198 | ||
9edae7bc AZ |
199 | return isl1208_i2c_set_regs(client, ISL1208_REG_USR1, buf, |
200 | ISL1208_USR_SECTION_LEN); | |
7e56a7dc HVR |
201 | } |
202 | ||
cf044f0e RM |
203 | static int |
204 | isl1208_rtc_toggle_alarm(struct i2c_client *client, int enable) | |
205 | { | |
206 | int icr = i2c_smbus_read_byte_data(client, ISL1208_REG_INT); | |
207 | ||
208 | if (icr < 0) { | |
209 | dev_err(&client->dev, "%s: reading INT failed\n", __func__); | |
210 | return icr; | |
211 | } | |
212 | ||
213 | if (enable) | |
214 | icr |= ISL1208_REG_INT_ALME | ISL1208_REG_INT_IM; | |
215 | else | |
216 | icr &= ~(ISL1208_REG_INT_ALME | ISL1208_REG_INT_IM); | |
217 | ||
218 | icr = i2c_smbus_write_byte_data(client, ISL1208_REG_INT, icr); | |
219 | if (icr < 0) { | |
220 | dev_err(&client->dev, "%s: writing INT failed\n", __func__); | |
221 | return icr; | |
222 | } | |
223 | ||
224 | return 0; | |
225 | } | |
226 | ||
9edae7bc AZ |
227 | static int |
228 | isl1208_rtc_proc(struct device *dev, struct seq_file *seq) | |
7e56a7dc HVR |
229 | { |
230 | struct i2c_client *const client = to_i2c_client(dev); | |
231 | int sr, dtr, atr, usr; | |
232 | ||
233 | sr = isl1208_i2c_get_sr(client); | |
234 | if (sr < 0) { | |
235 | dev_err(&client->dev, "%s: reading SR failed\n", __func__); | |
236 | return sr; | |
237 | } | |
238 | ||
239 | seq_printf(seq, "status_reg\t:%s%s%s%s%s%s (0x%.2x)\n", | |
240 | (sr & ISL1208_REG_SR_RTCF) ? " RTCF" : "", | |
241 | (sr & ISL1208_REG_SR_BAT) ? " BAT" : "", | |
242 | (sr & ISL1208_REG_SR_ALM) ? " ALM" : "", | |
243 | (sr & ISL1208_REG_SR_WRTC) ? " WRTC" : "", | |
244 | (sr & ISL1208_REG_SR_XTOSCB) ? " XTOSCB" : "", | |
9edae7bc | 245 | (sr & ISL1208_REG_SR_ARST) ? " ARST" : "", sr); |
7e56a7dc HVR |
246 | |
247 | seq_printf(seq, "batt_status\t: %s\n", | |
248 | (sr & ISL1208_REG_SR_RTCF) ? "bad" : "okay"); | |
249 | ||
250 | dtr = isl1208_i2c_get_dtr(client); | |
9edae7bc | 251 | if (dtr >= 0 - 1) |
7e56a7dc HVR |
252 | seq_printf(seq, "digital_trim\t: %d ppm\n", dtr); |
253 | ||
254 | atr = isl1208_i2c_get_atr(client); | |
255 | if (atr >= 0) | |
256 | seq_printf(seq, "analog_trim\t: %d.%.2d pF\n", | |
9edae7bc | 257 | atr >> 2, (atr & 0x3) * 25); |
7e56a7dc HVR |
258 | |
259 | usr = isl1208_i2c_get_usr(client); | |
260 | if (usr >= 0) | |
261 | seq_printf(seq, "user_data\t: 0x%.4x\n", usr); | |
262 | ||
263 | return 0; | |
264 | } | |
265 | ||
9edae7bc AZ |
266 | static int |
267 | isl1208_i2c_read_time(struct i2c_client *client, struct rtc_time *tm) | |
7e56a7dc HVR |
268 | { |
269 | int sr; | |
270 | u8 regs[ISL1208_RTC_SECTION_LEN] = { 0, }; | |
271 | ||
272 | sr = isl1208_i2c_get_sr(client); | |
273 | if (sr < 0) { | |
274 | dev_err(&client->dev, "%s: reading SR failed\n", __func__); | |
275 | return -EIO; | |
276 | } | |
277 | ||
278 | sr = isl1208_i2c_read_regs(client, 0, regs, ISL1208_RTC_SECTION_LEN); | |
279 | if (sr < 0) { | |
280 | dev_err(&client->dev, "%s: reading RTC section failed\n", | |
281 | __func__); | |
282 | return sr; | |
283 | } | |
284 | ||
fe20ba70 AB |
285 | tm->tm_sec = bcd2bin(regs[ISL1208_REG_SC]); |
286 | tm->tm_min = bcd2bin(regs[ISL1208_REG_MN]); | |
9edae7bc AZ |
287 | |
288 | /* HR field has a more complex interpretation */ | |
289 | { | |
7e56a7dc | 290 | const u8 _hr = regs[ISL1208_REG_HR]; |
9edae7bc | 291 | if (_hr & ISL1208_REG_HR_MIL) /* 24h format */ |
fe20ba70 | 292 | tm->tm_hour = bcd2bin(_hr & 0x3f); |
9edae7bc AZ |
293 | else { |
294 | /* 12h format */ | |
fe20ba70 | 295 | tm->tm_hour = bcd2bin(_hr & 0x1f); |
9edae7bc | 296 | if (_hr & ISL1208_REG_HR_PM) /* PM flag set */ |
7e56a7dc HVR |
297 | tm->tm_hour += 12; |
298 | } | |
299 | } | |
300 | ||
fe20ba70 AB |
301 | tm->tm_mday = bcd2bin(regs[ISL1208_REG_DT]); |
302 | tm->tm_mon = bcd2bin(regs[ISL1208_REG_MO]) - 1; /* rtc starts at 1 */ | |
303 | tm->tm_year = bcd2bin(regs[ISL1208_REG_YR]) + 100; | |
304 | tm->tm_wday = bcd2bin(regs[ISL1208_REG_DW]); | |
7e56a7dc HVR |
305 | |
306 | return 0; | |
307 | } | |
308 | ||
9edae7bc AZ |
309 | static int |
310 | isl1208_i2c_read_alarm(struct i2c_client *client, struct rtc_wkalrm *alarm) | |
7e56a7dc HVR |
311 | { |
312 | struct rtc_time *const tm = &alarm->time; | |
313 | u8 regs[ISL1208_ALARM_SECTION_LEN] = { 0, }; | |
cf044f0e | 314 | int icr, yr, sr = isl1208_i2c_get_sr(client); |
7e56a7dc | 315 | |
7e56a7dc HVR |
316 | if (sr < 0) { |
317 | dev_err(&client->dev, "%s: reading SR failed\n", __func__); | |
318 | return sr; | |
319 | } | |
320 | ||
321 | sr = isl1208_i2c_read_regs(client, ISL1208_REG_SCA, regs, | |
9edae7bc | 322 | ISL1208_ALARM_SECTION_LEN); |
7e56a7dc HVR |
323 | if (sr < 0) { |
324 | dev_err(&client->dev, "%s: reading alarm section failed\n", | |
325 | __func__); | |
326 | return sr; | |
327 | } | |
328 | ||
329 | /* MSB of each alarm register is an enable bit */ | |
fe20ba70 AB |
330 | tm->tm_sec = bcd2bin(regs[ISL1208_REG_SCA - ISL1208_REG_SCA] & 0x7f); |
331 | tm->tm_min = bcd2bin(regs[ISL1208_REG_MNA - ISL1208_REG_SCA] & 0x7f); | |
332 | tm->tm_hour = bcd2bin(regs[ISL1208_REG_HRA - ISL1208_REG_SCA] & 0x3f); | |
333 | tm->tm_mday = bcd2bin(regs[ISL1208_REG_DTA - ISL1208_REG_SCA] & 0x3f); | |
9edae7bc | 334 | tm->tm_mon = |
fe20ba70 AB |
335 | bcd2bin(regs[ISL1208_REG_MOA - ISL1208_REG_SCA] & 0x1f) - 1; |
336 | tm->tm_wday = bcd2bin(regs[ISL1208_REG_DWA - ISL1208_REG_SCA] & 0x03); | |
7e56a7dc | 337 | |
cf044f0e RM |
338 | /* The alarm doesn't store the year so get it from the rtc section */ |
339 | yr = i2c_smbus_read_byte_data(client, ISL1208_REG_YR); | |
340 | if (yr < 0) { | |
341 | dev_err(&client->dev, "%s: reading RTC YR failed\n", __func__); | |
342 | return yr; | |
343 | } | |
344 | tm->tm_year = bcd2bin(yr) + 100; | |
345 | ||
346 | icr = i2c_smbus_read_byte_data(client, ISL1208_REG_INT); | |
347 | if (icr < 0) { | |
348 | dev_err(&client->dev, "%s: reading INT failed\n", __func__); | |
349 | return icr; | |
350 | } | |
351 | alarm->enabled = !!(icr & ISL1208_REG_INT_ALME); | |
352 | ||
353 | return 0; | |
354 | } | |
355 | ||
356 | static int | |
357 | isl1208_i2c_set_alarm(struct i2c_client *client, struct rtc_wkalrm *alarm) | |
358 | { | |
359 | struct rtc_time *alarm_tm = &alarm->time; | |
360 | u8 regs[ISL1208_ALARM_SECTION_LEN] = { 0, }; | |
361 | const int offs = ISL1208_REG_SCA; | |
cf044f0e RM |
362 | struct rtc_time rtc_tm; |
363 | int err, enable; | |
364 | ||
365 | err = isl1208_i2c_read_time(client, &rtc_tm); | |
cf044f0e RM |
366 | if (err) |
367 | return err; | |
368 | ||
369 | /* If the alarm time is before the current time disable the alarm */ | |
f118db1e | 370 | if (!alarm->enabled || rtc_tm_sub(alarm_tm, &rtc_tm) <= 0) |
cf044f0e RM |
371 | enable = 0x00; |
372 | else | |
373 | enable = 0x80; | |
374 | ||
375 | /* Program the alarm and enable it for each setting */ | |
376 | regs[ISL1208_REG_SCA - offs] = bin2bcd(alarm_tm->tm_sec) | enable; | |
377 | regs[ISL1208_REG_MNA - offs] = bin2bcd(alarm_tm->tm_min) | enable; | |
378 | regs[ISL1208_REG_HRA - offs] = bin2bcd(alarm_tm->tm_hour) | | |
379 | ISL1208_REG_HR_MIL | enable; | |
380 | ||
381 | regs[ISL1208_REG_DTA - offs] = bin2bcd(alarm_tm->tm_mday) | enable; | |
382 | regs[ISL1208_REG_MOA - offs] = bin2bcd(alarm_tm->tm_mon + 1) | enable; | |
383 | regs[ISL1208_REG_DWA - offs] = bin2bcd(alarm_tm->tm_wday & 7) | enable; | |
384 | ||
385 | /* write ALARM registers */ | |
386 | err = isl1208_i2c_set_regs(client, offs, regs, | |
387 | ISL1208_ALARM_SECTION_LEN); | |
388 | if (err < 0) { | |
389 | dev_err(&client->dev, "%s: writing ALARM section failed\n", | |
390 | __func__); | |
391 | return err; | |
392 | } | |
393 | ||
394 | err = isl1208_rtc_toggle_alarm(client, enable); | |
395 | if (err) | |
396 | return err; | |
397 | ||
7e56a7dc HVR |
398 | return 0; |
399 | } | |
400 | ||
9edae7bc AZ |
401 | static int |
402 | isl1208_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
7e56a7dc HVR |
403 | { |
404 | return isl1208_i2c_read_time(to_i2c_client(dev), tm); | |
405 | } | |
406 | ||
9edae7bc AZ |
407 | static int |
408 | isl1208_i2c_set_time(struct i2c_client *client, struct rtc_time const *tm) | |
7e56a7dc HVR |
409 | { |
410 | int sr; | |
411 | u8 regs[ISL1208_RTC_SECTION_LEN] = { 0, }; | |
412 | ||
cc6c2ca3 CE |
413 | /* The clock has an 8 bit wide bcd-coded register (they never learn) |
414 | * for the year. tm_year is an offset from 1900 and we are interested | |
415 | * in the 2000-2099 range, so any value less than 100 is invalid. | |
416 | */ | |
417 | if (tm->tm_year < 100) | |
418 | return -EINVAL; | |
419 | ||
fe20ba70 AB |
420 | regs[ISL1208_REG_SC] = bin2bcd(tm->tm_sec); |
421 | regs[ISL1208_REG_MN] = bin2bcd(tm->tm_min); | |
422 | regs[ISL1208_REG_HR] = bin2bcd(tm->tm_hour) | ISL1208_REG_HR_MIL; | |
7e56a7dc | 423 | |
fe20ba70 AB |
424 | regs[ISL1208_REG_DT] = bin2bcd(tm->tm_mday); |
425 | regs[ISL1208_REG_MO] = bin2bcd(tm->tm_mon + 1); | |
426 | regs[ISL1208_REG_YR] = bin2bcd(tm->tm_year - 100); | |
7e56a7dc | 427 | |
fe20ba70 | 428 | regs[ISL1208_REG_DW] = bin2bcd(tm->tm_wday & 7); |
7e56a7dc HVR |
429 | |
430 | sr = isl1208_i2c_get_sr(client); | |
431 | if (sr < 0) { | |
432 | dev_err(&client->dev, "%s: reading SR failed\n", __func__); | |
433 | return sr; | |
434 | } | |
435 | ||
436 | /* set WRTC */ | |
9edae7bc | 437 | sr = i2c_smbus_write_byte_data(client, ISL1208_REG_SR, |
7e56a7dc HVR |
438 | sr | ISL1208_REG_SR_WRTC); |
439 | if (sr < 0) { | |
440 | dev_err(&client->dev, "%s: writing SR failed\n", __func__); | |
441 | return sr; | |
442 | } | |
443 | ||
444 | /* write RTC registers */ | |
445 | sr = isl1208_i2c_set_regs(client, 0, regs, ISL1208_RTC_SECTION_LEN); | |
446 | if (sr < 0) { | |
447 | dev_err(&client->dev, "%s: writing RTC section failed\n", | |
448 | __func__); | |
449 | return sr; | |
450 | } | |
451 | ||
452 | /* clear WRTC again */ | |
5b9fc795 DO |
453 | sr = isl1208_i2c_get_sr(client); |
454 | if (sr < 0) { | |
455 | dev_err(&client->dev, "%s: reading SR failed\n", __func__); | |
456 | return sr; | |
457 | } | |
9edae7bc | 458 | sr = i2c_smbus_write_byte_data(client, ISL1208_REG_SR, |
7e56a7dc HVR |
459 | sr & ~ISL1208_REG_SR_WRTC); |
460 | if (sr < 0) { | |
461 | dev_err(&client->dev, "%s: writing SR failed\n", __func__); | |
462 | return sr; | |
463 | } | |
464 | ||
465 | return 0; | |
466 | } | |
467 | ||
468 | ||
9edae7bc AZ |
469 | static int |
470 | isl1208_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
7e56a7dc HVR |
471 | { |
472 | return isl1208_i2c_set_time(to_i2c_client(dev), tm); | |
473 | } | |
474 | ||
9edae7bc AZ |
475 | static int |
476 | isl1208_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
7e56a7dc HVR |
477 | { |
478 | return isl1208_i2c_read_alarm(to_i2c_client(dev), alarm); | |
479 | } | |
480 | ||
cf044f0e RM |
481 | static int |
482 | isl1208_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
483 | { | |
484 | return isl1208_i2c_set_alarm(to_i2c_client(dev), alarm); | |
485 | } | |
486 | ||
dd35bdb0 MG |
487 | static ssize_t timestamp0_store(struct device *dev, |
488 | struct device_attribute *attr, | |
489 | const char *buf, size_t count) | |
490 | { | |
1b4c794f | 491 | struct i2c_client *client = to_i2c_client(dev->parent); |
dd35bdb0 MG |
492 | int sr; |
493 | ||
494 | sr = isl1208_i2c_get_sr(client); | |
495 | if (sr < 0) { | |
496 | dev_err(dev, "%s: reading SR failed\n", __func__); | |
497 | return sr; | |
498 | } | |
499 | ||
500 | sr &= ~ISL1208_REG_SR_EVT; | |
501 | ||
502 | sr = i2c_smbus_write_byte_data(client, ISL1208_REG_SR, sr); | |
503 | if (sr < 0) | |
504 | dev_err(dev, "%s: writing SR failed\n", | |
505 | __func__); | |
506 | ||
507 | return count; | |
508 | }; | |
509 | ||
510 | static ssize_t timestamp0_show(struct device *dev, | |
511 | struct device_attribute *attr, char *buf) | |
512 | { | |
1b4c794f | 513 | struct i2c_client *client = to_i2c_client(dev->parent); |
dd35bdb0 MG |
514 | u8 regs[ISL1219_EVT_SECTION_LEN] = { 0, }; |
515 | struct rtc_time tm; | |
516 | int sr; | |
517 | ||
518 | sr = isl1208_i2c_get_sr(client); | |
519 | if (sr < 0) { | |
520 | dev_err(dev, "%s: reading SR failed\n", __func__); | |
521 | return sr; | |
522 | } | |
523 | ||
524 | if (!(sr & ISL1208_REG_SR_EVT)) | |
525 | return 0; | |
526 | ||
527 | sr = isl1208_i2c_read_regs(client, ISL1219_REG_SCT, regs, | |
528 | ISL1219_EVT_SECTION_LEN); | |
529 | if (sr < 0) { | |
530 | dev_err(dev, "%s: reading event section failed\n", | |
531 | __func__); | |
532 | return 0; | |
533 | } | |
534 | ||
535 | /* MSB of each alarm register is an enable bit */ | |
536 | tm.tm_sec = bcd2bin(regs[ISL1219_REG_SCT - ISL1219_REG_SCT] & 0x7f); | |
537 | tm.tm_min = bcd2bin(regs[ISL1219_REG_MNT - ISL1219_REG_SCT] & 0x7f); | |
538 | tm.tm_hour = bcd2bin(regs[ISL1219_REG_HRT - ISL1219_REG_SCT] & 0x3f); | |
539 | tm.tm_mday = bcd2bin(regs[ISL1219_REG_DTT - ISL1219_REG_SCT] & 0x3f); | |
540 | tm.tm_mon = | |
541 | bcd2bin(regs[ISL1219_REG_MOT - ISL1219_REG_SCT] & 0x1f) - 1; | |
542 | tm.tm_year = bcd2bin(regs[ISL1219_REG_YRT - ISL1219_REG_SCT]) + 100; | |
543 | ||
544 | sr = rtc_valid_tm(&tm); | |
545 | if (sr) | |
546 | return sr; | |
547 | ||
548 | return sprintf(buf, "%llu\n", | |
549 | (unsigned long long)rtc_tm_to_time64(&tm)); | |
550 | }; | |
551 | ||
552 | static DEVICE_ATTR_RW(timestamp0); | |
553 | ||
cf044f0e RM |
554 | static irqreturn_t |
555 | isl1208_rtc_interrupt(int irq, void *data) | |
556 | { | |
557 | unsigned long timeout = jiffies + msecs_to_jiffies(1000); | |
558 | struct i2c_client *client = data; | |
72fca4a4 | 559 | struct rtc_device *rtc = i2c_get_clientdata(client); |
cf044f0e RM |
560 | int handled = 0, sr, err; |
561 | ||
562 | /* | |
563 | * I2C reads get NAK'ed if we read straight away after an interrupt? | |
564 | * Using a mdelay/msleep didn't seem to help either, so we work around | |
565 | * this by continually trying to read the register for a short time. | |
566 | */ | |
567 | while (1) { | |
568 | sr = isl1208_i2c_get_sr(client); | |
569 | if (sr >= 0) | |
570 | break; | |
571 | ||
572 | if (time_after(jiffies, timeout)) { | |
573 | dev_err(&client->dev, "%s: reading SR failed\n", | |
574 | __func__); | |
575 | return sr; | |
576 | } | |
577 | } | |
578 | ||
579 | if (sr & ISL1208_REG_SR_ALM) { | |
580 | dev_dbg(&client->dev, "alarm!\n"); | |
581 | ||
72fca4a4 JL |
582 | rtc_update_irq(rtc, 1, RTC_IRQF | RTC_AF); |
583 | ||
cf044f0e RM |
584 | /* Clear the alarm */ |
585 | sr &= ~ISL1208_REG_SR_ALM; | |
586 | sr = i2c_smbus_write_byte_data(client, ISL1208_REG_SR, sr); | |
587 | if (sr < 0) | |
588 | dev_err(&client->dev, "%s: writing SR failed\n", | |
589 | __func__); | |
590 | else | |
591 | handled = 1; | |
592 | ||
593 | /* Disable the alarm */ | |
594 | err = isl1208_rtc_toggle_alarm(client, 0); | |
595 | if (err) | |
596 | return err; | |
597 | } | |
598 | ||
dd35bdb0 MG |
599 | if (sr & ISL1208_REG_SR_EVT) { |
600 | sysfs_notify(&rtc->dev.kobj, NULL, | |
601 | dev_attr_timestamp0.attr.name); | |
602 | dev_warn(&client->dev, "event detected"); | |
603 | handled = 1; | |
604 | } | |
605 | ||
cf044f0e RM |
606 | return handled ? IRQ_HANDLED : IRQ_NONE; |
607 | } | |
608 | ||
ff8371ac | 609 | static const struct rtc_class_ops isl1208_rtc_ops = { |
9edae7bc AZ |
610 | .proc = isl1208_rtc_proc, |
611 | .read_time = isl1208_rtc_read_time, | |
612 | .set_time = isl1208_rtc_set_time, | |
613 | .read_alarm = isl1208_rtc_read_alarm, | |
cf044f0e | 614 | .set_alarm = isl1208_rtc_set_alarm, |
7e56a7dc HVR |
615 | }; |
616 | ||
617 | /* sysfs interface */ | |
618 | ||
9edae7bc AZ |
619 | static ssize_t |
620 | isl1208_sysfs_show_atrim(struct device *dev, | |
621 | struct device_attribute *attr, char *buf) | |
7e56a7dc | 622 | { |
1b4c794f | 623 | int atr = isl1208_i2c_get_atr(to_i2c_client(dev->parent)); |
7e56a7dc HVR |
624 | if (atr < 0) |
625 | return atr; | |
626 | ||
9edae7bc | 627 | return sprintf(buf, "%d.%.2d pF\n", atr >> 2, (atr & 0x3) * 25); |
7e56a7dc | 628 | } |
9edae7bc | 629 | |
7e56a7dc HVR |
630 | static DEVICE_ATTR(atrim, S_IRUGO, isl1208_sysfs_show_atrim, NULL); |
631 | ||
9edae7bc AZ |
632 | static ssize_t |
633 | isl1208_sysfs_show_dtrim(struct device *dev, | |
634 | struct device_attribute *attr, char *buf) | |
7e56a7dc | 635 | { |
1b4c794f | 636 | int dtr = isl1208_i2c_get_dtr(to_i2c_client(dev->parent)); |
7e56a7dc HVR |
637 | if (dtr < 0) |
638 | return dtr; | |
639 | ||
640 | return sprintf(buf, "%d ppm\n", dtr); | |
641 | } | |
9edae7bc | 642 | |
7e56a7dc HVR |
643 | static DEVICE_ATTR(dtrim, S_IRUGO, isl1208_sysfs_show_dtrim, NULL); |
644 | ||
9edae7bc AZ |
645 | static ssize_t |
646 | isl1208_sysfs_show_usr(struct device *dev, | |
647 | struct device_attribute *attr, char *buf) | |
7e56a7dc | 648 | { |
1b4c794f | 649 | int usr = isl1208_i2c_get_usr(to_i2c_client(dev->parent)); |
7e56a7dc HVR |
650 | if (usr < 0) |
651 | return usr; | |
652 | ||
653 | return sprintf(buf, "0x%.4x\n", usr); | |
654 | } | |
655 | ||
9edae7bc AZ |
656 | static ssize_t |
657 | isl1208_sysfs_store_usr(struct device *dev, | |
658 | struct device_attribute *attr, | |
659 | const char *buf, size_t count) | |
7e56a7dc HVR |
660 | { |
661 | int usr = -1; | |
662 | ||
663 | if (buf[0] == '0' && (buf[1] == 'x' || buf[1] == 'X')) { | |
664 | if (sscanf(buf, "%x", &usr) != 1) | |
665 | return -EINVAL; | |
666 | } else { | |
667 | if (sscanf(buf, "%d", &usr) != 1) | |
668 | return -EINVAL; | |
669 | } | |
670 | ||
671 | if (usr < 0 || usr > 0xffff) | |
672 | return -EINVAL; | |
673 | ||
1b4c794f AB |
674 | if (isl1208_i2c_set_usr(to_i2c_client(dev->parent), usr)) |
675 | return -EIO; | |
676 | ||
677 | return count; | |
7e56a7dc | 678 | } |
9edae7bc | 679 | |
7e56a7dc HVR |
680 | static DEVICE_ATTR(usr, S_IRUGO | S_IWUSR, isl1208_sysfs_show_usr, |
681 | isl1208_sysfs_store_usr); | |
682 | ||
e17ab5cb HS |
683 | static struct attribute *isl1208_rtc_attrs[] = { |
684 | &dev_attr_atrim.attr, | |
685 | &dev_attr_dtrim.attr, | |
686 | &dev_attr_usr.attr, | |
687 | NULL | |
688 | }; | |
9edae7bc | 689 | |
e17ab5cb HS |
690 | static const struct attribute_group isl1208_rtc_sysfs_files = { |
691 | .attrs = isl1208_rtc_attrs, | |
692 | }; | |
9edae7bc | 693 | |
dd35bdb0 MG |
694 | static struct attribute *isl1219_rtc_attrs[] = { |
695 | &dev_attr_timestamp0.attr, | |
696 | NULL | |
697 | }; | |
698 | ||
699 | static const struct attribute_group isl1219_rtc_sysfs_files = { | |
700 | .attrs = isl1219_rtc_attrs, | |
701 | }; | |
702 | ||
9ece7cd8 DO |
703 | static int isl1208_setup_irq(struct i2c_client *client, int irq) |
704 | { | |
705 | int rc = devm_request_threaded_irq(&client->dev, irq, NULL, | |
706 | isl1208_rtc_interrupt, | |
707 | IRQF_SHARED | IRQF_ONESHOT, | |
708 | isl1208_driver.driver.name, | |
709 | client); | |
710 | if (!rc) { | |
711 | device_init_wakeup(&client->dev, 1); | |
712 | enable_irq_wake(irq); | |
713 | } else { | |
714 | dev_err(&client->dev, | |
715 | "Unable to request irq %d, no alarm support\n", | |
716 | irq); | |
717 | } | |
718 | return rc; | |
719 | } | |
720 | ||
9edae7bc | 721 | static int |
d2653e92 | 722 | isl1208_probe(struct i2c_client *client, const struct i2c_device_id *id) |
9edae7bc AZ |
723 | { |
724 | int rc = 0; | |
725 | struct rtc_device *rtc; | |
9ece7cd8 | 726 | int evdet_irq = -1; |
7e56a7dc | 727 | |
9edae7bc AZ |
728 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) |
729 | return -ENODEV; | |
7e56a7dc | 730 | |
9edae7bc AZ |
731 | if (isl1208_i2c_validate_client(client) < 0) |
732 | return -ENODEV; | |
733 | ||
236b7187 | 734 | rtc = devm_rtc_allocate_device(&client->dev); |
adce8c14 SK |
735 | if (IS_ERR(rtc)) |
736 | return PTR_ERR(rtc); | |
7e56a7dc | 737 | |
236b7187 DO |
738 | rtc->ops = &isl1208_rtc_ops; |
739 | ||
9edae7bc | 740 | i2c_set_clientdata(client, rtc); |
7e56a7dc | 741 | |
9edae7bc | 742 | rc = isl1208_i2c_get_sr(client); |
7e56a7dc | 743 | if (rc < 0) { |
9edae7bc | 744 | dev_err(&client->dev, "reading status failed\n"); |
adce8c14 | 745 | return rc; |
7e56a7dc HVR |
746 | } |
747 | ||
748 | if (rc & ISL1208_REG_SR_RTCF) | |
9edae7bc | 749 | dev_warn(&client->dev, "rtc power failure detected, " |
7e56a7dc HVR |
750 | "please set clock.\n"); |
751 | ||
dd35bdb0 | 752 | if (id->driver_data == TYPE_ISL1219) { |
cfa30622 DO |
753 | struct device_node *np = client->dev.of_node; |
754 | u32 evienb; | |
755 | ||
756 | rc = i2c_smbus_read_byte_data(client, ISL1219_REG_EV); | |
757 | if (rc < 0) { | |
758 | dev_err(&client->dev, "failed to read EV reg\n"); | |
759 | return rc; | |
760 | } | |
761 | rc |= ISL1219_REG_EV_EVEN; | |
762 | if (!of_property_read_u32(np, "isil,ev-evienb", &evienb)) { | |
763 | if (evienb) | |
764 | rc |= ISL1219_REG_EV_EVIENB; | |
765 | else | |
766 | rc &= ~ISL1219_REG_EV_EVIENB; | |
767 | } | |
768 | rc = i2c_smbus_write_byte_data(client, ISL1219_REG_EV, rc); | |
dd35bdb0 MG |
769 | if (rc < 0) { |
770 | dev_err(&client->dev, "could not enable tamper detection\n"); | |
771 | return rc; | |
772 | } | |
773 | rc = rtc_add_group(rtc, &isl1219_rtc_sysfs_files); | |
774 | if (rc) | |
775 | return rc; | |
cfa30622 | 776 | evdet_irq = of_irq_get_byname(np, "evdet"); |
dd35bdb0 MG |
777 | } |
778 | ||
1b4c794f | 779 | rc = rtc_add_group(rtc, &isl1208_rtc_sysfs_files); |
9edae7bc | 780 | if (rc) |
adce8c14 | 781 | return rc; |
7e56a7dc | 782 | |
9ece7cd8 DO |
783 | if (client->irq > 0) |
784 | rc = isl1208_setup_irq(client, client->irq); | |
785 | if (rc) | |
786 | return rc; | |
787 | ||
788 | if (evdet_irq > 0 && evdet_irq != client->irq) | |
789 | rc = isl1208_setup_irq(client, evdet_irq); | |
790 | if (rc) | |
791 | return rc; | |
9d327c2d | 792 | |
236b7187 | 793 | return rtc_register_device(rtc); |
7e56a7dc HVR |
794 | } |
795 | ||
3760f736 | 796 | static const struct i2c_device_id isl1208_id[] = { |
dd35bdb0 MG |
797 | { "isl1208", TYPE_ISL1208 }, |
798 | { "isl1218", TYPE_ISL1218 }, | |
799 | { "isl1219", TYPE_ISL1219 }, | |
3760f736 JD |
800 | { } |
801 | }; | |
802 | MODULE_DEVICE_TABLE(i2c, isl1208_id); | |
803 | ||
03835504 JMC |
804 | static const struct of_device_id isl1208_of_match[] = { |
805 | { .compatible = "isil,isl1208" }, | |
806 | { .compatible = "isil,isl1218" }, | |
dd35bdb0 | 807 | { .compatible = "isil,isl1219" }, |
03835504 JMC |
808 | { } |
809 | }; | |
810 | MODULE_DEVICE_TABLE(of, isl1208_of_match); | |
811 | ||
9edae7bc AZ |
812 | static struct i2c_driver isl1208_driver = { |
813 | .driver = { | |
03835504 JMC |
814 | .name = "rtc-isl1208", |
815 | .of_match_table = of_match_ptr(isl1208_of_match), | |
816 | }, | |
9edae7bc | 817 | .probe = isl1208_probe, |
3760f736 | 818 | .id_table = isl1208_id, |
9edae7bc | 819 | }; |
7e56a7dc | 820 | |
0abc9201 | 821 | module_i2c_driver(isl1208_driver); |
7e56a7dc HVR |
822 | |
823 | MODULE_AUTHOR("Herbert Valerio Riedel <hvr@gnu.org>"); | |
824 | MODULE_DESCRIPTION("Intersil ISL1208 RTC driver"); | |
825 | MODULE_LICENSE("GPL"); |