[linux-2.6-block.git] / drivers / rtc / rtc-hym8563.c

/*
 * Haoyu HYM8563 RTC driver
 *
 * Copyright (C) 2013 MundoReader S.L.
 * Author: Heiko Stuebner <heiko@sntech.de>
 *
 * based on rtc-HYM8563
 * Copyright (C) 2010 ROCKCHIP, Inc.
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/module.h>
#include <linux/clk-provider.h>
#include <linux/i2c.h>
#include <linux/bcd.h>
#include <linux/rtc.h>

#define HYM8563_CTL1		0x00
#define HYM8563_CTL1_TEST	BIT(7)
#define HYM8563_CTL1_STOP	BIT(5)
#define HYM8563_CTL1_TESTC	BIT(3)

#define HYM8563_CTL2		0x01
#define HYM8563_CTL2_TI_TP	BIT(4)
#define HYM8563_CTL2_AF		BIT(3)
#define HYM8563_CTL2_TF		BIT(2)
#define HYM8563_CTL2_AIE	BIT(1)
#define HYM8563_CTL2_TIE	BIT(0)

#define HYM8563_SEC		0x02
#define HYM8563_SEC_VL		BIT(7)
#define HYM8563_SEC_MASK	0x7f

#define HYM8563_MIN		0x03
#define HYM8563_MIN_MASK	0x7f

#define HYM8563_HOUR		0x04
#define HYM8563_HOUR_MASK	0x3f

#define HYM8563_DAY		0x05
#define HYM8563_DAY_MASK	0x3f

#define HYM8563_WEEKDAY		0x06
#define HYM8563_WEEKDAY_MASK	0x07

#define HYM8563_MONTH		0x07
#define HYM8563_MONTH_CENTURY	BIT(7)
#define HYM8563_MONTH_MASK	0x1f

#define HYM8563_YEAR		0x08

#define HYM8563_ALM_MIN		0x09
#define HYM8563_ALM_HOUR	0x0a
#define HYM8563_ALM_DAY		0x0b
#define HYM8563_ALM_WEEK	0x0c

/* Each alarm check can be disabled by setting this bit in the register */
#define HYM8563_ALM_BIT_DISABLE	BIT(7)

#define HYM8563_CLKOUT		0x0d
#define HYM8563_CLKOUT_ENABLE	BIT(7)
#define HYM8563_CLKOUT_32768	0
#define HYM8563_CLKOUT_1024	1
#define HYM8563_CLKOUT_32	2
#define HYM8563_CLKOUT_1	3
#define HYM8563_CLKOUT_MASK	3

#define HYM8563_TMR_CTL		0x0e
#define HYM8563_TMR_CTL_ENABLE	BIT(7)
#define HYM8563_TMR_CTL_4096	0
#define HYM8563_TMR_CTL_64	1
#define HYM8563_TMR_CTL_1	2
#define HYM8563_TMR_CTL_1_60	3
#define HYM8563_TMR_CTL_MASK	3

#define HYM8563_TMR_CNT		0x0f

struct hym8563 {
	struct i2c_client	*client;
	struct rtc_device	*rtc;
	bool			valid;
#ifdef CONFIG_COMMON_CLK
	struct clk_hw		clkout_hw;
#endif
};

/*
 * RTC handling
 */

static int hym8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct hym8563 *hym8563 = i2c_get_clientdata(client);
	u8 buf[7];
	int ret;

	if (!hym8563->valid) {
		dev_warn(&client->dev, "no valid clock/calendar values available\n");
		return -EPERM;
	}

	ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);
	if (ret < 0)
		return ret;

	tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
	tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
	tm->tm_hour = bcd2bin(buf[2] & HYM8563_HOUR_MASK);
	tm->tm_mday = bcd2bin(buf[3] & HYM8563_DAY_MASK);
	tm->tm_wday = bcd2bin(buf[4] & HYM8563_WEEKDAY_MASK); /* 0 = Sun */
	tm->tm_mon = bcd2bin(buf[5] & HYM8563_MONTH_MASK) - 1; /* 0 = Jan */
	tm->tm_year = bcd2bin(buf[6]) + 100;

	return 0;
}

static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct hym8563 *hym8563 = i2c_get_clientdata(client);
	u8 buf[7];
	int ret;

	/* Years >= 2100 are to far in the future, 19XX is to early */
	if (tm->tm_year < 100 || tm->tm_year >= 200)
		return -EINVAL;

	buf[0] = bin2bcd(tm->tm_sec);
	buf[1] = bin2bcd(tm->tm_min);
	buf[2] = bin2bcd(tm->tm_hour);
	buf[3] = bin2bcd(tm->tm_mday);
	buf[4] = bin2bcd(tm->tm_wday);
	buf[5] = bin2bcd(tm->tm_mon + 1);

	/*
	 * While the HYM8563 has a century flag in the month register,
	 * it does not seem to carry it over a subsequent write/read.
	 * So we'll limit ourself to 100 years, starting at 2000 for now.
	 */
	buf[6] = bin2bcd(tm->tm_year - 100);

	/*
	 * CTL1 only contains TEST-mode bits apart from stop,
	 * so no need to read the value first
	 */
	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1,
						HYM8563_CTL1_STOP);
	if (ret < 0)
		return ret;

	ret = i2c_smbus_write_i2c_block_data(client, HYM8563_SEC, 7, buf);
	if (ret < 0)
		return ret;

	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
	if (ret < 0)
		return ret;

	hym8563->valid = true;

	return 0;
}

static int hym8563_rtc_alarm_irq_enable(struct device *dev,
					unsigned int enabled)
{
	struct i2c_client *client = to_i2c_client(dev);
	int data;

	data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	if (data < 0)
		return data;

	if (enabled)
		data |= HYM8563_CTL2_AIE;
	else
		data &= ~HYM8563_CTL2_AIE;

	return i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
};

static int hym8563_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct rtc_time *alm_tm = &alm->time;
	u8 buf[4];
	int ret;

	ret = i2c_smbus_read_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
	if (ret < 0)
		return ret;

	/* The alarm only has a minute accuracy */
	alm_tm->tm_sec = 0;

	alm_tm->tm_min = (buf[0] & HYM8563_ALM_BIT_DISABLE) ?
					-1 :
					bcd2bin(buf[0] & HYM8563_MIN_MASK);
	alm_tm->tm_hour = (buf[1] & HYM8563_ALM_BIT_DISABLE) ?
					-1 :
					bcd2bin(buf[1] & HYM8563_HOUR_MASK);
	alm_tm->tm_mday = (buf[2] & HYM8563_ALM_BIT_DISABLE) ?
					-1 :
					bcd2bin(buf[2] & HYM8563_DAY_MASK);
	alm_tm->tm_wday = (buf[3] & HYM8563_ALM_BIT_DISABLE) ?
					-1 :
					bcd2bin(buf[3] & HYM8563_WEEKDAY_MASK);

	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	if (ret < 0)
		return ret;

	if (ret & HYM8563_CTL2_AIE)
		alm->enabled = 1;

	return 0;
}

static int hym8563_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	struct i2c_client *client = to_i2c_client(dev);
	struct rtc_time *alm_tm = &alm->time;
	u8 buf[4];
	int ret;

	/*
	 * The alarm has no seconds so deal with it
	 */
	if (alm_tm->tm_sec) {
		alm_tm->tm_sec = 0;
		alm_tm->tm_min++;
		if (alm_tm->tm_min >= 60) {
			alm_tm->tm_min = 0;
			alm_tm->tm_hour++;
			if (alm_tm->tm_hour >= 24) {
				alm_tm->tm_hour = 0;
				alm_tm->tm_mday++;
				if (alm_tm->tm_mday > 31)
					alm_tm->tm_mday = 0;
			}
		}
	}

	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	if (ret < 0)
		return ret;

	ret &= ~HYM8563_CTL2_AIE;

	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
	if (ret < 0)
		return ret;

	buf[0] = (alm_tm->tm_min < 60 && alm_tm->tm_min >= 0) ?
			bin2bcd(alm_tm->tm_min) : HYM8563_ALM_BIT_DISABLE;

	buf[1] = (alm_tm->tm_hour < 24 && alm_tm->tm_hour >= 0) ?
			bin2bcd(alm_tm->tm_hour) : HYM8563_ALM_BIT_DISABLE;

	buf[2] = (alm_tm->tm_mday <= 31 && alm_tm->tm_mday >= 1) ?
			bin2bcd(alm_tm->tm_mday) : HYM8563_ALM_BIT_DISABLE;

	buf[3] = (alm_tm->tm_wday < 7 && alm_tm->tm_wday >= 0) ?
			bin2bcd(alm_tm->tm_wday) : HYM8563_ALM_BIT_DISABLE;

	ret = i2c_smbus_write_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
	if (ret < 0)
		return ret;

	return hym8563_rtc_alarm_irq_enable(dev, alm->enabled);
}

static const struct rtc_class_ops hym8563_rtc_ops = {
	.read_time		= hym8563_rtc_read_time,
	.set_time		= hym8563_rtc_set_time,
	.alarm_irq_enable	= hym8563_rtc_alarm_irq_enable,
	.read_alarm		= hym8563_rtc_read_alarm,
	.set_alarm		= hym8563_rtc_set_alarm,
};

/*
 * Handling of the clkout
 */

#ifdef CONFIG_COMMON_CLK
#define clkout_hw_to_hym8563(_hw) container_of(_hw, struct hym8563, clkout_hw)

static int clkout_rates[] = {
	32768,
	1024,
	32,
	1,
};

static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
						unsigned long parent_rate)
{
	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	struct i2c_client *client = hym8563->client;
	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);

	if (ret < 0)
		return 0;

	ret &= HYM8563_CLKOUT_MASK;
	return clkout_rates[ret];
}

static long hym8563_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
				      unsigned long *prate)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
		if (clkout_rates[i] <= rate)
			return clkout_rates[i];

	return 0;
}

static int hym8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
				   unsigned long parent_rate)
{
	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	struct i2c_client *client = hym8563->client;
	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
	int i;

	if (ret < 0)
		return ret;

	for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
		if (clkout_rates[i] == rate) {
			ret &= ~HYM8563_CLKOUT_MASK;
			ret |= i;
			return i2c_smbus_write_byte_data(client,
							 HYM8563_CLKOUT, ret);
		}

	return -EINVAL;
}

static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
{
	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	struct i2c_client *client = hym8563->client;
	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);

	if (ret < 0)
		return ret;

	if (enable)
		ret |= HYM8563_CLKOUT_ENABLE;
	else
		ret &= ~HYM8563_CLKOUT_ENABLE;

	return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
}

static int hym8563_clkout_prepare(struct clk_hw *hw)
{
	return hym8563_clkout_control(hw, 1);
}

static void hym8563_clkout_unprepare(struct clk_hw *hw)
{
	hym8563_clkout_control(hw, 0);
}

static int hym8563_clkout_is_prepared(struct clk_hw *hw)
{
	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	struct i2c_client *client = hym8563->client;
	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);

	if (ret < 0)
		return ret;

	return !!(ret & HYM8563_CLKOUT_ENABLE);
}

static const struct clk_ops hym8563_clkout_ops = {
	.prepare = hym8563_clkout_prepare,
	.unprepare = hym8563_clkout_unprepare,
	.is_prepared = hym8563_clkout_is_prepared,
	.recalc_rate = hym8563_clkout_recalc_rate,
	.round_rate = hym8563_clkout_round_rate,
	.set_rate = hym8563_clkout_set_rate,
};

static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
{
	struct i2c_client *client = hym8563->client;
	struct device_node *node = client->dev.of_node;
	struct clk *clk;
	struct clk_init_data init;
	int ret;

	ret = i2c_smbus_write_byte_data(client, HYM8563_CLKOUT,
						0);
	if (ret < 0)
		return ERR_PTR(ret);

	init.name = "hym8563-clkout";
	init.ops = &hym8563_clkout_ops;
	init.flags = 0;
	init.parent_names = NULL;
	init.num_parents = 0;
	hym8563->clkout_hw.init = &init;

	/* optional override of the clockname */
	of_property_read_string(node, "clock-output-names", &init.name);

	/* register the clock */
	clk = clk_register(&client->dev, &hym8563->clkout_hw);

	if (!IS_ERR(clk))
		of_clk_add_provider(node, of_clk_src_simple_get, clk);

	return clk;
}
#endif

/*
 * The alarm interrupt is implemented as a level-low interrupt in the
 * hym8563, while the timer interrupt uses a falling edge.
 * We don't use the timer at all, so the interrupt is requested to
 * use the level-low trigger.
 */
static irqreturn_t hym8563_irq(int irq, void *dev_id)
{
	struct hym8563 *hym8563 = (struct hym8563 *)dev_id;
	struct i2c_client *client = hym8563->client;
	struct mutex *lock = &hym8563->rtc->ops_lock;
	int data, ret;

	mutex_lock(lock);

	/* Clear the alarm flag */

	data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	if (data < 0) {
		dev_err(&client->dev, "%s: error reading i2c data %d\n",
			__func__, data);
		goto out;
	}

	data &= ~HYM8563_CTL2_AF;

	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
	if (ret < 0) {
		dev_err(&client->dev, "%s: error writing i2c data %d\n",
			__func__, ret);
	}

out:
	mutex_unlock(lock);
	return IRQ_HANDLED;
}

static int hym8563_init_device(struct i2c_client *client)
{
	int ret;

	/* Clear stop flag if present */
	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
	if (ret < 0)
		return ret;

	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	if (ret < 0)
		return ret;

	/* Disable alarm and timer interrupts */
	ret &= ~HYM8563_CTL2_AIE;
	ret &= ~HYM8563_CTL2_TIE;

	/* Clear any pending alarm and timer flags */
	if (ret & HYM8563_CTL2_AF)
		ret &= ~HYM8563_CTL2_AF;

	if (ret & HYM8563_CTL2_TF)
		ret &= ~HYM8563_CTL2_TF;

	ret &= ~HYM8563_CTL2_TI_TP;

	return i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
}

#ifdef CONFIG_PM_SLEEP
static int hym8563_suspend(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);
	int ret;

	if (device_may_wakeup(dev)) {
		ret = enable_irq_wake(client->irq);
		if (ret) {
			dev_err(dev, "enable_irq_wake failed, %d\n", ret);
			return ret;
		}
	}

	return 0;
}

static int hym8563_resume(struct device *dev)
{
	struct i2c_client *client = to_i2c_client(dev);

	if (device_may_wakeup(dev))
		disable_irq_wake(client->irq);

	return 0;
}
#endif

static SIMPLE_DEV_PM_OPS(hym8563_pm_ops, hym8563_suspend, hym8563_resume);

static int hym8563_probe(struct i2c_client *client,
			 const struct i2c_device_id *id)
{
	struct hym8563 *hym8563;
	int ret;

	hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
	if (!hym8563)
		return -ENOMEM;

	hym8563->client = client;
	i2c_set_clientdata(client, hym8563);

	device_set_wakeup_capable(&client->dev, true);

	ret = hym8563_init_device(client);
	if (ret) {
		dev_err(&client->dev, "could not init device, %d\n", ret);
		return ret;
	}

	if (client->irq > 0) {
		ret = devm_request_threaded_irq(&client->dev, client->irq,
						NULL, hym8563_irq,
						IRQF_TRIGGER_LOW | IRQF_ONESHOT,
						client->name, hym8563);
		if (ret < 0) {
			dev_err(&client->dev, "irq %d request failed, %d\n",
				client->irq, ret);
			return ret;
		}
	}

	/* check state of calendar information */
	ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
	if (ret < 0)
		return ret;

	hym8563->valid = !(ret & HYM8563_SEC_VL);
	dev_dbg(&client->dev, "rtc information is %s\n",
		hym8563->valid ? "valid" : "invalid");

	hym8563->rtc = devm_rtc_device_register(&client->dev, client->name,
						&hym8563_rtc_ops, THIS_MODULE);
	if (IS_ERR(hym8563->rtc))
		return PTR_ERR(hym8563->rtc);

	/* the hym8563 alarm only supports a minute accuracy */
	hym8563->rtc->uie_unsupported = 1;

#ifdef CONFIG_COMMON_CLK
	hym8563_clkout_register_clk(hym8563);
#endif

	return 0;
}

static const struct i2c_device_id hym8563_id[] = {
	{ "hym8563", 0 },
	{},
};
MODULE_DEVICE_TABLE(i2c, hym8563_id);

static const struct of_device_id hym8563_dt_idtable[] = {
	{ .compatible = "haoyu,hym8563" },
	{},
};
MODULE_DEVICE_TABLE(of, hym8563_dt_idtable);

static struct i2c_driver hym8563_driver = {
	.driver		= {
		.name	= "rtc-hym8563",
		.pm	= &hym8563_pm_ops,
		.of_match_table	= hym8563_dt_idtable,
	},
	.probe		= hym8563_probe,
	.id_table	= hym8563_id,
};

module_i2c_driver(hym8563_driver);

MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
MODULE_DESCRIPTION("HYM8563 RTC driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
dcaf0384 HS	1	/*
	2	* Haoyu HYM8563 RTC driver
	3	*
	4	* Copyright (C) 2013 MundoReader S.L.
	5	* Author: Heiko Stuebner <heiko@sntech.de>
	6	*
	7	* based on rtc-HYM8563
	8	* Copyright (C) 2010 ROCKCHIP, Inc.
	9	*
	10	* This software is licensed under the terms of the GNU General Public
	11	* License version 2, as published by the Free Software Foundation, and
	12	* may be copied, distributed, and modified under those terms.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*/
	19
	20	#include <linux/module.h>
	21	#include <linux/clk-provider.h>
	22	#include <linux/i2c.h>
	23	#include <linux/bcd.h>
	24	#include <linux/rtc.h>
	25
	26	#define HYM8563_CTL1 0x00
	27	#define HYM8563_CTL1_TEST BIT(7)
	28	#define HYM8563_CTL1_STOP BIT(5)
	29	#define HYM8563_CTL1_TESTC BIT(3)
	30
	31	#define HYM8563_CTL2 0x01
	32	#define HYM8563_CTL2_TI_TP BIT(4)
	33	#define HYM8563_CTL2_AF BIT(3)
	34	#define HYM8563_CTL2_TF BIT(2)
	35	#define HYM8563_CTL2_AIE BIT(1)
	36	#define HYM8563_CTL2_TIE BIT(0)
	37
	38	#define HYM8563_SEC 0x02
	39	#define HYM8563_SEC_VL BIT(7)
	40	#define HYM8563_SEC_MASK 0x7f
	41
	42	#define HYM8563_MIN 0x03
	43	#define HYM8563_MIN_MASK 0x7f
	44
	45	#define HYM8563_HOUR 0x04
	46	#define HYM8563_HOUR_MASK 0x3f
	47
	48	#define HYM8563_DAY 0x05
	49	#define HYM8563_DAY_MASK 0x3f
	50
	51	#define HYM8563_WEEKDAY 0x06
	52	#define HYM8563_WEEKDAY_MASK 0x07
	53
	54	#define HYM8563_MONTH 0x07
	55	#define HYM8563_MONTH_CENTURY BIT(7)
	56	#define HYM8563_MONTH_MASK 0x1f
	57
	58	#define HYM8563_YEAR 0x08
	59
	60	#define HYM8563_ALM_MIN 0x09
	61	#define HYM8563_ALM_HOUR 0x0a
	62	#define HYM8563_ALM_DAY 0x0b
	63	#define HYM8563_ALM_WEEK 0x0c
	64
65	/* Each alarm check can be disabled by setting this bit in the register */
66	#define HYM8563_ALM_BIT_DISABLE BIT(7)
67
68	#define HYM8563_CLKOUT 0x0d
f539a8ac	69	#define HYM8563_CLKOUT_ENABLE BIT(7)
dcaf0384 HS	70	#define HYM8563_CLKOUT_32768 0
	71	#define HYM8563_CLKOUT_1024 1
	72	#define HYM8563_CLKOUT_32 2
	73	#define HYM8563_CLKOUT_1 3
	74	#define HYM8563_CLKOUT_MASK 3
	75
	76	#define HYM8563_TMR_CTL 0x0e
	77	#define HYM8563_TMR_CTL_ENABLE BIT(7)
	78	#define HYM8563_TMR_CTL_4096 0
	79	#define HYM8563_TMR_CTL_64 1
	80	#define HYM8563_TMR_CTL_1 2
	81	#define HYM8563_TMR_CTL_1_60 3
	82	#define HYM8563_TMR_CTL_MASK 3
	83
	84	#define HYM8563_TMR_CNT 0x0f
	85
	86	struct hym8563 {
	87	struct i2c_client *client;
	88	struct rtc_device *rtc;
	89	bool valid;
	90	#ifdef CONFIG_COMMON_CLK
	91	struct clk_hw clkout_hw;
	92	#endif
	93	};
	94
	95	/*
	96	* RTC handling
	97	*/
	98
	99	static int hym8563_rtc_read_time(struct device dev, struct rtc_time tm)
	100	{
	101	struct i2c_client *client = to_i2c_client(dev);
	102	struct hym8563 *hym8563 = i2c_get_clientdata(client);
	103	u8 buf[7];
	104	int ret;
	105
	106	if (!hym8563->valid) {
	107	dev_warn(&client->dev, "no valid clock/calendar values available\n");
	108	return -EPERM;
	109	}
	110
	111	ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);
9a20b5e3 KL	112	if (ret < 0)
9a20b5e3 KL	113	return ret;
dcaf0384 HS	114
	115	tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
	116	tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
	117	tm->tm_hour = bcd2bin(buf[2] & HYM8563_HOUR_MASK);
	118	tm->tm_mday = bcd2bin(buf[3] & HYM8563_DAY_MASK);
	119	tm->tm_wday = bcd2bin(buf[4] & HYM8563_WEEKDAY_MASK); /* 0 = Sun */
	120	tm->tm_mon = bcd2bin(buf[5] & HYM8563_MONTH_MASK) - 1; /* 0 = Jan */
	121	tm->tm_year = bcd2bin(buf[6]) + 100;
	122
	123	return 0;
	124	}
	125
	126	static int hym8563_rtc_set_time(struct device dev, struct rtc_time tm)
	127	{
	128	struct i2c_client *client = to_i2c_client(dev);
	129	struct hym8563 *hym8563 = i2c_get_clientdata(client);
	130	u8 buf[7];
	131	int ret;
	132
	133	/* Years >= 2100 are to far in the future, 19XX is to early */
	134	if (tm->tm_year < 100 \|\| tm->tm_year >= 200)
	135	return -EINVAL;
	136
	137	buf[0] = bin2bcd(tm->tm_sec);
	138	buf[1] = bin2bcd(tm->tm_min);
	139	buf[2] = bin2bcd(tm->tm_hour);
	140	buf[3] = bin2bcd(tm->tm_mday);
	141	buf[4] = bin2bcd(tm->tm_wday);
	142	buf[5] = bin2bcd(tm->tm_mon + 1);
	143
	144	/*
	145	* While the HYM8563 has a century flag in the month register,
	146	* it does not seem to carry it over a subsequent write/read.
	147	* So we'll limit ourself to 100 years, starting at 2000 for now.
	148	*/
d5861262	149	buf[6] = bin2bcd(tm->tm_year - 100);
dcaf0384 HS	150
	151	/*
	152	* CTL1 only contains TEST-mode bits apart from stop,
	153	* so no need to read the value first
	154	*/
	155	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1,
	156	HYM8563_CTL1_STOP);
	157	if (ret < 0)
	158	return ret;
	159
	160	ret = i2c_smbus_write_i2c_block_data(client, HYM8563_SEC, 7, buf);
	161	if (ret < 0)
	162	return ret;
	163
	164	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
	165	if (ret < 0)
	166	return ret;
	167
	168	hym8563->valid = true;
	169
	170	return 0;
	171	}
	172
	173	static int hym8563_rtc_alarm_irq_enable(struct device *dev,
	174	unsigned int enabled)
	175	{
	176	struct i2c_client *client = to_i2c_client(dev);
	177	int data;
	178
	179	data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	180	if (data < 0)
	181	return data;
	182
	183	if (enabled)
	184	data \|= HYM8563_CTL2_AIE;
	185	else
	186	data &= ~HYM8563_CTL2_AIE;
	187
	188	return i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
	189	};
	190
	191	static int hym8563_rtc_read_alarm(struct device dev, struct rtc_wkalrm alm)
	192	{
	193	struct i2c_client *client = to_i2c_client(dev);
	194	struct rtc_time *alm_tm = &alm->time;
	195	u8 buf[4];
	196	int ret;
	197
	198	ret = i2c_smbus_read_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
	199	if (ret < 0)
	200	return ret;
	201
	202	/* The alarm only has a minute accuracy */
bb9dbb01	203	alm_tm->tm_sec = 0;
dcaf0384 HS	204
	205	alm_tm->tm_min = (buf[0] & HYM8563_ALM_BIT_DISABLE) ?
	206	-1 :
	207	bcd2bin(buf[0] & HYM8563_MIN_MASK);
	208	alm_tm->tm_hour = (buf[1] & HYM8563_ALM_BIT_DISABLE) ?
	209	-1 :
	210	bcd2bin(buf[1] & HYM8563_HOUR_MASK);
	211	alm_tm->tm_mday = (buf[2] & HYM8563_ALM_BIT_DISABLE) ?
	212	-1 :
	213	bcd2bin(buf[2] & HYM8563_DAY_MASK);
	214	alm_tm->tm_wday = (buf[3] & HYM8563_ALM_BIT_DISABLE) ?
	215	-1 :
	216	bcd2bin(buf[3] & HYM8563_WEEKDAY_MASK);
	217
dcaf0384 HS	218	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	219	if (ret < 0)
	220	return ret;
	221
	222	if (ret & HYM8563_CTL2_AIE)
	223	alm->enabled = 1;
	224
	225	return 0;
	226	}
	227
	228	static int hym8563_rtc_set_alarm(struct device dev, struct rtc_wkalrm alm)
	229	{
	230	struct i2c_client *client = to_i2c_client(dev);
	231	struct rtc_time *alm_tm = &alm->time;
	232	u8 buf[4];
	233	int ret;
	234
	235	/*
	236	* The alarm has no seconds so deal with it
	237	*/
	238	if (alm_tm->tm_sec) {
	239	alm_tm->tm_sec = 0;
	240	alm_tm->tm_min++;
	241	if (alm_tm->tm_min >= 60) {
	242	alm_tm->tm_min = 0;
	243	alm_tm->tm_hour++;
	244	if (alm_tm->tm_hour >= 24) {
	245	alm_tm->tm_hour = 0;
	246	alm_tm->tm_mday++;
	247	if (alm_tm->tm_mday > 31)
	248	alm_tm->tm_mday = 0;
	249	}
	250	}
	251	}
	252
	253	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	254	if (ret < 0)
	255	return ret;
	256
	257	ret &= ~HYM8563_CTL2_AIE;
	258
	259	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
	260	if (ret < 0)
	261	return ret;
	262
	263	buf[0] = (alm_tm->tm_min < 60 && alm_tm->tm_min >= 0) ?
	264	bin2bcd(alm_tm->tm_min) : HYM8563_ALM_BIT_DISABLE;
	265
	266	buf[1] = (alm_tm->tm_hour < 24 && alm_tm->tm_hour >= 0) ?
	267	bin2bcd(alm_tm->tm_hour) : HYM8563_ALM_BIT_DISABLE;
	268
	269	buf[2] = (alm_tm->tm_mday <= 31 && alm_tm->tm_mday >= 1) ?
	270	bin2bcd(alm_tm->tm_mday) : HYM8563_ALM_BIT_DISABLE;
	271
	272	buf[3] = (alm_tm->tm_wday < 7 && alm_tm->tm_wday >= 0) ?
	273	bin2bcd(alm_tm->tm_wday) : HYM8563_ALM_BIT_DISABLE;
	274
	275	ret = i2c_smbus_write_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
	276	if (ret < 0)
	277	return ret;
	278
	279	return hym8563_rtc_alarm_irq_enable(dev, alm->enabled);
	280	}
	281
282	static const struct rtc_class_ops hym8563_rtc_ops = {
283	.read_time = hym8563_rtc_read_time,
284	.set_time = hym8563_rtc_set_time,
285	.alarm_irq_enable = hym8563_rtc_alarm_irq_enable,
286	.read_alarm = hym8563_rtc_read_alarm,
287	.set_alarm = hym8563_rtc_set_alarm,
288	};
289
290	/*
291	* Handling of the clkout
292	*/
293
294	#ifdef CONFIG_COMMON_CLK
295	#define clkout_hw_to_hym8563(_hw) container_of(_hw, struct hym8563, clkout_hw)
296
297	static int clkout_rates[] = {
298	32768,
299	1024,
300	32,
301	1,
302	};
303
304	static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
305	unsigned long parent_rate)
306	{
307	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
308	struct i2c_client *client = hym8563->client;
309	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
310
b3288a43	311	if (ret < 0)
dcaf0384 HS	312	return 0;
	313
	314	ret &= HYM8563_CLKOUT_MASK;
	315	return clkout_rates[ret];
	316	}
	317
	318	static long hym8563_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
	319	unsigned long *prate)
	320	{
	321	int i;
	322
	323	for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
	324	if (clkout_rates[i] <= rate)
	325	return clkout_rates[i];
	326
	327	return 0;
	328	}
	329
	330	static int hym8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
	331	unsigned long parent_rate)
	332	{
	333	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	334	struct i2c_client *client = hym8563->client;
	335	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
	336	int i;
	337
	338	if (ret < 0)
	339	return ret;
	340
	341	for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
	342	if (clkout_rates[i] == rate) {
	343	ret &= ~HYM8563_CLKOUT_MASK;
	344	ret \|= i;
	345	return i2c_smbus_write_byte_data(client,
	346	HYM8563_CLKOUT, ret);
	347	}
	348
	349	return -EINVAL;
	350	}
	351
	352	static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
	353	{
	354	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	355	struct i2c_client *client = hym8563->client;
	356	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
	357
	358	if (ret < 0)
	359	return ret;
	360
	361	if (enable)
f539a8ac	362	ret \|= HYM8563_CLKOUT_ENABLE;
dcaf0384	363	else
f539a8ac	364	ret &= ~HYM8563_CLKOUT_ENABLE;
dcaf0384 HS	365
	366	return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
	367	}
	368
	369	static int hym8563_clkout_prepare(struct clk_hw *hw)
	370	{
	371	return hym8563_clkout_control(hw, 1);
	372	}
	373
	374	static void hym8563_clkout_unprepare(struct clk_hw *hw)
	375	{
	376	hym8563_clkout_control(hw, 0);
	377	}
	378
	379	static int hym8563_clkout_is_prepared(struct clk_hw *hw)
	380	{
	381	struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
	382	struct i2c_client *client = hym8563->client;
	383	int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
	384
	385	if (ret < 0)
	386	return ret;
	387
f539a8ac	388	return !!(ret & HYM8563_CLKOUT_ENABLE);
dcaf0384 HS	389	}
dcaf0384 HS	390
28ed893c	391	static const struct clk_ops hym8563_clkout_ops = {
dcaf0384 HS	392	.prepare = hym8563_clkout_prepare,
	393	.unprepare = hym8563_clkout_unprepare,
	394	.is_prepared = hym8563_clkout_is_prepared,
	395	.recalc_rate = hym8563_clkout_recalc_rate,
	396	.round_rate = hym8563_clkout_round_rate,
	397	.set_rate = hym8563_clkout_set_rate,
	398	};
	399
	400	static struct clk hym8563_clkout_register_clk(struct hym8563 hym8563)
	401	{
	402	struct i2c_client *client = hym8563->client;
	403	struct device_node *node = client->dev.of_node;
	404	struct clk *clk;
	405	struct clk_init_data init;
	406	int ret;
	407
	408	ret = i2c_smbus_write_byte_data(client, HYM8563_CLKOUT,
f539a8ac	409	0);
dcaf0384 HS	410	if (ret < 0)
	411	return ERR_PTR(ret);
	412
	413	init.name = "hym8563-clkout";
	414	init.ops = &hym8563_clkout_ops;
bdcaace5	415	init.flags = 0;
dcaf0384 HS	416	init.parent_names = NULL;
	417	init.num_parents = 0;
	418	hym8563->clkout_hw.init = &init;
	419
68164a73 HS	420	/* optional override of the clockname */
	421	of_property_read_string(node, "clock-output-names", &init.name);
	422
dcaf0384 HS	423	/* register the clock */
	424	clk = clk_register(&client->dev, &hym8563->clkout_hw);
	425
	426	if (!IS_ERR(clk))
	427	of_clk_add_provider(node, of_clk_src_simple_get, clk);
	428
	429	return clk;
	430	}
	431	#endif
	432
	433	/*
	434	* The alarm interrupt is implemented as a level-low interrupt in the
	435	* hym8563, while the timer interrupt uses a falling edge.
	436	* We don't use the timer at all, so the interrupt is requested to
	437	* use the level-low trigger.
	438	*/
	439	static irqreturn_t hym8563_irq(int irq, void *dev_id)
	440	{
	441	struct hym8563 hym8563 = (struct hym8563 )dev_id;
	442	struct i2c_client *client = hym8563->client;
	443	struct mutex *lock = &hym8563->rtc->ops_lock;
	444	int data, ret;
	445
	446	mutex_lock(lock);
	447
	448	/* Clear the alarm flag */
	449
	450	data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	451	if (data < 0) {
	452	dev_err(&client->dev, "%s: error reading i2c data %d\n",
	453	__func__, data);
	454	goto out;
	455	}
	456
	457	data &= ~HYM8563_CTL2_AF;
	458
	459	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
	460	if (ret < 0) {
	461	dev_err(&client->dev, "%s: error writing i2c data %d\n",
	462	__func__, ret);
	463	}
	464
	465	out:
	466	mutex_unlock(lock);
	467	return IRQ_HANDLED;
	468	}
	469
	470	static int hym8563_init_device(struct i2c_client *client)
	471	{
	472	int ret;
	473
	474	/* Clear stop flag if present */
	475	ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
	476	if (ret < 0)
	477	return ret;
	478
	479	ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
	480	if (ret < 0)
	481	return ret;
	482
	483	/* Disable alarm and timer interrupts */
	484	ret &= ~HYM8563_CTL2_AIE;
	485	ret &= ~HYM8563_CTL2_TIE;
	486
487	/* Clear any pending alarm and timer flags */
488	if (ret & HYM8563_CTL2_AF)
489	ret &= ~HYM8563_CTL2_AF;
490
491	if (ret & HYM8563_CTL2_TF)
492	ret &= ~HYM8563_CTL2_TF;
493
494	ret &= ~HYM8563_CTL2_TI_TP;
495
496	return i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
497	}
498
499	#ifdef CONFIG_PM_SLEEP
500	static int hym8563_suspend(struct device *dev)
501	{
502	struct i2c_client *client = to_i2c_client(dev);
503	int ret;
504
505	if (device_may_wakeup(dev)) {
506	ret = enable_irq_wake(client->irq);
507	if (ret) {
508	dev_err(dev, "enable_irq_wake failed, %d\n", ret);
509	return ret;
510	}
511	}
512
513	return 0;
514	}
515
516	static int hym8563_resume(struct device *dev)
517	{
518	struct i2c_client *client = to_i2c_client(dev);
519
520	if (device_may_wakeup(dev))
521	disable_irq_wake(client->irq);
522
523	return 0;
524	}
525	#endif
526
527	static SIMPLE_DEV_PM_OPS(hym8563_pm_ops, hym8563_suspend, hym8563_resume);
528
529	static int hym8563_probe(struct i2c_client *client,
530	const struct i2c_device_id *id)
531	{
532	struct hym8563 *hym8563;
533	int ret;
534
535	hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
536	if (!hym8563)
537	return -ENOMEM;
538
539	hym8563->client = client;
540	i2c_set_clientdata(client, hym8563);
541
542	device_set_wakeup_capable(&client->dev, true);
543
544	ret = hym8563_init_device(client);
545	if (ret) {
546	dev_err(&client->dev, "could not init device, %d\n", ret);
547	return ret;
548	}
549
4be1f6bb HS	550	if (client->irq > 0) {
	551	ret = devm_request_threaded_irq(&client->dev, client->irq,
	552	NULL, hym8563_irq,
	553	IRQF_TRIGGER_LOW \| IRQF_ONESHOT,
	554	client->name, hym8563);
	555	if (ret < 0) {
	556	dev_err(&client->dev, "irq %d request failed, %d\n",
	557	client->irq, ret);
	558	return ret;
	559	}
dcaf0384 HS	560	}
	561
	562	/* check state of calendar information */
	563	ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
	564	if (ret < 0)
	565	return ret;
	566
	567	hym8563->valid = !(ret & HYM8563_SEC_VL);
	568	dev_dbg(&client->dev, "rtc information is %s\n",
	569	hym8563->valid ? "valid" : "invalid");
	570
	571	hym8563->rtc = devm_rtc_device_register(&client->dev, client->name,
	572	&hym8563_rtc_ops, THIS_MODULE);
	573	if (IS_ERR(hym8563->rtc))
	574	return PTR_ERR(hym8563->rtc);
	575
282cba6b HS	576	/* the hym8563 alarm only supports a minute accuracy */
	577	hym8563->rtc->uie_unsupported = 1;
	578
dcaf0384 HS	579	#ifdef CONFIG_COMMON_CLK
	580	hym8563_clkout_register_clk(hym8563);
	581	#endif
	582
	583	return 0;
	584	}
	585
	586	static const struct i2c_device_id hym8563_id[] = {
	587	{ "hym8563", 0 },
	588	{},
	589	};
	590	MODULE_DEVICE_TABLE(i2c, hym8563_id);
	591
e524360b	592	static const struct of_device_id hym8563_dt_idtable[] = {
dcaf0384 HS	593	{ .compatible = "haoyu,hym8563" },
	594	{},
	595	};
	596	MODULE_DEVICE_TABLE(of, hym8563_dt_idtable);
	597
	598	static struct i2c_driver hym8563_driver = {
	599	.driver = {
	600	.name = "rtc-hym8563",
dcaf0384	601	.pm = &hym8563_pm_ops,
156e3526	602	.of_match_table = hym8563_dt_idtable,
dcaf0384 HS	603	},
	604	.probe = hym8563_probe,
	605	.id_table = hym8563_id,
	606	};
	607
	608	module_i2c_driver(hym8563_driver);
	609
	610	MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
	611	MODULE_DESCRIPTION("HYM8563 RTC driver");
	612	MODULE_LICENSE("GPL");