[linux-2.6-block.git] / drivers / rtc / rtc-goldfish.c

// SPDX-License-Identifier: GPL-2.0
/* drivers/rtc/rtc-goldfish.c
 *
 * Copyright (C) 2007 Google, Inc.
 * Copyright (C) 2017 Imagination Technologies Ltd.
 */

#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/rtc.h>

#define TIMER_TIME_LOW		0x00	/* get low bits of current time  */
					/*   and update TIMER_TIME_HIGH  */
#define TIMER_TIME_HIGH	0x04	/* get high bits of time at last */
					/*   TIMER_TIME_LOW read         */
#define TIMER_ALARM_LOW	0x08	/* set low bits of alarm and     */
					/*   activate it                 */
#define TIMER_ALARM_HIGH	0x0c	/* set high bits of next alarm   */
#define TIMER_IRQ_ENABLED	0x10
#define TIMER_CLEAR_ALARM	0x14
#define TIMER_ALARM_STATUS	0x18
#define TIMER_CLEAR_INTERRUPT	0x1c

struct goldfish_rtc {
	void __iomem *base;
	int irq;
	struct rtc_device *rtc;
};

static int goldfish_rtc_read_alarm(struct device *dev,
				   struct rtc_wkalrm *alrm)
{
	u64 rtc_alarm;
	u64 rtc_alarm_low;
	u64 rtc_alarm_high;
	void __iomem *base;
	struct goldfish_rtc *rtcdrv;

	rtcdrv = dev_get_drvdata(dev);
	base = rtcdrv->base;

	rtc_alarm_low = readl(base + TIMER_ALARM_LOW);
	rtc_alarm_high = readl(base + TIMER_ALARM_HIGH);
	rtc_alarm = (rtc_alarm_high << 32) | rtc_alarm_low;

	do_div(rtc_alarm, NSEC_PER_SEC);
	memset(alrm, 0, sizeof(struct rtc_wkalrm));

	rtc_time64_to_tm(rtc_alarm, &alrm->time);

	if (readl(base + TIMER_ALARM_STATUS))
		alrm->enabled = 1;
	else
		alrm->enabled = 0;

	return 0;
}

static int goldfish_rtc_set_alarm(struct device *dev,
				  struct rtc_wkalrm *alrm)
{
	struct goldfish_rtc *rtcdrv;
	u64 rtc_alarm64;
	u64 rtc_status_reg;
	void __iomem *base;

	rtcdrv = dev_get_drvdata(dev);
	base = rtcdrv->base;

	if (alrm->enabled) {
		rtc_alarm64 = rtc_tm_to_time64(&alrm->time) * NSEC_PER_SEC;
		writel((rtc_alarm64 >> 32), base + TIMER_ALARM_HIGH);
		writel(rtc_alarm64, base + TIMER_ALARM_LOW);
		writel(1, base + TIMER_IRQ_ENABLED);
	} else {
		/*
		 * if this function was called with enabled=0
		 * then it could mean that the application is
		 * trying to cancel an ongoing alarm
		 */
		rtc_status_reg = readl(base + TIMER_ALARM_STATUS);
		if (rtc_status_reg)
			writel(1, base + TIMER_CLEAR_ALARM);
	}

	return 0;
}

static int goldfish_rtc_alarm_irq_enable(struct device *dev,
					 unsigned int enabled)
{
	void __iomem *base;
	struct goldfish_rtc *rtcdrv;

	rtcdrv = dev_get_drvdata(dev);
	base = rtcdrv->base;

	if (enabled)
		writel(1, base + TIMER_IRQ_ENABLED);
	else
		writel(0, base + TIMER_IRQ_ENABLED);

	return 0;
}

static irqreturn_t goldfish_rtc_interrupt(int irq, void *dev_id)
{
	struct goldfish_rtc *rtcdrv = dev_id;
	void __iomem *base = rtcdrv->base;

	writel(1, base + TIMER_CLEAR_INTERRUPT);

	rtc_update_irq(rtcdrv->rtc, 1, RTC_IRQF | RTC_AF);

	return IRQ_HANDLED;
}

static int goldfish_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	struct goldfish_rtc *rtcdrv;
	void __iomem *base;
	u64 time_high;
	u64 time_low;
	u64 time;

	rtcdrv = dev_get_drvdata(dev);
	base = rtcdrv->base;

	time_low = readl(base + TIMER_TIME_LOW);
	time_high = readl(base + TIMER_TIME_HIGH);
	time = (time_high << 32) | time_low;

	do_div(time, NSEC_PER_SEC);

	rtc_time64_to_tm(time, tm);

	return 0;
}

static int goldfish_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	struct goldfish_rtc *rtcdrv;
	void __iomem *base;
	u64 now64;

	rtcdrv = dev_get_drvdata(dev);
	base = rtcdrv->base;

	now64 = rtc_tm_to_time64(tm) * NSEC_PER_SEC;
	writel((now64 >> 32), base + TIMER_TIME_HIGH);
	writel(now64, base + TIMER_TIME_LOW);

	return 0;
}

static const struct rtc_class_ops goldfish_rtc_ops = {
	.read_time	= goldfish_rtc_read_time,
	.set_time	= goldfish_rtc_set_time,
	.read_alarm	= goldfish_rtc_read_alarm,
	.set_alarm	= goldfish_rtc_set_alarm,
	.alarm_irq_enable = goldfish_rtc_alarm_irq_enable
};

static int goldfish_rtc_probe(struct platform_device *pdev)
{
	struct goldfish_rtc *rtcdrv;
	int err;

	rtcdrv = devm_kzalloc(&pdev->dev, sizeof(*rtcdrv), GFP_KERNEL);
	if (!rtcdrv)
		return -ENOMEM;

	platform_set_drvdata(pdev, rtcdrv);
	rtcdrv->base = devm_platform_ioremap_resource(pdev, 0);
	if (IS_ERR(rtcdrv->base))
		return PTR_ERR(rtcdrv->base);

	rtcdrv->irq = platform_get_irq(pdev, 0);
	if (rtcdrv->irq < 0)
		return -ENODEV;

	rtcdrv->rtc = devm_rtc_allocate_device(&pdev->dev);
	if (IS_ERR(rtcdrv->rtc))
		return PTR_ERR(rtcdrv->rtc);

	rtcdrv->rtc->ops = &goldfish_rtc_ops;
	rtcdrv->rtc->range_max = U64_MAX / NSEC_PER_SEC;

	err = devm_request_irq(&pdev->dev, rtcdrv->irq,
			       goldfish_rtc_interrupt,
			       0, pdev->name, rtcdrv);
	if (err)
		return err;

	return devm_rtc_register_device(rtcdrv->rtc);
}

static const struct of_device_id goldfish_rtc_of_match[] = {
	{ .compatible = "google,goldfish-rtc", },
	{},
};
MODULE_DEVICE_TABLE(of, goldfish_rtc_of_match);

static struct platform_driver goldfish_rtc = {
	.probe = goldfish_rtc_probe,
	.driver = {
		.name = "goldfish_rtc",
		.of_match_table = goldfish_rtc_of_match,
	}
};

module_platform_driver(goldfish_rtc);

MODULE_LICENSE("GPL v2");
Commit	Line	Data
2be7f1b5	1	// SPDX-License-Identifier: GPL-2.0
f22d9cdc MD	2	/* drivers/rtc/rtc-goldfish.c
	3	*
	4	* Copyright (C) 2007 Google, Inc.
	5	* Copyright (C) 2017 Imagination Technologies Ltd.
f22d9cdc MD	6	*/
f22d9cdc MD	7
bd01386e	8	#include <linux/io.h>
f22d9cdc	9	#include <linux/module.h>
6a6ec8c1	10	#include <linux/of.h>
f22d9cdc MD	11	#include <linux/platform_device.h>
f22d9cdc MD	12	#include <linux/rtc.h>
f22d9cdc MD	13
	14	#define TIMER_TIME_LOW 0x00 /* get low bits of current time */
	15	/* and update TIMER_TIME_HIGH */
	16	#define TIMER_TIME_HIGH 0x04 /* get high bits of time at last */
	17	/* TIMER_TIME_LOW read */
	18	#define TIMER_ALARM_LOW 0x08 /* set low bits of alarm and */
	19	/* activate it */
	20	#define TIMER_ALARM_HIGH 0x0c /* set high bits of next alarm */
	21	#define TIMER_IRQ_ENABLED 0x10
	22	#define TIMER_CLEAR_ALARM 0x14
	23	#define TIMER_ALARM_STATUS 0x18
	24	#define TIMER_CLEAR_INTERRUPT 0x1c
	25
	26	struct goldfish_rtc {
	27	void __iomem *base;
	28	int irq;
	29	struct rtc_device *rtc;
	30	};
	31
	32	static int goldfish_rtc_read_alarm(struct device *dev,
	33	struct rtc_wkalrm *alrm)
	34	{
	35	u64 rtc_alarm;
	36	u64 rtc_alarm_low;
	37	u64 rtc_alarm_high;
	38	void __iomem *base;
	39	struct goldfish_rtc *rtcdrv;
	40
	41	rtcdrv = dev_get_drvdata(dev);
	42	base = rtcdrv->base;
	43
	44	rtc_alarm_low = readl(base + TIMER_ALARM_LOW);
	45	rtc_alarm_high = readl(base + TIMER_ALARM_HIGH);
	46	rtc_alarm = (rtc_alarm_high << 32) \| rtc_alarm_low;
	47
	48	do_div(rtc_alarm, NSEC_PER_SEC);
	49	memset(alrm, 0, sizeof(struct rtc_wkalrm));
	50
b509306d	51	rtc_time64_to_tm(rtc_alarm, &alrm->time);
f22d9cdc MD	52
	53	if (readl(base + TIMER_ALARM_STATUS))
	54	alrm->enabled = 1;
	55	else
	56	alrm->enabled = 0;
	57
	58	return 0;
	59	}
	60
	61	static int goldfish_rtc_set_alarm(struct device *dev,
	62	struct rtc_wkalrm *alrm)
	63	{
	64	struct goldfish_rtc *rtcdrv;
f22d9cdc MD	65	u64 rtc_alarm64;
	66	u64 rtc_status_reg;
	67	void __iomem *base;
f22d9cdc MD	68
	69	rtcdrv = dev_get_drvdata(dev);
	70	base = rtcdrv->base;
	71
	72	if (alrm->enabled) {
b509306d	73	rtc_alarm64 = rtc_tm_to_time64(&alrm->time) * NSEC_PER_SEC;
f22d9cdc MD	74	writel((rtc_alarm64 >> 32), base + TIMER_ALARM_HIGH);
f22d9cdc MD	75	writel(rtc_alarm64, base + TIMER_ALARM_LOW);
22f8d5a1	76	writel(1, base + TIMER_IRQ_ENABLED);
f22d9cdc MD	77	} else {
	78	/*
	79	* if this function was called with enabled=0
	80	* then it could mean that the application is
	81	* trying to cancel an ongoing alarm
	82	*/
	83	rtc_status_reg = readl(base + TIMER_ALARM_STATUS);
	84	if (rtc_status_reg)
	85	writel(1, base + TIMER_CLEAR_ALARM);
	86	}
	87
b509306d	88	return 0;
f22d9cdc MD	89	}
	90
	91	static int goldfish_rtc_alarm_irq_enable(struct device *dev,
	92	unsigned int enabled)
	93	{
	94	void __iomem *base;
	95	struct goldfish_rtc *rtcdrv;
	96
	97	rtcdrv = dev_get_drvdata(dev);
	98	base = rtcdrv->base;
	99
	100	if (enabled)
	101	writel(1, base + TIMER_IRQ_ENABLED);
	102	else
	103	writel(0, base + TIMER_IRQ_ENABLED);
	104
	105	return 0;
	106	}
	107
	108	static irqreturn_t goldfish_rtc_interrupt(int irq, void *dev_id)
	109	{
	110	struct goldfish_rtc *rtcdrv = dev_id;
	111	void __iomem *base = rtcdrv->base;
	112
	113	writel(1, base + TIMER_CLEAR_INTERRUPT);
	114
	115	rtc_update_irq(rtcdrv->rtc, 1, RTC_IRQF \| RTC_AF);
	116
	117	return IRQ_HANDLED;
	118	}
	119
	120	static int goldfish_rtc_read_time(struct device dev, struct rtc_time tm)
	121	{
	122	struct goldfish_rtc *rtcdrv;
	123	void __iomem *base;
	124	u64 time_high;
	125	u64 time_low;
	126	u64 time;
	127
	128	rtcdrv = dev_get_drvdata(dev);
	129	base = rtcdrv->base;
	130
	131	time_low = readl(base + TIMER_TIME_LOW);
	132	time_high = readl(base + TIMER_TIME_HIGH);
	133	time = (time_high << 32) \| time_low;
	134
	135	do_div(time, NSEC_PER_SEC);
	136
b509306d	137	rtc_time64_to_tm(time, tm);
f22d9cdc MD	138
	139	return 0;
	140	}
	141
	142	static int goldfish_rtc_set_time(struct device dev, struct rtc_time tm)
	143	{
	144	struct goldfish_rtc *rtcdrv;
	145	void __iomem *base;
f22d9cdc	146	u64 now64;
f22d9cdc MD	147
	148	rtcdrv = dev_get_drvdata(dev);
	149	base = rtcdrv->base;
	150
b509306d AB	151	now64 = rtc_tm_to_time64(tm) * NSEC_PER_SEC;
	152	writel((now64 >> 32), base + TIMER_TIME_HIGH);
	153	writel(now64, base + TIMER_TIME_LOW);
f22d9cdc	154
b509306d	155	return 0;
f22d9cdc MD	156	}
	157
	158	static const struct rtc_class_ops goldfish_rtc_ops = {
	159	.read_time = goldfish_rtc_read_time,
	160	.set_time = goldfish_rtc_set_time,
	161	.read_alarm = goldfish_rtc_read_alarm,
	162	.set_alarm = goldfish_rtc_set_alarm,
	163	.alarm_irq_enable = goldfish_rtc_alarm_irq_enable
	164	};
	165
	166	static int goldfish_rtc_probe(struct platform_device *pdev)
	167	{
	168	struct goldfish_rtc *rtcdrv;
f22d9cdc MD	169	int err;
	170
	171	rtcdrv = devm_kzalloc(&pdev->dev, sizeof(*rtcdrv), GFP_KERNEL);
	172	if (!rtcdrv)
	173	return -ENOMEM;
	174
	175	platform_set_drvdata(pdev, rtcdrv);
89576beb	176	rtcdrv->base = devm_platform_ioremap_resource(pdev, 0);
f22d9cdc	177	if (IS_ERR(rtcdrv->base))
f4c29a09	178	return PTR_ERR(rtcdrv->base);
f22d9cdc MD	179
	180	rtcdrv->irq = platform_get_irq(pdev, 0);
	181	if (rtcdrv->irq < 0)
	182	return -ENODEV;
	183
409b84e3	184	rtcdrv->rtc = devm_rtc_allocate_device(&pdev->dev);
f22d9cdc MD	185	if (IS_ERR(rtcdrv->rtc))
	186	return PTR_ERR(rtcdrv->rtc);
	187
409b84e3	188	rtcdrv->rtc->ops = &goldfish_rtc_ops;
5e2954fd	189	rtcdrv->rtc->range_max = U64_MAX / NSEC_PER_SEC;
409b84e3	190
f22d9cdc MD	191	err = devm_request_irq(&pdev->dev, rtcdrv->irq,
	192	goldfish_rtc_interrupt,
	193	0, pdev->name, rtcdrv);
	194	if (err)
	195	return err;
	196
fdcfd854	197	return devm_rtc_register_device(rtcdrv->rtc);
f22d9cdc MD	198	}
	199
	200	static const struct of_device_id goldfish_rtc_of_match[] = {
	201	{ .compatible = "google,goldfish-rtc", },
	202	{},
	203	};
	204	MODULE_DEVICE_TABLE(of, goldfish_rtc_of_match);
	205
	206	static struct platform_driver goldfish_rtc = {
	207	.probe = goldfish_rtc_probe,
	208	.driver = {
	209	.name = "goldfish_rtc",
	210	.of_match_table = goldfish_rtc_of_match,
	211	}
	212	};
	213
	214	module_platform_driver(goldfish_rtc);
82d632b8 JH	215
82d632b8 JH	216	MODULE_LICENSE("GPL v2");