[linux-2.6-block.git] / drivers / rtc / rtc-fm3130.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * rtc-fm3130.c - RTC driver for Ramtron FM3130 I2C chip.
 *
 *  Copyright (C) 2008 Sergey Lapin
 *  Based on ds1307 driver by James Chapman and David Brownell
 */

#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/rtc.h>
#include <linux/bcd.h>
#include <linux/slab.h>

#define FM3130_RTC_CONTROL	(0x0)
#define FM3130_CAL_CONTROL	(0x1)
#define FM3130_RTC_SECONDS	(0x2)
#define FM3130_RTC_MINUTES	(0x3)
#define FM3130_RTC_HOURS	(0x4)
#define FM3130_RTC_DAY		(0x5)
#define FM3130_RTC_DATE		(0x6)
#define FM3130_RTC_MONTHS	(0x7)
#define FM3130_RTC_YEARS	(0x8)

#define FM3130_ALARM_SECONDS	(0x9)
#define FM3130_ALARM_MINUTES	(0xa)
#define FM3130_ALARM_HOURS	(0xb)
#define FM3130_ALARM_DATE	(0xc)
#define FM3130_ALARM_MONTHS	(0xd)
#define FM3130_ALARM_WP_CONTROL	(0xe)

#define FM3130_CAL_CONTROL_BIT_nOSCEN (1 << 7) /* Osciallator enabled */
#define FM3130_RTC_CONTROL_BIT_LB (1 << 7) /* Low battery */
#define FM3130_RTC_CONTROL_BIT_AF (1 << 6) /* Alarm flag */
#define FM3130_RTC_CONTROL_BIT_CF (1 << 5) /* Century overflow */
#define FM3130_RTC_CONTROL_BIT_POR (1 << 4) /* Power on reset */
#define FM3130_RTC_CONTROL_BIT_AEN (1 << 3) /* Alarm enable */
#define FM3130_RTC_CONTROL_BIT_CAL (1 << 2) /* Calibration mode */
#define FM3130_RTC_CONTROL_BIT_WRITE (1 << 1) /* W=1 -> write mode W=0 normal */
#define FM3130_RTC_CONTROL_BIT_READ (1 << 0) /* R=1 -> read mode R=0 normal */

#define FM3130_CLOCK_REGS 7
#define FM3130_ALARM_REGS 5

struct fm3130 {
	u8			reg_addr_time;
	u8			reg_addr_alarm;
	u8			regs[15];
	struct i2c_msg		msg[4];
	struct i2c_client	*client;
	struct rtc_device	*rtc;
	int			alarm_valid;
	int			data_valid;
};
static const struct i2c_device_id fm3130_id[] = {
	{ "fm3130", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, fm3130_id);

#define FM3130_MODE_NORMAL		0
#define FM3130_MODE_WRITE		1
#define FM3130_MODE_READ		2

static void fm3130_rtc_mode(struct device *dev, int mode)
{
	struct fm3130 *fm3130 = dev_get_drvdata(dev);

	fm3130->regs[FM3130_RTC_CONTROL] =
		i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
	switch (mode) {
	case FM3130_MODE_NORMAL:
		fm3130->regs[FM3130_RTC_CONTROL] &=
			~(FM3130_RTC_CONTROL_BIT_WRITE |
			FM3130_RTC_CONTROL_BIT_READ);
		break;
	case FM3130_MODE_WRITE:
		fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_WRITE;
		break;
	case FM3130_MODE_READ:
		fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_READ;
		break;
	default:
		dev_dbg(dev, "invalid mode %d\n", mode);
		break;
	}

	i2c_smbus_write_byte_data(fm3130->client,
		 FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL]);
}

static int fm3130_get_time(struct device *dev, struct rtc_time *t)
{
	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	int		tmp;

	if (!fm3130->data_valid) {
		/* We have invalid data in RTC, probably due
		to battery faults or other problems. Return EIO
		for now, it will allow us to set data later instead
		of error during probing which disables device */
		return -EIO;
	}
	fm3130_rtc_mode(dev, FM3130_MODE_READ);

	/* read the RTC date and time registers all at once */
	tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
			fm3130->msg, 2);
	if (tmp != 2) {
		dev_err(dev, "%s error %d\n", "read", tmp);
		return -EIO;
	}

	fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);

	dev_dbg(dev, "%s: %15ph\n", "read", fm3130->regs);

	t->tm_sec = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
	t->tm_min = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
	tmp = fm3130->regs[FM3130_RTC_HOURS] & 0x3f;
	t->tm_hour = bcd2bin(tmp);
	t->tm_wday = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x07) - 1;
	t->tm_mday = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
	tmp = fm3130->regs[FM3130_RTC_MONTHS] & 0x1f;
	t->tm_mon = bcd2bin(tmp) - 1;

	/* assume 20YY not 19YY, and ignore CF bit */
	t->tm_year = bcd2bin(fm3130->regs[FM3130_RTC_YEARS]) + 100;

	dev_dbg(dev, "%s secs=%d, mins=%d, "
		"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
		"read", t->tm_sec, t->tm_min,
		t->tm_hour, t->tm_mday,
		t->tm_mon, t->tm_year, t->tm_wday);

	return 0;
}


static int fm3130_set_time(struct device *dev, struct rtc_time *t)
{
	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	int		tmp, i;
	u8		*buf = fm3130->regs;

	dev_dbg(dev, "%s secs=%d, mins=%d, "
		"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
		"write", t->tm_sec, t->tm_min,
		t->tm_hour, t->tm_mday,
		t->tm_mon, t->tm_year, t->tm_wday);

	/* first register addr */
	buf[FM3130_RTC_SECONDS] = bin2bcd(t->tm_sec);
	buf[FM3130_RTC_MINUTES] = bin2bcd(t->tm_min);
	buf[FM3130_RTC_HOURS] = bin2bcd(t->tm_hour);
	buf[FM3130_RTC_DAY] = bin2bcd(t->tm_wday + 1);
	buf[FM3130_RTC_DATE] = bin2bcd(t->tm_mday);
	buf[FM3130_RTC_MONTHS] = bin2bcd(t->tm_mon + 1);

	/* assume 20YY not 19YY */
	tmp = t->tm_year - 100;
	buf[FM3130_RTC_YEARS] = bin2bcd(tmp);

	dev_dbg(dev, "%s: %15ph\n", "write", buf);

	fm3130_rtc_mode(dev, FM3130_MODE_WRITE);

	/* Writing time registers, we don't support multibyte transfers */
	for (i = 0; i < FM3130_CLOCK_REGS; i++) {
		i2c_smbus_write_byte_data(fm3130->client,
					FM3130_RTC_SECONDS + i,
					fm3130->regs[FM3130_RTC_SECONDS + i]);
	}

	fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);

	/* We assume here that data are valid once written */
	if (!fm3130->data_valid)
		fm3130->data_valid = 1;
	return 0;
}

static int fm3130_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	int tmp;
	struct rtc_time *tm = &alrm->time;

	if (!fm3130->alarm_valid) {
		/*
		 * We have invalid alarm in RTC, probably due to battery faults
		 * or other problems. Return EIO for now, it will allow us to
		 * set alarm value later instead of error during probing which
		 * disables device
		 */
		return -EIO;
	}

	/* read the RTC alarm registers all at once */
	tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
			&fm3130->msg[2], 2);
	if (tmp != 2) {
		dev_err(dev, "%s error %d\n", "read", tmp);
		return -EIO;
	}
	dev_dbg(dev, "alarm read %02x %02x %02x %02x %02x\n",
			fm3130->regs[FM3130_ALARM_SECONDS],
			fm3130->regs[FM3130_ALARM_MINUTES],
			fm3130->regs[FM3130_ALARM_HOURS],
			fm3130->regs[FM3130_ALARM_DATE],
			fm3130->regs[FM3130_ALARM_MONTHS]);

	tm->tm_sec	= bcd2bin(fm3130->regs[FM3130_ALARM_SECONDS] & 0x7F);
	tm->tm_min	= bcd2bin(fm3130->regs[FM3130_ALARM_MINUTES] & 0x7F);
	tm->tm_hour	= bcd2bin(fm3130->regs[FM3130_ALARM_HOURS] & 0x3F);
	tm->tm_mday	= bcd2bin(fm3130->regs[FM3130_ALARM_DATE] & 0x3F);
	tm->tm_mon	= bcd2bin(fm3130->regs[FM3130_ALARM_MONTHS] & 0x1F);

	if (tm->tm_mon > 0)
		tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */

	dev_dbg(dev, "%s secs=%d, mins=%d, "
		"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
		"read alarm", tm->tm_sec, tm->tm_min,
		tm->tm_hour, tm->tm_mday,
		tm->tm_mon, tm->tm_year, tm->tm_wday);

	/* check if alarm enabled */
	fm3130->regs[FM3130_RTC_CONTROL] =
		i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);

	if ((fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_AEN) &&
		(~fm3130->regs[FM3130_RTC_CONTROL] &
			FM3130_RTC_CONTROL_BIT_CAL)) {
		alrm->enabled = 1;
	}

	return 0;
}

static int fm3130_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	struct rtc_time *tm = &alrm->time;
	int i;

	dev_dbg(dev, "%s secs=%d, mins=%d, "
		"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
		"write alarm", tm->tm_sec, tm->tm_min,
		tm->tm_hour, tm->tm_mday,
		tm->tm_mon, tm->tm_year, tm->tm_wday);

	fm3130->regs[FM3130_ALARM_SECONDS] =
		(tm->tm_sec != -1) ? bin2bcd(tm->tm_sec) : 0x80;

	fm3130->regs[FM3130_ALARM_MINUTES] =
		(tm->tm_min != -1) ? bin2bcd(tm->tm_min) : 0x80;

	fm3130->regs[FM3130_ALARM_HOURS] =
		(tm->tm_hour != -1) ? bin2bcd(tm->tm_hour) : 0x80;

	fm3130->regs[FM3130_ALARM_DATE] =
		(tm->tm_mday != -1) ? bin2bcd(tm->tm_mday) : 0x80;

	fm3130->regs[FM3130_ALARM_MONTHS] =
		(tm->tm_mon != -1) ? bin2bcd(tm->tm_mon + 1) : 0x80;

	dev_dbg(dev, "alarm write %02x %02x %02x %02x %02x\n",
			fm3130->regs[FM3130_ALARM_SECONDS],
			fm3130->regs[FM3130_ALARM_MINUTES],
			fm3130->regs[FM3130_ALARM_HOURS],
			fm3130->regs[FM3130_ALARM_DATE],
			fm3130->regs[FM3130_ALARM_MONTHS]);
	/* Writing time registers, we don't support multibyte transfers */
	for (i = 0; i < FM3130_ALARM_REGS; i++) {
		i2c_smbus_write_byte_data(fm3130->client,
					FM3130_ALARM_SECONDS + i,
					fm3130->regs[FM3130_ALARM_SECONDS + i]);
	}
	fm3130->regs[FM3130_RTC_CONTROL] =
		i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);

	/* enable or disable alarm */
	if (alrm->enabled) {
		i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
			(fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_CAL)) |
					FM3130_RTC_CONTROL_BIT_AEN);
	} else {
		i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
			fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_CAL) &
					~(FM3130_RTC_CONTROL_BIT_AEN));
	}

	/* We assume here that data is valid once written */
	if (!fm3130->alarm_valid)
		fm3130->alarm_valid = 1;

	return 0;
}

static int fm3130_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	int ret = 0;

	fm3130->regs[FM3130_RTC_CONTROL] =
		i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);

	dev_dbg(dev, "alarm_irq_enable: enable=%d, FM3130_RTC_CONTROL=%02x\n",
		enabled, fm3130->regs[FM3130_RTC_CONTROL]);

	switch (enabled) {
	case 0:		/* alarm off */
		ret = i2c_smbus_write_byte_data(fm3130->client,
			FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_CAL) &
					~(FM3130_RTC_CONTROL_BIT_AEN));
		break;
	case 1:		/* alarm on */
		ret = i2c_smbus_write_byte_data(fm3130->client,
			FM3130_RTC_CONTROL, (fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_CAL)) |
					FM3130_RTC_CONTROL_BIT_AEN);
		break;
	default:
		ret = -EINVAL;
		break;
	}

	return ret;
}

static const struct rtc_class_ops fm3130_rtc_ops = {
	.read_time	= fm3130_get_time,
	.set_time	= fm3130_set_time,
	.read_alarm	= fm3130_read_alarm,
	.set_alarm	= fm3130_set_alarm,
	.alarm_irq_enable = fm3130_alarm_irq_enable,
};

static struct i2c_driver fm3130_driver;

static int fm3130_probe(struct i2c_client *client,
			const struct i2c_device_id *id)
{
	struct fm3130		*fm3130;
	int			err = -ENODEV;
	int			tmp;
	struct i2c_adapter	*adapter = to_i2c_adapter(client->dev.parent);

	if (!i2c_check_functionality(adapter,
			I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
		return -EIO;

	fm3130 = devm_kzalloc(&client->dev, sizeof(struct fm3130), GFP_KERNEL);

	if (!fm3130)
		return -ENOMEM;

	fm3130->client = client;
	i2c_set_clientdata(client, fm3130);
	fm3130->reg_addr_time = FM3130_RTC_SECONDS;
	fm3130->reg_addr_alarm = FM3130_ALARM_SECONDS;

	/* Messages to read time */
	fm3130->msg[0].addr = client->addr;
	fm3130->msg[0].flags = 0;
	fm3130->msg[0].len = 1;
	fm3130->msg[0].buf = &fm3130->reg_addr_time;

	fm3130->msg[1].addr = client->addr;
	fm3130->msg[1].flags = I2C_M_RD;
	fm3130->msg[1].len = FM3130_CLOCK_REGS;
	fm3130->msg[1].buf = &fm3130->regs[FM3130_RTC_SECONDS];

	/* Messages to read alarm */
	fm3130->msg[2].addr = client->addr;
	fm3130->msg[2].flags = 0;
	fm3130->msg[2].len = 1;
	fm3130->msg[2].buf = &fm3130->reg_addr_alarm;

	fm3130->msg[3].addr = client->addr;
	fm3130->msg[3].flags = I2C_M_RD;
	fm3130->msg[3].len = FM3130_ALARM_REGS;
	fm3130->msg[3].buf = &fm3130->regs[FM3130_ALARM_SECONDS];

	fm3130->alarm_valid = 0;
	fm3130->data_valid = 0;

	tmp = i2c_transfer(adapter, fm3130->msg, 4);
	if (tmp != 4) {
		dev_dbg(&client->dev, "read error %d\n", tmp);
		err = -EIO;
		goto exit_free;
	}

	fm3130->regs[FM3130_RTC_CONTROL] =
		i2c_smbus_read_byte_data(client, FM3130_RTC_CONTROL);
	fm3130->regs[FM3130_CAL_CONTROL] =
		i2c_smbus_read_byte_data(client, FM3130_CAL_CONTROL);

	/* Disabling calibration mode */
	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_CAL) {
		i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
			fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_CAL));
		dev_warn(&client->dev, "Disabling calibration mode!\n");
	}

	/* Disabling read and write modes */
	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_WRITE ||
	    fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_READ) {
		i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
			fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_READ |
					FM3130_RTC_CONTROL_BIT_WRITE));
		dev_warn(&client->dev, "Disabling READ or WRITE mode!\n");
	}

	/* oscillator off?  turn it on, so clock can tick. */
	if (fm3130->regs[FM3130_CAL_CONTROL] & FM3130_CAL_CONTROL_BIT_nOSCEN)
		i2c_smbus_write_byte_data(client, FM3130_CAL_CONTROL,
			fm3130->regs[FM3130_CAL_CONTROL] &
				~(FM3130_CAL_CONTROL_BIT_nOSCEN));

	/* low battery?  clear flag, and warn */
	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_LB) {
		i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
			fm3130->regs[FM3130_RTC_CONTROL] &
				~(FM3130_RTC_CONTROL_BIT_LB));
		dev_warn(&client->dev, "Low battery!\n");
	}

	/* check if Power On Reset bit is set */
	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_POR) {
		i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
			fm3130->regs[FM3130_RTC_CONTROL] &
				~FM3130_RTC_CONTROL_BIT_POR);
		dev_dbg(&client->dev, "POR bit is set\n");
	}
	/* ACS is controlled by alarm */
	i2c_smbus_write_byte_data(client, FM3130_ALARM_WP_CONTROL, 0x80);

	/* alarm registers sanity check */
	tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
	if (tmp > 59)
		goto bad_alarm;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
	if (tmp > 59)
		goto bad_alarm;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
	if (tmp > 23)
		goto bad_alarm;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
	if (tmp == 0 || tmp > 31)
		goto bad_alarm;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
	if (tmp == 0 || tmp > 12)
		goto bad_alarm;

	fm3130->alarm_valid = 1;

bad_alarm:

	/* clock registers sanity chek */
	tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
	if (tmp > 59)
		goto bad_clock;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
	if (tmp > 59)
		goto bad_clock;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
	if (tmp > 23)
		goto bad_clock;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x7);
	if (tmp == 0 || tmp > 7)
		goto bad_clock;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
	if (tmp == 0 || tmp > 31)
		goto bad_clock;

	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
	if (tmp == 0 || tmp > 12)
		goto bad_clock;

	fm3130->data_valid = 1;

bad_clock:

	if (!fm3130->data_valid || !fm3130->alarm_valid)
		dev_dbg(&client->dev, "%s: %15ph\n", "bogus registers",
			fm3130->regs);

	/* We won't bail out here because we just got invalid data.
	   Time setting from u-boot doesn't work anyway */
	fm3130->rtc = devm_rtc_device_register(&client->dev, client->name,
				&fm3130_rtc_ops, THIS_MODULE);
	if (IS_ERR(fm3130->rtc)) {
		err = PTR_ERR(fm3130->rtc);
		dev_err(&client->dev,
			"unable to register the class device\n");
		goto exit_free;
	}
	return 0;
exit_free:
	return err;
}

static struct i2c_driver fm3130_driver = {
	.driver = {
		.name	= "rtc-fm3130",
	},
	.probe		= fm3130_probe,
	.id_table	= fm3130_id,
};

module_i2c_driver(fm3130_driver);

MODULE_DESCRIPTION("RTC driver for FM3130");
MODULE_AUTHOR("Sergey Lapin <slapin@ossfans.org>");
MODULE_LICENSE("GPL");
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
c6d8f400 SL	2	/*
	3	* rtc-fm3130.c - RTC driver for Ramtron FM3130 I2C chip.
	4	*
	5	* Copyright (C) 2008 Sergey Lapin
	6	* Based on ds1307 driver by James Chapman and David Brownell
c6d8f400 SL	7	*/
	8
	9	#include <linux/module.h>
	10	#include <linux/i2c.h>
	11	#include <linux/rtc.h>
	12	#include <linux/bcd.h>
5a0e3ad6	13	#include <linux/slab.h>
c6d8f400 SL	14
	15	#define FM3130_RTC_CONTROL (0x0)
	16	#define FM3130_CAL_CONTROL (0x1)
	17	#define FM3130_RTC_SECONDS (0x2)
	18	#define FM3130_RTC_MINUTES (0x3)
	19	#define FM3130_RTC_HOURS (0x4)
	20	#define FM3130_RTC_DAY (0x5)
	21	#define FM3130_RTC_DATE (0x6)
	22	#define FM3130_RTC_MONTHS (0x7)
	23	#define FM3130_RTC_YEARS (0x8)
	24
	25	#define FM3130_ALARM_SECONDS (0x9)
	26	#define FM3130_ALARM_MINUTES (0xa)
	27	#define FM3130_ALARM_HOURS (0xb)
	28	#define FM3130_ALARM_DATE (0xc)
	29	#define FM3130_ALARM_MONTHS (0xd)
	30	#define FM3130_ALARM_WP_CONTROL (0xe)
	31
	32	#define FM3130_CAL_CONTROL_BIT_nOSCEN (1 << 7) /* Osciallator enabled */
	33	#define FM3130_RTC_CONTROL_BIT_LB (1 << 7) /* Low battery */
	34	#define FM3130_RTC_CONTROL_BIT_AF (1 << 6) /* Alarm flag */
	35	#define FM3130_RTC_CONTROL_BIT_CF (1 << 5) /* Century overflow */
	36	#define FM3130_RTC_CONTROL_BIT_POR (1 << 4) /* Power on reset */
	37	#define FM3130_RTC_CONTROL_BIT_AEN (1 << 3) /* Alarm enable */
	38	#define FM3130_RTC_CONTROL_BIT_CAL (1 << 2) /* Calibration mode */
	39	#define FM3130_RTC_CONTROL_BIT_WRITE (1 << 1) /* W=1 -> write mode W=0 normal */
	40	#define FM3130_RTC_CONTROL_BIT_READ (1 << 0) /* R=1 -> read mode R=0 normal */
	41
	42	#define FM3130_CLOCK_REGS 7
	43	#define FM3130_ALARM_REGS 5
	44
	45	struct fm3130 {
	46	u8 reg_addr_time;
c865e922	47	u8 reg_addr_alarm;
c6d8f400 SL	48	u8 regs[15];
	49	struct i2c_msg msg[4];
	50	struct i2c_client *client;
	51	struct rtc_device *rtc;
f3f99cf3	52	int alarm_valid;
c6d8f400	53	int data_valid;
c6d8f400 SL	54	};
c6d8f400 SL	55	static const struct i2c_device_id fm3130_id[] = {
876550aa	56	{ "fm3130", 0 },
c6d8f400 SL	57	{ }
	58	};
	59	MODULE_DEVICE_TABLE(i2c, fm3130_id);
	60
	61	#define FM3130_MODE_NORMAL 0
	62	#define FM3130_MODE_WRITE 1
	63	#define FM3130_MODE_READ 2
	64
	65	static void fm3130_rtc_mode(struct device *dev, int mode)
	66	{
	67	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	68
	69	fm3130->regs[FM3130_RTC_CONTROL] =
	70	i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
	71	switch (mode) {
	72	case FM3130_MODE_NORMAL:
	73	fm3130->regs[FM3130_RTC_CONTROL] &=
	74	~(FM3130_RTC_CONTROL_BIT_WRITE \|
	75	FM3130_RTC_CONTROL_BIT_READ);
	76	break;
	77	case FM3130_MODE_WRITE:
	78	fm3130->regs[FM3130_RTC_CONTROL] \|= FM3130_RTC_CONTROL_BIT_WRITE;
	79	break;
	80	case FM3130_MODE_READ:
	81	fm3130->regs[FM3130_RTC_CONTROL] \|= FM3130_RTC_CONTROL_BIT_READ;
	82	break;
	83	default:
	84	dev_dbg(dev, "invalid mode %d\n", mode);
	85	break;
	86	}
f3f99cf3	87
c6d8f400 SL	88	i2c_smbus_write_byte_data(fm3130->client,
	89	FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL]);
	90	}
	91
	92	static int fm3130_get_time(struct device dev, struct rtc_time t)
	93	{
	94	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	95	int tmp;
	96
	97	if (!fm3130->data_valid) {
	98	/* We have invalid data in RTC, probably due
	99	to battery faults or other problems. Return EIO
fd0961ff	100	for now, it will allow us to set data later instead
c6d8f400 SL	101	of error during probing which disables device */
	102	return -EIO;
	103	}
	104	fm3130_rtc_mode(dev, FM3130_MODE_READ);
	105
	106	/* read the RTC date and time registers all at once */
	107	tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
	108	fm3130->msg, 2);
	109	if (tmp != 2) {
	110	dev_err(dev, "%s error %d\n", "read", tmp);
	111	return -EIO;
	112	}
	113
	114	fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
	115
01a4ca16	116	dev_dbg(dev, "%s: %15ph\n", "read", fm3130->regs);
c6d8f400	117
fe20ba70 AB	118	t->tm_sec = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
fe20ba70 AB	119	t->tm_min = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
c6d8f400	120	tmp = fm3130->regs[FM3130_RTC_HOURS] & 0x3f;
fe20ba70 AB	121	t->tm_hour = bcd2bin(tmp);
	122	t->tm_wday = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x07) - 1;
	123	t->tm_mday = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
c6d8f400	124	tmp = fm3130->regs[FM3130_RTC_MONTHS] & 0x1f;
fe20ba70	125	t->tm_mon = bcd2bin(tmp) - 1;
c6d8f400 SL	126
c6d8f400 SL	127	/* assume 20YY not 19YY, and ignore CF bit */
fe20ba70	128	t->tm_year = bcd2bin(fm3130->regs[FM3130_RTC_YEARS]) + 100;
c6d8f400 SL	129
	130	dev_dbg(dev, "%s secs=%d, mins=%d, "
	131	"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
	132	"read", t->tm_sec, t->tm_min,
	133	t->tm_hour, t->tm_mday,
	134	t->tm_mon, t->tm_year, t->tm_wday);
	135
22652ba7	136	return 0;
c6d8f400 SL	137	}
	138
	139
	140	static int fm3130_set_time(struct device dev, struct rtc_time t)
	141	{
	142	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	143	int tmp, i;
	144	u8 *buf = fm3130->regs;
	145
	146	dev_dbg(dev, "%s secs=%d, mins=%d, "
	147	"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
	148	"write", t->tm_sec, t->tm_min,
	149	t->tm_hour, t->tm_mday,
	150	t->tm_mon, t->tm_year, t->tm_wday);
	151
	152	/* first register addr */
fe20ba70 AB	153	buf[FM3130_RTC_SECONDS] = bin2bcd(t->tm_sec);
	154	buf[FM3130_RTC_MINUTES] = bin2bcd(t->tm_min);
	155	buf[FM3130_RTC_HOURS] = bin2bcd(t->tm_hour);
	156	buf[FM3130_RTC_DAY] = bin2bcd(t->tm_wday + 1);
	157	buf[FM3130_RTC_DATE] = bin2bcd(t->tm_mday);
	158	buf[FM3130_RTC_MONTHS] = bin2bcd(t->tm_mon + 1);
c6d8f400 SL	159
	160	/* assume 20YY not 19YY */
	161	tmp = t->tm_year - 100;
fe20ba70	162	buf[FM3130_RTC_YEARS] = bin2bcd(tmp);
c6d8f400	163
01a4ca16	164	dev_dbg(dev, "%s: %15ph\n", "write", buf);
c6d8f400 SL	165
	166	fm3130_rtc_mode(dev, FM3130_MODE_WRITE);
	167
	168	/* Writing time registers, we don't support multibyte transfers */
	169	for (i = 0; i < FM3130_CLOCK_REGS; i++) {
	170	i2c_smbus_write_byte_data(fm3130->client,
	171	FM3130_RTC_SECONDS + i,
	172	fm3130->regs[FM3130_RTC_SECONDS + i]);
	173	}
	174
	175	fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
	176
	177	/* We assume here that data are valid once written */
	178	if (!fm3130->data_valid)
	179	fm3130->data_valid = 1;
	180	return 0;
	181	}
	182
	183	static int fm3130_read_alarm(struct device dev, struct rtc_wkalrm alrm)
	184	{
	185	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	186	int tmp;
	187	struct rtc_time *tm = &alrm->time;
f3f99cf3 SM	188
	189	if (!fm3130->alarm_valid) {
	190	/*
	191	* We have invalid alarm in RTC, probably due to battery faults
	192	* or other problems. Return EIO for now, it will allow us to
	193	* set alarm value later instead of error during probing which
	194	* disables device
	195	*/
	196	return -EIO;
	197	}
	198
c6d8f400 SL	199	/* read the RTC alarm registers all at once */
	200	tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
	201	&fm3130->msg[2], 2);
	202	if (tmp != 2) {
	203	dev_err(dev, "%s error %d\n", "read", tmp);
	204	return -EIO;
	205	}
	206	dev_dbg(dev, "alarm read %02x %02x %02x %02x %02x\n",
	207	fm3130->regs[FM3130_ALARM_SECONDS],
	208	fm3130->regs[FM3130_ALARM_MINUTES],
	209	fm3130->regs[FM3130_ALARM_HOURS],
	210	fm3130->regs[FM3130_ALARM_DATE],
	211	fm3130->regs[FM3130_ALARM_MONTHS]);
	212
fe20ba70 AB	213	tm->tm_sec = bcd2bin(fm3130->regs[FM3130_ALARM_SECONDS] & 0x7F);
	214	tm->tm_min = bcd2bin(fm3130->regs[FM3130_ALARM_MINUTES] & 0x7F);
	215	tm->tm_hour = bcd2bin(fm3130->regs[FM3130_ALARM_HOURS] & 0x3F);
	216	tm->tm_mday = bcd2bin(fm3130->regs[FM3130_ALARM_DATE] & 0x3F);
	217	tm->tm_mon = bcd2bin(fm3130->regs[FM3130_ALARM_MONTHS] & 0x1F);
f3f99cf3	218
c6d8f400 SL	219	if (tm->tm_mon > 0)
c6d8f400 SL	220	tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
f3f99cf3	221
c6d8f400 SL	222	dev_dbg(dev, "%s secs=%d, mins=%d, "
	223	"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
	224	"read alarm", tm->tm_sec, tm->tm_min,
	225	tm->tm_hour, tm->tm_mday,
	226	tm->tm_mon, tm->tm_year, tm->tm_wday);
	227
f3f99cf3 SM	228	/* check if alarm enabled */
	229	fm3130->regs[FM3130_RTC_CONTROL] =
	230	i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
	231
	232	if ((fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_AEN) &&
	233	(~fm3130->regs[FM3130_RTC_CONTROL] &
	234	FM3130_RTC_CONTROL_BIT_CAL)) {
	235	alrm->enabled = 1;
	236	}
	237
c6d8f400 SL	238	return 0;
	239	}
	240
	241	static int fm3130_set_alarm(struct device dev, struct rtc_wkalrm alrm)
	242	{
	243	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	244	struct rtc_time *tm = &alrm->time;
	245	int i;
	246
	247	dev_dbg(dev, "%s secs=%d, mins=%d, "
	248	"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
	249	"write alarm", tm->tm_sec, tm->tm_min,
	250	tm->tm_hour, tm->tm_mday,
	251	tm->tm_mon, tm->tm_year, tm->tm_wday);
	252
f3f99cf3 SM	253	fm3130->regs[FM3130_ALARM_SECONDS] =
f3f99cf3 SM	254	(tm->tm_sec != -1) ? bin2bcd(tm->tm_sec) : 0x80;
c6d8f400	255
f3f99cf3 SM	256	fm3130->regs[FM3130_ALARM_MINUTES] =
f3f99cf3 SM	257	(tm->tm_min != -1) ? bin2bcd(tm->tm_min) : 0x80;
c6d8f400	258
f3f99cf3 SM	259	fm3130->regs[FM3130_ALARM_HOURS] =
f3f99cf3 SM	260	(tm->tm_hour != -1) ? bin2bcd(tm->tm_hour) : 0x80;
c6d8f400	261
f3f99cf3 SM	262	fm3130->regs[FM3130_ALARM_DATE] =
f3f99cf3 SM	263	(tm->tm_mday != -1) ? bin2bcd(tm->tm_mday) : 0x80;
c6d8f400	264
f3f99cf3 SM	265	fm3130->regs[FM3130_ALARM_MONTHS] =
f3f99cf3 SM	266	(tm->tm_mon != -1) ? bin2bcd(tm->tm_mon + 1) : 0x80;
c6d8f400 SL	267
	268	dev_dbg(dev, "alarm write %02x %02x %02x %02x %02x\n",
	269	fm3130->regs[FM3130_ALARM_SECONDS],
	270	fm3130->regs[FM3130_ALARM_MINUTES],
	271	fm3130->regs[FM3130_ALARM_HOURS],
	272	fm3130->regs[FM3130_ALARM_DATE],
	273	fm3130->regs[FM3130_ALARM_MONTHS]);
	274	/* Writing time registers, we don't support multibyte transfers */
	275	for (i = 0; i < FM3130_ALARM_REGS; i++) {
	276	i2c_smbus_write_byte_data(fm3130->client,
	277	FM3130_ALARM_SECONDS + i,
	278	fm3130->regs[FM3130_ALARM_SECONDS + i]);
	279	}
	280	fm3130->regs[FM3130_RTC_CONTROL] =
	281	i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
f3f99cf3 SM	282
f3f99cf3 SM	283	/* enable or disable alarm */
c6d8f400 SL	284	if (alrm->enabled) {
	285	i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
	286	(fm3130->regs[FM3130_RTC_CONTROL] &
	287	~(FM3130_RTC_CONTROL_BIT_CAL)) \|
	288	FM3130_RTC_CONTROL_BIT_AEN);
	289	} else {
	290	i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
	291	fm3130->regs[FM3130_RTC_CONTROL] &
f3f99cf3 SM	292	~(FM3130_RTC_CONTROL_BIT_CAL) &
f3f99cf3 SM	293	~(FM3130_RTC_CONTROL_BIT_AEN));
c6d8f400	294	}
f3f99cf3 SM	295
	296	/* We assume here that data is valid once written */
	297	if (!fm3130->alarm_valid)
	298	fm3130->alarm_valid = 1;
	299
c6d8f400 SL	300	return 0;
	301	}
	302
f3f99cf3 SM	303	static int fm3130_alarm_irq_enable(struct device *dev, unsigned int enabled)
	304	{
	305	struct fm3130 *fm3130 = dev_get_drvdata(dev);
	306	int ret = 0;
	307
	308	fm3130->regs[FM3130_RTC_CONTROL] =
	309	i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
	310
	311	dev_dbg(dev, "alarm_irq_enable: enable=%d, FM3130_RTC_CONTROL=%02x\n",
	312	enabled, fm3130->regs[FM3130_RTC_CONTROL]);
	313
	314	switch (enabled) {
	315	case 0: /* alarm off */
	316	ret = i2c_smbus_write_byte_data(fm3130->client,
	317	FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL] &
	318	~(FM3130_RTC_CONTROL_BIT_CAL) &
	319	~(FM3130_RTC_CONTROL_BIT_AEN));
	320	break;
	321	case 1: /* alarm on */
	322	ret = i2c_smbus_write_byte_data(fm3130->client,
	323	FM3130_RTC_CONTROL, (fm3130->regs[FM3130_RTC_CONTROL] &
	324	~(FM3130_RTC_CONTROL_BIT_CAL)) \|
	325	FM3130_RTC_CONTROL_BIT_AEN);
	326	break;
	327	default:
	328	ret = -EINVAL;
	329	break;
	330	}
	331
	332	return ret;
	333	}
	334
c6d8f400 SL	335	static const struct rtc_class_ops fm3130_rtc_ops = {
	336	.read_time = fm3130_get_time,
	337	.set_time = fm3130_set_time,
	338	.read_alarm = fm3130_read_alarm,
	339	.set_alarm = fm3130_set_alarm,
f3f99cf3	340	.alarm_irq_enable = fm3130_alarm_irq_enable,
c6d8f400 SL	341	};
	342
	343	static struct i2c_driver fm3130_driver;
	344
5a167f45 GKH	345	static int fm3130_probe(struct i2c_client *client,
5a167f45 GKH	346	const struct i2c_device_id *id)
c6d8f400 SL	347	{
	348	struct fm3130 *fm3130;
	349	int err = -ENODEV;
	350	int tmp;
	351	struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
	352
	353	if (!i2c_check_functionality(adapter,
	354	I2C_FUNC_I2C \| I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
	355	return -EIO;
	356
c54a52e3	357	fm3130 = devm_kzalloc(&client->dev, sizeof(struct fm3130), GFP_KERNEL);
c6d8f400 SL	358
	359	if (!fm3130)
	360	return -ENOMEM;
	361
	362	fm3130->client = client;
	363	i2c_set_clientdata(client, fm3130);
	364	fm3130->reg_addr_time = FM3130_RTC_SECONDS;
	365	fm3130->reg_addr_alarm = FM3130_ALARM_SECONDS;
	366
	367	/* Messages to read time */
	368	fm3130->msg[0].addr = client->addr;
	369	fm3130->msg[0].flags = 0;
	370	fm3130->msg[0].len = 1;
	371	fm3130->msg[0].buf = &fm3130->reg_addr_time;
	372
	373	fm3130->msg[1].addr = client->addr;
	374	fm3130->msg[1].flags = I2C_M_RD;
	375	fm3130->msg[1].len = FM3130_CLOCK_REGS;
	376	fm3130->msg[1].buf = &fm3130->regs[FM3130_RTC_SECONDS];
	377
	378	/* Messages to read alarm */
	379	fm3130->msg[2].addr = client->addr;
	380	fm3130->msg[2].flags = 0;
	381	fm3130->msg[2].len = 1;
	382	fm3130->msg[2].buf = &fm3130->reg_addr_alarm;
	383
	384	fm3130->msg[3].addr = client->addr;
	385	fm3130->msg[3].flags = I2C_M_RD;
	386	fm3130->msg[3].len = FM3130_ALARM_REGS;
	387	fm3130->msg[3].buf = &fm3130->regs[FM3130_ALARM_SECONDS];
	388
f3f99cf3	389	fm3130->alarm_valid = 0;
c6d8f400 SL	390	fm3130->data_valid = 0;
	391
	392	tmp = i2c_transfer(adapter, fm3130->msg, 4);
	393	if (tmp != 4) {
198b8ec8	394	dev_dbg(&client->dev, "read error %d\n", tmp);
c6d8f400 SL	395	err = -EIO;
	396	goto exit_free;
	397	}
	398
	399	fm3130->regs[FM3130_RTC_CONTROL] =
	400	i2c_smbus_read_byte_data(client, FM3130_RTC_CONTROL);
	401	fm3130->regs[FM3130_CAL_CONTROL] =
	402	i2c_smbus_read_byte_data(client, FM3130_CAL_CONTROL);
	403
c6d8f400	404	/* Disabling calibration mode */
f4b51628	405	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_CAL) {
c6d8f400 SL	406	i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
	407	fm3130->regs[FM3130_RTC_CONTROL] &
	408	~(FM3130_RTC_CONTROL_BIT_CAL));
	409	dev_warn(&client->dev, "Disabling calibration mode!\n");
f4b51628	410	}
c6d8f400 SL	411
	412	/* Disabling read and write modes */
	413	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_WRITE \|\|
f4b51628	414	fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_READ) {
c6d8f400 SL	415	i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
	416	fm3130->regs[FM3130_RTC_CONTROL] &
	417	~(FM3130_RTC_CONTROL_BIT_READ \|
	418	FM3130_RTC_CONTROL_BIT_WRITE));
	419	dev_warn(&client->dev, "Disabling READ or WRITE mode!\n");
f4b51628	420	}
c6d8f400 SL	421
	422	/* oscillator off? turn it on, so clock can tick. */
	423	if (fm3130->regs[FM3130_CAL_CONTROL] & FM3130_CAL_CONTROL_BIT_nOSCEN)
	424	i2c_smbus_write_byte_data(client, FM3130_CAL_CONTROL,
	425	fm3130->regs[FM3130_CAL_CONTROL] &
	426	~(FM3130_CAL_CONTROL_BIT_nOSCEN));
	427
f3f99cf3 SM	428	/* low battery? clear flag, and warn */
	429	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_LB) {
	430	i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
	431	fm3130->regs[FM3130_RTC_CONTROL] &
	432	~(FM3130_RTC_CONTROL_BIT_LB));
c6d8f400	433	dev_warn(&client->dev, "Low battery!\n");
f3f99cf3	434	}
c6d8f400	435
f3f99cf3	436	/* check if Power On Reset bit is set */
c6d8f400 SL	437	if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_POR) {
	438	i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
	439	fm3130->regs[FM3130_RTC_CONTROL] &
	440	~FM3130_RTC_CONTROL_BIT_POR);
f3f99cf3	441	dev_dbg(&client->dev, "POR bit is set\n");
c6d8f400 SL	442	}
	443	/* ACS is controlled by alarm */
	444	i2c_smbus_write_byte_data(client, FM3130_ALARM_WP_CONTROL, 0x80);
	445
f3f99cf3 SM	446	/* alarm registers sanity check */
	447	tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
	448	if (tmp > 59)
	449	goto bad_alarm;
	450
fe20ba70	451	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
f3f99cf3 SM	452	if (tmp > 59)
	453	goto bad_alarm;
	454
	455	tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
	456	if (tmp > 23)
	457	goto bad_alarm;
c6d8f400	458
fe20ba70	459	tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
c6d8f400	460	if (tmp == 0 \|\| tmp > 31)
f3f99cf3	461	goto bad_alarm;
c6d8f400	462
fe20ba70	463	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
c6d8f400	464	if (tmp == 0 \|\| tmp > 12)
f3f99cf3	465	goto bad_alarm;
c6d8f400	466
f3f99cf3 SM	467	fm3130->alarm_valid = 1;
	468
	469	bad_alarm:
	470
	471	/* clock registers sanity chek */
	472	tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
	473	if (tmp > 59)
	474	goto bad_clock;
	475
	476	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
	477	if (tmp > 59)
	478	goto bad_clock;
	479
	480	tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
	481	if (tmp > 23)
	482	goto bad_clock;
	483
	484	tmp = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x7);
	485	if (tmp == 0 \|\| tmp > 7)
	486	goto bad_clock;
	487
	488	tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
	489	if (tmp == 0 \|\| tmp > 31)
	490	goto bad_clock;
	491
	492	tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
	493	if (tmp == 0 \|\| tmp > 12)
	494	goto bad_clock;
c6d8f400 SL	495
	496	fm3130->data_valid = 1;
	497
f3f99cf3 SM	498	bad_clock:
	499
	500	if (!fm3130->data_valid \|\| !fm3130->alarm_valid)
01a4ca16 AS	501	dev_dbg(&client->dev, "%s: %15ph\n", "bogus registers",
01a4ca16 AS	502	fm3130->regs);
c6d8f400 SL	503
	504	/* We won't bail out here because we just got invalid data.
	505	Time setting from u-boot doesn't work anyway */
c54a52e3	506	fm3130->rtc = devm_rtc_device_register(&client->dev, client->name,
c6d8f400 SL	507	&fm3130_rtc_ops, THIS_MODULE);
	508	if (IS_ERR(fm3130->rtc)) {
	509	err = PTR_ERR(fm3130->rtc);
	510	dev_err(&client->dev,
	511	"unable to register the class device\n");
	512	goto exit_free;
	513	}
	514	return 0;
	515	exit_free:
c6d8f400 SL	516	return err;
	517	}
	518
c6d8f400 SL	519	static struct i2c_driver fm3130_driver = {
	520	.driver = {
	521	.name = "rtc-fm3130",
c6d8f400 SL	522	},
c6d8f400 SL	523	.probe = fm3130_probe,
c6d8f400 SL	524	.id_table = fm3130_id,
	525	};
	526
0abc9201	527	module_i2c_driver(fm3130_driver);
c6d8f400 SL	528
	529	MODULE_DESCRIPTION("RTC driver for FM3130");
	530	MODULE_AUTHOR("Sergey Lapin <slapin@ossfans.org>");
	531	MODULE_LICENSE("GPL");
	532