[linux-block.git] / drivers / rtc / rtc-ds2404.c

// SPDX-License-Identifier: GPL-2.0
// Copyright (C) 2012 Sven Schnelle <svens@stackframe.org>

#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/rtc.h>
#include <linux/types.h>
#include <linux/bcd.h>
#include <linux/platform_data/rtc-ds2404.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/slab.h>

#include <linux/io.h>

#define DS2404_STATUS_REG 0x200
#define DS2404_CONTROL_REG 0x201
#define DS2404_RTC_REG 0x202

#define DS2404_WRITE_SCRATCHPAD_CMD 0x0f
#define DS2404_READ_SCRATCHPAD_CMD 0xaa
#define DS2404_COPY_SCRATCHPAD_CMD 0x55
#define DS2404_READ_MEMORY_CMD 0xf0

#define DS2404_RST	0
#define DS2404_CLK	1
#define DS2404_DQ	2

struct ds2404_gpio {
	const char *name;
	unsigned int gpio;
};

struct ds2404 {
	struct ds2404_gpio *gpio;
	struct rtc_device *rtc;
};

static struct ds2404_gpio ds2404_gpio[] = {
	{ "RTC RST", 0 },
	{ "RTC CLK", 0 },
	{ "RTC DQ", 0 },
};

static int ds2404_gpio_map(struct ds2404 *chip, struct platform_device *pdev,
			  struct ds2404_platform_data *pdata)
{
	int i, err;

	ds2404_gpio[DS2404_RST].gpio = pdata->gpio_rst;
	ds2404_gpio[DS2404_CLK].gpio = pdata->gpio_clk;
	ds2404_gpio[DS2404_DQ].gpio = pdata->gpio_dq;

	for (i = 0; i < ARRAY_SIZE(ds2404_gpio); i++) {
		err = gpio_request(ds2404_gpio[i].gpio, ds2404_gpio[i].name);
		if (err) {
			dev_err(&pdev->dev, "error mapping gpio %s: %d\n",
				ds2404_gpio[i].name, err);
			goto err_request;
		}
		if (i != DS2404_DQ)
			gpio_direction_output(ds2404_gpio[i].gpio, 1);
	}

	chip->gpio = ds2404_gpio;
	return 0;

err_request:
	while (--i >= 0)
		gpio_free(ds2404_gpio[i].gpio);
	return err;
}

static void ds2404_gpio_unmap(void *data)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(ds2404_gpio); i++)
		gpio_free(ds2404_gpio[i].gpio);
}

static void ds2404_reset(struct device *dev)
{
	gpio_set_value(ds2404_gpio[DS2404_RST].gpio, 0);
	udelay(1000);
	gpio_set_value(ds2404_gpio[DS2404_RST].gpio, 1);
	gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
	gpio_direction_output(ds2404_gpio[DS2404_DQ].gpio, 0);
	udelay(10);
}

static void ds2404_write_byte(struct device *dev, u8 byte)
{
	int i;

	gpio_direction_output(ds2404_gpio[DS2404_DQ].gpio, 1);
	for (i = 0; i < 8; i++) {
		gpio_set_value(ds2404_gpio[DS2404_DQ].gpio, byte & (1 << i));
		udelay(10);
		gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 1);
		udelay(10);
		gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
		udelay(10);
	}
}

static u8 ds2404_read_byte(struct device *dev)
{
	int i;
	u8 ret = 0;

	gpio_direction_input(ds2404_gpio[DS2404_DQ].gpio);

	for (i = 0; i < 8; i++) {
		gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
		udelay(10);
		if (gpio_get_value(ds2404_gpio[DS2404_DQ].gpio))
			ret |= 1 << i;
		gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 1);
		udelay(10);
	}
	return ret;
}

static void ds2404_read_memory(struct device *dev, u16 offset,
			       int length, u8 *out)
{
	ds2404_reset(dev);
	ds2404_write_byte(dev, DS2404_READ_MEMORY_CMD);
	ds2404_write_byte(dev, offset & 0xff);
	ds2404_write_byte(dev, (offset >> 8) & 0xff);
	while (length--)
		*out++ = ds2404_read_byte(dev);
}

static void ds2404_write_memory(struct device *dev, u16 offset,
				int length, u8 *out)
{
	int i;
	u8 ta01, ta02, es;

	ds2404_reset(dev);
	ds2404_write_byte(dev, DS2404_WRITE_SCRATCHPAD_CMD);
	ds2404_write_byte(dev, offset & 0xff);
	ds2404_write_byte(dev, (offset >> 8) & 0xff);

	for (i = 0; i < length; i++)
		ds2404_write_byte(dev, out[i]);

	ds2404_reset(dev);
	ds2404_write_byte(dev, DS2404_READ_SCRATCHPAD_CMD);

	ta01 = ds2404_read_byte(dev);
	ta02 = ds2404_read_byte(dev);
	es = ds2404_read_byte(dev);

	for (i = 0; i < length; i++) {
		if (out[i] != ds2404_read_byte(dev)) {
			dev_err(dev, "read invalid data\n");
			return;
		}
	}

	ds2404_reset(dev);
	ds2404_write_byte(dev, DS2404_COPY_SCRATCHPAD_CMD);
	ds2404_write_byte(dev, ta01);
	ds2404_write_byte(dev, ta02);
	ds2404_write_byte(dev, es);

	gpio_direction_input(ds2404_gpio[DS2404_DQ].gpio);
	while (gpio_get_value(ds2404_gpio[DS2404_DQ].gpio))
		;
}

static void ds2404_enable_osc(struct device *dev)
{
	u8 in[1] = { 0x10 }; /* enable oscillator */
	ds2404_write_memory(dev, 0x201, 1, in);
}

static int ds2404_read_time(struct device *dev, struct rtc_time *dt)
{
	unsigned long time = 0;
	__le32 hw_time = 0;

	ds2404_read_memory(dev, 0x203, 4, (u8 *)&hw_time);
	time = le32_to_cpu(hw_time);

	rtc_time64_to_tm(time, dt);
	return 0;
}

static int ds2404_set_time(struct device *dev, struct rtc_time *dt)
{
	u32 time = cpu_to_le32(rtc_tm_to_time64(dt));
	ds2404_write_memory(dev, 0x203, 4, (u8 *)&time);
	return 0;
}

static const struct rtc_class_ops ds2404_rtc_ops = {
	.read_time	= ds2404_read_time,
	.set_time	= ds2404_set_time,
};

static int rtc_probe(struct platform_device *pdev)
{
	struct ds2404_platform_data *pdata = dev_get_platdata(&pdev->dev);
	struct ds2404 *chip;
	int retval = -EBUSY;

	chip = devm_kzalloc(&pdev->dev, sizeof(struct ds2404), GFP_KERNEL);
	if (!chip)
		return -ENOMEM;

	chip->rtc = devm_rtc_allocate_device(&pdev->dev);
	if (IS_ERR(chip->rtc))
		return PTR_ERR(chip->rtc);

	retval = ds2404_gpio_map(chip, pdev, pdata);
	if (retval)
		return retval;

	retval = devm_add_action_or_reset(&pdev->dev, ds2404_gpio_unmap, chip);
	if (retval)
		return retval;

	dev_info(&pdev->dev, "using GPIOs RST:%d, CLK:%d, DQ:%d\n",
		 chip->gpio[DS2404_RST].gpio, chip->gpio[DS2404_CLK].gpio,
		 chip->gpio[DS2404_DQ].gpio);

	platform_set_drvdata(pdev, chip);

	chip->rtc->ops = &ds2404_rtc_ops;
	chip->rtc->range_max = U32_MAX;

	retval = rtc_register_device(chip->rtc);
	if (retval)
		return retval;

	ds2404_enable_osc(&pdev->dev);
	return 0;
}

static struct platform_driver rtc_device_driver = {
	.probe	= rtc_probe,
	.driver = {
		.name	= "ds2404",
	},
};
module_platform_driver(rtc_device_driver);

MODULE_DESCRIPTION("DS2404 RTC");
MODULE_AUTHOR("Sven Schnelle");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:ds2404");
Commit	Line	Data
14556f04 AB	1	// SPDX-License-Identifier: GPL-2.0
14556f04 AB	2	// Copyright (C) 2012 Sven Schnelle <svens@stackframe.org>
7418a119 SS	3
	4	#include <linux/platform_device.h>
	5	#include <linux/module.h>
	6	#include <linux/init.h>
	7	#include <linux/rtc.h>
	8	#include <linux/types.h>
	9	#include <linux/bcd.h>
10c2a2e7	10	#include <linux/platform_data/rtc-ds2404.h>
7418a119 SS	11	#include <linux/delay.h>
	12	#include <linux/gpio.h>
	13	#include <linux/slab.h>
	14
	15	#include <linux/io.h>
	16
	17	#define DS2404_STATUS_REG 0x200
	18	#define DS2404_CONTROL_REG 0x201
	19	#define DS2404_RTC_REG 0x202
	20
	21	#define DS2404_WRITE_SCRATCHPAD_CMD 0x0f
	22	#define DS2404_READ_SCRATCHPAD_CMD 0xaa
	23	#define DS2404_COPY_SCRATCHPAD_CMD 0x55
	24	#define DS2404_READ_MEMORY_CMD 0xf0
	25
7418a119 SS	26	#define DS2404_RST 0
	27	#define DS2404_CLK 1
	28	#define DS2404_DQ 2
	29
	30	struct ds2404_gpio {
	31	const char *name;
	32	unsigned int gpio;
	33	};
	34
	35	struct ds2404 {
	36	struct ds2404_gpio *gpio;
7418a119 SS	37	struct rtc_device *rtc;
	38	};
	39
	40	static struct ds2404_gpio ds2404_gpio[] = {
	41	{ "RTC RST", 0 },
	42	{ "RTC CLK", 0 },
	43	{ "RTC DQ", 0 },
	44	};
	45
	46	static int ds2404_gpio_map(struct ds2404 chip, struct platform_device pdev,
	47	struct ds2404_platform_data *pdata)
	48	{
	49	int i, err;
	50
	51	ds2404_gpio[DS2404_RST].gpio = pdata->gpio_rst;
	52	ds2404_gpio[DS2404_CLK].gpio = pdata->gpio_clk;
	53	ds2404_gpio[DS2404_DQ].gpio = pdata->gpio_dq;
	54
	55	for (i = 0; i < ARRAY_SIZE(ds2404_gpio); i++) {
	56	err = gpio_request(ds2404_gpio[i].gpio, ds2404_gpio[i].name);
	57	if (err) {
0fae8237	58	dev_err(&pdev->dev, "error mapping gpio %s: %d\n",
7418a119 SS	59	ds2404_gpio[i].name, err);
	60	goto err_request;
	61	}
	62	if (i != DS2404_DQ)
	63	gpio_direction_output(ds2404_gpio[i].gpio, 1);
	64	}
	65
	66	chip->gpio = ds2404_gpio;
	67	return 0;
	68
	69	err_request:
	70	while (--i >= 0)
	71	gpio_free(ds2404_gpio[i].gpio);
	72	return err;
	73	}
	74
d9aa5ca4	75	static void ds2404_gpio_unmap(void *data)
7418a119 SS	76	{
	77	int i;
	78
	79	for (i = 0; i < ARRAY_SIZE(ds2404_gpio); i++)
	80	gpio_free(ds2404_gpio[i].gpio);
	81	}
	82
7418a119 SS	83	static void ds2404_reset(struct device *dev)
	84	{
	85	gpio_set_value(ds2404_gpio[DS2404_RST].gpio, 0);
	86	udelay(1000);
	87	gpio_set_value(ds2404_gpio[DS2404_RST].gpio, 1);
	88	gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
	89	gpio_direction_output(ds2404_gpio[DS2404_DQ].gpio, 0);
	90	udelay(10);
	91	}
	92
	93	static void ds2404_write_byte(struct device *dev, u8 byte)
	94	{
	95	int i;
	96
	97	gpio_direction_output(ds2404_gpio[DS2404_DQ].gpio, 1);
	98	for (i = 0; i < 8; i++) {
	99	gpio_set_value(ds2404_gpio[DS2404_DQ].gpio, byte & (1 << i));
	100	udelay(10);
	101	gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 1);
	102	udelay(10);
	103	gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
	104	udelay(10);
	105	}
	106	}
	107
	108	static u8 ds2404_read_byte(struct device *dev)
	109	{
	110	int i;
	111	u8 ret = 0;
	112
	113	gpio_direction_input(ds2404_gpio[DS2404_DQ].gpio);
	114
	115	for (i = 0; i < 8; i++) {
	116	gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 0);
	117	udelay(10);
	118	if (gpio_get_value(ds2404_gpio[DS2404_DQ].gpio))
	119	ret \|= 1 << i;
	120	gpio_set_value(ds2404_gpio[DS2404_CLK].gpio, 1);
	121	udelay(10);
	122	}
	123	return ret;
	124	}
	125
	126	static void ds2404_read_memory(struct device *dev, u16 offset,
	127	int length, u8 *out)
	128	{
	129	ds2404_reset(dev);
	130	ds2404_write_byte(dev, DS2404_READ_MEMORY_CMD);
	131	ds2404_write_byte(dev, offset & 0xff);
	132	ds2404_write_byte(dev, (offset >> 8) & 0xff);
	133	while (length--)
	134	*out++ = ds2404_read_byte(dev);
	135	}
	136
	137	static void ds2404_write_memory(struct device *dev, u16 offset,
	138	int length, u8 *out)
	139	{
	140	int i;
	141	u8 ta01, ta02, es;
	142
	143	ds2404_reset(dev);
	144	ds2404_write_byte(dev, DS2404_WRITE_SCRATCHPAD_CMD);
	145	ds2404_write_byte(dev, offset & 0xff);
	146	ds2404_write_byte(dev, (offset >> 8) & 0xff);
147
148	for (i = 0; i < length; i++)
149	ds2404_write_byte(dev, out[i]);
150
151	ds2404_reset(dev);
152	ds2404_write_byte(dev, DS2404_READ_SCRATCHPAD_CMD);
153
154	ta01 = ds2404_read_byte(dev);
155	ta02 = ds2404_read_byte(dev);
156	es = ds2404_read_byte(dev);
157
158	for (i = 0; i < length; i++) {
159	if (out[i] != ds2404_read_byte(dev)) {
0fae8237	160	dev_err(dev, "read invalid data\n");
7418a119 SS	161	return;
	162	}
	163	}
	164
	165	ds2404_reset(dev);
	166	ds2404_write_byte(dev, DS2404_COPY_SCRATCHPAD_CMD);
	167	ds2404_write_byte(dev, ta01);
	168	ds2404_write_byte(dev, ta02);
	169	ds2404_write_byte(dev, es);
	170
	171	gpio_direction_input(ds2404_gpio[DS2404_DQ].gpio);
	172	while (gpio_get_value(ds2404_gpio[DS2404_DQ].gpio))
	173	;
	174	}
	175
	176	static void ds2404_enable_osc(struct device *dev)
	177	{
	178	u8 in[1] = { 0x10 }; /* enable oscillator */
	179	ds2404_write_memory(dev, 0x201, 1, in);
	180	}
	181
	182	static int ds2404_read_time(struct device dev, struct rtc_time dt)
	183	{
	184	unsigned long time = 0;
8aec4b87	185	__le32 hw_time = 0;
7418a119	186
8aec4b87 NMG	187	ds2404_read_memory(dev, 0x203, 4, (u8 *)&hw_time);
8aec4b87 NMG	188	time = le32_to_cpu(hw_time);
7418a119	189
53523216	190	rtc_time64_to_tm(time, dt);
22652ba7	191	return 0;
7418a119 SS	192	}
7418a119 SS	193
be2b0437	194	static int ds2404_set_time(struct device dev, struct rtc_time dt)
7418a119	195	{
be2b0437	196	u32 time = cpu_to_le32(rtc_tm_to_time64(dt));
7418a119 SS	197	ds2404_write_memory(dev, 0x203, 4, (u8 *)&time);
	198	return 0;
	199	}
	200
	201	static const struct rtc_class_ops ds2404_rtc_ops = {
	202	.read_time = ds2404_read_time,
be2b0437	203	.set_time = ds2404_set_time,
7418a119 SS	204	};
	205
	206	static int rtc_probe(struct platform_device *pdev)
	207	{
77bf3822	208	struct ds2404_platform_data *pdata = dev_get_platdata(&pdev->dev);
7418a119 SS	209	struct ds2404 *chip;
	210	int retval = -EBUSY;
	211
2a444cf7	212	chip = devm_kzalloc(&pdev->dev, sizeof(struct ds2404), GFP_KERNEL);
7418a119 SS	213	if (!chip)
	214	return -ENOMEM;
	215
13bfa942 AB	216	chip->rtc = devm_rtc_allocate_device(&pdev->dev);
	217	if (IS_ERR(chip->rtc))
	218	return PTR_ERR(chip->rtc);
	219
c7ac260f	220	retval = ds2404_gpio_map(chip, pdev, pdata);
7418a119	221	if (retval)
d9aa5ca4 AB	222	return retval;
	223
	224	retval = devm_add_action_or_reset(&pdev->dev, ds2404_gpio_unmap, chip);
	225	if (retval)
	226	return retval;
7418a119 SS	227
	228	dev_info(&pdev->dev, "using GPIOs RST:%d, CLK:%d, DQ:%d\n",
	229	chip->gpio[DS2404_RST].gpio, chip->gpio[DS2404_CLK].gpio,
	230	chip->gpio[DS2404_DQ].gpio);
	231
	232	platform_set_drvdata(pdev, chip);
	233
13bfa942 AB	234	chip->rtc->ops = &ds2404_rtc_ops;
	235	chip->rtc->range_max = U32_MAX;
	236
	237	retval = rtc_register_device(chip->rtc);
	238	if (retval)
d9aa5ca4	239	return retval;
7418a119 SS	240
	241	ds2404_enable_osc(&pdev->dev);
	242	return 0;
7418a119 SS	243	}
	244
	245	static struct platform_driver rtc_device_driver = {
	246	.probe = rtc_probe,
7418a119 SS	247	.driver = {
7418a119 SS	248	.name = "ds2404",
7418a119 SS	249	},
7418a119 SS	250	};
56ae1b8e	251	module_platform_driver(rtc_device_driver);
7418a119 SS	252
	253	MODULE_DESCRIPTION("DS2404 RTC");
	254	MODULE_AUTHOR("Sven Schnelle");
	255	MODULE_LICENSE("GPL");
	256	MODULE_ALIAS("platform:ds2404");