Commit | Line | Data |
---|---|---|
5ec3e4b7 AN |
1 | /* |
2 | * An rtc driver for the Dallas DS1742 | |
3 | * | |
4 | * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
f9231a0c TER |
9 | * |
10 | * Copyright (C) 2006 Torsten Ertbjerg Rasmussen <tr@newtec.dk> | |
11 | * - nvram size determined from resource | |
12 | * - this ds1742 driver now supports ds1743. | |
5ec3e4b7 AN |
13 | */ |
14 | ||
15 | #include <linux/bcd.h> | |
5ec3e4b7 | 16 | #include <linux/kernel.h> |
5a0e3ad6 | 17 | #include <linux/gfp.h> |
5ec3e4b7 AN |
18 | #include <linux/delay.h> |
19 | #include <linux/jiffies.h> | |
20 | #include <linux/rtc.h> | |
663b3524 AS |
21 | #include <linux/of.h> |
22 | #include <linux/of_device.h> | |
5ec3e4b7 AN |
23 | #include <linux/platform_device.h> |
24 | #include <linux/io.h> | |
2113852b | 25 | #include <linux/module.h> |
5ec3e4b7 | 26 | |
f9231a0c | 27 | #define RTC_SIZE 8 |
5ec3e4b7 | 28 | |
f9231a0c TER |
29 | #define RTC_CONTROL 0 |
30 | #define RTC_CENTURY 0 | |
31 | #define RTC_SECONDS 1 | |
32 | #define RTC_MINUTES 2 | |
33 | #define RTC_HOURS 3 | |
34 | #define RTC_DAY 4 | |
35 | #define RTC_DATE 5 | |
36 | #define RTC_MONTH 6 | |
37 | #define RTC_YEAR 7 | |
5ec3e4b7 AN |
38 | |
39 | #define RTC_CENTURY_MASK 0x3f | |
40 | #define RTC_SECONDS_MASK 0x7f | |
41 | #define RTC_DAY_MASK 0x07 | |
42 | ||
43 | /* Bits in the Control/Century register */ | |
44 | #define RTC_WRITE 0x80 | |
45 | #define RTC_READ 0x40 | |
46 | ||
47 | /* Bits in the Seconds register */ | |
48 | #define RTC_STOP 0x80 | |
49 | ||
50 | /* Bits in the Day register */ | |
51 | #define RTC_BATT_FLAG 0x80 | |
52 | ||
53 | struct rtc_plat_data { | |
f9231a0c TER |
54 | void __iomem *ioaddr_nvram; |
55 | void __iomem *ioaddr_rtc; | |
5ec3e4b7 AN |
56 | unsigned long last_jiffies; |
57 | }; | |
58 | ||
59 | static int ds1742_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
60 | { | |
85368bb9 | 61 | struct rtc_plat_data *pdata = dev_get_drvdata(dev); |
f9231a0c | 62 | void __iomem *ioaddr = pdata->ioaddr_rtc; |
5ec3e4b7 AN |
63 | u8 century; |
64 | ||
fe20ba70 | 65 | century = bin2bcd((tm->tm_year + 1900) / 100); |
5ec3e4b7 AN |
66 | |
67 | writeb(RTC_WRITE, ioaddr + RTC_CONTROL); | |
68 | ||
fe20ba70 AB |
69 | writeb(bin2bcd(tm->tm_year % 100), ioaddr + RTC_YEAR); |
70 | writeb(bin2bcd(tm->tm_mon + 1), ioaddr + RTC_MONTH); | |
71 | writeb(bin2bcd(tm->tm_wday) & RTC_DAY_MASK, ioaddr + RTC_DAY); | |
72 | writeb(bin2bcd(tm->tm_mday), ioaddr + RTC_DATE); | |
73 | writeb(bin2bcd(tm->tm_hour), ioaddr + RTC_HOURS); | |
74 | writeb(bin2bcd(tm->tm_min), ioaddr + RTC_MINUTES); | |
75 | writeb(bin2bcd(tm->tm_sec) & RTC_SECONDS_MASK, ioaddr + RTC_SECONDS); | |
5ec3e4b7 AN |
76 | |
77 | /* RTC_CENTURY and RTC_CONTROL share same register */ | |
78 | writeb(RTC_WRITE | (century & RTC_CENTURY_MASK), ioaddr + RTC_CENTURY); | |
79 | writeb(century & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL); | |
80 | return 0; | |
81 | } | |
82 | ||
83 | static int ds1742_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
84 | { | |
85368bb9 | 85 | struct rtc_plat_data *pdata = dev_get_drvdata(dev); |
f9231a0c | 86 | void __iomem *ioaddr = pdata->ioaddr_rtc; |
5ec3e4b7 AN |
87 | unsigned int year, month, day, hour, minute, second, week; |
88 | unsigned int century; | |
89 | ||
90 | /* give enough time to update RTC in case of continuous read */ | |
91 | if (pdata->last_jiffies == jiffies) | |
92 | msleep(1); | |
93 | pdata->last_jiffies = jiffies; | |
94 | writeb(RTC_READ, ioaddr + RTC_CONTROL); | |
95 | second = readb(ioaddr + RTC_SECONDS) & RTC_SECONDS_MASK; | |
96 | minute = readb(ioaddr + RTC_MINUTES); | |
97 | hour = readb(ioaddr + RTC_HOURS); | |
98 | day = readb(ioaddr + RTC_DATE); | |
99 | week = readb(ioaddr + RTC_DAY) & RTC_DAY_MASK; | |
100 | month = readb(ioaddr + RTC_MONTH); | |
101 | year = readb(ioaddr + RTC_YEAR); | |
102 | century = readb(ioaddr + RTC_CENTURY) & RTC_CENTURY_MASK; | |
103 | writeb(0, ioaddr + RTC_CONTROL); | |
fe20ba70 AB |
104 | tm->tm_sec = bcd2bin(second); |
105 | tm->tm_min = bcd2bin(minute); | |
106 | tm->tm_hour = bcd2bin(hour); | |
107 | tm->tm_mday = bcd2bin(day); | |
108 | tm->tm_wday = bcd2bin(week); | |
109 | tm->tm_mon = bcd2bin(month) - 1; | |
5ec3e4b7 | 110 | /* year is 1900 + tm->tm_year */ |
fe20ba70 | 111 | tm->tm_year = bcd2bin(year) + bcd2bin(century) * 100 - 1900; |
5ec3e4b7 | 112 | |
22652ba7 | 113 | return 0; |
5ec3e4b7 AN |
114 | } |
115 | ||
ff8371ac | 116 | static const struct rtc_class_ops ds1742_rtc_ops = { |
5ec3e4b7 AN |
117 | .read_time = ds1742_rtc_read_time, |
118 | .set_time = ds1742_rtc_set_time, | |
119 | }; | |
120 | ||
87c78d95 AB |
121 | static int ds1742_nvram_read(void *priv, unsigned int pos, void *val, |
122 | size_t bytes) | |
5ec3e4b7 | 123 | { |
87c78d95 | 124 | struct rtc_plat_data *pdata = priv; |
f9231a0c | 125 | void __iomem *ioaddr = pdata->ioaddr_nvram; |
87c78d95 | 126 | u8 *buf = val; |
5ec3e4b7 | 127 | |
87c78d95 | 128 | for (; bytes; bytes--) |
5ec3e4b7 | 129 | *buf++ = readb(ioaddr + pos++); |
87c78d95 | 130 | return 0; |
5ec3e4b7 AN |
131 | } |
132 | ||
87c78d95 AB |
133 | static int ds1742_nvram_write(void *priv, unsigned int pos, void *val, |
134 | size_t bytes) | |
5ec3e4b7 | 135 | { |
87c78d95 | 136 | struct rtc_plat_data *pdata = priv; |
f9231a0c | 137 | void __iomem *ioaddr = pdata->ioaddr_nvram; |
87c78d95 | 138 | u8 *buf = val; |
5ec3e4b7 | 139 | |
87c78d95 | 140 | for (; bytes; bytes--) |
5ec3e4b7 | 141 | writeb(*buf++, ioaddr + pos++); |
87c78d95 | 142 | return 0; |
5ec3e4b7 AN |
143 | } |
144 | ||
5a167f45 | 145 | static int ds1742_rtc_probe(struct platform_device *pdev) |
5ec3e4b7 AN |
146 | { |
147 | struct rtc_device *rtc; | |
148 | struct resource *res; | |
149 | unsigned int cen, sec; | |
ac18eb62 AN |
150 | struct rtc_plat_data *pdata; |
151 | void __iomem *ioaddr; | |
5ec3e4b7 | 152 | int ret = 0; |
87c78d95 AB |
153 | struct nvmem_config nvmem_cfg = { |
154 | .name = "ds1742_nvram", | |
87c78d95 AB |
155 | .reg_read = ds1742_nvram_read, |
156 | .reg_write = ds1742_nvram_write, | |
157 | }; | |
158 | ||
5ec3e4b7 | 159 | |
ac18eb62 | 160 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); |
5ec3e4b7 AN |
161 | if (!pdata) |
162 | return -ENOMEM; | |
25e2818e AS |
163 | |
164 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
165 | ioaddr = devm_ioremap_resource(&pdev->dev, res); | |
166 | if (IS_ERR(ioaddr)) | |
167 | return PTR_ERR(ioaddr); | |
ac18eb62 | 168 | |
f9231a0c | 169 | pdata->ioaddr_nvram = ioaddr; |
87c78d95 | 170 | pdata->ioaddr_rtc = ioaddr + resource_size(res) - RTC_SIZE; |
5ec3e4b7 | 171 | |
87c78d95 AB |
172 | nvmem_cfg.size = resource_size(res) - RTC_SIZE; |
173 | nvmem_cfg.priv = pdata; | |
3a729700 | 174 | |
5ec3e4b7 | 175 | /* turn RTC on if it was not on */ |
f9231a0c | 176 | ioaddr = pdata->ioaddr_rtc; |
5ec3e4b7 AN |
177 | sec = readb(ioaddr + RTC_SECONDS); |
178 | if (sec & RTC_STOP) { | |
179 | sec &= RTC_SECONDS_MASK; | |
180 | cen = readb(ioaddr + RTC_CENTURY) & RTC_CENTURY_MASK; | |
181 | writeb(RTC_WRITE, ioaddr + RTC_CONTROL); | |
182 | writeb(sec, ioaddr + RTC_SECONDS); | |
183 | writeb(cen & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL); | |
184 | } | |
391b1fe6 | 185 | if (!(readb(ioaddr + RTC_DAY) & RTC_BATT_FLAG)) |
5ec3e4b7 AN |
186 | dev_warn(&pdev->dev, "voltage-low detected.\n"); |
187 | ||
ac18eb62 AN |
188 | pdata->last_jiffies = jiffies; |
189 | platform_set_drvdata(pdev, pdata); | |
1358e7b2 AB |
190 | |
191 | rtc = devm_rtc_allocate_device(&pdev->dev); | |
ac18eb62 AN |
192 | if (IS_ERR(rtc)) |
193 | return PTR_ERR(rtc); | |
3a729700 | 194 | |
1358e7b2 | 195 | rtc->ops = &ds1742_rtc_ops; |
87c78d95 | 196 | rtc->nvram_old_abi = true; |
1358e7b2 AB |
197 | |
198 | ret = rtc_register_device(rtc); | |
199 | if (ret) | |
200 | return ret; | |
201 | ||
87c78d95 AB |
202 | if (rtc_nvmem_register(rtc, &nvmem_cfg)) |
203 | dev_err(&pdev->dev, "Unable to register nvmem\n"); | |
5ec3e4b7 | 204 | |
5ec3e4b7 AN |
205 | return 0; |
206 | } | |
207 | ||
9d203572 | 208 | static const struct of_device_id __maybe_unused ds1742_rtc_of_match[] = { |
663b3524 AS |
209 | { .compatible = "maxim,ds1742", }, |
210 | { } | |
211 | }; | |
212 | MODULE_DEVICE_TABLE(of, ds1742_rtc_of_match); | |
213 | ||
5ec3e4b7 AN |
214 | static struct platform_driver ds1742_rtc_driver = { |
215 | .probe = ds1742_rtc_probe, | |
5ec3e4b7 | 216 | .driver = { |
a95e23a2 | 217 | .name = "rtc-ds1742", |
3710f597 | 218 | .of_match_table = of_match_ptr(ds1742_rtc_of_match), |
5ec3e4b7 AN |
219 | }, |
220 | }; | |
221 | ||
0c4eae66 | 222 | module_platform_driver(ds1742_rtc_driver); |
5ec3e4b7 AN |
223 | |
224 | MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>"); | |
225 | MODULE_DESCRIPTION("Dallas DS1742 RTC driver"); | |
226 | MODULE_LICENSE("GPL"); | |
ad28a07b | 227 | MODULE_ALIAS("platform:rtc-ds1742"); |