Commit | Line | Data |
---|---|---|
9bf5b4f5 AN |
1 | /* |
2 | * An rtc driver for the Dallas DS1553 | |
3 | * | |
4 | * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/bcd.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/kernel.h> | |
5a0e3ad6 | 14 | #include <linux/gfp.h> |
9bf5b4f5 AN |
15 | #include <linux/delay.h> |
16 | #include <linux/jiffies.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/rtc.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/io.h> | |
2113852b | 21 | #include <linux/module.h> |
9bf5b4f5 | 22 | |
9bf5b4f5 AN |
23 | #define RTC_REG_SIZE 0x2000 |
24 | #define RTC_OFFSET 0x1ff0 | |
25 | ||
26 | #define RTC_FLAGS (RTC_OFFSET + 0) | |
27 | #define RTC_SECONDS_ALARM (RTC_OFFSET + 2) | |
28 | #define RTC_MINUTES_ALARM (RTC_OFFSET + 3) | |
29 | #define RTC_HOURS_ALARM (RTC_OFFSET + 4) | |
30 | #define RTC_DATE_ALARM (RTC_OFFSET + 5) | |
31 | #define RTC_INTERRUPTS (RTC_OFFSET + 6) | |
32 | #define RTC_WATCHDOG (RTC_OFFSET + 7) | |
33 | #define RTC_CONTROL (RTC_OFFSET + 8) | |
34 | #define RTC_CENTURY (RTC_OFFSET + 8) | |
35 | #define RTC_SECONDS (RTC_OFFSET + 9) | |
36 | #define RTC_MINUTES (RTC_OFFSET + 10) | |
37 | #define RTC_HOURS (RTC_OFFSET + 11) | |
38 | #define RTC_DAY (RTC_OFFSET + 12) | |
39 | #define RTC_DATE (RTC_OFFSET + 13) | |
40 | #define RTC_MONTH (RTC_OFFSET + 14) | |
41 | #define RTC_YEAR (RTC_OFFSET + 15) | |
42 | ||
43 | #define RTC_CENTURY_MASK 0x3f | |
44 | #define RTC_SECONDS_MASK 0x7f | |
45 | #define RTC_DAY_MASK 0x07 | |
46 | ||
47 | /* Bits in the Control/Century register */ | |
48 | #define RTC_WRITE 0x80 | |
49 | #define RTC_READ 0x40 | |
50 | ||
51 | /* Bits in the Seconds register */ | |
52 | #define RTC_STOP 0x80 | |
53 | ||
54 | /* Bits in the Flags register */ | |
55 | #define RTC_FLAGS_AF 0x40 | |
56 | #define RTC_FLAGS_BLF 0x10 | |
57 | ||
58 | /* Bits in the Interrupts register */ | |
59 | #define RTC_INTS_AE 0x80 | |
60 | ||
61 | struct rtc_plat_data { | |
62 | struct rtc_device *rtc; | |
63 | void __iomem *ioaddr; | |
9bf5b4f5 AN |
64 | unsigned long last_jiffies; |
65 | int irq; | |
66 | unsigned int irqen; | |
67 | int alrm_sec; | |
68 | int alrm_min; | |
69 | int alrm_hour; | |
70 | int alrm_mday; | |
618161f7 | 71 | spinlock_t lock; |
9bf5b4f5 AN |
72 | }; |
73 | ||
74 | static int ds1553_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
75 | { | |
76 | struct platform_device *pdev = to_platform_device(dev); | |
77 | struct rtc_plat_data *pdata = platform_get_drvdata(pdev); | |
78 | void __iomem *ioaddr = pdata->ioaddr; | |
79 | u8 century; | |
80 | ||
fe20ba70 | 81 | century = bin2bcd((tm->tm_year + 1900) / 100); |
9bf5b4f5 AN |
82 | |
83 | writeb(RTC_WRITE, pdata->ioaddr + RTC_CONTROL); | |
84 | ||
fe20ba70 AB |
85 | writeb(bin2bcd(tm->tm_year % 100), ioaddr + RTC_YEAR); |
86 | writeb(bin2bcd(tm->tm_mon + 1), ioaddr + RTC_MONTH); | |
87 | writeb(bin2bcd(tm->tm_wday) & RTC_DAY_MASK, ioaddr + RTC_DAY); | |
88 | writeb(bin2bcd(tm->tm_mday), ioaddr + RTC_DATE); | |
89 | writeb(bin2bcd(tm->tm_hour), ioaddr + RTC_HOURS); | |
90 | writeb(bin2bcd(tm->tm_min), ioaddr + RTC_MINUTES); | |
91 | writeb(bin2bcd(tm->tm_sec) & RTC_SECONDS_MASK, ioaddr + RTC_SECONDS); | |
9bf5b4f5 AN |
92 | |
93 | /* RTC_CENTURY and RTC_CONTROL share same register */ | |
94 | writeb(RTC_WRITE | (century & RTC_CENTURY_MASK), ioaddr + RTC_CENTURY); | |
95 | writeb(century & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL); | |
96 | return 0; | |
97 | } | |
98 | ||
99 | static int ds1553_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
100 | { | |
101 | struct platform_device *pdev = to_platform_device(dev); | |
102 | struct rtc_plat_data *pdata = platform_get_drvdata(pdev); | |
103 | void __iomem *ioaddr = pdata->ioaddr; | |
104 | unsigned int year, month, day, hour, minute, second, week; | |
105 | unsigned int century; | |
106 | ||
107 | /* give enough time to update RTC in case of continuous read */ | |
108 | if (pdata->last_jiffies == jiffies) | |
109 | msleep(1); | |
110 | pdata->last_jiffies = jiffies; | |
111 | writeb(RTC_READ, ioaddr + RTC_CONTROL); | |
112 | second = readb(ioaddr + RTC_SECONDS) & RTC_SECONDS_MASK; | |
113 | minute = readb(ioaddr + RTC_MINUTES); | |
114 | hour = readb(ioaddr + RTC_HOURS); | |
115 | day = readb(ioaddr + RTC_DATE); | |
116 | week = readb(ioaddr + RTC_DAY) & RTC_DAY_MASK; | |
117 | month = readb(ioaddr + RTC_MONTH); | |
118 | year = readb(ioaddr + RTC_YEAR); | |
119 | century = readb(ioaddr + RTC_CENTURY) & RTC_CENTURY_MASK; | |
120 | writeb(0, ioaddr + RTC_CONTROL); | |
fe20ba70 AB |
121 | tm->tm_sec = bcd2bin(second); |
122 | tm->tm_min = bcd2bin(minute); | |
123 | tm->tm_hour = bcd2bin(hour); | |
124 | tm->tm_mday = bcd2bin(day); | |
125 | tm->tm_wday = bcd2bin(week); | |
126 | tm->tm_mon = bcd2bin(month) - 1; | |
9bf5b4f5 | 127 | /* year is 1900 + tm->tm_year */ |
fe20ba70 | 128 | tm->tm_year = bcd2bin(year) + bcd2bin(century) * 100 - 1900; |
9bf5b4f5 | 129 | |
9bf5b4f5 AN |
130 | return 0; |
131 | } | |
132 | ||
133 | static void ds1553_rtc_update_alarm(struct rtc_plat_data *pdata) | |
134 | { | |
135 | void __iomem *ioaddr = pdata->ioaddr; | |
136 | unsigned long flags; | |
137 | ||
618161f7 | 138 | spin_lock_irqsave(&pdata->lock, flags); |
9bf5b4f5 | 139 | writeb(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ? |
fe20ba70 | 140 | 0x80 : bin2bcd(pdata->alrm_mday), |
9bf5b4f5 AN |
141 | ioaddr + RTC_DATE_ALARM); |
142 | writeb(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ? | |
fe20ba70 | 143 | 0x80 : bin2bcd(pdata->alrm_hour), |
9bf5b4f5 AN |
144 | ioaddr + RTC_HOURS_ALARM); |
145 | writeb(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ? | |
fe20ba70 | 146 | 0x80 : bin2bcd(pdata->alrm_min), |
9bf5b4f5 AN |
147 | ioaddr + RTC_MINUTES_ALARM); |
148 | writeb(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ? | |
fe20ba70 | 149 | 0x80 : bin2bcd(pdata->alrm_sec), |
9bf5b4f5 AN |
150 | ioaddr + RTC_SECONDS_ALARM); |
151 | writeb(pdata->irqen ? RTC_INTS_AE : 0, ioaddr + RTC_INTERRUPTS); | |
152 | readb(ioaddr + RTC_FLAGS); /* clear interrupts */ | |
618161f7 | 153 | spin_unlock_irqrestore(&pdata->lock, flags); |
9bf5b4f5 AN |
154 | } |
155 | ||
156 | static int ds1553_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
157 | { | |
158 | struct platform_device *pdev = to_platform_device(dev); | |
159 | struct rtc_plat_data *pdata = platform_get_drvdata(pdev); | |
160 | ||
2fac6674 | 161 | if (pdata->irq <= 0) |
9bf5b4f5 AN |
162 | return -EINVAL; |
163 | pdata->alrm_mday = alrm->time.tm_mday; | |
164 | pdata->alrm_hour = alrm->time.tm_hour; | |
165 | pdata->alrm_min = alrm->time.tm_min; | |
166 | pdata->alrm_sec = alrm->time.tm_sec; | |
167 | if (alrm->enabled) | |
168 | pdata->irqen |= RTC_AF; | |
169 | ds1553_rtc_update_alarm(pdata); | |
170 | return 0; | |
171 | } | |
172 | ||
173 | static int ds1553_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
174 | { | |
175 | struct platform_device *pdev = to_platform_device(dev); | |
176 | struct rtc_plat_data *pdata = platform_get_drvdata(pdev); | |
177 | ||
2fac6674 | 178 | if (pdata->irq <= 0) |
9bf5b4f5 AN |
179 | return -EINVAL; |
180 | alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday; | |
181 | alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour; | |
182 | alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min; | |
183 | alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec; | |
184 | alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0; | |
185 | return 0; | |
186 | } | |
187 | ||
7d12e780 | 188 | static irqreturn_t ds1553_rtc_interrupt(int irq, void *dev_id) |
9bf5b4f5 AN |
189 | { |
190 | struct platform_device *pdev = dev_id; | |
191 | struct rtc_plat_data *pdata = platform_get_drvdata(pdev); | |
192 | void __iomem *ioaddr = pdata->ioaddr; | |
618161f7 | 193 | unsigned long events = 0; |
9bf5b4f5 | 194 | |
618161f7 | 195 | spin_lock(&pdata->lock); |
9bf5b4f5 | 196 | /* read and clear interrupt */ |
618161f7 AN |
197 | if (readb(ioaddr + RTC_FLAGS) & RTC_FLAGS_AF) { |
198 | events = RTC_IRQF; | |
199 | if (readb(ioaddr + RTC_SECONDS_ALARM) & 0x80) | |
200 | events |= RTC_UF; | |
201 | else | |
202 | events |= RTC_AF; | |
0d71915d | 203 | rtc_update_irq(pdata->rtc, 1, events); |
618161f7 AN |
204 | } |
205 | spin_unlock(&pdata->lock); | |
206 | return events ? IRQ_HANDLED : IRQ_NONE; | |
9bf5b4f5 AN |
207 | } |
208 | ||
618161f7 | 209 | static int ds1553_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
9bf5b4f5 AN |
210 | { |
211 | struct platform_device *pdev = to_platform_device(dev); | |
212 | struct rtc_plat_data *pdata = platform_get_drvdata(pdev); | |
213 | ||
2fac6674 | 214 | if (pdata->irq <= 0) |
618161f7 AN |
215 | return -EINVAL; |
216 | if (enabled) | |
9bf5b4f5 | 217 | pdata->irqen |= RTC_AF; |
618161f7 AN |
218 | else |
219 | pdata->irqen &= ~RTC_AF; | |
220 | ds1553_rtc_update_alarm(pdata); | |
221 | return 0; | |
222 | } | |
223 | ||
ff8371ac | 224 | static const struct rtc_class_ops ds1553_rtc_ops = { |
618161f7 AN |
225 | .read_time = ds1553_rtc_read_time, |
226 | .set_time = ds1553_rtc_set_time, | |
227 | .read_alarm = ds1553_rtc_read_alarm, | |
228 | .set_alarm = ds1553_rtc_set_alarm, | |
229 | .alarm_irq_enable = ds1553_rtc_alarm_irq_enable, | |
9bf5b4f5 AN |
230 | }; |
231 | ||
3a9a06d4 AB |
232 | static int ds1553_nvram_read(void *priv, unsigned int pos, void *val, |
233 | size_t bytes) | |
9bf5b4f5 | 234 | { |
3a9a06d4 | 235 | struct platform_device *pdev = priv; |
9bf5b4f5 AN |
236 | struct rtc_plat_data *pdata = platform_get_drvdata(pdev); |
237 | void __iomem *ioaddr = pdata->ioaddr; | |
3a9a06d4 | 238 | u8 *buf = val; |
9bf5b4f5 | 239 | |
3a9a06d4 | 240 | for (; bytes; bytes--) |
9bf5b4f5 | 241 | *buf++ = readb(ioaddr + pos++); |
3a9a06d4 | 242 | return 0; |
9bf5b4f5 AN |
243 | } |
244 | ||
3a9a06d4 AB |
245 | static int ds1553_nvram_write(void *priv, unsigned int pos, void *val, |
246 | size_t bytes) | |
9bf5b4f5 | 247 | { |
3a9a06d4 | 248 | struct platform_device *pdev = priv; |
9bf5b4f5 AN |
249 | struct rtc_plat_data *pdata = platform_get_drvdata(pdev); |
250 | void __iomem *ioaddr = pdata->ioaddr; | |
3a9a06d4 | 251 | u8 *buf = val; |
9bf5b4f5 | 252 | |
3a9a06d4 | 253 | for (; bytes; bytes--) |
9bf5b4f5 | 254 | writeb(*buf++, ioaddr + pos++); |
3a9a06d4 | 255 | return 0; |
9bf5b4f5 AN |
256 | } |
257 | ||
5a167f45 | 258 | static int ds1553_rtc_probe(struct platform_device *pdev) |
9bf5b4f5 | 259 | { |
9bf5b4f5 AN |
260 | struct resource *res; |
261 | unsigned int cen, sec; | |
618161f7 AN |
262 | struct rtc_plat_data *pdata; |
263 | void __iomem *ioaddr; | |
9bf5b4f5 | 264 | int ret = 0; |
3a9a06d4 AB |
265 | struct nvmem_config nvmem_cfg = { |
266 | .name = "ds1553_nvram", | |
267 | .word_size = 1, | |
268 | .stride = 1, | |
269 | .size = RTC_OFFSET, | |
270 | .reg_read = ds1553_nvram_read, | |
271 | .reg_write = ds1553_nvram_write, | |
272 | .priv = pdev, | |
273 | }; | |
9bf5b4f5 | 274 | |
618161f7 | 275 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); |
9bf5b4f5 AN |
276 | if (!pdata) |
277 | return -ENOMEM; | |
618161f7 | 278 | |
7c1d69ee JL |
279 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
280 | ioaddr = devm_ioremap_resource(&pdev->dev, res); | |
281 | if (IS_ERR(ioaddr)) | |
282 | return PTR_ERR(ioaddr); | |
9bf5b4f5 AN |
283 | pdata->ioaddr = ioaddr; |
284 | pdata->irq = platform_get_irq(pdev, 0); | |
285 | ||
286 | /* turn RTC on if it was not on */ | |
287 | sec = readb(ioaddr + RTC_SECONDS); | |
288 | if (sec & RTC_STOP) { | |
289 | sec &= RTC_SECONDS_MASK; | |
290 | cen = readb(ioaddr + RTC_CENTURY) & RTC_CENTURY_MASK; | |
291 | writeb(RTC_WRITE, ioaddr + RTC_CONTROL); | |
292 | writeb(sec, ioaddr + RTC_SECONDS); | |
293 | writeb(cen & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL); | |
294 | } | |
295 | if (readb(ioaddr + RTC_FLAGS) & RTC_FLAGS_BLF) | |
296 | dev_warn(&pdev->dev, "voltage-low detected.\n"); | |
297 | ||
618161f7 AN |
298 | spin_lock_init(&pdata->lock); |
299 | pdata->last_jiffies = jiffies; | |
300 | platform_set_drvdata(pdev, pdata); | |
4071ea25 | 301 | |
18c88cc9 | 302 | pdata->rtc = devm_rtc_allocate_device(&pdev->dev); |
4071ea25 AZ |
303 | if (IS_ERR(pdata->rtc)) |
304 | return PTR_ERR(pdata->rtc); | |
305 | ||
18c88cc9 | 306 | pdata->rtc->ops = &ds1553_rtc_ops; |
3a9a06d4 | 307 | pdata->rtc->nvram_old_abi = true; |
18c88cc9 AB |
308 | |
309 | ret = rtc_register_device(pdata->rtc); | |
310 | if (ret) | |
311 | return ret; | |
312 | ||
2fac6674 | 313 | if (pdata->irq > 0) { |
9bf5b4f5 | 314 | writeb(0, ioaddr + RTC_INTERRUPTS); |
618161f7 AN |
315 | if (devm_request_irq(&pdev->dev, pdata->irq, |
316 | ds1553_rtc_interrupt, | |
2f6e5f94 | 317 | 0, pdev->name, pdev) < 0) { |
9bf5b4f5 | 318 | dev_warn(&pdev->dev, "interrupt not available.\n"); |
2fac6674 | 319 | pdata->irq = 0; |
9bf5b4f5 AN |
320 | } |
321 | } | |
322 | ||
3a9a06d4 AB |
323 | if (rtc_nvmem_register(pdata->rtc, &nvmem_cfg)) |
324 | dev_err(&pdev->dev, "unable to register nvmem\n"); | |
c1be915e | 325 | |
4071ea25 | 326 | return 0; |
9bf5b4f5 AN |
327 | } |
328 | ||
ad28a07b KS |
329 | /* work with hotplug and coldplug */ |
330 | MODULE_ALIAS("platform:rtc-ds1553"); | |
331 | ||
9bf5b4f5 AN |
332 | static struct platform_driver ds1553_rtc_driver = { |
333 | .probe = ds1553_rtc_probe, | |
9bf5b4f5 | 334 | .driver = { |
e7634c27 | 335 | .name = "rtc-ds1553", |
9bf5b4f5 AN |
336 | }, |
337 | }; | |
338 | ||
0c4eae66 | 339 | module_platform_driver(ds1553_rtc_driver); |
9bf5b4f5 AN |
340 | |
341 | MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>"); | |
342 | MODULE_DESCRIPTION("Dallas DS1553 RTC driver"); | |
343 | MODULE_LICENSE("GPL"); |