Commit | Line | Data |
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1abb0dc9 DB |
1 | /* |
2 | * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips. | |
3 | * | |
4 | * Copyright (C) 2005 James Chapman (ds1337 core) | |
5 | * Copyright (C) 2006 David Brownell | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/slab.h> | |
15 | #include <linux/i2c.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/rtc.h> | |
18 | #include <linux/bcd.h> | |
19 | ||
20 | ||
21 | ||
22 | /* We can't determine type by probing, but if we expect pre-Linux code | |
23 | * to have set the chip up as a clock (turning on the oscillator and | |
24 | * setting the date and time), Linux can ignore the non-clock features. | |
25 | * That's a natural job for a factory or repair bench. | |
26 | * | |
045e0e85 DB |
27 | * This is currently a simple no-alarms driver. If your board has the |
28 | * alarm irq wired up on a ds1337 or ds1339, and you want to use that, | |
29 | * then look at the rtc-rs5c372 driver for code to steal... | |
1abb0dc9 DB |
30 | */ |
31 | enum ds_type { | |
045e0e85 DB |
32 | ds_1307, |
33 | ds_1337, | |
34 | ds_1338, | |
35 | ds_1339, | |
36 | ds_1340, | |
37 | m41t00, | |
1abb0dc9 DB |
38 | // rs5c372 too? different address... |
39 | }; | |
40 | ||
1abb0dc9 DB |
41 | |
42 | /* RTC registers don't differ much, except for the century flag */ | |
43 | #define DS1307_REG_SECS 0x00 /* 00-59 */ | |
44 | # define DS1307_BIT_CH 0x80 | |
be5f59f4 | 45 | # define DS1340_BIT_nEOSC 0x80 |
1abb0dc9 DB |
46 | #define DS1307_REG_MIN 0x01 /* 00-59 */ |
47 | #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */ | |
c065f35c DB |
48 | # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */ |
49 | # define DS1307_BIT_PM 0x20 /* in REG_HOUR */ | |
1abb0dc9 DB |
50 | # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */ |
51 | # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */ | |
52 | #define DS1307_REG_WDAY 0x03 /* 01-07 */ | |
53 | #define DS1307_REG_MDAY 0x04 /* 01-31 */ | |
54 | #define DS1307_REG_MONTH 0x05 /* 01-12 */ | |
55 | # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */ | |
56 | #define DS1307_REG_YEAR 0x06 /* 00-99 */ | |
57 | ||
58 | /* Other registers (control, status, alarms, trickle charge, NVRAM, etc) | |
045e0e85 DB |
59 | * start at 7, and they differ a LOT. Only control and status matter for |
60 | * basic RTC date and time functionality; be careful using them. | |
1abb0dc9 | 61 | */ |
045e0e85 | 62 | #define DS1307_REG_CONTROL 0x07 /* or ds1338 */ |
1abb0dc9 | 63 | # define DS1307_BIT_OUT 0x80 |
be5f59f4 | 64 | # define DS1338_BIT_OSF 0x20 |
1abb0dc9 DB |
65 | # define DS1307_BIT_SQWE 0x10 |
66 | # define DS1307_BIT_RS1 0x02 | |
67 | # define DS1307_BIT_RS0 0x01 | |
68 | #define DS1337_REG_CONTROL 0x0e | |
69 | # define DS1337_BIT_nEOSC 0x80 | |
70 | # define DS1337_BIT_RS2 0x10 | |
71 | # define DS1337_BIT_RS1 0x08 | |
72 | # define DS1337_BIT_INTCN 0x04 | |
73 | # define DS1337_BIT_A2IE 0x02 | |
74 | # define DS1337_BIT_A1IE 0x01 | |
045e0e85 DB |
75 | #define DS1340_REG_CONTROL 0x07 |
76 | # define DS1340_BIT_OUT 0x80 | |
77 | # define DS1340_BIT_FT 0x40 | |
78 | # define DS1340_BIT_CALIB_SIGN 0x20 | |
79 | # define DS1340_M_CALIBRATION 0x1f | |
be5f59f4 RG |
80 | #define DS1340_REG_FLAG 0x09 |
81 | # define DS1340_BIT_OSF 0x80 | |
1abb0dc9 DB |
82 | #define DS1337_REG_STATUS 0x0f |
83 | # define DS1337_BIT_OSF 0x80 | |
84 | # define DS1337_BIT_A2I 0x02 | |
85 | # define DS1337_BIT_A1I 0x01 | |
86 | #define DS1339_REG_TRICKLE 0x10 | |
87 | ||
88 | ||
89 | ||
90 | struct ds1307 { | |
91 | u8 reg_addr; | |
682d73f6 | 92 | bool has_nvram; |
1abb0dc9 DB |
93 | u8 regs[8]; |
94 | enum ds_type type; | |
95 | struct i2c_msg msg[2]; | |
045e0e85 DB |
96 | struct i2c_client *client; |
97 | struct i2c_client dev; | |
1abb0dc9 DB |
98 | struct rtc_device *rtc; |
99 | }; | |
100 | ||
045e0e85 | 101 | struct chip_desc { |
045e0e85 DB |
102 | unsigned nvram56:1; |
103 | unsigned alarm:1; | |
045e0e85 DB |
104 | }; |
105 | ||
3760f736 JD |
106 | static const struct chip_desc chips[] = { |
107 | [ds_1307] = { | |
045e0e85 | 108 | .nvram56 = 1, |
3760f736 JD |
109 | }, |
110 | [ds_1337] = { | |
045e0e85 | 111 | .alarm = 1, |
3760f736 JD |
112 | }, |
113 | [ds_1338] = { | |
045e0e85 | 114 | .nvram56 = 1, |
3760f736 JD |
115 | }, |
116 | [ds_1339] = { | |
045e0e85 | 117 | .alarm = 1, |
3760f736 JD |
118 | }, |
119 | [ds_1340] = { | |
120 | }, | |
121 | [m41t00] = { | |
045e0e85 DB |
122 | }, }; |
123 | ||
3760f736 JD |
124 | static const struct i2c_device_id ds1307_id[] = { |
125 | { "ds1307", ds_1307 }, | |
126 | { "ds1337", ds_1337 }, | |
127 | { "ds1338", ds_1338 }, | |
128 | { "ds1339", ds_1339 }, | |
129 | { "ds1340", ds_1340 }, | |
130 | { "m41t00", m41t00 }, | |
131 | { } | |
132 | }; | |
133 | MODULE_DEVICE_TABLE(i2c, ds1307_id); | |
1abb0dc9 DB |
134 | |
135 | static int ds1307_get_time(struct device *dev, struct rtc_time *t) | |
136 | { | |
137 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | |
138 | int tmp; | |
139 | ||
045e0e85 | 140 | /* read the RTC date and time registers all at once */ |
1abb0dc9 DB |
141 | ds1307->msg[1].flags = I2C_M_RD; |
142 | ds1307->msg[1].len = 7; | |
143 | ||
045e0e85 DB |
144 | tmp = i2c_transfer(to_i2c_adapter(ds1307->client->dev.parent), |
145 | ds1307->msg, 2); | |
1abb0dc9 DB |
146 | if (tmp != 2) { |
147 | dev_err(dev, "%s error %d\n", "read", tmp); | |
148 | return -EIO; | |
149 | } | |
150 | ||
151 | dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | |
152 | "read", | |
153 | ds1307->regs[0], ds1307->regs[1], | |
154 | ds1307->regs[2], ds1307->regs[3], | |
155 | ds1307->regs[4], ds1307->regs[5], | |
156 | ds1307->regs[6]); | |
157 | ||
158 | t->tm_sec = BCD2BIN(ds1307->regs[DS1307_REG_SECS] & 0x7f); | |
159 | t->tm_min = BCD2BIN(ds1307->regs[DS1307_REG_MIN] & 0x7f); | |
160 | tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f; | |
161 | t->tm_hour = BCD2BIN(tmp); | |
162 | t->tm_wday = BCD2BIN(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1; | |
163 | t->tm_mday = BCD2BIN(ds1307->regs[DS1307_REG_MDAY] & 0x3f); | |
164 | tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f; | |
165 | t->tm_mon = BCD2BIN(tmp) - 1; | |
166 | ||
167 | /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */ | |
168 | t->tm_year = BCD2BIN(ds1307->regs[DS1307_REG_YEAR]) + 100; | |
169 | ||
170 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
171 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", | |
172 | "read", t->tm_sec, t->tm_min, | |
173 | t->tm_hour, t->tm_mday, | |
174 | t->tm_mon, t->tm_year, t->tm_wday); | |
175 | ||
045e0e85 DB |
176 | /* initial clock setting can be undefined */ |
177 | return rtc_valid_tm(t); | |
1abb0dc9 DB |
178 | } |
179 | ||
180 | static int ds1307_set_time(struct device *dev, struct rtc_time *t) | |
181 | { | |
182 | struct ds1307 *ds1307 = dev_get_drvdata(dev); | |
183 | int result; | |
184 | int tmp; | |
185 | u8 *buf = ds1307->regs; | |
186 | ||
187 | dev_dbg(dev, "%s secs=%d, mins=%d, " | |
188 | "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", | |
11966adc JG |
189 | "write", t->tm_sec, t->tm_min, |
190 | t->tm_hour, t->tm_mday, | |
191 | t->tm_mon, t->tm_year, t->tm_wday); | |
1abb0dc9 DB |
192 | |
193 | *buf++ = 0; /* first register addr */ | |
194 | buf[DS1307_REG_SECS] = BIN2BCD(t->tm_sec); | |
195 | buf[DS1307_REG_MIN] = BIN2BCD(t->tm_min); | |
196 | buf[DS1307_REG_HOUR] = BIN2BCD(t->tm_hour); | |
197 | buf[DS1307_REG_WDAY] = BIN2BCD(t->tm_wday + 1); | |
198 | buf[DS1307_REG_MDAY] = BIN2BCD(t->tm_mday); | |
199 | buf[DS1307_REG_MONTH] = BIN2BCD(t->tm_mon + 1); | |
200 | ||
201 | /* assume 20YY not 19YY */ | |
202 | tmp = t->tm_year - 100; | |
203 | buf[DS1307_REG_YEAR] = BIN2BCD(tmp); | |
204 | ||
be5f59f4 RG |
205 | switch (ds1307->type) { |
206 | case ds_1337: | |
207 | case ds_1339: | |
1abb0dc9 | 208 | buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY; |
be5f59f4 RG |
209 | break; |
210 | case ds_1340: | |
1abb0dc9 DB |
211 | buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN |
212 | | DS1340_BIT_CENTURY; | |
be5f59f4 RG |
213 | break; |
214 | default: | |
215 | break; | |
216 | } | |
1abb0dc9 DB |
217 | |
218 | ds1307->msg[1].flags = 0; | |
219 | ds1307->msg[1].len = 8; | |
220 | ||
221 | dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | |
222 | "write", buf[0], buf[1], buf[2], buf[3], | |
223 | buf[4], buf[5], buf[6]); | |
224 | ||
045e0e85 DB |
225 | result = i2c_transfer(to_i2c_adapter(ds1307->client->dev.parent), |
226 | &ds1307->msg[1], 1); | |
1abb0dc9 DB |
227 | if (result != 1) { |
228 | dev_err(dev, "%s error %d\n", "write", tmp); | |
229 | return -EIO; | |
230 | } | |
231 | return 0; | |
232 | } | |
233 | ||
ff8371ac | 234 | static const struct rtc_class_ops ds13xx_rtc_ops = { |
1abb0dc9 DB |
235 | .read_time = ds1307_get_time, |
236 | .set_time = ds1307_set_time, | |
237 | }; | |
238 | ||
682d73f6 DB |
239 | /*----------------------------------------------------------------------*/ |
240 | ||
241 | #define NVRAM_SIZE 56 | |
242 | ||
243 | static ssize_t | |
244 | ds1307_nvram_read(struct kobject *kobj, struct bin_attribute *attr, | |
245 | char *buf, loff_t off, size_t count) | |
246 | { | |
247 | struct i2c_client *client; | |
248 | struct ds1307 *ds1307; | |
249 | struct i2c_msg msg[2]; | |
250 | int result; | |
251 | ||
fcd8db00 | 252 | client = kobj_to_i2c_client(kobj); |
682d73f6 DB |
253 | ds1307 = i2c_get_clientdata(client); |
254 | ||
255 | if (unlikely(off >= NVRAM_SIZE)) | |
256 | return 0; | |
257 | if ((off + count) > NVRAM_SIZE) | |
258 | count = NVRAM_SIZE - off; | |
259 | if (unlikely(!count)) | |
260 | return count; | |
261 | ||
262 | msg[0].addr = client->addr; | |
263 | msg[0].flags = 0; | |
264 | msg[0].len = 1; | |
265 | msg[0].buf = buf; | |
266 | ||
267 | buf[0] = 8 + off; | |
268 | ||
269 | msg[1].addr = client->addr; | |
270 | msg[1].flags = I2C_M_RD; | |
271 | msg[1].len = count; | |
272 | msg[1].buf = buf; | |
273 | ||
274 | result = i2c_transfer(to_i2c_adapter(client->dev.parent), msg, 2); | |
275 | if (result != 2) { | |
276 | dev_err(&client->dev, "%s error %d\n", "nvram read", result); | |
277 | return -EIO; | |
278 | } | |
279 | return count; | |
280 | } | |
281 | ||
282 | static ssize_t | |
283 | ds1307_nvram_write(struct kobject *kobj, struct bin_attribute *attr, | |
284 | char *buf, loff_t off, size_t count) | |
285 | { | |
286 | struct i2c_client *client; | |
287 | u8 buffer[NVRAM_SIZE + 1]; | |
288 | int ret; | |
289 | ||
fcd8db00 | 290 | client = kobj_to_i2c_client(kobj); |
682d73f6 DB |
291 | |
292 | if (unlikely(off >= NVRAM_SIZE)) | |
293 | return -EFBIG; | |
294 | if ((off + count) > NVRAM_SIZE) | |
295 | count = NVRAM_SIZE - off; | |
296 | if (unlikely(!count)) | |
297 | return count; | |
298 | ||
299 | buffer[0] = 8 + off; | |
300 | memcpy(buffer + 1, buf, count); | |
301 | ||
302 | ret = i2c_master_send(client, buffer, count + 1); | |
303 | return (ret < 0) ? ret : (ret - 1); | |
304 | } | |
305 | ||
306 | static struct bin_attribute nvram = { | |
307 | .attr = { | |
308 | .name = "nvram", | |
309 | .mode = S_IRUGO | S_IWUSR, | |
310 | .owner = THIS_MODULE, | |
311 | }, | |
312 | ||
313 | .read = ds1307_nvram_read, | |
314 | .write = ds1307_nvram_write, | |
315 | .size = NVRAM_SIZE, | |
316 | }; | |
317 | ||
318 | /*----------------------------------------------------------------------*/ | |
319 | ||
1abb0dc9 DB |
320 | static struct i2c_driver ds1307_driver; |
321 | ||
d2653e92 JD |
322 | static int __devinit ds1307_probe(struct i2c_client *client, |
323 | const struct i2c_device_id *id) | |
1abb0dc9 DB |
324 | { |
325 | struct ds1307 *ds1307; | |
326 | int err = -ENODEV; | |
1abb0dc9 | 327 | int tmp; |
3760f736 | 328 | const struct chip_desc *chip = &chips[id->driver_data]; |
c065f35c | 329 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); |
1abb0dc9 | 330 | |
c065f35c DB |
331 | if (!i2c_check_functionality(adapter, |
332 | I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) | |
333 | return -EIO; | |
334 | ||
335 | if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL))) | |
336 | return -ENOMEM; | |
045e0e85 DB |
337 | |
338 | ds1307->client = client; | |
1abb0dc9 DB |
339 | i2c_set_clientdata(client, ds1307); |
340 | ||
341 | ds1307->msg[0].addr = client->addr; | |
342 | ds1307->msg[0].flags = 0; | |
343 | ds1307->msg[0].len = 1; | |
344 | ds1307->msg[0].buf = &ds1307->reg_addr; | |
345 | ||
346 | ds1307->msg[1].addr = client->addr; | |
347 | ds1307->msg[1].flags = I2C_M_RD; | |
348 | ds1307->msg[1].len = sizeof(ds1307->regs); | |
349 | ds1307->msg[1].buf = ds1307->regs; | |
350 | ||
3760f736 | 351 | ds1307->type = id->driver_data; |
045e0e85 DB |
352 | |
353 | switch (ds1307->type) { | |
354 | case ds_1337: | |
355 | case ds_1339: | |
1abb0dc9 DB |
356 | ds1307->reg_addr = DS1337_REG_CONTROL; |
357 | ds1307->msg[1].len = 2; | |
358 | ||
be5f59f4 | 359 | /* get registers that the "rtc" read below won't read... */ |
045e0e85 | 360 | tmp = i2c_transfer(adapter, ds1307->msg, 2); |
1abb0dc9 DB |
361 | if (tmp != 2) { |
362 | pr_debug("read error %d\n", tmp); | |
363 | err = -EIO; | |
364 | goto exit_free; | |
365 | } | |
366 | ||
367 | ds1307->reg_addr = 0; | |
368 | ds1307->msg[1].len = sizeof(ds1307->regs); | |
369 | ||
be5f59f4 RG |
370 | /* oscillator off? turn it on, so clock can tick. */ |
371 | if (ds1307->regs[0] & DS1337_BIT_nEOSC) | |
372 | i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, | |
373 | ds1307->regs[0] & ~DS1337_BIT_nEOSC); | |
374 | ||
375 | /* oscillator fault? clear flag, and warn */ | |
376 | if (ds1307->regs[1] & DS1337_BIT_OSF) { | |
377 | i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, | |
378 | ds1307->regs[1] & ~DS1337_BIT_OSF); | |
379 | dev_warn(&client->dev, "SET TIME!\n"); | |
1abb0dc9 | 380 | } |
045e0e85 DB |
381 | break; |
382 | default: | |
383 | break; | |
384 | } | |
1abb0dc9 DB |
385 | |
386 | read_rtc: | |
387 | /* read RTC registers */ | |
388 | ||
045e0e85 | 389 | tmp = i2c_transfer(adapter, ds1307->msg, 2); |
1abb0dc9 DB |
390 | if (tmp != 2) { |
391 | pr_debug("read error %d\n", tmp); | |
392 | err = -EIO; | |
393 | goto exit_free; | |
394 | } | |
395 | ||
396 | /* minimal sanity checking; some chips (like DS1340) don't | |
397 | * specify the extra bits as must-be-zero, but there are | |
398 | * still a few values that are clearly out-of-range. | |
399 | */ | |
400 | tmp = ds1307->regs[DS1307_REG_SECS]; | |
045e0e85 DB |
401 | switch (ds1307->type) { |
402 | case ds_1307: | |
045e0e85 | 403 | case m41t00: |
be5f59f4 | 404 | /* clock halted? turn it on, so clock can tick. */ |
045e0e85 | 405 | if (tmp & DS1307_BIT_CH) { |
be5f59f4 RG |
406 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); |
407 | dev_warn(&client->dev, "SET TIME!\n"); | |
045e0e85 | 408 | goto read_rtc; |
1abb0dc9 | 409 | } |
045e0e85 | 410 | break; |
be5f59f4 RG |
411 | case ds_1338: |
412 | /* clock halted? turn it on, so clock can tick. */ | |
045e0e85 | 413 | if (tmp & DS1307_BIT_CH) |
be5f59f4 RG |
414 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); |
415 | ||
416 | /* oscillator fault? clear flag, and warn */ | |
417 | if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { | |
418 | i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL, | |
bd16f9eb | 419 | ds1307->regs[DS1307_REG_CONTROL] |
be5f59f4 RG |
420 | & ~DS1338_BIT_OSF); |
421 | dev_warn(&client->dev, "SET TIME!\n"); | |
422 | goto read_rtc; | |
423 | } | |
045e0e85 | 424 | break; |
fcd8db00 R |
425 | case ds_1340: |
426 | /* clock halted? turn it on, so clock can tick. */ | |
427 | if (tmp & DS1340_BIT_nEOSC) | |
428 | i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); | |
429 | ||
430 | tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG); | |
431 | if (tmp < 0) { | |
432 | pr_debug("read error %d\n", tmp); | |
433 | err = -EIO; | |
434 | goto exit_free; | |
435 | } | |
436 | ||
437 | /* oscillator fault? clear flag, and warn */ | |
438 | if (tmp & DS1340_BIT_OSF) { | |
439 | i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0); | |
440 | dev_warn(&client->dev, "SET TIME!\n"); | |
441 | } | |
442 | break; | |
c065f35c DB |
443 | case ds_1337: |
444 | case ds_1339: | |
045e0e85 | 445 | break; |
1abb0dc9 | 446 | } |
045e0e85 DB |
447 | |
448 | tmp = ds1307->regs[DS1307_REG_SECS]; | |
1abb0dc9 DB |
449 | tmp = BCD2BIN(tmp & 0x7f); |
450 | if (tmp > 60) | |
c065f35c | 451 | goto exit_bad; |
1abb0dc9 DB |
452 | tmp = BCD2BIN(ds1307->regs[DS1307_REG_MIN] & 0x7f); |
453 | if (tmp > 60) | |
c065f35c | 454 | goto exit_bad; |
1abb0dc9 DB |
455 | |
456 | tmp = BCD2BIN(ds1307->regs[DS1307_REG_MDAY] & 0x3f); | |
457 | if (tmp == 0 || tmp > 31) | |
c065f35c | 458 | goto exit_bad; |
1abb0dc9 DB |
459 | |
460 | tmp = BCD2BIN(ds1307->regs[DS1307_REG_MONTH] & 0x1f); | |
461 | if (tmp == 0 || tmp > 12) | |
c065f35c | 462 | goto exit_bad; |
1abb0dc9 | 463 | |
1abb0dc9 | 464 | tmp = ds1307->regs[DS1307_REG_HOUR]; |
c065f35c DB |
465 | switch (ds1307->type) { |
466 | case ds_1340: | |
467 | case m41t00: | |
468 | /* NOTE: ignores century bits; fix before deploying | |
469 | * systems that will run through year 2100. | |
470 | */ | |
471 | break; | |
472 | default: | |
473 | if (!(tmp & DS1307_BIT_12HR)) | |
474 | break; | |
475 | ||
476 | /* Be sure we're in 24 hour mode. Multi-master systems | |
477 | * take note... | |
478 | */ | |
479 | tmp = BCD2BIN(tmp & 0x1f); | |
480 | if (tmp == 12) | |
481 | tmp = 0; | |
482 | if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) | |
483 | tmp += 12; | |
1abb0dc9 DB |
484 | i2c_smbus_write_byte_data(client, |
485 | DS1307_REG_HOUR, | |
486 | BIN2BCD(tmp)); | |
487 | } | |
488 | ||
1abb0dc9 DB |
489 | ds1307->rtc = rtc_device_register(client->name, &client->dev, |
490 | &ds13xx_rtc_ops, THIS_MODULE); | |
491 | if (IS_ERR(ds1307->rtc)) { | |
492 | err = PTR_ERR(ds1307->rtc); | |
493 | dev_err(&client->dev, | |
494 | "unable to register the class device\n"); | |
c065f35c | 495 | goto exit_free; |
1abb0dc9 DB |
496 | } |
497 | ||
682d73f6 DB |
498 | if (chip->nvram56) { |
499 | err = sysfs_create_bin_file(&client->dev.kobj, &nvram); | |
500 | if (err == 0) { | |
501 | ds1307->has_nvram = true; | |
502 | dev_info(&client->dev, "56 bytes nvram\n"); | |
503 | } | |
504 | } | |
505 | ||
1abb0dc9 DB |
506 | return 0; |
507 | ||
c065f35c DB |
508 | exit_bad: |
509 | dev_dbg(&client->dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", | |
510 | "bogus register", | |
511 | ds1307->regs[0], ds1307->regs[1], | |
512 | ds1307->regs[2], ds1307->regs[3], | |
513 | ds1307->regs[4], ds1307->regs[5], | |
514 | ds1307->regs[6]); | |
515 | ||
1abb0dc9 DB |
516 | exit_free: |
517 | kfree(ds1307); | |
1abb0dc9 DB |
518 | return err; |
519 | } | |
520 | ||
c065f35c | 521 | static int __devexit ds1307_remove(struct i2c_client *client) |
1abb0dc9 | 522 | { |
1abb0dc9 DB |
523 | struct ds1307 *ds1307 = i2c_get_clientdata(client); |
524 | ||
682d73f6 DB |
525 | if (ds1307->has_nvram) |
526 | sysfs_remove_bin_file(&client->dev.kobj, &nvram); | |
527 | ||
1abb0dc9 | 528 | rtc_device_unregister(ds1307->rtc); |
1abb0dc9 DB |
529 | kfree(ds1307); |
530 | return 0; | |
531 | } | |
532 | ||
533 | static struct i2c_driver ds1307_driver = { | |
534 | .driver = { | |
c065f35c | 535 | .name = "rtc-ds1307", |
1abb0dc9 DB |
536 | .owner = THIS_MODULE, |
537 | }, | |
c065f35c DB |
538 | .probe = ds1307_probe, |
539 | .remove = __devexit_p(ds1307_remove), | |
3760f736 | 540 | .id_table = ds1307_id, |
1abb0dc9 DB |
541 | }; |
542 | ||
543 | static int __init ds1307_init(void) | |
544 | { | |
545 | return i2c_add_driver(&ds1307_driver); | |
546 | } | |
547 | module_init(ds1307_init); | |
548 | ||
549 | static void __exit ds1307_exit(void) | |
550 | { | |
551 | i2c_del_driver(&ds1307_driver); | |
552 | } | |
553 | module_exit(ds1307_exit); | |
554 | ||
555 | MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips"); | |
556 | MODULE_LICENSE("GPL"); |