[linux-block.git] / drivers / rtc / rtc-da9063.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Real time clock device driver for DA9063
 * Copyright (C) 2013-2015  Dialog Semiconductor Ltd.
 */

#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/rtc.h>
#include <linux/slab.h>

#include <linux/mfd/da9062/registers.h>
#include <linux/mfd/da9063/registers.h>
#include <linux/mfd/da9063/core.h>

#define YEARS_TO_DA9063(year)		((year) - 100)
#define MONTHS_TO_DA9063(month)		((month) + 1)
#define YEARS_FROM_DA9063(year)		((year) + 100)
#define MONTHS_FROM_DA9063(month)	((month) - 1)

enum {
	RTC_SEC	= 0,
	RTC_MIN	= 1,
	RTC_HOUR = 2,
	RTC_DAY	= 3,
	RTC_MONTH = 4,
	RTC_YEAR = 5,
	RTC_DATA_LEN
};

struct da9063_compatible_rtc_regmap {
	/* REGS */
	int rtc_enable_reg;
	int rtc_enable_32k_crystal_reg;
	int rtc_alarm_secs_reg;
	int rtc_alarm_year_reg;
	int rtc_count_secs_reg;
	int rtc_count_year_reg;
	int rtc_event_reg;
	/* MASKS */
	int rtc_enable_mask;
	int rtc_crystal_mask;
	int rtc_event_alarm_mask;
	int rtc_alarm_on_mask;
	int rtc_alarm_status_mask;
	int rtc_tick_on_mask;
	int rtc_ready_to_read_mask;
	int rtc_count_sec_mask;
	int rtc_count_min_mask;
	int rtc_count_hour_mask;
	int rtc_count_day_mask;
	int rtc_count_month_mask;
	int rtc_count_year_mask;
	/* ALARM CONFIG */
	int rtc_data_start;
	int rtc_alarm_len;
};

struct da9063_compatible_rtc {
	struct rtc_device *rtc_dev;
	struct rtc_time alarm_time;
	struct regmap *regmap;
	const struct da9063_compatible_rtc_regmap *config;
	bool rtc_sync;
};

static const struct da9063_compatible_rtc_regmap da9063_ad_regs = {
	/* REGS */
	.rtc_enable_reg             = DA9063_REG_CONTROL_E,
	.rtc_alarm_secs_reg         = DA9063_AD_REG_ALARM_MI,
	.rtc_alarm_year_reg         = DA9063_AD_REG_ALARM_Y,
	.rtc_count_secs_reg         = DA9063_REG_COUNT_S,
	.rtc_count_year_reg         = DA9063_REG_COUNT_Y,
	.rtc_event_reg              = DA9063_REG_EVENT_A,
	/* MASKS */
	.rtc_enable_mask            = DA9063_RTC_EN,
	.rtc_crystal_mask           = DA9063_CRYSTAL,
	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
	.rtc_event_alarm_mask       = DA9063_E_ALARM,
	.rtc_alarm_on_mask          = DA9063_ALARM_ON,
	.rtc_alarm_status_mask      = DA9063_ALARM_STATUS_ALARM |
				      DA9063_ALARM_STATUS_TICK,
	.rtc_tick_on_mask           = DA9063_TICK_ON,
	.rtc_ready_to_read_mask     = DA9063_RTC_READ,
	.rtc_count_sec_mask         = DA9063_COUNT_SEC_MASK,
	.rtc_count_min_mask         = DA9063_COUNT_MIN_MASK,
	.rtc_count_hour_mask        = DA9063_COUNT_HOUR_MASK,
	.rtc_count_day_mask         = DA9063_COUNT_DAY_MASK,
	.rtc_count_month_mask       = DA9063_COUNT_MONTH_MASK,
	.rtc_count_year_mask        = DA9063_COUNT_YEAR_MASK,
	/* ALARM CONFIG */
	.rtc_data_start             = RTC_MIN,
	.rtc_alarm_len              = RTC_DATA_LEN - 1,
};

static const struct da9063_compatible_rtc_regmap da9063_bb_regs = {
	/* REGS */
	.rtc_enable_reg             = DA9063_REG_CONTROL_E,
	.rtc_alarm_secs_reg         = DA9063_BB_REG_ALARM_S,
	.rtc_alarm_year_reg         = DA9063_BB_REG_ALARM_Y,
	.rtc_count_secs_reg         = DA9063_REG_COUNT_S,
	.rtc_count_year_reg         = DA9063_REG_COUNT_Y,
	.rtc_event_reg              = DA9063_REG_EVENT_A,
	/* MASKS */
	.rtc_enable_mask            = DA9063_RTC_EN,
	.rtc_crystal_mask           = DA9063_CRYSTAL,
	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
	.rtc_event_alarm_mask       = DA9063_E_ALARM,
	.rtc_alarm_on_mask          = DA9063_ALARM_ON,
	.rtc_alarm_status_mask      = DA9063_ALARM_STATUS_ALARM |
				      DA9063_ALARM_STATUS_TICK,
	.rtc_tick_on_mask           = DA9063_TICK_ON,
	.rtc_ready_to_read_mask     = DA9063_RTC_READ,
	.rtc_count_sec_mask         = DA9063_COUNT_SEC_MASK,
	.rtc_count_min_mask         = DA9063_COUNT_MIN_MASK,
	.rtc_count_hour_mask        = DA9063_COUNT_HOUR_MASK,
	.rtc_count_day_mask         = DA9063_COUNT_DAY_MASK,
	.rtc_count_month_mask       = DA9063_COUNT_MONTH_MASK,
	.rtc_count_year_mask        = DA9063_COUNT_YEAR_MASK,
	/* ALARM CONFIG */
	.rtc_data_start             = RTC_SEC,
	.rtc_alarm_len              = RTC_DATA_LEN,
};

static const struct da9063_compatible_rtc_regmap da9062_aa_regs = {
	/* REGS */
	.rtc_enable_reg             = DA9062AA_CONTROL_E,
	.rtc_alarm_secs_reg         = DA9062AA_ALARM_S,
	.rtc_alarm_year_reg         = DA9062AA_ALARM_Y,
	.rtc_count_secs_reg         = DA9062AA_COUNT_S,
	.rtc_count_year_reg         = DA9062AA_COUNT_Y,
	.rtc_event_reg              = DA9062AA_EVENT_A,
	/* MASKS */
	.rtc_enable_mask            = DA9062AA_RTC_EN_MASK,
	.rtc_crystal_mask           = DA9062AA_CRYSTAL_MASK,
	.rtc_enable_32k_crystal_reg = DA9062AA_EN_32K,
	.rtc_event_alarm_mask       = DA9062AA_M_ALARM_MASK,
	.rtc_alarm_on_mask          = DA9062AA_ALARM_ON_MASK,
	.rtc_alarm_status_mask      = (0x02 << 6),
	.rtc_tick_on_mask           = DA9062AA_TICK_ON_MASK,
	.rtc_ready_to_read_mask     = DA9062AA_RTC_READ_MASK,
	.rtc_count_sec_mask         = DA9062AA_COUNT_SEC_MASK,
	.rtc_count_min_mask         = DA9062AA_COUNT_MIN_MASK,
	.rtc_count_hour_mask        = DA9062AA_COUNT_HOUR_MASK,
	.rtc_count_day_mask         = DA9062AA_COUNT_DAY_MASK,
	.rtc_count_month_mask       = DA9062AA_COUNT_MONTH_MASK,
	.rtc_count_year_mask        = DA9062AA_COUNT_YEAR_MASK,
	/* ALARM CONFIG */
	.rtc_data_start             = RTC_SEC,
	.rtc_alarm_len              = RTC_DATA_LEN,
};

static const struct of_device_id da9063_compatible_reg_id_table[] = {
	{ .compatible = "dlg,da9063-rtc", .data = &da9063_bb_regs },
	{ .compatible = "dlg,da9062-rtc", .data = &da9062_aa_regs },
	{ },
};
MODULE_DEVICE_TABLE(of, da9063_compatible_reg_id_table);

static void da9063_data_to_tm(u8 *data, struct rtc_time *tm,
			      struct da9063_compatible_rtc *rtc)
{
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	tm->tm_sec  = data[RTC_SEC]  & config->rtc_count_sec_mask;
	tm->tm_min  = data[RTC_MIN]  & config->rtc_count_min_mask;
	tm->tm_hour = data[RTC_HOUR] & config->rtc_count_hour_mask;
	tm->tm_mday = data[RTC_DAY]  & config->rtc_count_day_mask;
	tm->tm_mon  = MONTHS_FROM_DA9063(data[RTC_MONTH] &
					 config->rtc_count_month_mask);
	tm->tm_year = YEARS_FROM_DA9063(data[RTC_YEAR] &
					config->rtc_count_year_mask);
}

static void da9063_tm_to_data(struct rtc_time *tm, u8 *data,
			      struct da9063_compatible_rtc *rtc)
{
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	data[RTC_SEC]   = tm->tm_sec & config->rtc_count_sec_mask;
	data[RTC_MIN]   = tm->tm_min & config->rtc_count_min_mask;
	data[RTC_HOUR]  = tm->tm_hour & config->rtc_count_hour_mask;
	data[RTC_DAY]   = tm->tm_mday & config->rtc_count_day_mask;
	data[RTC_MONTH] = MONTHS_TO_DA9063(tm->tm_mon) &
				config->rtc_count_month_mask;
	data[RTC_YEAR]  = YEARS_TO_DA9063(tm->tm_year) &
				config->rtc_count_year_mask;
}

static int da9063_rtc_stop_alarm(struct device *dev)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	return regmap_update_bits(rtc->regmap,
				  config->rtc_alarm_year_reg,
				  config->rtc_alarm_on_mask,
				  0);
}

static int da9063_rtc_start_alarm(struct device *dev)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	return regmap_update_bits(rtc->regmap,
				  config->rtc_alarm_year_reg,
				  config->rtc_alarm_on_mask,
				  config->rtc_alarm_on_mask);
}

static int da9063_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	unsigned long tm_secs;
	unsigned long al_secs;
	u8 data[RTC_DATA_LEN];
	int ret;

	ret = regmap_bulk_read(rtc->regmap,
			       config->rtc_count_secs_reg,
			       data, RTC_DATA_LEN);
	if (ret < 0) {
		dev_err(dev, "Failed to read RTC time data: %d\n", ret);
		return ret;
	}

	if (!(data[RTC_SEC] & config->rtc_ready_to_read_mask)) {
		dev_dbg(dev, "RTC not yet ready to be read by the host\n");
		return -EINVAL;
	}

	da9063_data_to_tm(data, tm, rtc);

	tm_secs = rtc_tm_to_time64(tm);
	al_secs = rtc_tm_to_time64(&rtc->alarm_time);

	/* handle the rtc synchronisation delay */
	if (rtc->rtc_sync && al_secs - tm_secs == 1)
		memcpy(tm, &rtc->alarm_time, sizeof(struct rtc_time));
	else
		rtc->rtc_sync = false;

	return 0;
}

static int da9063_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	u8 data[RTC_DATA_LEN];
	int ret;

	da9063_tm_to_data(tm, data, rtc);
	ret = regmap_bulk_write(rtc->regmap,
				config->rtc_count_secs_reg,
				data, RTC_DATA_LEN);
	if (ret < 0)
		dev_err(dev, "Failed to set RTC time data: %d\n", ret);

	return ret;
}

static int da9063_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	u8 data[RTC_DATA_LEN];
	int ret;
	unsigned int val;

	data[RTC_SEC] = 0;
	ret = regmap_bulk_read(rtc->regmap,
			       config->rtc_alarm_secs_reg,
			       &data[config->rtc_data_start],
			       config->rtc_alarm_len);
	if (ret < 0)
		return ret;

	da9063_data_to_tm(data, &alrm->time, rtc);

	alrm->enabled = !!(data[RTC_YEAR] & config->rtc_alarm_on_mask);

	ret = regmap_read(rtc->regmap,
			  config->rtc_event_reg,
			  &val);
	if (ret < 0)
		return ret;

	if (val & config->rtc_event_alarm_mask)
		alrm->pending = 1;
	else
		alrm->pending = 0;

	return 0;
}

static int da9063_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	u8 data[RTC_DATA_LEN];
	int ret;

	da9063_tm_to_data(&alrm->time, data, rtc);

	ret = da9063_rtc_stop_alarm(dev);
	if (ret < 0) {
		dev_err(dev, "Failed to stop alarm: %d\n", ret);
		return ret;
	}

	ret = regmap_bulk_write(rtc->regmap,
				config->rtc_alarm_secs_reg,
				&data[config->rtc_data_start],
				config->rtc_alarm_len);
	if (ret < 0) {
		dev_err(dev, "Failed to write alarm: %d\n", ret);
		return ret;
	}

	da9063_data_to_tm(data, &rtc->alarm_time, rtc);

	if (alrm->enabled) {
		ret = da9063_rtc_start_alarm(dev);
		if (ret < 0) {
			dev_err(dev, "Failed to start alarm: %d\n", ret);
			return ret;
		}
	}

	return ret;
}

static int da9063_rtc_alarm_irq_enable(struct device *dev,
				       unsigned int enabled)
{
	if (enabled)
		return da9063_rtc_start_alarm(dev);
	else
		return da9063_rtc_stop_alarm(dev);
}

static irqreturn_t da9063_alarm_event(int irq, void *data)
{
	struct da9063_compatible_rtc *rtc = data;
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	regmap_update_bits(rtc->regmap,
			   config->rtc_alarm_year_reg,
			   config->rtc_alarm_on_mask,
			   0);

	rtc->rtc_sync = true;
	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);

	return IRQ_HANDLED;
}

static const struct rtc_class_ops da9063_rtc_ops = {
	.read_time = da9063_rtc_read_time,
	.set_time = da9063_rtc_set_time,
	.read_alarm = da9063_rtc_read_alarm,
	.set_alarm = da9063_rtc_set_alarm,
	.alarm_irq_enable = da9063_rtc_alarm_irq_enable,
};

static int da9063_rtc_probe(struct platform_device *pdev)
{
	struct da9063_compatible_rtc *rtc;
	const struct da9063_compatible_rtc_regmap *config;
	const struct of_device_id *match;
	int irq_alarm;
	u8 data[RTC_DATA_LEN];
	int ret;

	if (!pdev->dev.of_node)
		return -ENXIO;

	match = of_match_node(da9063_compatible_reg_id_table,
			      pdev->dev.of_node);

	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
	if (!rtc)
		return -ENOMEM;

	rtc->config = match->data;
	if (of_device_is_compatible(pdev->dev.of_node, "dlg,da9063-rtc")) {
		struct da9063 *chip = dev_get_drvdata(pdev->dev.parent);

		if (chip->variant_code == PMIC_DA9063_AD)
			rtc->config = &da9063_ad_regs;
	}

	rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL);
	if (!rtc->regmap) {
		dev_warn(&pdev->dev, "Parent regmap unavailable.\n");
		return -ENXIO;
	}

	config = rtc->config;
	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_enable_reg,
				 config->rtc_enable_mask,
				 config->rtc_enable_mask);
	if (ret < 0) {
		dev_err(&pdev->dev, "Failed to enable RTC\n");
		return ret;
	}

	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_enable_32k_crystal_reg,
				 config->rtc_crystal_mask,
				 config->rtc_crystal_mask);
	if (ret < 0) {
		dev_err(&pdev->dev, "Failed to run 32kHz oscillator\n");
		return ret;
	}

	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_alarm_secs_reg,
				 config->rtc_alarm_status_mask,
				 0);
	if (ret < 0) {
		dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
		return ret;
	}

	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_alarm_secs_reg,
				 DA9063_ALARM_STATUS_ALARM,
				 DA9063_ALARM_STATUS_ALARM);
	if (ret < 0) {
		dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
		return ret;
	}

	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_alarm_year_reg,
				 config->rtc_tick_on_mask,
				 0);
	if (ret < 0) {
		dev_err(&pdev->dev, "Failed to disable TICKs\n");
		return ret;
	}

	data[RTC_SEC] = 0;
	ret = regmap_bulk_read(rtc->regmap,
			       config->rtc_alarm_secs_reg,
			       &data[config->rtc_data_start],
			       config->rtc_alarm_len);
	if (ret < 0) {
		dev_err(&pdev->dev, "Failed to read initial alarm data: %d\n",
			ret);
		return ret;
	}

	platform_set_drvdata(pdev, rtc);

	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
	if (IS_ERR(rtc->rtc_dev))
		return PTR_ERR(rtc->rtc_dev);

	rtc->rtc_dev->ops = &da9063_rtc_ops;
	rtc->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_2000;
	rtc->rtc_dev->range_max = RTC_TIMESTAMP_END_2063;

	da9063_data_to_tm(data, &rtc->alarm_time, rtc);
	rtc->rtc_sync = false;

	if (config->rtc_data_start != RTC_SEC) {
		set_bit(RTC_FEATURE_ALARM_RES_MINUTE, rtc->rtc_dev->features);
		/*
		 * TODO: some models have alarms on a minute boundary but still
		 * support real hardware interrupts.
		 */
		clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->rtc_dev->features);
	}

	irq_alarm = platform_get_irq_byname(pdev, "ALARM");
	if (irq_alarm < 0)
		return irq_alarm;

	ret = devm_request_threaded_irq(&pdev->dev, irq_alarm, NULL,
					da9063_alarm_event,
					IRQF_TRIGGER_LOW | IRQF_ONESHOT,
					"ALARM", rtc);
	if (ret)
		dev_err(&pdev->dev, "Failed to request ALARM IRQ %d: %d\n",
			irq_alarm, ret);

	device_init_wakeup(&pdev->dev, true);

	return devm_rtc_register_device(rtc->rtc_dev);
}

static struct platform_driver da9063_rtc_driver = {
	.probe		= da9063_rtc_probe,
	.driver		= {
		.name	= DA9063_DRVNAME_RTC,
		.of_match_table = da9063_compatible_reg_id_table,
	},
};

module_platform_driver(da9063_rtc_driver);

MODULE_AUTHOR("S Twiss <stwiss.opensource@diasemi.com>");
MODULE_DESCRIPTION("Real time clock device driver for Dialog DA9063");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DA9063_DRVNAME_RTC);
Commit	Line	Data
737842e5 WS	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* Real time clock device driver for DA9063
ce006ca6	4	* Copyright (C) 2013-2015 Dialog Semiconductor Ltd.
c2a57550 OST	5	*/
c2a57550 OST	6
80ca3277 T	7	#include <linux/delay.h>
	8	#include <linux/init.h>
	9	#include <linux/interrupt.h>
c2a57550 OST	10	#include <linux/kernel.h>
c2a57550 OST	11	#include <linux/module.h>
80ca3277	12	#include <linux/of.h>
c2a57550	13	#include <linux/platform_device.h>
80ca3277	14	#include <linux/regmap.h>
c2a57550 OST	15	#include <linux/rtc.h>
c2a57550 OST	16	#include <linux/slab.h>
80ca3277 T	17
80ca3277 T	18	#include <linux/mfd/da9062/registers.h>
c2a57550 OST	19	#include <linux/mfd/da9063/registers.h>
	20	#include <linux/mfd/da9063/core.h>
	21
	22	#define YEARS_TO_DA9063(year) ((year) - 100)
	23	#define MONTHS_TO_DA9063(month) ((month) + 1)
	24	#define YEARS_FROM_DA9063(year) ((year) + 100)
	25	#define MONTHS_FROM_DA9063(month) ((month) - 1)
	26
80ca3277 T	27	enum {
	28	RTC_SEC = 0,
	29	RTC_MIN = 1,
	30	RTC_HOUR = 2,
	31	RTC_DAY = 3,
	32	RTC_MONTH = 4,
	33	RTC_YEAR = 5,
	34	RTC_DATA_LEN
	35	};
	36
	37	struct da9063_compatible_rtc_regmap {
	38	/* REGS */
	39	int rtc_enable_reg;
	40	int rtc_enable_32k_crystal_reg;
	41	int rtc_alarm_secs_reg;
	42	int rtc_alarm_year_reg;
	43	int rtc_count_secs_reg;
	44	int rtc_count_year_reg;
	45	int rtc_event_reg;
	46	/* MASKS */
	47	int rtc_enable_mask;
	48	int rtc_crystal_mask;
	49	int rtc_event_alarm_mask;
	50	int rtc_alarm_on_mask;
	51	int rtc_alarm_status_mask;
	52	int rtc_tick_on_mask;
	53	int rtc_ready_to_read_mask;
	54	int rtc_count_sec_mask;
	55	int rtc_count_min_mask;
	56	int rtc_count_hour_mask;
	57	int rtc_count_day_mask;
	58	int rtc_count_month_mask;
	59	int rtc_count_year_mask;
	60	/* ALARM CONFIG */
	61	int rtc_data_start;
	62	int rtc_alarm_len;
	63	};
	64
	65	struct da9063_compatible_rtc {
	66	struct rtc_device *rtc_dev;
	67	struct rtc_time alarm_time;
	68	struct regmap *regmap;
	69	const struct da9063_compatible_rtc_regmap *config;
	70	bool rtc_sync;
	71	};
	72
	73	static const struct da9063_compatible_rtc_regmap da9063_ad_regs = {
	74	/* REGS */
	75	.rtc_enable_reg = DA9063_REG_CONTROL_E,
	76	.rtc_alarm_secs_reg = DA9063_AD_REG_ALARM_MI,
	77	.rtc_alarm_year_reg = DA9063_AD_REG_ALARM_Y,
	78	.rtc_count_secs_reg = DA9063_REG_COUNT_S,
	79	.rtc_count_year_reg = DA9063_REG_COUNT_Y,
	80	.rtc_event_reg = DA9063_REG_EVENT_A,
	81	/* MASKS */
	82	.rtc_enable_mask = DA9063_RTC_EN,
	83	.rtc_crystal_mask = DA9063_CRYSTAL,
	84	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
	85	.rtc_event_alarm_mask = DA9063_E_ALARM,
	86	.rtc_alarm_on_mask = DA9063_ALARM_ON,
	87	.rtc_alarm_status_mask = DA9063_ALARM_STATUS_ALARM \|
	88	DA9063_ALARM_STATUS_TICK,
	89	.rtc_tick_on_mask = DA9063_TICK_ON,
	90	.rtc_ready_to_read_mask = DA9063_RTC_READ,
91	.rtc_count_sec_mask = DA9063_COUNT_SEC_MASK,
92	.rtc_count_min_mask = DA9063_COUNT_MIN_MASK,
93	.rtc_count_hour_mask = DA9063_COUNT_HOUR_MASK,
94	.rtc_count_day_mask = DA9063_COUNT_DAY_MASK,
95	.rtc_count_month_mask = DA9063_COUNT_MONTH_MASK,
96	.rtc_count_year_mask = DA9063_COUNT_YEAR_MASK,
97	/* ALARM CONFIG */
98	.rtc_data_start = RTC_MIN,
99	.rtc_alarm_len = RTC_DATA_LEN - 1,
100	};
101
102	static const struct da9063_compatible_rtc_regmap da9063_bb_regs = {
103	/* REGS */
104	.rtc_enable_reg = DA9063_REG_CONTROL_E,
105	.rtc_alarm_secs_reg = DA9063_BB_REG_ALARM_S,
106	.rtc_alarm_year_reg = DA9063_BB_REG_ALARM_Y,
107	.rtc_count_secs_reg = DA9063_REG_COUNT_S,
108	.rtc_count_year_reg = DA9063_REG_COUNT_Y,
109	.rtc_event_reg = DA9063_REG_EVENT_A,
110	/* MASKS */
111	.rtc_enable_mask = DA9063_RTC_EN,
112	.rtc_crystal_mask = DA9063_CRYSTAL,
113	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
114	.rtc_event_alarm_mask = DA9063_E_ALARM,
115	.rtc_alarm_on_mask = DA9063_ALARM_ON,
116	.rtc_alarm_status_mask = DA9063_ALARM_STATUS_ALARM \|
117	DA9063_ALARM_STATUS_TICK,
118	.rtc_tick_on_mask = DA9063_TICK_ON,
119	.rtc_ready_to_read_mask = DA9063_RTC_READ,
120	.rtc_count_sec_mask = DA9063_COUNT_SEC_MASK,
121	.rtc_count_min_mask = DA9063_COUNT_MIN_MASK,
122	.rtc_count_hour_mask = DA9063_COUNT_HOUR_MASK,
123	.rtc_count_day_mask = DA9063_COUNT_DAY_MASK,
124	.rtc_count_month_mask = DA9063_COUNT_MONTH_MASK,
125	.rtc_count_year_mask = DA9063_COUNT_YEAR_MASK,
126	/* ALARM CONFIG */
127	.rtc_data_start = RTC_SEC,
128	.rtc_alarm_len = RTC_DATA_LEN,
129	};
130
131	static const struct da9063_compatible_rtc_regmap da9062_aa_regs = {
132	/* REGS */
133	.rtc_enable_reg = DA9062AA_CONTROL_E,
134	.rtc_alarm_secs_reg = DA9062AA_ALARM_S,
135	.rtc_alarm_year_reg = DA9062AA_ALARM_Y,
136	.rtc_count_secs_reg = DA9062AA_COUNT_S,
137	.rtc_count_year_reg = DA9062AA_COUNT_Y,
138	.rtc_event_reg = DA9062AA_EVENT_A,
139	/* MASKS */
140	.rtc_enable_mask = DA9062AA_RTC_EN_MASK,
141	.rtc_crystal_mask = DA9062AA_CRYSTAL_MASK,
142	.rtc_enable_32k_crystal_reg = DA9062AA_EN_32K,
143	.rtc_event_alarm_mask = DA9062AA_M_ALARM_MASK,
144	.rtc_alarm_on_mask = DA9062AA_ALARM_ON_MASK,
145	.rtc_alarm_status_mask = (0x02 << 6),
146	.rtc_tick_on_mask = DA9062AA_TICK_ON_MASK,
147	.rtc_ready_to_read_mask = DA9062AA_RTC_READ_MASK,
148	.rtc_count_sec_mask = DA9062AA_COUNT_SEC_MASK,
149	.rtc_count_min_mask = DA9062AA_COUNT_MIN_MASK,
150	.rtc_count_hour_mask = DA9062AA_COUNT_HOUR_MASK,
151	.rtc_count_day_mask = DA9062AA_COUNT_DAY_MASK,
152	.rtc_count_month_mask = DA9062AA_COUNT_MONTH_MASK,
153	.rtc_count_year_mask = DA9062AA_COUNT_YEAR_MASK,
154	/* ALARM CONFIG */
155	.rtc_data_start = RTC_SEC,
156	.rtc_alarm_len = RTC_DATA_LEN,
157	};
158
159	static const struct of_device_id da9063_compatible_reg_id_table[] = {
160	{ .compatible = "dlg,da9063-rtc", .data = &da9063_bb_regs },
161	{ .compatible = "dlg,da9062-rtc", .data = &da9062_aa_regs },
162	{ },
c2a57550	163	};
73798d5c	164	MODULE_DEVICE_TABLE(of, da9063_compatible_reg_id_table);
c2a57550	165
80ca3277 T	166	static void da9063_data_to_tm(u8 data, struct rtc_time tm,
80ca3277 T	167	struct da9063_compatible_rtc *rtc)
c2a57550	168	{
80ca3277 T	169	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	170
	171	tm->tm_sec = data[RTC_SEC] & config->rtc_count_sec_mask;
	172	tm->tm_min = data[RTC_MIN] & config->rtc_count_min_mask;
	173	tm->tm_hour = data[RTC_HOUR] & config->rtc_count_hour_mask;
	174	tm->tm_mday = data[RTC_DAY] & config->rtc_count_day_mask;
c2a57550	175	tm->tm_mon = MONTHS_FROM_DA9063(data[RTC_MONTH] &
80ca3277	176	config->rtc_count_month_mask);
c2a57550	177	tm->tm_year = YEARS_FROM_DA9063(data[RTC_YEAR] &
80ca3277	178	config->rtc_count_year_mask);
c2a57550 OST	179	}
c2a57550 OST	180
80ca3277 T	181	static void da9063_tm_to_data(struct rtc_time tm, u8 data,
80ca3277 T	182	struct da9063_compatible_rtc *rtc)
c2a57550	183	{
80ca3277 T	184	const struct da9063_compatible_rtc_regmap *config = rtc->config;
80ca3277 T	185
2ad2c174 ES	186	data[RTC_SEC] = tm->tm_sec & config->rtc_count_sec_mask;
	187	data[RTC_MIN] = tm->tm_min & config->rtc_count_min_mask;
	188	data[RTC_HOUR] = tm->tm_hour & config->rtc_count_hour_mask;
	189	data[RTC_DAY] = tm->tm_mday & config->rtc_count_day_mask;
	190	data[RTC_MONTH] = MONTHS_TO_DA9063(tm->tm_mon) &
80ca3277	191	config->rtc_count_month_mask;
2ad2c174	192	data[RTC_YEAR] = YEARS_TO_DA9063(tm->tm_year) &
80ca3277	193	config->rtc_count_year_mask;
c2a57550 OST	194	}
	195
	196	static int da9063_rtc_stop_alarm(struct device *dev)
	197	{
80ca3277 T	198	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	199	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550	200
80ca3277 T	201	return regmap_update_bits(rtc->regmap,
	202	config->rtc_alarm_year_reg,
	203	config->rtc_alarm_on_mask,
	204	0);
c2a57550 OST	205	}
	206
	207	static int da9063_rtc_start_alarm(struct device *dev)
	208	{
80ca3277 T	209	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	210	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550	211
80ca3277 T	212	return regmap_update_bits(rtc->regmap,
	213	config->rtc_alarm_year_reg,
	214	config->rtc_alarm_on_mask,
	215	config->rtc_alarm_on_mask);
c2a57550 OST	216	}
	217
	218	static int da9063_rtc_read_time(struct device dev, struct rtc_time tm)
	219	{
80ca3277 T	220	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	221	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550 OST	222	unsigned long tm_secs;
	223	unsigned long al_secs;
	224	u8 data[RTC_DATA_LEN];
	225	int ret;
	226
80ca3277 T	227	ret = regmap_bulk_read(rtc->regmap,
80ca3277 T	228	config->rtc_count_secs_reg,
c2a57550 OST	229	data, RTC_DATA_LEN);
	230	if (ret < 0) {
	231	dev_err(dev, "Failed to read RTC time data: %d\n", ret);
	232	return ret;
	233	}
	234
80ca3277	235	if (!(data[RTC_SEC] & config->rtc_ready_to_read_mask)) {
c2a57550 OST	236	dev_dbg(dev, "RTC not yet ready to be read by the host\n");
	237	return -EINVAL;
	238	}
	239
80ca3277	240	da9063_data_to_tm(data, tm, rtc);
c2a57550	241
b599db3a AB	242	tm_secs = rtc_tm_to_time64(tm);
b599db3a AB	243	al_secs = rtc_tm_to_time64(&rtc->alarm_time);
c2a57550 OST	244
c2a57550 OST	245	/* handle the rtc synchronisation delay */
a48c6224	246	if (rtc->rtc_sync && al_secs - tm_secs == 1)
c2a57550 OST	247	memcpy(tm, &rtc->alarm_time, sizeof(struct rtc_time));
	248	else
	249	rtc->rtc_sync = false;
	250
bb54be13	251	return 0;
c2a57550 OST	252	}
	253
	254	static int da9063_rtc_set_time(struct device dev, struct rtc_time tm)
	255	{
80ca3277 T	256	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	257	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550 OST	258	u8 data[RTC_DATA_LEN];
	259	int ret;
	260
80ca3277 T	261	da9063_tm_to_data(tm, data, rtc);
	262	ret = regmap_bulk_write(rtc->regmap,
	263	config->rtc_count_secs_reg,
c2a57550 OST	264	data, RTC_DATA_LEN);
	265	if (ret < 0)
	266	dev_err(dev, "Failed to set RTC time data: %d\n", ret);
	267
	268	return ret;
	269	}
	270
	271	static int da9063_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)
	272	{
80ca3277 T	273	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	274	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550 OST	275	u8 data[RTC_DATA_LEN];
	276	int ret;
	277	unsigned int val;
	278
9cb42e2a	279	data[RTC_SEC] = 0;
80ca3277 T	280	ret = regmap_bulk_read(rtc->regmap,
	281	config->rtc_alarm_secs_reg,
	282	&data[config->rtc_data_start],
	283	config->rtc_alarm_len);
c2a57550 OST	284	if (ret < 0)
	285	return ret;
	286
80ca3277	287	da9063_data_to_tm(data, &alrm->time, rtc);
c2a57550	288
80ca3277	289	alrm->enabled = !!(data[RTC_YEAR] & config->rtc_alarm_on_mask);
c2a57550	290
80ca3277 T	291	ret = regmap_read(rtc->regmap,
	292	config->rtc_event_reg,
	293	&val);
c2a57550 OST	294	if (ret < 0)
	295	return ret;
	296
80ca3277	297	if (val & config->rtc_event_alarm_mask)
c2a57550 OST	298	alrm->pending = 1;
	299	else
	300	alrm->pending = 0;
	301
	302	return 0;
	303	}
	304
	305	static int da9063_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm)
	306	{
80ca3277 T	307	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	308	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550 OST	309	u8 data[RTC_DATA_LEN];
	310	int ret;
	311
80ca3277	312	da9063_tm_to_data(&alrm->time, data, rtc);
c2a57550 OST	313
	314	ret = da9063_rtc_stop_alarm(dev);
	315	if (ret < 0) {
	316	dev_err(dev, "Failed to stop alarm: %d\n", ret);
	317	return ret;
	318	}
	319
80ca3277 T	320	ret = regmap_bulk_write(rtc->regmap,
	321	config->rtc_alarm_secs_reg,
	322	&data[config->rtc_data_start],
	323	config->rtc_alarm_len);
c2a57550 OST	324	if (ret < 0) {
	325	dev_err(dev, "Failed to write alarm: %d\n", ret);
	326	return ret;
	327	}
	328
80ca3277	329	da9063_data_to_tm(data, &rtc->alarm_time, rtc);
c2a57550 OST	330
	331	if (alrm->enabled) {
	332	ret = da9063_rtc_start_alarm(dev);
	333	if (ret < 0) {
	334	dev_err(dev, "Failed to start alarm: %d\n", ret);
	335	return ret;
	336	}
	337	}
	338
	339	return ret;
	340	}
	341
80ca3277 T	342	static int da9063_rtc_alarm_irq_enable(struct device *dev,
80ca3277 T	343	unsigned int enabled)
c2a57550 OST	344	{
	345	if (enabled)
	346	return da9063_rtc_start_alarm(dev);
	347	else
	348	return da9063_rtc_stop_alarm(dev);
	349	}
	350
	351	static irqreturn_t da9063_alarm_event(int irq, void *data)
	352	{
80ca3277 T	353	struct da9063_compatible_rtc *rtc = data;
80ca3277 T	354	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550	355
80ca3277 T	356	regmap_update_bits(rtc->regmap,
	357	config->rtc_alarm_year_reg,
	358	config->rtc_alarm_on_mask,
	359	0);
c2a57550 OST	360
	361	rtc->rtc_sync = true;
	362	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF \| RTC_AF);
	363
	364	return IRQ_HANDLED;
	365	}
	366
	367	static const struct rtc_class_ops da9063_rtc_ops = {
	368	.read_time = da9063_rtc_read_time,
	369	.set_time = da9063_rtc_set_time,
	370	.read_alarm = da9063_rtc_read_alarm,
	371	.set_alarm = da9063_rtc_set_alarm,
	372	.alarm_irq_enable = da9063_rtc_alarm_irq_enable,
	373	};
	374
	375	static int da9063_rtc_probe(struct platform_device *pdev)
	376	{
80ca3277 T	377	struct da9063_compatible_rtc *rtc;
	378	const struct da9063_compatible_rtc_regmap *config;
	379	const struct of_device_id *match;
c2a57550 OST	380	int irq_alarm;
	381	u8 data[RTC_DATA_LEN];
	382	int ret;
	383
80ca3277 T	384	if (!pdev->dev.of_node)
80ca3277 T	385	return -ENXIO;
c2a57550	386
80ca3277 T	387	match = of_match_node(da9063_compatible_reg_id_table,
80ca3277 T	388	pdev->dev.of_node);
c2a57550	389
9cb42e2a OST	390	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
	391	if (!rtc)
	392	return -ENOMEM;
	393
80ca3277 T	394	rtc->config = match->data;
	395	if (of_device_is_compatible(pdev->dev.of_node, "dlg,da9063-rtc")) {
	396	struct da9063 *chip = dev_get_drvdata(pdev->dev.parent);
	397
	398	if (chip->variant_code == PMIC_DA9063_AD)
	399	rtc->config = &da9063_ad_regs;
9cb42e2a OST	400	}
9cb42e2a OST	401
80ca3277 T	402	rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL);
	403	if (!rtc->regmap) {
	404	dev_warn(&pdev->dev, "Parent regmap unavailable.\n");
	405	return -ENXIO;
	406	}
	407
	408	config = rtc->config;
	409	ret = regmap_update_bits(rtc->regmap,
	410	config->rtc_enable_reg,
	411	config->rtc_enable_mask,
	412	config->rtc_enable_mask);
	413	if (ret < 0) {
	414	dev_err(&pdev->dev, "Failed to enable RTC\n");
	415	return ret;
	416	}
	417
	418	ret = regmap_update_bits(rtc->regmap,
	419	config->rtc_enable_32k_crystal_reg,
	420	config->rtc_crystal_mask,
	421	config->rtc_crystal_mask);
	422	if (ret < 0) {
	423	dev_err(&pdev->dev, "Failed to run 32kHz oscillator\n");
	424	return ret;
	425	}
	426
	427	ret = regmap_update_bits(rtc->regmap,
	428	config->rtc_alarm_secs_reg,
	429	config->rtc_alarm_status_mask,
	430	0);
c2a57550 OST	431	if (ret < 0) {
c2a57550 OST	432	dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
80ca3277	433	return ret;
c2a57550 OST	434	}
c2a57550 OST	435
80ca3277 T	436	ret = regmap_update_bits(rtc->regmap,
80ca3277 T	437	config->rtc_alarm_secs_reg,
c2a57550 OST	438	DA9063_ALARM_STATUS_ALARM,
	439	DA9063_ALARM_STATUS_ALARM);
	440	if (ret < 0) {
	441	dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
80ca3277	442	return ret;
c2a57550 OST	443	}
c2a57550 OST	444
80ca3277 T	445	ret = regmap_update_bits(rtc->regmap,
	446	config->rtc_alarm_year_reg,
	447	config->rtc_tick_on_mask,
	448	0);
c2a57550 OST	449	if (ret < 0) {
c2a57550 OST	450	dev_err(&pdev->dev, "Failed to disable TICKs\n");
80ca3277	451	return ret;
c2a57550 OST	452	}
c2a57550 OST	453
9cb42e2a	454	data[RTC_SEC] = 0;
80ca3277 T	455	ret = regmap_bulk_read(rtc->regmap,
	456	config->rtc_alarm_secs_reg,
	457	&data[config->rtc_data_start],
	458	config->rtc_alarm_len);
c2a57550 OST	459	if (ret < 0) {
	460	dev_err(&pdev->dev, "Failed to read initial alarm data: %d\n",
	461	ret);
80ca3277	462	return ret;
c2a57550 OST	463	}
c2a57550 OST	464
c2a57550 OST	465	platform_set_drvdata(pdev, rtc);
c2a57550 OST	466
5ff404d1	467	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
77535ace ST	468	if (IS_ERR(rtc->rtc_dev))
	469	return PTR_ERR(rtc->rtc_dev);
	470
5ff404d1 AB	471	rtc->rtc_dev->ops = &da9063_rtc_ops;
	472	rtc->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_2000;
	473	rtc->rtc_dev->range_max = RTC_TIMESTAMP_END_2063;
	474
77535ace ST	475	da9063_data_to_tm(data, &rtc->alarm_time, rtc);
	476	rtc->rtc_sync = false;
	477
a478c433 AB	478	if (config->rtc_data_start != RTC_SEC) {
	479	set_bit(RTC_FEATURE_ALARM_RES_MINUTE, rtc->rtc_dev->features);
	480	/*
	481	* TODO: some models have alarms on a minute boundary but still
	482	* support real hardware interrupts.
	483	*/
	484	clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->rtc_dev->features);
	485	}
882c5e55	486
c2a57550	487	irq_alarm = platform_get_irq_byname(pdev, "ALARM");
7da83f1b KK	488	if (irq_alarm < 0)
	489	return irq_alarm;
	490
c2a57550 OST	491	ret = devm_request_threaded_irq(&pdev->dev, irq_alarm, NULL,
	492	da9063_alarm_event,
	493	IRQF_TRIGGER_LOW \| IRQF_ONESHOT,
	494	"ALARM", rtc);
77535ace	495	if (ret)
c2a57550 OST	496	dev_err(&pdev->dev, "Failed to request ALARM IRQ %d: %d\n",
c2a57550 OST	497	irq_alarm, ret);
c2a57550	498
029d3a6f NS	499	device_init_wakeup(&pdev->dev, true);
029d3a6f NS	500
fdcfd854	501	return devm_rtc_register_device(rtc->rtc_dev);
c2a57550 OST	502	}
	503
	504	static struct platform_driver da9063_rtc_driver = {
	505	.probe = da9063_rtc_probe,
	506	.driver = {
	507	.name = DA9063_DRVNAME_RTC,
80ca3277	508	.of_match_table = da9063_compatible_reg_id_table,
c2a57550 OST	509	},
	510	};
	511
	512	module_platform_driver(da9063_rtc_driver);
	513
	514	MODULE_AUTHOR("S Twiss <stwiss.opensource@diasemi.com>");
	515	MODULE_DESCRIPTION("Real time clock device driver for Dialog DA9063");
ce006ca6	516	MODULE_LICENSE("GPL");
c2a57550	517	MODULE_ALIAS("platform:" DA9063_DRVNAME_RTC);