[linux-block.git] / drivers / rtc / rtc-da9063.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Real time clock device driver for DA9063
 * Copyright (C) 2013-2015  Dialog Semiconductor Ltd.
 */

#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm_wakeirq.h>
#include <linux/regmap.h>
#include <linux/rtc.h>
#include <linux/slab.h>

#include <linux/mfd/da9062/registers.h>
#include <linux/mfd/da9063/registers.h>
#include <linux/mfd/da9063/core.h>

#define YEARS_TO_DA9063(year)		((year) - 100)
#define MONTHS_TO_DA9063(month)		((month) + 1)
#define YEARS_FROM_DA9063(year)		((year) + 100)
#define MONTHS_FROM_DA9063(month)	((month) - 1)

enum {
	RTC_SEC	= 0,
	RTC_MIN	= 1,
	RTC_HOUR = 2,
	RTC_DAY	= 3,
	RTC_MONTH = 4,
	RTC_YEAR = 5,
	RTC_DATA_LEN
};

struct da9063_compatible_rtc_regmap {
	/* REGS */
	int rtc_enable_reg;
	int rtc_enable_32k_crystal_reg;
	int rtc_alarm_secs_reg;
	int rtc_alarm_year_reg;
	int rtc_count_secs_reg;
	int rtc_count_year_reg;
	int rtc_event_reg;
	/* MASKS */
	int rtc_enable_mask;
	int rtc_crystal_mask;
	int rtc_event_alarm_mask;
	int rtc_alarm_on_mask;
	int rtc_alarm_status_mask;
	int rtc_tick_on_mask;
	int rtc_ready_to_read_mask;
	int rtc_count_sec_mask;
	int rtc_count_min_mask;
	int rtc_count_hour_mask;
	int rtc_count_day_mask;
	int rtc_count_month_mask;
	int rtc_count_year_mask;
	/* ALARM CONFIG */
	int rtc_data_start;
	int rtc_alarm_len;
};

struct da9063_compatible_rtc {
	struct rtc_device *rtc_dev;
	struct rtc_time alarm_time;
	struct regmap *regmap;
	const struct da9063_compatible_rtc_regmap *config;
	bool rtc_sync;
};

static const struct da9063_compatible_rtc_regmap da9063_ad_regs = {
	/* REGS */
	.rtc_enable_reg             = DA9063_REG_CONTROL_E,
	.rtc_alarm_secs_reg         = DA9063_AD_REG_ALARM_MI,
	.rtc_alarm_year_reg         = DA9063_AD_REG_ALARM_Y,
	.rtc_count_secs_reg         = DA9063_REG_COUNT_S,
	.rtc_count_year_reg         = DA9063_REG_COUNT_Y,
	.rtc_event_reg              = DA9063_REG_EVENT_A,
	/* MASKS */
	.rtc_enable_mask            = DA9063_RTC_EN,
	.rtc_crystal_mask           = DA9063_CRYSTAL,
	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
	.rtc_event_alarm_mask       = DA9063_E_ALARM,
	.rtc_alarm_on_mask          = DA9063_ALARM_ON,
	.rtc_alarm_status_mask      = DA9063_ALARM_STATUS_ALARM |
				      DA9063_ALARM_STATUS_TICK,
	.rtc_tick_on_mask           = DA9063_TICK_ON,
	.rtc_ready_to_read_mask     = DA9063_RTC_READ,
	.rtc_count_sec_mask         = DA9063_COUNT_SEC_MASK,
	.rtc_count_min_mask         = DA9063_COUNT_MIN_MASK,
	.rtc_count_hour_mask        = DA9063_COUNT_HOUR_MASK,
	.rtc_count_day_mask         = DA9063_COUNT_DAY_MASK,
	.rtc_count_month_mask       = DA9063_COUNT_MONTH_MASK,
	.rtc_count_year_mask        = DA9063_COUNT_YEAR_MASK,
	/* ALARM CONFIG */
	.rtc_data_start             = RTC_MIN,
	.rtc_alarm_len              = RTC_DATA_LEN - 1,
};

static const struct da9063_compatible_rtc_regmap da9063_bb_regs = {
	/* REGS */
	.rtc_enable_reg             = DA9063_REG_CONTROL_E,
	.rtc_alarm_secs_reg         = DA9063_BB_REG_ALARM_S,
	.rtc_alarm_year_reg         = DA9063_BB_REG_ALARM_Y,
	.rtc_count_secs_reg         = DA9063_REG_COUNT_S,
	.rtc_count_year_reg         = DA9063_REG_COUNT_Y,
	.rtc_event_reg              = DA9063_REG_EVENT_A,
	/* MASKS */
	.rtc_enable_mask            = DA9063_RTC_EN,
	.rtc_crystal_mask           = DA9063_CRYSTAL,
	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
	.rtc_event_alarm_mask       = DA9063_E_ALARM,
	.rtc_alarm_on_mask          = DA9063_ALARM_ON,
	.rtc_alarm_status_mask      = DA9063_ALARM_STATUS_ALARM |
				      DA9063_ALARM_STATUS_TICK,
	.rtc_tick_on_mask           = DA9063_TICK_ON,
	.rtc_ready_to_read_mask     = DA9063_RTC_READ,
	.rtc_count_sec_mask         = DA9063_COUNT_SEC_MASK,
	.rtc_count_min_mask         = DA9063_COUNT_MIN_MASK,
	.rtc_count_hour_mask        = DA9063_COUNT_HOUR_MASK,
	.rtc_count_day_mask         = DA9063_COUNT_DAY_MASK,
	.rtc_count_month_mask       = DA9063_COUNT_MONTH_MASK,
	.rtc_count_year_mask        = DA9063_COUNT_YEAR_MASK,
	/* ALARM CONFIG */
	.rtc_data_start             = RTC_SEC,
	.rtc_alarm_len              = RTC_DATA_LEN,
};

static const struct da9063_compatible_rtc_regmap da9062_aa_regs = {
	/* REGS */
	.rtc_enable_reg             = DA9062AA_CONTROL_E,
	.rtc_alarm_secs_reg         = DA9062AA_ALARM_S,
	.rtc_alarm_year_reg         = DA9062AA_ALARM_Y,
	.rtc_count_secs_reg         = DA9062AA_COUNT_S,
	.rtc_count_year_reg         = DA9062AA_COUNT_Y,
	.rtc_event_reg              = DA9062AA_EVENT_A,
	/* MASKS */
	.rtc_enable_mask            = DA9062AA_RTC_EN_MASK,
	.rtc_crystal_mask           = DA9062AA_CRYSTAL_MASK,
	.rtc_enable_32k_crystal_reg = DA9062AA_EN_32K,
	.rtc_event_alarm_mask       = DA9062AA_M_ALARM_MASK,
	.rtc_alarm_on_mask          = DA9062AA_ALARM_ON_MASK,
	.rtc_alarm_status_mask      = (0x02 << 6),
	.rtc_tick_on_mask           = DA9062AA_TICK_ON_MASK,
	.rtc_ready_to_read_mask     = DA9062AA_RTC_READ_MASK,
	.rtc_count_sec_mask         = DA9062AA_COUNT_SEC_MASK,
	.rtc_count_min_mask         = DA9062AA_COUNT_MIN_MASK,
	.rtc_count_hour_mask        = DA9062AA_COUNT_HOUR_MASK,
	.rtc_count_day_mask         = DA9062AA_COUNT_DAY_MASK,
	.rtc_count_month_mask       = DA9062AA_COUNT_MONTH_MASK,
	.rtc_count_year_mask        = DA9062AA_COUNT_YEAR_MASK,
	/* ALARM CONFIG */
	.rtc_data_start             = RTC_SEC,
	.rtc_alarm_len              = RTC_DATA_LEN,
};

static const struct of_device_id da9063_compatible_reg_id_table[] = {
	{ .compatible = "dlg,da9063-rtc", .data = &da9063_bb_regs },
	{ .compatible = "dlg,da9062-rtc", .data = &da9062_aa_regs },
	{ },
};
MODULE_DEVICE_TABLE(of, da9063_compatible_reg_id_table);

static void da9063_data_to_tm(u8 *data, struct rtc_time *tm,
			      struct da9063_compatible_rtc *rtc)
{
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	tm->tm_sec  = data[RTC_SEC]  & config->rtc_count_sec_mask;
	tm->tm_min  = data[RTC_MIN]  & config->rtc_count_min_mask;
	tm->tm_hour = data[RTC_HOUR] & config->rtc_count_hour_mask;
	tm->tm_mday = data[RTC_DAY]  & config->rtc_count_day_mask;
	tm->tm_mon  = MONTHS_FROM_DA9063(data[RTC_MONTH] &
					 config->rtc_count_month_mask);
	tm->tm_year = YEARS_FROM_DA9063(data[RTC_YEAR] &
					config->rtc_count_year_mask);
}

static void da9063_tm_to_data(struct rtc_time *tm, u8 *data,
			      struct da9063_compatible_rtc *rtc)
{
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	data[RTC_SEC]   = tm->tm_sec & config->rtc_count_sec_mask;
	data[RTC_MIN]   = tm->tm_min & config->rtc_count_min_mask;
	data[RTC_HOUR]  = tm->tm_hour & config->rtc_count_hour_mask;
	data[RTC_DAY]   = tm->tm_mday & config->rtc_count_day_mask;
	data[RTC_MONTH] = MONTHS_TO_DA9063(tm->tm_mon) &
				config->rtc_count_month_mask;
	data[RTC_YEAR]  = YEARS_TO_DA9063(tm->tm_year) &
				config->rtc_count_year_mask;
}

static int da9063_rtc_stop_alarm(struct device *dev)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	return regmap_update_bits(rtc->regmap,
				  config->rtc_alarm_year_reg,
				  config->rtc_alarm_on_mask,
				  0);
}

static int da9063_rtc_start_alarm(struct device *dev)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	return regmap_update_bits(rtc->regmap,
				  config->rtc_alarm_year_reg,
				  config->rtc_alarm_on_mask,
				  config->rtc_alarm_on_mask);
}

static int da9063_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	unsigned long tm_secs;
	unsigned long al_secs;
	u8 data[RTC_DATA_LEN];
	int ret;

	ret = regmap_bulk_read(rtc->regmap,
			       config->rtc_count_secs_reg,
			       data, RTC_DATA_LEN);
	if (ret < 0) {
		dev_err(dev, "Failed to read RTC time data: %d\n", ret);
		return ret;
	}

	if (!(data[RTC_SEC] & config->rtc_ready_to_read_mask)) {
		dev_dbg(dev, "RTC not yet ready to be read by the host\n");
		return -EINVAL;
	}

	da9063_data_to_tm(data, tm, rtc);

	tm_secs = rtc_tm_to_time64(tm);
	al_secs = rtc_tm_to_time64(&rtc->alarm_time);

	/* handle the rtc synchronisation delay */
	if (rtc->rtc_sync && al_secs - tm_secs == 1)
		memcpy(tm, &rtc->alarm_time, sizeof(struct rtc_time));
	else
		rtc->rtc_sync = false;

	return 0;
}

static int da9063_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	u8 data[RTC_DATA_LEN];
	int ret;

	da9063_tm_to_data(tm, data, rtc);
	ret = regmap_bulk_write(rtc->regmap,
				config->rtc_count_secs_reg,
				data, RTC_DATA_LEN);
	if (ret < 0)
		dev_err(dev, "Failed to set RTC time data: %d\n", ret);

	return ret;
}

static int da9063_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	u8 data[RTC_DATA_LEN];
	int ret;
	unsigned int val;

	data[RTC_SEC] = 0;
	ret = regmap_bulk_read(rtc->regmap,
			       config->rtc_alarm_secs_reg,
			       &data[config->rtc_data_start],
			       config->rtc_alarm_len);
	if (ret < 0)
		return ret;

	da9063_data_to_tm(data, &alrm->time, rtc);

	alrm->enabled = !!(data[RTC_YEAR] & config->rtc_alarm_on_mask);

	ret = regmap_read(rtc->regmap,
			  config->rtc_event_reg,
			  &val);
	if (ret < 0)
		return ret;

	if (val & config->rtc_event_alarm_mask)
		alrm->pending = 1;
	else
		alrm->pending = 0;

	return 0;
}

static int da9063_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	u8 data[RTC_DATA_LEN];
	int ret;

	da9063_tm_to_data(&alrm->time, data, rtc);

	ret = da9063_rtc_stop_alarm(dev);
	if (ret < 0) {
		dev_err(dev, "Failed to stop alarm: %d\n", ret);
		return ret;
	}

	ret = regmap_bulk_write(rtc->regmap,
				config->rtc_alarm_secs_reg,
				&data[config->rtc_data_start],
				config->rtc_alarm_len);
	if (ret < 0) {
		dev_err(dev, "Failed to write alarm: %d\n", ret);
		return ret;
	}

	da9063_data_to_tm(data, &rtc->alarm_time, rtc);

	if (alrm->enabled) {
		ret = da9063_rtc_start_alarm(dev);
		if (ret < 0) {
			dev_err(dev, "Failed to start alarm: %d\n", ret);
			return ret;
		}
	}

	return ret;
}

static int da9063_rtc_alarm_irq_enable(struct device *dev,
				       unsigned int enabled)
{
	if (enabled)
		return da9063_rtc_start_alarm(dev);
	else
		return da9063_rtc_stop_alarm(dev);
}

static irqreturn_t da9063_alarm_event(int irq, void *data)
{
	struct da9063_compatible_rtc *rtc = data;
	const struct da9063_compatible_rtc_regmap *config = rtc->config;

	regmap_update_bits(rtc->regmap,
			   config->rtc_alarm_year_reg,
			   config->rtc_alarm_on_mask,
			   0);

	rtc->rtc_sync = true;
	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);

	return IRQ_HANDLED;
}

static const struct rtc_class_ops da9063_rtc_ops = {
	.read_time = da9063_rtc_read_time,
	.set_time = da9063_rtc_set_time,
	.read_alarm = da9063_rtc_read_alarm,
	.set_alarm = da9063_rtc_set_alarm,
	.alarm_irq_enable = da9063_rtc_alarm_irq_enable,
};

static int da9063_rtc_probe(struct platform_device *pdev)
{
	struct da9063_compatible_rtc *rtc;
	const struct da9063_compatible_rtc_regmap *config;
	int irq_alarm;
	u8 data[RTC_DATA_LEN];
	int ret;

	if (!pdev->dev.of_node)
		return -ENXIO;

	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
	if (!rtc)
		return -ENOMEM;

	rtc->config = device_get_match_data(&pdev->dev);
	if (of_device_is_compatible(pdev->dev.of_node, "dlg,da9063-rtc")) {
		struct da9063 *chip = dev_get_drvdata(pdev->dev.parent);

		if (chip->variant_code == PMIC_DA9063_AD)
			rtc->config = &da9063_ad_regs;
	}

	rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL);
	if (!rtc->regmap) {
		dev_warn(&pdev->dev, "Parent regmap unavailable.\n");
		return -ENXIO;
	}

	config = rtc->config;
	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_enable_reg,
				 config->rtc_enable_mask,
				 config->rtc_enable_mask);
	if (ret < 0)
		return dev_err_probe(&pdev->dev, ret, "Failed to enable RTC\n");

	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_enable_32k_crystal_reg,
				 config->rtc_crystal_mask,
				 config->rtc_crystal_mask);
	if (ret < 0)
		return dev_err_probe(&pdev->dev, ret,
				     "Failed to run 32kHz oscillator\n");

	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_alarm_secs_reg,
				 config->rtc_alarm_status_mask,
				 0);
	if (ret < 0)
		return dev_err_probe(&pdev->dev, ret,
				     "Failed to access RTC alarm register\n");

	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_alarm_secs_reg,
				 DA9063_ALARM_STATUS_ALARM,
				 DA9063_ALARM_STATUS_ALARM);
	if (ret < 0)
		return dev_err_probe(&pdev->dev, ret,
				     "Failed to access RTC alarm register\n");

	ret = regmap_update_bits(rtc->regmap,
				 config->rtc_alarm_year_reg,
				 config->rtc_tick_on_mask,
				 0);
	if (ret < 0)
		return dev_err_probe(&pdev->dev, ret,
				     "Failed to disable TICKs\n");

	data[RTC_SEC] = 0;
	ret = regmap_bulk_read(rtc->regmap,
			       config->rtc_alarm_secs_reg,
			       &data[config->rtc_data_start],
			       config->rtc_alarm_len);
	if (ret < 0)
		return dev_err_probe(&pdev->dev, ret,
				     "Failed to read initial alarm data\n");

	platform_set_drvdata(pdev, rtc);

	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
	if (IS_ERR(rtc->rtc_dev))
		return PTR_ERR(rtc->rtc_dev);

	rtc->rtc_dev->ops = &da9063_rtc_ops;
	rtc->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_2000;
	rtc->rtc_dev->range_max = RTC_TIMESTAMP_END_2063;

	da9063_data_to_tm(data, &rtc->alarm_time, rtc);
	rtc->rtc_sync = false;

	if (config->rtc_data_start != RTC_SEC) {
		set_bit(RTC_FEATURE_ALARM_RES_MINUTE, rtc->rtc_dev->features);
		/*
		 * TODO: some models have alarms on a minute boundary but still
		 * support real hardware interrupts.
		 */
		clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->rtc_dev->features);
	}

	irq_alarm = platform_get_irq_byname_optional(pdev, "ALARM");
	if (irq_alarm >= 0) {
		ret = devm_request_threaded_irq(&pdev->dev, irq_alarm, NULL,
						da9063_alarm_event,
						IRQF_TRIGGER_LOW | IRQF_ONESHOT,
						"ALARM", rtc);
		if (ret)
			dev_err(&pdev->dev,
				"Failed to request ALARM IRQ %d: %d\n",
				irq_alarm, ret);

		ret = dev_pm_set_wake_irq(&pdev->dev, irq_alarm);
		if (ret)
			dev_warn(&pdev->dev,
				 "Failed to set IRQ %d as a wake IRQ: %d\n",
				 irq_alarm, ret);

		device_init_wakeup(&pdev->dev, true);
	}  else if (irq_alarm != -ENXIO) {
		return irq_alarm;
	} else {
		clear_bit(RTC_FEATURE_ALARM, rtc->rtc_dev->features);
	}

	return devm_rtc_register_device(rtc->rtc_dev);
}

static struct platform_driver da9063_rtc_driver = {
	.probe		= da9063_rtc_probe,
	.driver		= {
		.name	= DA9063_DRVNAME_RTC,
		.of_match_table = da9063_compatible_reg_id_table,
	},
};

module_platform_driver(da9063_rtc_driver);

MODULE_AUTHOR("S Twiss <stwiss.opensource@diasemi.com>");
MODULE_DESCRIPTION("Real time clock device driver for Dialog DA9063");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DA9063_DRVNAME_RTC);
Commit	Line	Data
737842e5 WS	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* Real time clock device driver for DA9063
ce006ca6	4	* Copyright (C) 2013-2015 Dialog Semiconductor Ltd.
c2a57550 OST	5	*/
c2a57550 OST	6
80ca3277 T	7	#include <linux/delay.h>
	8	#include <linux/init.h>
	9	#include <linux/interrupt.h>
c2a57550 OST	10	#include <linux/kernel.h>
c2a57550 OST	11	#include <linux/module.h>
80ca3277	12	#include <linux/of.h>
c2a57550	13	#include <linux/platform_device.h>
ed17a2bc	14	#include <linux/pm_wakeirq.h>
80ca3277	15	#include <linux/regmap.h>
c2a57550 OST	16	#include <linux/rtc.h>
c2a57550 OST	17	#include <linux/slab.h>
80ca3277 T	18
80ca3277 T	19	#include <linux/mfd/da9062/registers.h>
c2a57550 OST	20	#include <linux/mfd/da9063/registers.h>
	21	#include <linux/mfd/da9063/core.h>
	22
	23	#define YEARS_TO_DA9063(year) ((year) - 100)
	24	#define MONTHS_TO_DA9063(month) ((month) + 1)
	25	#define YEARS_FROM_DA9063(year) ((year) + 100)
	26	#define MONTHS_FROM_DA9063(month) ((month) - 1)
	27
80ca3277 T	28	enum {
	29	RTC_SEC = 0,
	30	RTC_MIN = 1,
	31	RTC_HOUR = 2,
	32	RTC_DAY = 3,
	33	RTC_MONTH = 4,
	34	RTC_YEAR = 5,
	35	RTC_DATA_LEN
	36	};
	37
	38	struct da9063_compatible_rtc_regmap {
	39	/* REGS */
	40	int rtc_enable_reg;
	41	int rtc_enable_32k_crystal_reg;
	42	int rtc_alarm_secs_reg;
	43	int rtc_alarm_year_reg;
	44	int rtc_count_secs_reg;
	45	int rtc_count_year_reg;
	46	int rtc_event_reg;
	47	/* MASKS */
	48	int rtc_enable_mask;
	49	int rtc_crystal_mask;
	50	int rtc_event_alarm_mask;
	51	int rtc_alarm_on_mask;
	52	int rtc_alarm_status_mask;
	53	int rtc_tick_on_mask;
	54	int rtc_ready_to_read_mask;
	55	int rtc_count_sec_mask;
	56	int rtc_count_min_mask;
	57	int rtc_count_hour_mask;
	58	int rtc_count_day_mask;
	59	int rtc_count_month_mask;
	60	int rtc_count_year_mask;
	61	/* ALARM CONFIG */
	62	int rtc_data_start;
	63	int rtc_alarm_len;
	64	};
	65
	66	struct da9063_compatible_rtc {
	67	struct rtc_device *rtc_dev;
	68	struct rtc_time alarm_time;
	69	struct regmap *regmap;
	70	const struct da9063_compatible_rtc_regmap *config;
	71	bool rtc_sync;
	72	};
	73
	74	static const struct da9063_compatible_rtc_regmap da9063_ad_regs = {
	75	/* REGS */
	76	.rtc_enable_reg = DA9063_REG_CONTROL_E,
	77	.rtc_alarm_secs_reg = DA9063_AD_REG_ALARM_MI,
	78	.rtc_alarm_year_reg = DA9063_AD_REG_ALARM_Y,
	79	.rtc_count_secs_reg = DA9063_REG_COUNT_S,
	80	.rtc_count_year_reg = DA9063_REG_COUNT_Y,
	81	.rtc_event_reg = DA9063_REG_EVENT_A,
	82	/* MASKS */
	83	.rtc_enable_mask = DA9063_RTC_EN,
	84	.rtc_crystal_mask = DA9063_CRYSTAL,
	85	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
	86	.rtc_event_alarm_mask = DA9063_E_ALARM,
	87	.rtc_alarm_on_mask = DA9063_ALARM_ON,
	88	.rtc_alarm_status_mask = DA9063_ALARM_STATUS_ALARM \|
	89	DA9063_ALARM_STATUS_TICK,
	90	.rtc_tick_on_mask = DA9063_TICK_ON,
	91	.rtc_ready_to_read_mask = DA9063_RTC_READ,
92	.rtc_count_sec_mask = DA9063_COUNT_SEC_MASK,
93	.rtc_count_min_mask = DA9063_COUNT_MIN_MASK,
94	.rtc_count_hour_mask = DA9063_COUNT_HOUR_MASK,
95	.rtc_count_day_mask = DA9063_COUNT_DAY_MASK,
96	.rtc_count_month_mask = DA9063_COUNT_MONTH_MASK,
97	.rtc_count_year_mask = DA9063_COUNT_YEAR_MASK,
98	/* ALARM CONFIG */
99	.rtc_data_start = RTC_MIN,
100	.rtc_alarm_len = RTC_DATA_LEN - 1,
101	};
102
103	static const struct da9063_compatible_rtc_regmap da9063_bb_regs = {
104	/* REGS */
105	.rtc_enable_reg = DA9063_REG_CONTROL_E,
106	.rtc_alarm_secs_reg = DA9063_BB_REG_ALARM_S,
107	.rtc_alarm_year_reg = DA9063_BB_REG_ALARM_Y,
108	.rtc_count_secs_reg = DA9063_REG_COUNT_S,
109	.rtc_count_year_reg = DA9063_REG_COUNT_Y,
110	.rtc_event_reg = DA9063_REG_EVENT_A,
111	/* MASKS */
112	.rtc_enable_mask = DA9063_RTC_EN,
113	.rtc_crystal_mask = DA9063_CRYSTAL,
114	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
115	.rtc_event_alarm_mask = DA9063_E_ALARM,
116	.rtc_alarm_on_mask = DA9063_ALARM_ON,
117	.rtc_alarm_status_mask = DA9063_ALARM_STATUS_ALARM \|
118	DA9063_ALARM_STATUS_TICK,
119	.rtc_tick_on_mask = DA9063_TICK_ON,
120	.rtc_ready_to_read_mask = DA9063_RTC_READ,
121	.rtc_count_sec_mask = DA9063_COUNT_SEC_MASK,
122	.rtc_count_min_mask = DA9063_COUNT_MIN_MASK,
123	.rtc_count_hour_mask = DA9063_COUNT_HOUR_MASK,
124	.rtc_count_day_mask = DA9063_COUNT_DAY_MASK,
125	.rtc_count_month_mask = DA9063_COUNT_MONTH_MASK,
126	.rtc_count_year_mask = DA9063_COUNT_YEAR_MASK,
127	/* ALARM CONFIG */
128	.rtc_data_start = RTC_SEC,
129	.rtc_alarm_len = RTC_DATA_LEN,
130	};
131
132	static const struct da9063_compatible_rtc_regmap da9062_aa_regs = {
133	/* REGS */
134	.rtc_enable_reg = DA9062AA_CONTROL_E,
135	.rtc_alarm_secs_reg = DA9062AA_ALARM_S,
136	.rtc_alarm_year_reg = DA9062AA_ALARM_Y,
137	.rtc_count_secs_reg = DA9062AA_COUNT_S,
138	.rtc_count_year_reg = DA9062AA_COUNT_Y,
139	.rtc_event_reg = DA9062AA_EVENT_A,
140	/* MASKS */
141	.rtc_enable_mask = DA9062AA_RTC_EN_MASK,
142	.rtc_crystal_mask = DA9062AA_CRYSTAL_MASK,
143	.rtc_enable_32k_crystal_reg = DA9062AA_EN_32K,
144	.rtc_event_alarm_mask = DA9062AA_M_ALARM_MASK,
145	.rtc_alarm_on_mask = DA9062AA_ALARM_ON_MASK,
146	.rtc_alarm_status_mask = (0x02 << 6),
147	.rtc_tick_on_mask = DA9062AA_TICK_ON_MASK,
148	.rtc_ready_to_read_mask = DA9062AA_RTC_READ_MASK,
149	.rtc_count_sec_mask = DA9062AA_COUNT_SEC_MASK,
150	.rtc_count_min_mask = DA9062AA_COUNT_MIN_MASK,
151	.rtc_count_hour_mask = DA9062AA_COUNT_HOUR_MASK,
152	.rtc_count_day_mask = DA9062AA_COUNT_DAY_MASK,
153	.rtc_count_month_mask = DA9062AA_COUNT_MONTH_MASK,
154	.rtc_count_year_mask = DA9062AA_COUNT_YEAR_MASK,
155	/* ALARM CONFIG */
156	.rtc_data_start = RTC_SEC,
157	.rtc_alarm_len = RTC_DATA_LEN,
158	};
159
160	static const struct of_device_id da9063_compatible_reg_id_table[] = {
161	{ .compatible = "dlg,da9063-rtc", .data = &da9063_bb_regs },
162	{ .compatible = "dlg,da9062-rtc", .data = &da9062_aa_regs },
163	{ },
c2a57550	164	};
73798d5c	165	MODULE_DEVICE_TABLE(of, da9063_compatible_reg_id_table);
c2a57550	166
80ca3277 T	167	static void da9063_data_to_tm(u8 data, struct rtc_time tm,
80ca3277 T	168	struct da9063_compatible_rtc *rtc)
c2a57550	169	{
80ca3277 T	170	const struct da9063_compatible_rtc_regmap *config = rtc->config;
	171
	172	tm->tm_sec = data[RTC_SEC] & config->rtc_count_sec_mask;
	173	tm->tm_min = data[RTC_MIN] & config->rtc_count_min_mask;
	174	tm->tm_hour = data[RTC_HOUR] & config->rtc_count_hour_mask;
	175	tm->tm_mday = data[RTC_DAY] & config->rtc_count_day_mask;
c2a57550	176	tm->tm_mon = MONTHS_FROM_DA9063(data[RTC_MONTH] &
80ca3277	177	config->rtc_count_month_mask);
c2a57550	178	tm->tm_year = YEARS_FROM_DA9063(data[RTC_YEAR] &
80ca3277	179	config->rtc_count_year_mask);
c2a57550 OST	180	}
c2a57550 OST	181
80ca3277 T	182	static void da9063_tm_to_data(struct rtc_time tm, u8 data,
80ca3277 T	183	struct da9063_compatible_rtc *rtc)
c2a57550	184	{
80ca3277 T	185	const struct da9063_compatible_rtc_regmap *config = rtc->config;
80ca3277 T	186
2ad2c174 ES	187	data[RTC_SEC] = tm->tm_sec & config->rtc_count_sec_mask;
	188	data[RTC_MIN] = tm->tm_min & config->rtc_count_min_mask;
	189	data[RTC_HOUR] = tm->tm_hour & config->rtc_count_hour_mask;
	190	data[RTC_DAY] = tm->tm_mday & config->rtc_count_day_mask;
	191	data[RTC_MONTH] = MONTHS_TO_DA9063(tm->tm_mon) &
80ca3277	192	config->rtc_count_month_mask;
2ad2c174	193	data[RTC_YEAR] = YEARS_TO_DA9063(tm->tm_year) &
80ca3277	194	config->rtc_count_year_mask;
c2a57550 OST	195	}
	196
	197	static int da9063_rtc_stop_alarm(struct device *dev)
	198	{
80ca3277 T	199	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	200	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550	201
80ca3277 T	202	return regmap_update_bits(rtc->regmap,
	203	config->rtc_alarm_year_reg,
	204	config->rtc_alarm_on_mask,
	205	0);
c2a57550 OST	206	}
	207
	208	static int da9063_rtc_start_alarm(struct device *dev)
	209	{
80ca3277 T	210	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	211	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550	212
80ca3277 T	213	return regmap_update_bits(rtc->regmap,
	214	config->rtc_alarm_year_reg,
	215	config->rtc_alarm_on_mask,
	216	config->rtc_alarm_on_mask);
c2a57550 OST	217	}
	218
	219	static int da9063_rtc_read_time(struct device dev, struct rtc_time tm)
	220	{
80ca3277 T	221	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	222	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550 OST	223	unsigned long tm_secs;
	224	unsigned long al_secs;
	225	u8 data[RTC_DATA_LEN];
	226	int ret;
	227
80ca3277 T	228	ret = regmap_bulk_read(rtc->regmap,
80ca3277 T	229	config->rtc_count_secs_reg,
c2a57550 OST	230	data, RTC_DATA_LEN);
	231	if (ret < 0) {
	232	dev_err(dev, "Failed to read RTC time data: %d\n", ret);
	233	return ret;
	234	}
	235
80ca3277	236	if (!(data[RTC_SEC] & config->rtc_ready_to_read_mask)) {
c2a57550 OST	237	dev_dbg(dev, "RTC not yet ready to be read by the host\n");
	238	return -EINVAL;
	239	}
	240
80ca3277	241	da9063_data_to_tm(data, tm, rtc);
c2a57550	242
b599db3a AB	243	tm_secs = rtc_tm_to_time64(tm);
b599db3a AB	244	al_secs = rtc_tm_to_time64(&rtc->alarm_time);
c2a57550 OST	245
c2a57550 OST	246	/* handle the rtc synchronisation delay */
a48c6224	247	if (rtc->rtc_sync && al_secs - tm_secs == 1)
c2a57550 OST	248	memcpy(tm, &rtc->alarm_time, sizeof(struct rtc_time));
	249	else
	250	rtc->rtc_sync = false;
	251
bb54be13	252	return 0;
c2a57550 OST	253	}
	254
	255	static int da9063_rtc_set_time(struct device dev, struct rtc_time tm)
	256	{
80ca3277 T	257	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	258	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550 OST	259	u8 data[RTC_DATA_LEN];
	260	int ret;
	261
80ca3277 T	262	da9063_tm_to_data(tm, data, rtc);
	263	ret = regmap_bulk_write(rtc->regmap,
	264	config->rtc_count_secs_reg,
c2a57550 OST	265	data, RTC_DATA_LEN);
	266	if (ret < 0)
	267	dev_err(dev, "Failed to set RTC time data: %d\n", ret);
	268
	269	return ret;
	270	}
	271
	272	static int da9063_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)
	273	{
80ca3277 T	274	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	275	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550 OST	276	u8 data[RTC_DATA_LEN];
	277	int ret;
	278	unsigned int val;
	279
9cb42e2a	280	data[RTC_SEC] = 0;
80ca3277 T	281	ret = regmap_bulk_read(rtc->regmap,
	282	config->rtc_alarm_secs_reg,
	283	&data[config->rtc_data_start],
	284	config->rtc_alarm_len);
c2a57550 OST	285	if (ret < 0)
	286	return ret;
	287
80ca3277	288	da9063_data_to_tm(data, &alrm->time, rtc);
c2a57550	289
80ca3277	290	alrm->enabled = !!(data[RTC_YEAR] & config->rtc_alarm_on_mask);
c2a57550	291
80ca3277 T	292	ret = regmap_read(rtc->regmap,
	293	config->rtc_event_reg,
	294	&val);
c2a57550 OST	295	if (ret < 0)
	296	return ret;
	297
80ca3277	298	if (val & config->rtc_event_alarm_mask)
c2a57550 OST	299	alrm->pending = 1;
	300	else
	301	alrm->pending = 0;
	302
	303	return 0;
	304	}
	305
	306	static int da9063_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm)
	307	{
80ca3277 T	308	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
80ca3277 T	309	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550 OST	310	u8 data[RTC_DATA_LEN];
	311	int ret;
	312
80ca3277	313	da9063_tm_to_data(&alrm->time, data, rtc);
c2a57550 OST	314
	315	ret = da9063_rtc_stop_alarm(dev);
	316	if (ret < 0) {
	317	dev_err(dev, "Failed to stop alarm: %d\n", ret);
	318	return ret;
	319	}
	320
80ca3277 T	321	ret = regmap_bulk_write(rtc->regmap,
	322	config->rtc_alarm_secs_reg,
	323	&data[config->rtc_data_start],
	324	config->rtc_alarm_len);
c2a57550 OST	325	if (ret < 0) {
	326	dev_err(dev, "Failed to write alarm: %d\n", ret);
	327	return ret;
	328	}
	329
80ca3277	330	da9063_data_to_tm(data, &rtc->alarm_time, rtc);
c2a57550 OST	331
	332	if (alrm->enabled) {
	333	ret = da9063_rtc_start_alarm(dev);
	334	if (ret < 0) {
	335	dev_err(dev, "Failed to start alarm: %d\n", ret);
	336	return ret;
	337	}
	338	}
	339
	340	return ret;
	341	}
	342
80ca3277 T	343	static int da9063_rtc_alarm_irq_enable(struct device *dev,
80ca3277 T	344	unsigned int enabled)
c2a57550 OST	345	{
	346	if (enabled)
	347	return da9063_rtc_start_alarm(dev);
	348	else
	349	return da9063_rtc_stop_alarm(dev);
	350	}
	351
	352	static irqreturn_t da9063_alarm_event(int irq, void *data)
	353	{
80ca3277 T	354	struct da9063_compatible_rtc *rtc = data;
80ca3277 T	355	const struct da9063_compatible_rtc_regmap *config = rtc->config;
c2a57550	356
80ca3277 T	357	regmap_update_bits(rtc->regmap,
	358	config->rtc_alarm_year_reg,
	359	config->rtc_alarm_on_mask,
	360	0);
c2a57550 OST	361
	362	rtc->rtc_sync = true;
	363	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF \| RTC_AF);
	364
	365	return IRQ_HANDLED;
	366	}
	367
	368	static const struct rtc_class_ops da9063_rtc_ops = {
	369	.read_time = da9063_rtc_read_time,
	370	.set_time = da9063_rtc_set_time,
	371	.read_alarm = da9063_rtc_read_alarm,
	372	.set_alarm = da9063_rtc_set_alarm,
	373	.alarm_irq_enable = da9063_rtc_alarm_irq_enable,
	374	};
	375
	376	static int da9063_rtc_probe(struct platform_device *pdev)
	377	{
80ca3277 T	378	struct da9063_compatible_rtc *rtc;
80ca3277 T	379	const struct da9063_compatible_rtc_regmap *config;
c2a57550 OST	380	int irq_alarm;
	381	u8 data[RTC_DATA_LEN];
	382	int ret;
	383
80ca3277 T	384	if (!pdev->dev.of_node)
80ca3277 T	385	return -ENXIO;
c2a57550	386
9cb42e2a OST	387	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
	388	if (!rtc)
	389	return -ENOMEM;
	390
4b60c32e	391	rtc->config = device_get_match_data(&pdev->dev);
80ca3277 T	392	if (of_device_is_compatible(pdev->dev.of_node, "dlg,da9063-rtc")) {
	393	struct da9063 *chip = dev_get_drvdata(pdev->dev.parent);
	394
	395	if (chip->variant_code == PMIC_DA9063_AD)
	396	rtc->config = &da9063_ad_regs;
9cb42e2a OST	397	}
9cb42e2a OST	398
80ca3277 T	399	rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL);
	400	if (!rtc->regmap) {
	401	dev_warn(&pdev->dev, "Parent regmap unavailable.\n");
	402	return -ENXIO;
	403	}
	404
	405	config = rtc->config;
	406	ret = regmap_update_bits(rtc->regmap,
	407	config->rtc_enable_reg,
	408	config->rtc_enable_mask,
	409	config->rtc_enable_mask);
f5334aa8 BD	410	if (ret < 0)
f5334aa8 BD	411	return dev_err_probe(&pdev->dev, ret, "Failed to enable RTC\n");
80ca3277 T	412
	413	ret = regmap_update_bits(rtc->regmap,
	414	config->rtc_enable_32k_crystal_reg,
	415	config->rtc_crystal_mask,
	416	config->rtc_crystal_mask);
f5334aa8 BD	417	if (ret < 0)
	418	return dev_err_probe(&pdev->dev, ret,
	419	"Failed to run 32kHz oscillator\n");
80ca3277 T	420
	421	ret = regmap_update_bits(rtc->regmap,
	422	config->rtc_alarm_secs_reg,
	423	config->rtc_alarm_status_mask,
	424	0);
f5334aa8 BD	425	if (ret < 0)
	426	return dev_err_probe(&pdev->dev, ret,
	427	"Failed to access RTC alarm register\n");
c2a57550	428
80ca3277 T	429	ret = regmap_update_bits(rtc->regmap,
80ca3277 T	430	config->rtc_alarm_secs_reg,
c2a57550 OST	431	DA9063_ALARM_STATUS_ALARM,
c2a57550 OST	432	DA9063_ALARM_STATUS_ALARM);
f5334aa8 BD	433	if (ret < 0)
	434	return dev_err_probe(&pdev->dev, ret,
	435	"Failed to access RTC alarm register\n");
c2a57550	436
80ca3277 T	437	ret = regmap_update_bits(rtc->regmap,
	438	config->rtc_alarm_year_reg,
	439	config->rtc_tick_on_mask,
	440	0);
f5334aa8 BD	441	if (ret < 0)
	442	return dev_err_probe(&pdev->dev, ret,
	443	"Failed to disable TICKs\n");
c2a57550	444
9cb42e2a	445	data[RTC_SEC] = 0;
80ca3277 T	446	ret = regmap_bulk_read(rtc->regmap,
	447	config->rtc_alarm_secs_reg,
	448	&data[config->rtc_data_start],
	449	config->rtc_alarm_len);
f5334aa8 BD	450	if (ret < 0)
	451	return dev_err_probe(&pdev->dev, ret,
	452	"Failed to read initial alarm data\n");
c2a57550	453
c2a57550 OST	454	platform_set_drvdata(pdev, rtc);
c2a57550 OST	455
5ff404d1	456	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
77535ace ST	457	if (IS_ERR(rtc->rtc_dev))
	458	return PTR_ERR(rtc->rtc_dev);
	459
5ff404d1 AB	460	rtc->rtc_dev->ops = &da9063_rtc_ops;
	461	rtc->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_2000;
	462	rtc->rtc_dev->range_max = RTC_TIMESTAMP_END_2063;
	463
77535ace ST	464	da9063_data_to_tm(data, &rtc->alarm_time, rtc);
	465	rtc->rtc_sync = false;
	466
a478c433 AB	467	if (config->rtc_data_start != RTC_SEC) {
	468	set_bit(RTC_FEATURE_ALARM_RES_MINUTE, rtc->rtc_dev->features);
	469	/*
	470	* TODO: some models have alarms on a minute boundary but still
	471	* support real hardware interrupts.
	472	*/
	473	clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, rtc->rtc_dev->features);
	474	}
882c5e55	475
8681de64 BD	476	irq_alarm = platform_get_irq_byname_optional(pdev, "ALARM");
	477	if (irq_alarm >= 0) {
	478	ret = devm_request_threaded_irq(&pdev->dev, irq_alarm, NULL,
	479	da9063_alarm_event,
	480	IRQF_TRIGGER_LOW \| IRQF_ONESHOT,
	481	"ALARM", rtc);
	482	if (ret)
	483	dev_err(&pdev->dev,
	484	"Failed to request ALARM IRQ %d: %d\n",
	485	irq_alarm, ret);
	486
	487	ret = dev_pm_set_wake_irq(&pdev->dev, irq_alarm);
	488	if (ret)
	489	dev_warn(&pdev->dev,
	490	"Failed to set IRQ %d as a wake IRQ: %d\n",
	491	irq_alarm, ret);
	492
	493	device_init_wakeup(&pdev->dev, true);
	494	} else if (irq_alarm != -ENXIO) {
7da83f1b	495	return irq_alarm;
8681de64 BD	496	} else {
	497	clear_bit(RTC_FEATURE_ALARM, rtc->rtc_dev->features);
	498	}
029d3a6f	499
fdcfd854	500	return devm_rtc_register_device(rtc->rtc_dev);
c2a57550 OST	501	}
	502
	503	static struct platform_driver da9063_rtc_driver = {
	504	.probe = da9063_rtc_probe,
	505	.driver = {
	506	.name = DA9063_DRVNAME_RTC,
80ca3277	507	.of_match_table = da9063_compatible_reg_id_table,
c2a57550 OST	508	},
	509	};
	510
	511	module_platform_driver(da9063_rtc_driver);
	512
	513	MODULE_AUTHOR("S Twiss <stwiss.opensource@diasemi.com>");
	514	MODULE_DESCRIPTION("Real time clock device driver for Dialog DA9063");
ce006ca6	515	MODULE_LICENSE("GPL");
c2a57550	516	MODULE_ALIAS("platform:" DA9063_DRVNAME_RTC);