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7d624621 | 1 | // SPDX-License-Identifier: GPL-2.0 |
aa958f57 LW |
2 | /* |
3 | * Copyright (C) 2007-2009 ST-Ericsson AB | |
aa958f57 LW |
4 | * Real Time Clock interface for ST-Ericsson AB COH 901 331 RTC. |
5 | * Author: Linus Walleij <linus.walleij@stericsson.com> | |
6 | * Based on rtc-pl031.c by Deepak Saxena <dsaxena@plexity.net> | |
7 | * Copyright 2006 (c) MontaVista Software, Inc. | |
8 | */ | |
9 | #include <linux/init.h> | |
10 | #include <linux/module.h> | |
ac316725 | 11 | #include <linux/mod_devicetable.h> |
aa958f57 LW |
12 | #include <linux/rtc.h> |
13 | #include <linux/clk.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/pm.h> | |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/io.h> | |
5a0e3ad6 | 18 | #include <linux/slab.h> |
aa958f57 LW |
19 | |
20 | /* | |
21 | * Registers in the COH 901 331 | |
22 | */ | |
23 | /* Alarm value 32bit (R/W) */ | |
24 | #define COH901331_ALARM 0x00U | |
25 | /* Used to set current time 32bit (R/W) */ | |
26 | #define COH901331_SET_TIME 0x04U | |
27 | /* Indication if current time is valid 32bit (R/-) */ | |
28 | #define COH901331_VALID 0x08U | |
29 | /* Read the current time 32bit (R/-) */ | |
30 | #define COH901331_CUR_TIME 0x0cU | |
31 | /* Event register for the "alarm" interrupt */ | |
32 | #define COH901331_IRQ_EVENT 0x10U | |
33 | /* Mask register for the "alarm" interrupt */ | |
34 | #define COH901331_IRQ_MASK 0x14U | |
35 | /* Force register for the "alarm" interrupt */ | |
36 | #define COH901331_IRQ_FORCE 0x18U | |
37 | ||
38 | /* | |
39 | * Reference to RTC block clock | |
40 | * Notice that the frequent clk_enable()/clk_disable() on this | |
41 | * clock is mainly to be able to turn on/off other clocks in the | |
42 | * hierarchy as needed, the RTC clock is always on anyway. | |
43 | */ | |
44 | struct coh901331_port { | |
45 | struct rtc_device *rtc; | |
46 | struct clk *clk; | |
aa958f57 LW |
47 | void __iomem *virtbase; |
48 | int irq; | |
62068e2c | 49 | #ifdef CONFIG_PM_SLEEP |
aa958f57 LW |
50 | u32 irqmaskstore; |
51 | #endif | |
52 | }; | |
53 | ||
54 | static irqreturn_t coh901331_interrupt(int irq, void *data) | |
55 | { | |
56 | struct coh901331_port *rtap = data; | |
57 | ||
58 | clk_enable(rtap->clk); | |
59 | /* Ack IRQ */ | |
60 | writel(1, rtap->virtbase + COH901331_IRQ_EVENT); | |
378ce74b LW |
61 | /* |
62 | * Disable the interrupt. This is necessary because | |
63 | * the RTC lives on a lower-clocked line and will | |
64 | * not release the IRQ line until after a few (slower) | |
65 | * clock cycles. The interrupt will be re-enabled when | |
66 | * a new alarm is set anyway. | |
67 | */ | |
68 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); | |
aa958f57 | 69 | clk_disable(rtap->clk); |
378ce74b | 70 | |
aa958f57 LW |
71 | /* Set alarm flag */ |
72 | rtc_update_irq(rtap->rtc, 1, RTC_AF); | |
73 | ||
74 | return IRQ_HANDLED; | |
75 | } | |
76 | ||
77 | static int coh901331_read_time(struct device *dev, struct rtc_time *tm) | |
78 | { | |
79 | struct coh901331_port *rtap = dev_get_drvdata(dev); | |
80 | ||
81 | clk_enable(rtap->clk); | |
82 | /* Check if the time is valid */ | |
9cf2f9b5 | 83 | if (!readl(rtap->virtbase + COH901331_VALID)) { |
aa958f57 | 84 | clk_disable(rtap->clk); |
9cf2f9b5 | 85 | return -EINVAL; |
aa958f57 | 86 | } |
9cf2f9b5 AB |
87 | |
88 | rtc_time64_to_tm(readl(rtap->virtbase + COH901331_CUR_TIME), tm); | |
aa958f57 | 89 | clk_disable(rtap->clk); |
9cf2f9b5 | 90 | return 0; |
aa958f57 LW |
91 | } |
92 | ||
febad794 | 93 | static int coh901331_set_time(struct device *dev, struct rtc_time *tm) |
aa958f57 LW |
94 | { |
95 | struct coh901331_port *rtap = dev_get_drvdata(dev); | |
96 | ||
97 | clk_enable(rtap->clk); | |
febad794 | 98 | writel(rtc_tm_to_time64(tm), rtap->virtbase + COH901331_SET_TIME); |
aa958f57 LW |
99 | clk_disable(rtap->clk); |
100 | ||
101 | return 0; | |
102 | } | |
103 | ||
104 | static int coh901331_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
105 | { | |
106 | struct coh901331_port *rtap = dev_get_drvdata(dev); | |
107 | ||
108 | clk_enable(rtap->clk); | |
9cf2f9b5 | 109 | rtc_time64_to_tm(readl(rtap->virtbase + COH901331_ALARM), &alarm->time); |
aa958f57 LW |
110 | alarm->pending = readl(rtap->virtbase + COH901331_IRQ_EVENT) & 1U; |
111 | alarm->enabled = readl(rtap->virtbase + COH901331_IRQ_MASK) & 1U; | |
112 | clk_disable(rtap->clk); | |
113 | ||
114 | return 0; | |
115 | } | |
116 | ||
117 | static int coh901331_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
118 | { | |
119 | struct coh901331_port *rtap = dev_get_drvdata(dev); | |
9cf2f9b5 | 120 | unsigned long time = rtc_tm_to_time64(&alarm->time); |
aa958f57 | 121 | |
aa958f57 LW |
122 | clk_enable(rtap->clk); |
123 | writel(time, rtap->virtbase + COH901331_ALARM); | |
124 | writel(alarm->enabled, rtap->virtbase + COH901331_IRQ_MASK); | |
125 | clk_disable(rtap->clk); | |
126 | ||
127 | return 0; | |
128 | } | |
129 | ||
130 | static int coh901331_alarm_irq_enable(struct device *dev, unsigned int enabled) | |
131 | { | |
132 | struct coh901331_port *rtap = dev_get_drvdata(dev); | |
133 | ||
134 | clk_enable(rtap->clk); | |
135 | if (enabled) | |
136 | writel(1, rtap->virtbase + COH901331_IRQ_MASK); | |
137 | else | |
138 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); | |
139 | clk_disable(rtap->clk); | |
378ce74b LW |
140 | |
141 | return 0; | |
aa958f57 LW |
142 | } |
143 | ||
34c7b3ac | 144 | static const struct rtc_class_ops coh901331_ops = { |
aa958f57 | 145 | .read_time = coh901331_read_time, |
febad794 | 146 | .set_time = coh901331_set_time, |
aa958f57 LW |
147 | .read_alarm = coh901331_read_alarm, |
148 | .set_alarm = coh901331_set_alarm, | |
149 | .alarm_irq_enable = coh901331_alarm_irq_enable, | |
150 | }; | |
151 | ||
152 | static int __exit coh901331_remove(struct platform_device *pdev) | |
153 | { | |
3a02893f | 154 | struct coh901331_port *rtap = platform_get_drvdata(pdev); |
aa958f57 | 155 | |
7fcbf5fd | 156 | if (rtap) |
8384dfeb | 157 | clk_unprepare(rtap->clk); |
aa958f57 LW |
158 | |
159 | return 0; | |
160 | } | |
161 | ||
162 | ||
163 | static int __init coh901331_probe(struct platform_device *pdev) | |
164 | { | |
165 | int ret; | |
166 | struct coh901331_port *rtap; | |
aa958f57 | 167 | |
36ac1d24 LW |
168 | rtap = devm_kzalloc(&pdev->dev, |
169 | sizeof(struct coh901331_port), GFP_KERNEL); | |
aa958f57 LW |
170 | if (!rtap) |
171 | return -ENOMEM; | |
172 | ||
09ef18bc | 173 | rtap->virtbase = devm_platform_ioremap_resource(pdev, 0); |
daaf90f0 JH |
174 | if (IS_ERR(rtap->virtbase)) |
175 | return PTR_ERR(rtap->virtbase); | |
aa958f57 LW |
176 | |
177 | rtap->irq = platform_get_irq(pdev, 0); | |
36ac1d24 LW |
178 | if (devm_request_irq(&pdev->dev, rtap->irq, coh901331_interrupt, 0, |
179 | "RTC COH 901 331 Alarm", rtap)) | |
180 | return -EIO; | |
aa958f57 | 181 | |
3b759d7f | 182 | rtap->clk = devm_clk_get(&pdev->dev, NULL); |
aa958f57 LW |
183 | if (IS_ERR(rtap->clk)) { |
184 | ret = PTR_ERR(rtap->clk); | |
185 | dev_err(&pdev->dev, "could not get clock\n"); | |
36ac1d24 | 186 | return ret; |
aa958f57 LW |
187 | } |
188 | ||
06cfd668 AB |
189 | rtap->rtc = devm_rtc_allocate_device(&pdev->dev); |
190 | if (IS_ERR(rtap->rtc)) | |
191 | return PTR_ERR(rtap->rtc); | |
192 | ||
193 | rtap->rtc->ops = &coh901331_ops; | |
194 | rtap->rtc->range_max = U32_MAX; | |
195 | ||
aa958f57 | 196 | /* We enable/disable the clock only to assure it works */ |
8384dfeb | 197 | ret = clk_prepare_enable(rtap->clk); |
aa958f57 LW |
198 | if (ret) { |
199 | dev_err(&pdev->dev, "could not enable clock\n"); | |
3b759d7f | 200 | return ret; |
aa958f57 LW |
201 | } |
202 | clk_disable(rtap->clk); | |
203 | ||
9cf3b5fa | 204 | platform_set_drvdata(pdev, rtap); |
06cfd668 AB |
205 | |
206 | ret = rtc_register_device(rtap->rtc); | |
207 | if (ret) | |
aa958f57 | 208 | goto out_no_rtc; |
aa958f57 | 209 | |
aa958f57 LW |
210 | return 0; |
211 | ||
212 | out_no_rtc: | |
8384dfeb | 213 | clk_unprepare(rtap->clk); |
aa958f57 LW |
214 | return ret; |
215 | } | |
216 | ||
62068e2c JH |
217 | #ifdef CONFIG_PM_SLEEP |
218 | static int coh901331_suspend(struct device *dev) | |
aa958f57 | 219 | { |
62068e2c | 220 | struct coh901331_port *rtap = dev_get_drvdata(dev); |
aa958f57 LW |
221 | |
222 | /* | |
223 | * If this RTC alarm will be used for waking the system up, | |
224 | * don't disable it of course. Else we just disable the alarm | |
225 | * and await suspension. | |
226 | */ | |
62068e2c | 227 | if (device_may_wakeup(dev)) { |
aa958f57 LW |
228 | enable_irq_wake(rtap->irq); |
229 | } else { | |
230 | clk_enable(rtap->clk); | |
231 | rtap->irqmaskstore = readl(rtap->virtbase + COH901331_IRQ_MASK); | |
232 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); | |
233 | clk_disable(rtap->clk); | |
234 | } | |
8384dfeb | 235 | clk_unprepare(rtap->clk); |
aa958f57 LW |
236 | return 0; |
237 | } | |
238 | ||
62068e2c | 239 | static int coh901331_resume(struct device *dev) |
aa958f57 | 240 | { |
5910fa0d | 241 | int ret; |
62068e2c | 242 | struct coh901331_port *rtap = dev_get_drvdata(dev); |
aa958f57 | 243 | |
5910fa0d KL |
244 | ret = clk_prepare(rtap->clk); |
245 | if (ret) | |
246 | return ret; | |
247 | ||
62068e2c | 248 | if (device_may_wakeup(dev)) { |
aa958f57 | 249 | disable_irq_wake(rtap->irq); |
5a98c04d | 250 | } else { |
aa958f57 LW |
251 | clk_enable(rtap->clk); |
252 | writel(rtap->irqmaskstore, rtap->virtbase + COH901331_IRQ_MASK); | |
253 | clk_disable(rtap->clk); | |
5a98c04d | 254 | } |
aa958f57 LW |
255 | return 0; |
256 | } | |
aa958f57 LW |
257 | #endif |
258 | ||
62068e2c JH |
259 | static SIMPLE_DEV_PM_OPS(coh901331_pm_ops, coh901331_suspend, coh901331_resume); |
260 | ||
aa958f57 LW |
261 | static void coh901331_shutdown(struct platform_device *pdev) |
262 | { | |
3a02893f | 263 | struct coh901331_port *rtap = platform_get_drvdata(pdev); |
aa958f57 LW |
264 | |
265 | clk_enable(rtap->clk); | |
266 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); | |
828296de | 267 | clk_disable_unprepare(rtap->clk); |
aa958f57 LW |
268 | } |
269 | ||
a16b6c63 LW |
270 | static const struct of_device_id coh901331_dt_match[] = { |
271 | { .compatible = "stericsson,coh901331" }, | |
272 | {}, | |
273 | }; | |
73798d5c | 274 | MODULE_DEVICE_TABLE(of, coh901331_dt_match); |
a16b6c63 | 275 | |
aa958f57 LW |
276 | static struct platform_driver coh901331_driver = { |
277 | .driver = { | |
278 | .name = "rtc-coh901331", | |
62068e2c | 279 | .pm = &coh901331_pm_ops, |
a16b6c63 | 280 | .of_match_table = coh901331_dt_match, |
aa958f57 LW |
281 | }, |
282 | .remove = __exit_p(coh901331_remove), | |
aa958f57 LW |
283 | .shutdown = coh901331_shutdown, |
284 | }; | |
285 | ||
4fdf7a9f | 286 | module_platform_driver_probe(coh901331_driver, coh901331_probe); |
aa958f57 LW |
287 | |
288 | MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>"); | |
289 | MODULE_DESCRIPTION("ST-Ericsson AB COH 901 331 RTC Driver"); | |
290 | MODULE_LICENSE("GPL"); |