[linux-2.6-block.git] / drivers / rtc / rtc-coh901331.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2007-2009 ST-Ericsson AB
 * Real Time Clock interface for ST-Ericsson AB COH 901 331 RTC.
 * Author: Linus Walleij <linus.walleij@stericsson.com>
 * Based on rtc-pl031.c by Deepak Saxena <dsaxena@plexity.net>
 * Copyright 2006 (c) MontaVista Software, Inc.
 */
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/rtc.h>
#include <linux/clk.h>
#include <linux/interrupt.h>
#include <linux/pm.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/slab.h>

/*
 * Registers in the COH 901 331
 */
/* Alarm value 32bit (R/W) */
#define COH901331_ALARM		0x00U
/* Used to set current time 32bit (R/W) */
#define COH901331_SET_TIME	0x04U
/* Indication if current time is valid 32bit (R/-) */
#define COH901331_VALID		0x08U
/* Read the current time 32bit (R/-) */
#define COH901331_CUR_TIME	0x0cU
/* Event register for the "alarm" interrupt */
#define COH901331_IRQ_EVENT	0x10U
/* Mask register for the "alarm" interrupt */
#define COH901331_IRQ_MASK	0x14U
/* Force register for the "alarm" interrupt */
#define COH901331_IRQ_FORCE	0x18U

/*
 * Reference to RTC block clock
 * Notice that the frequent clk_enable()/clk_disable() on this
 * clock is mainly to be able to turn on/off other clocks in the
 * hierarchy as needed, the RTC clock is always on anyway.
 */
struct coh901331_port {
	struct rtc_device *rtc;
	struct clk *clk;
	void __iomem *virtbase;
	int irq;
#ifdef CONFIG_PM_SLEEP
	u32 irqmaskstore;
#endif
};

static irqreturn_t coh901331_interrupt(int irq, void *data)
{
	struct coh901331_port *rtap = data;

	clk_enable(rtap->clk);
	/* Ack IRQ */
	writel(1, rtap->virtbase + COH901331_IRQ_EVENT);
	/*
	 * Disable the interrupt. This is necessary because
	 * the RTC lives on a lower-clocked line and will
	 * not release the IRQ line until after a few (slower)
	 * clock cycles. The interrupt will be re-enabled when
	 * a new alarm is set anyway.
	 */
	writel(0, rtap->virtbase + COH901331_IRQ_MASK);
	clk_disable(rtap->clk);

	/* Set alarm flag */
	rtc_update_irq(rtap->rtc, 1, RTC_AF);

	return IRQ_HANDLED;
}

static int coh901331_read_time(struct device *dev, struct rtc_time *tm)
{
	struct coh901331_port *rtap = dev_get_drvdata(dev);

	clk_enable(rtap->clk);
	/* Check if the time is valid */
	if (!readl(rtap->virtbase + COH901331_VALID)) {
		clk_disable(rtap->clk);
		return -EINVAL;
	}

	rtc_time64_to_tm(readl(rtap->virtbase + COH901331_CUR_TIME), tm);
	clk_disable(rtap->clk);
	return 0;
}

static int coh901331_set_time(struct device *dev, struct rtc_time *tm)
{
	struct coh901331_port *rtap = dev_get_drvdata(dev);

	clk_enable(rtap->clk);
	writel(rtc_tm_to_time64(tm), rtap->virtbase + COH901331_SET_TIME);
	clk_disable(rtap->clk);

	return 0;
}

static int coh901331_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct coh901331_port *rtap = dev_get_drvdata(dev);

	clk_enable(rtap->clk);
	rtc_time64_to_tm(readl(rtap->virtbase + COH901331_ALARM), &alarm->time);
	alarm->pending = readl(rtap->virtbase + COH901331_IRQ_EVENT) & 1U;
	alarm->enabled = readl(rtap->virtbase + COH901331_IRQ_MASK) & 1U;
	clk_disable(rtap->clk);

	return 0;
}

static int coh901331_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct coh901331_port *rtap = dev_get_drvdata(dev);
	unsigned long time =  rtc_tm_to_time64(&alarm->time);

	clk_enable(rtap->clk);
	writel(time, rtap->virtbase + COH901331_ALARM);
	writel(alarm->enabled, rtap->virtbase + COH901331_IRQ_MASK);
	clk_disable(rtap->clk);

	return 0;
}

static int coh901331_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	struct coh901331_port *rtap = dev_get_drvdata(dev);

	clk_enable(rtap->clk);
	if (enabled)
		writel(1, rtap->virtbase + COH901331_IRQ_MASK);
	else
		writel(0, rtap->virtbase + COH901331_IRQ_MASK);
	clk_disable(rtap->clk);

	return 0;
}

static const struct rtc_class_ops coh901331_ops = {
	.read_time = coh901331_read_time,
	.set_time = coh901331_set_time,
	.read_alarm = coh901331_read_alarm,
	.set_alarm = coh901331_set_alarm,
	.alarm_irq_enable = coh901331_alarm_irq_enable,
};

static int __exit coh901331_remove(struct platform_device *pdev)
{
	struct coh901331_port *rtap = platform_get_drvdata(pdev);

	if (rtap)
		clk_unprepare(rtap->clk);

	return 0;
}


static int __init coh901331_probe(struct platform_device *pdev)
{
	int ret;
	struct coh901331_port *rtap;
	struct resource *res;

	rtap = devm_kzalloc(&pdev->dev,
			    sizeof(struct coh901331_port), GFP_KERNEL);
	if (!rtap)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	rtap->virtbase  = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(rtap->virtbase))
		return PTR_ERR(rtap->virtbase);

	rtap->irq = platform_get_irq(pdev, 0);
	if (devm_request_irq(&pdev->dev, rtap->irq, coh901331_interrupt, 0,
			     "RTC COH 901 331 Alarm", rtap))
		return -EIO;

	rtap->clk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(rtap->clk)) {
		ret = PTR_ERR(rtap->clk);
		dev_err(&pdev->dev, "could not get clock\n");
		return ret;
	}

	rtap->rtc = devm_rtc_allocate_device(&pdev->dev);
	if (IS_ERR(rtap->rtc))
		return PTR_ERR(rtap->rtc);

	rtap->rtc->ops = &coh901331_ops;
	rtap->rtc->range_max = U32_MAX;

	/* We enable/disable the clock only to assure it works */
	ret = clk_prepare_enable(rtap->clk);
	if (ret) {
		dev_err(&pdev->dev, "could not enable clock\n");
		return ret;
	}
	clk_disable(rtap->clk);

	platform_set_drvdata(pdev, rtap);

	ret = rtc_register_device(rtap->rtc);
	if (ret)
		goto out_no_rtc;

	return 0;

 out_no_rtc:
	clk_unprepare(rtap->clk);
	return ret;
}

#ifdef CONFIG_PM_SLEEP
static int coh901331_suspend(struct device *dev)
{
	struct coh901331_port *rtap = dev_get_drvdata(dev);

	/*
	 * If this RTC alarm will be used for waking the system up,
	 * don't disable it of course. Else we just disable the alarm
	 * and await suspension.
	 */
	if (device_may_wakeup(dev)) {
		enable_irq_wake(rtap->irq);
	} else {
		clk_enable(rtap->clk);
		rtap->irqmaskstore = readl(rtap->virtbase + COH901331_IRQ_MASK);
		writel(0, rtap->virtbase + COH901331_IRQ_MASK);
		clk_disable(rtap->clk);
	}
	clk_unprepare(rtap->clk);
	return 0;
}

static int coh901331_resume(struct device *dev)
{
	int ret;
	struct coh901331_port *rtap = dev_get_drvdata(dev);

	ret = clk_prepare(rtap->clk);
	if (ret)
		return ret;

	if (device_may_wakeup(dev)) {
		disable_irq_wake(rtap->irq);
	} else {
		clk_enable(rtap->clk);
		writel(rtap->irqmaskstore, rtap->virtbase + COH901331_IRQ_MASK);
		clk_disable(rtap->clk);
	}
	return 0;
}
#endif

static SIMPLE_DEV_PM_OPS(coh901331_pm_ops, coh901331_suspend, coh901331_resume);

static void coh901331_shutdown(struct platform_device *pdev)
{
	struct coh901331_port *rtap = platform_get_drvdata(pdev);

	clk_enable(rtap->clk);
	writel(0, rtap->virtbase + COH901331_IRQ_MASK);
	clk_disable_unprepare(rtap->clk);
}

static const struct of_device_id coh901331_dt_match[] = {
	{ .compatible = "stericsson,coh901331" },
	{},
};
MODULE_DEVICE_TABLE(of, coh901331_dt_match);

static struct platform_driver coh901331_driver = {
	.driver = {
		.name = "rtc-coh901331",
		.pm = &coh901331_pm_ops,
		.of_match_table = coh901331_dt_match,
	},
	.remove = __exit_p(coh901331_remove),
	.shutdown = coh901331_shutdown,
};

module_platform_driver_probe(coh901331_driver, coh901331_probe);

MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
MODULE_DESCRIPTION("ST-Ericsson AB COH 901 331 RTC Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
7d624621	1	// SPDX-License-Identifier: GPL-2.0
aa958f57 LW	2	/*
aa958f57 LW	3	* Copyright (C) 2007-2009 ST-Ericsson AB
aa958f57 LW	4	* Real Time Clock interface for ST-Ericsson AB COH 901 331 RTC.
	5	* Author: Linus Walleij <linus.walleij@stericsson.com>
	6	* Based on rtc-pl031.c by Deepak Saxena <dsaxena@plexity.net>
	7	* Copyright 2006 (c) MontaVista Software, Inc.
	8	*/
	9	#include <linux/init.h>
	10	#include <linux/module.h>
ac316725	11	#include <linux/mod_devicetable.h>
aa958f57 LW	12	#include <linux/rtc.h>
	13	#include <linux/clk.h>
	14	#include <linux/interrupt.h>
	15	#include <linux/pm.h>
	16	#include <linux/platform_device.h>
	17	#include <linux/io.h>
5a0e3ad6	18	#include <linux/slab.h>
aa958f57 LW	19
	20	/*
	21	* Registers in the COH 901 331
	22	*/
	23	/* Alarm value 32bit (R/W) */
	24	#define COH901331_ALARM 0x00U
	25	/* Used to set current time 32bit (R/W) */
	26	#define COH901331_SET_TIME 0x04U
	27	/* Indication if current time is valid 32bit (R/-) */
	28	#define COH901331_VALID 0x08U
	29	/* Read the current time 32bit (R/-) */
	30	#define COH901331_CUR_TIME 0x0cU
	31	/* Event register for the "alarm" interrupt */
	32	#define COH901331_IRQ_EVENT 0x10U
	33	/* Mask register for the "alarm" interrupt */
	34	#define COH901331_IRQ_MASK 0x14U
	35	/* Force register for the "alarm" interrupt */
	36	#define COH901331_IRQ_FORCE 0x18U
	37
	38	/*
	39	* Reference to RTC block clock
	40	* Notice that the frequent clk_enable()/clk_disable() on this
	41	* clock is mainly to be able to turn on/off other clocks in the
	42	* hierarchy as needed, the RTC clock is always on anyway.
	43	*/
	44	struct coh901331_port {
	45	struct rtc_device *rtc;
	46	struct clk *clk;
aa958f57 LW	47	void __iomem *virtbase;
aa958f57 LW	48	int irq;
62068e2c	49	#ifdef CONFIG_PM_SLEEP
aa958f57 LW	50	u32 irqmaskstore;
	51	#endif
	52	};
	53
	54	static irqreturn_t coh901331_interrupt(int irq, void *data)
	55	{
	56	struct coh901331_port *rtap = data;
	57
	58	clk_enable(rtap->clk);
	59	/* Ack IRQ */
	60	writel(1, rtap->virtbase + COH901331_IRQ_EVENT);
378ce74b LW	61	/*
	62	* Disable the interrupt. This is necessary because
	63	* the RTC lives on a lower-clocked line and will
	64	* not release the IRQ line until after a few (slower)
	65	* clock cycles. The interrupt will be re-enabled when
	66	* a new alarm is set anyway.
	67	*/
	68	writel(0, rtap->virtbase + COH901331_IRQ_MASK);
aa958f57	69	clk_disable(rtap->clk);
378ce74b	70
aa958f57 LW	71	/* Set alarm flag */
	72	rtc_update_irq(rtap->rtc, 1, RTC_AF);
	73
	74	return IRQ_HANDLED;
	75	}
	76
	77	static int coh901331_read_time(struct device dev, struct rtc_time tm)
	78	{
	79	struct coh901331_port *rtap = dev_get_drvdata(dev);
	80
	81	clk_enable(rtap->clk);
	82	/* Check if the time is valid */
9cf2f9b5	83	if (!readl(rtap->virtbase + COH901331_VALID)) {
aa958f57	84	clk_disable(rtap->clk);
9cf2f9b5	85	return -EINVAL;
aa958f57	86	}
9cf2f9b5 AB	87
9cf2f9b5 AB	88	rtc_time64_to_tm(readl(rtap->virtbase + COH901331_CUR_TIME), tm);
aa958f57	89	clk_disable(rtap->clk);
9cf2f9b5	90	return 0;
aa958f57 LW	91	}
aa958f57 LW	92
febad794	93	static int coh901331_set_time(struct device dev, struct rtc_time tm)
aa958f57 LW	94	{
	95	struct coh901331_port *rtap = dev_get_drvdata(dev);
	96
	97	clk_enable(rtap->clk);
febad794	98	writel(rtc_tm_to_time64(tm), rtap->virtbase + COH901331_SET_TIME);
aa958f57 LW	99	clk_disable(rtap->clk);
	100
	101	return 0;
	102	}
	103
	104	static int coh901331_read_alarm(struct device dev, struct rtc_wkalrm alarm)
	105	{
	106	struct coh901331_port *rtap = dev_get_drvdata(dev);
	107
	108	clk_enable(rtap->clk);
9cf2f9b5	109	rtc_time64_to_tm(readl(rtap->virtbase + COH901331_ALARM), &alarm->time);
aa958f57 LW	110	alarm->pending = readl(rtap->virtbase + COH901331_IRQ_EVENT) & 1U;
	111	alarm->enabled = readl(rtap->virtbase + COH901331_IRQ_MASK) & 1U;
	112	clk_disable(rtap->clk);
	113
	114	return 0;
	115	}
	116
	117	static int coh901331_set_alarm(struct device dev, struct rtc_wkalrm alarm)
	118	{
	119	struct coh901331_port *rtap = dev_get_drvdata(dev);
9cf2f9b5	120	unsigned long time = rtc_tm_to_time64(&alarm->time);
aa958f57	121
aa958f57 LW	122	clk_enable(rtap->clk);
	123	writel(time, rtap->virtbase + COH901331_ALARM);
	124	writel(alarm->enabled, rtap->virtbase + COH901331_IRQ_MASK);
	125	clk_disable(rtap->clk);
	126
	127	return 0;
	128	}
	129
	130	static int coh901331_alarm_irq_enable(struct device *dev, unsigned int enabled)
	131	{
	132	struct coh901331_port *rtap = dev_get_drvdata(dev);
	133
	134	clk_enable(rtap->clk);
	135	if (enabled)
	136	writel(1, rtap->virtbase + COH901331_IRQ_MASK);
	137	else
	138	writel(0, rtap->virtbase + COH901331_IRQ_MASK);
	139	clk_disable(rtap->clk);
378ce74b LW	140
378ce74b LW	141	return 0;
aa958f57 LW	142	}
aa958f57 LW	143
34c7b3ac	144	static const struct rtc_class_ops coh901331_ops = {
aa958f57	145	.read_time = coh901331_read_time,
febad794	146	.set_time = coh901331_set_time,
aa958f57 LW	147	.read_alarm = coh901331_read_alarm,
	148	.set_alarm = coh901331_set_alarm,
	149	.alarm_irq_enable = coh901331_alarm_irq_enable,
	150	};
	151
	152	static int __exit coh901331_remove(struct platform_device *pdev)
	153	{
3a02893f	154	struct coh901331_port *rtap = platform_get_drvdata(pdev);
aa958f57	155
7fcbf5fd	156	if (rtap)
8384dfeb	157	clk_unprepare(rtap->clk);
aa958f57 LW	158
	159	return 0;
	160	}
	161
	162
	163	static int __init coh901331_probe(struct platform_device *pdev)
	164	{
	165	int ret;
	166	struct coh901331_port *rtap;
	167	struct resource *res;
	168
36ac1d24 LW	169	rtap = devm_kzalloc(&pdev->dev,
36ac1d24 LW	170	sizeof(struct coh901331_port), GFP_KERNEL);
aa958f57 LW	171	if (!rtap)
	172	return -ENOMEM;
	173
	174	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
daaf90f0 JH	175	rtap->virtbase = devm_ioremap_resource(&pdev->dev, res);
	176	if (IS_ERR(rtap->virtbase))
	177	return PTR_ERR(rtap->virtbase);
aa958f57 LW	178
aa958f57 LW	179	rtap->irq = platform_get_irq(pdev, 0);
36ac1d24 LW	180	if (devm_request_irq(&pdev->dev, rtap->irq, coh901331_interrupt, 0,
	181	"RTC COH 901 331 Alarm", rtap))
	182	return -EIO;
aa958f57	183
3b759d7f	184	rtap->clk = devm_clk_get(&pdev->dev, NULL);
aa958f57 LW	185	if (IS_ERR(rtap->clk)) {
	186	ret = PTR_ERR(rtap->clk);
	187	dev_err(&pdev->dev, "could not get clock\n");
36ac1d24	188	return ret;
aa958f57 LW	189	}
aa958f57 LW	190
06cfd668 AB	191	rtap->rtc = devm_rtc_allocate_device(&pdev->dev);
	192	if (IS_ERR(rtap->rtc))
	193	return PTR_ERR(rtap->rtc);
	194
	195	rtap->rtc->ops = &coh901331_ops;
	196	rtap->rtc->range_max = U32_MAX;
	197
aa958f57	198	/* We enable/disable the clock only to assure it works */
8384dfeb	199	ret = clk_prepare_enable(rtap->clk);
aa958f57 LW	200	if (ret) {
aa958f57 LW	201	dev_err(&pdev->dev, "could not enable clock\n");
3b759d7f	202	return ret;
aa958f57 LW	203	}
	204	clk_disable(rtap->clk);
	205
9cf3b5fa	206	platform_set_drvdata(pdev, rtap);
06cfd668 AB	207
	208	ret = rtc_register_device(rtap->rtc);
	209	if (ret)
aa958f57	210	goto out_no_rtc;
aa958f57	211
aa958f57 LW	212	return 0;
	213
	214	out_no_rtc:
8384dfeb	215	clk_unprepare(rtap->clk);
aa958f57 LW	216	return ret;
	217	}
	218
62068e2c JH	219	#ifdef CONFIG_PM_SLEEP
62068e2c JH	220	static int coh901331_suspend(struct device *dev)
aa958f57	221	{
62068e2c	222	struct coh901331_port *rtap = dev_get_drvdata(dev);
aa958f57 LW	223
	224	/*
	225	* If this RTC alarm will be used for waking the system up,
	226	* don't disable it of course. Else we just disable the alarm
	227	* and await suspension.
	228	*/
62068e2c	229	if (device_may_wakeup(dev)) {
aa958f57 LW	230	enable_irq_wake(rtap->irq);
	231	} else {
	232	clk_enable(rtap->clk);
	233	rtap->irqmaskstore = readl(rtap->virtbase + COH901331_IRQ_MASK);
	234	writel(0, rtap->virtbase + COH901331_IRQ_MASK);
	235	clk_disable(rtap->clk);
	236	}
8384dfeb	237	clk_unprepare(rtap->clk);
aa958f57 LW	238	return 0;
	239	}
	240
62068e2c	241	static int coh901331_resume(struct device *dev)
aa958f57	242	{
5910fa0d	243	int ret;
62068e2c	244	struct coh901331_port *rtap = dev_get_drvdata(dev);
aa958f57	245
5910fa0d KL	246	ret = clk_prepare(rtap->clk);
	247	if (ret)
	248	return ret;
	249
62068e2c	250	if (device_may_wakeup(dev)) {
aa958f57	251	disable_irq_wake(rtap->irq);
5a98c04d	252	} else {
aa958f57 LW	253	clk_enable(rtap->clk);
	254	writel(rtap->irqmaskstore, rtap->virtbase + COH901331_IRQ_MASK);
	255	clk_disable(rtap->clk);
5a98c04d	256	}
aa958f57 LW	257	return 0;
aa958f57 LW	258	}
aa958f57 LW	259	#endif
aa958f57 LW	260
62068e2c JH	261	static SIMPLE_DEV_PM_OPS(coh901331_pm_ops, coh901331_suspend, coh901331_resume);
62068e2c JH	262
aa958f57 LW	263	static void coh901331_shutdown(struct platform_device *pdev)
aa958f57 LW	264	{
3a02893f	265	struct coh901331_port *rtap = platform_get_drvdata(pdev);
aa958f57 LW	266
	267	clk_enable(rtap->clk);
	268	writel(0, rtap->virtbase + COH901331_IRQ_MASK);
828296de	269	clk_disable_unprepare(rtap->clk);
aa958f57 LW	270	}
aa958f57 LW	271
a16b6c63 LW	272	static const struct of_device_id coh901331_dt_match[] = {
	273	{ .compatible = "stericsson,coh901331" },
	274	{},
	275	};
73798d5c	276	MODULE_DEVICE_TABLE(of, coh901331_dt_match);
a16b6c63	277
aa958f57 LW	278	static struct platform_driver coh901331_driver = {
	279	.driver = {
	280	.name = "rtc-coh901331",
62068e2c	281	.pm = &coh901331_pm_ops,
a16b6c63	282	.of_match_table = coh901331_dt_match,
aa958f57 LW	283	},
aa958f57 LW	284	.remove = __exit_p(coh901331_remove),
aa958f57 LW	285	.shutdown = coh901331_shutdown,
	286	};
	287
4fdf7a9f	288	module_platform_driver_probe(coh901331_driver, coh901331_probe);
aa958f57 LW	289
	290	MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
	291	MODULE_DESCRIPTION("ST-Ericsson AB COH 901 331 RTC Driver");
	292	MODULE_LICENSE("GPL");