Commit | Line | Data |
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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
7be2c7c9 DB |
2 | /* |
3 | * RTC class driver for "CMOS RTC": PCs, ACPI, etc | |
4 | * | |
5 | * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) | |
6 | * Copyright (C) 2006 David Brownell (convert to new framework) | |
7be2c7c9 DB |
7 | */ |
8 | ||
9 | /* | |
10 | * The original "cmos clock" chip was an MC146818 chip, now obsolete. | |
11 | * That defined the register interface now provided by all PCs, some | |
12 | * non-PC systems, and incorporated into ACPI. Modern PC chipsets | |
13 | * integrate an MC146818 clone in their southbridge, and boards use | |
14 | * that instead of discrete clones like the DS12887 or M48T86. There | |
15 | * are also clones that connect using the LPC bus. | |
16 | * | |
17 | * That register API is also used directly by various other drivers | |
18 | * (notably for integrated NVRAM), infrastructure (x86 has code to | |
19 | * bypass the RTC framework, directly reading the RTC during boot | |
20 | * and updating minutes/seconds for systems using NTP synch) and | |
21 | * utilities (like userspace 'hwclock', if no /dev node exists). | |
22 | * | |
23 | * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with | |
24 | * interrupts disabled, holding the global rtc_lock, to exclude those | |
25 | * other drivers and utilities on correctly configured systems. | |
26 | */ | |
a737e835 JP |
27 | |
28 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
29 | ||
7be2c7c9 DB |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
32 | #include <linux/init.h> | |
33 | #include <linux/interrupt.h> | |
34 | #include <linux/spinlock.h> | |
35 | #include <linux/platform_device.h> | |
5d2a5037 | 36 | #include <linux/log2.h> |
2fb08e6c | 37 | #include <linux/pm.h> |
3bcbaf6e SAS |
38 | #include <linux/of.h> |
39 | #include <linux/of_platform.h> | |
a1e23a42 HG |
40 | #ifdef CONFIG_X86 |
41 | #include <asm/i8259.h> | |
36d91a4d ZR |
42 | #include <asm/processor.h> |
43 | #include <linux/dmi.h> | |
a1e23a42 | 44 | #endif |
7be2c7c9 DB |
45 | |
46 | /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ | |
5ab788d7 | 47 | #include <linux/mc146818rtc.h> |
7be2c7c9 | 48 | |
bc51098c | 49 | #ifdef CONFIG_ACPI |
311ee9c1 ZR |
50 | /* |
51 | * Use ACPI SCI to replace HPET interrupt for RTC Alarm event | |
52 | * | |
53 | * If cleared, ACPI SCI is only used to wake up the system from suspend | |
54 | * | |
55 | * If set, ACPI SCI is used to handle UIE/AIE and system wakeup | |
56 | */ | |
57 | ||
58 | static bool use_acpi_alarm; | |
59 | module_param(use_acpi_alarm, bool, 0444); | |
60 | ||
bc51098c MR |
61 | static inline int cmos_use_acpi_alarm(void) |
62 | { | |
63 | return use_acpi_alarm; | |
64 | } | |
65 | #else /* !CONFIG_ACPI */ | |
66 | ||
67 | static inline int cmos_use_acpi_alarm(void) | |
68 | { | |
69 | return 0; | |
70 | } | |
71 | #endif | |
72 | ||
7be2c7c9 DB |
73 | struct cmos_rtc { |
74 | struct rtc_device *rtc; | |
75 | struct device *dev; | |
76 | int irq; | |
77 | struct resource *iomem; | |
88b8d33b | 78 | time64_t alarm_expires; |
7be2c7c9 | 79 | |
87ac84f4 DB |
80 | void (*wake_on)(struct device *); |
81 | void (*wake_off)(struct device *); | |
82 | ||
83 | u8 enabled_wake; | |
7be2c7c9 DB |
84 | u8 suspend_ctrl; |
85 | ||
86 | /* newer hardware extends the original register set */ | |
87 | u8 day_alrm; | |
88 | u8 mon_alrm; | |
89 | u8 century; | |
68669d55 GM |
90 | |
91 | struct rtc_wkalrm saved_wkalrm; | |
7be2c7c9 DB |
92 | }; |
93 | ||
94 | /* both platform and pnp busses use negative numbers for invalid irqs */ | |
2fac6674 | 95 | #define is_valid_irq(n) ((n) > 0) |
7be2c7c9 DB |
96 | |
97 | static const char driver_name[] = "rtc_cmos"; | |
98 | ||
bcd9b89c DB |
99 | /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; |
100 | * always mask it against the irq enable bits in RTC_CONTROL. Bit values | |
101 | * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. | |
102 | */ | |
103 | #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) | |
104 | ||
105 | static inline int is_intr(u8 rtc_intr) | |
106 | { | |
107 | if (!(rtc_intr & RTC_IRQF)) | |
108 | return 0; | |
109 | return rtc_intr & RTC_IRQMASK; | |
110 | } | |
111 | ||
7be2c7c9 DB |
112 | /*----------------------------------------------------------------*/ |
113 | ||
35d3fdd5 DB |
114 | /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because |
115 | * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly | |
116 | * used in a broken "legacy replacement" mode. The breakage includes | |
117 | * HPET #1 hijacking the IRQ for this RTC, and being unavailable for | |
118 | * other (better) use. | |
119 | * | |
120 | * When that broken mode is in use, platform glue provides a partial | |
121 | * emulation of hardware RTC IRQ facilities using HPET #1. We don't | |
122 | * want to use HPET for anything except those IRQs though... | |
123 | */ | |
124 | #ifdef CONFIG_HPET_EMULATE_RTC | |
125 | #include <asm/hpet.h> | |
126 | #else | |
127 | ||
128 | static inline int is_hpet_enabled(void) | |
129 | { | |
130 | return 0; | |
131 | } | |
132 | ||
133 | static inline int hpet_mask_rtc_irq_bit(unsigned long mask) | |
134 | { | |
135 | return 0; | |
136 | } | |
137 | ||
138 | static inline int hpet_set_rtc_irq_bit(unsigned long mask) | |
139 | { | |
140 | return 0; | |
141 | } | |
142 | ||
143 | static inline int | |
144 | hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) | |
145 | { | |
146 | return 0; | |
147 | } | |
148 | ||
149 | static inline int hpet_set_periodic_freq(unsigned long freq) | |
150 | { | |
151 | return 0; | |
152 | } | |
153 | ||
154 | static inline int hpet_rtc_dropped_irq(void) | |
155 | { | |
156 | return 0; | |
157 | } | |
158 | ||
159 | static inline int hpet_rtc_timer_init(void) | |
160 | { | |
161 | return 0; | |
162 | } | |
163 | ||
164 | extern irq_handler_t hpet_rtc_interrupt; | |
165 | ||
166 | static inline int hpet_register_irq_handler(irq_handler_t handler) | |
167 | { | |
168 | return 0; | |
169 | } | |
170 | ||
171 | static inline int hpet_unregister_irq_handler(irq_handler_t handler) | |
172 | { | |
173 | return 0; | |
174 | } | |
175 | ||
176 | #endif | |
177 | ||
311ee9c1 | 178 | /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */ |
d197a253 | 179 | static inline int use_hpet_alarm(void) |
311ee9c1 | 180 | { |
bc51098c | 181 | return is_hpet_enabled() && !cmos_use_acpi_alarm(); |
311ee9c1 ZR |
182 | } |
183 | ||
35d3fdd5 DB |
184 | /*----------------------------------------------------------------*/ |
185 | ||
c8fc40cd DB |
186 | #ifdef RTC_PORT |
187 | ||
188 | /* Most newer x86 systems have two register banks, the first used | |
189 | * for RTC and NVRAM and the second only for NVRAM. Caller must | |
190 | * own rtc_lock ... and we won't worry about access during NMI. | |
191 | */ | |
192 | #define can_bank2 true | |
193 | ||
194 | static inline unsigned char cmos_read_bank2(unsigned char addr) | |
195 | { | |
196 | outb(addr, RTC_PORT(2)); | |
197 | return inb(RTC_PORT(3)); | |
198 | } | |
199 | ||
200 | static inline void cmos_write_bank2(unsigned char val, unsigned char addr) | |
201 | { | |
202 | outb(addr, RTC_PORT(2)); | |
b43c1ea4 | 203 | outb(val, RTC_PORT(3)); |
c8fc40cd DB |
204 | } |
205 | ||
206 | #else | |
207 | ||
208 | #define can_bank2 false | |
209 | ||
210 | static inline unsigned char cmos_read_bank2(unsigned char addr) | |
211 | { | |
212 | return 0; | |
213 | } | |
214 | ||
215 | static inline void cmos_write_bank2(unsigned char val, unsigned char addr) | |
216 | { | |
217 | } | |
218 | ||
219 | #endif | |
220 | ||
221 | /*----------------------------------------------------------------*/ | |
222 | ||
7be2c7c9 DB |
223 | static int cmos_read_time(struct device *dev, struct rtc_time *t) |
224 | { | |
ba58d102 CY |
225 | /* |
226 | * If pm_trace abused the RTC for storage, set the timespec to 0, | |
227 | * which tells the caller that this RTC value is unusable. | |
228 | */ | |
229 | if (!pm_trace_rtc_valid()) | |
230 | return -EIO; | |
231 | ||
7be2c7c9 | 232 | /* REVISIT: if the clock has a "century" register, use |
5ab788d7 | 233 | * that instead of the heuristic in mc146818_get_time(). |
7be2c7c9 DB |
234 | * That'll make Y3K compatility (year > 2070) easy! |
235 | */ | |
5ab788d7 | 236 | mc146818_get_time(t); |
7be2c7c9 DB |
237 | return 0; |
238 | } | |
239 | ||
240 | static int cmos_set_time(struct device *dev, struct rtc_time *t) | |
241 | { | |
242 | /* REVISIT: set the "century" register if available | |
243 | * | |
244 | * NOTE: this ignores the issue whereby updating the seconds | |
245 | * takes effect exactly 500ms after we write the register. | |
246 | * (Also queueing and other delays before we get this far.) | |
247 | */ | |
5ab788d7 | 248 | return mc146818_set_time(t); |
7be2c7c9 DB |
249 | } |
250 | ||
251 | static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |
252 | { | |
253 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
254 | unsigned char rtc_control; | |
255 | ||
fbb974ba | 256 | /* This not only a rtc_op, but also called directly */ |
7be2c7c9 DB |
257 | if (!is_valid_irq(cmos->irq)) |
258 | return -EIO; | |
259 | ||
260 | /* Basic alarms only support hour, minute, and seconds fields. | |
261 | * Some also support day and month, for alarms up to a year in | |
262 | * the future. | |
263 | */ | |
7be2c7c9 DB |
264 | |
265 | spin_lock_irq(&rtc_lock); | |
266 | t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM); | |
267 | t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM); | |
268 | t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM); | |
269 | ||
270 | if (cmos->day_alrm) { | |
615bb29c ML |
271 | /* ignore upper bits on readback per ACPI spec */ |
272 | t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f; | |
7be2c7c9 DB |
273 | if (!t->time.tm_mday) |
274 | t->time.tm_mday = -1; | |
275 | ||
276 | if (cmos->mon_alrm) { | |
277 | t->time.tm_mon = CMOS_READ(cmos->mon_alrm); | |
278 | if (!t->time.tm_mon) | |
279 | t->time.tm_mon = -1; | |
280 | } | |
281 | } | |
282 | ||
283 | rtc_control = CMOS_READ(RTC_CONTROL); | |
284 | spin_unlock_irq(&rtc_lock); | |
285 | ||
3804a89b AP |
286 | if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { |
287 | if (((unsigned)t->time.tm_sec) < 0x60) | |
288 | t->time.tm_sec = bcd2bin(t->time.tm_sec); | |
7be2c7c9 | 289 | else |
3804a89b AP |
290 | t->time.tm_sec = -1; |
291 | if (((unsigned)t->time.tm_min) < 0x60) | |
292 | t->time.tm_min = bcd2bin(t->time.tm_min); | |
293 | else | |
294 | t->time.tm_min = -1; | |
295 | if (((unsigned)t->time.tm_hour) < 0x24) | |
296 | t->time.tm_hour = bcd2bin(t->time.tm_hour); | |
297 | else | |
298 | t->time.tm_hour = -1; | |
299 | ||
300 | if (cmos->day_alrm) { | |
301 | if (((unsigned)t->time.tm_mday) <= 0x31) | |
302 | t->time.tm_mday = bcd2bin(t->time.tm_mday); | |
7be2c7c9 | 303 | else |
3804a89b AP |
304 | t->time.tm_mday = -1; |
305 | ||
306 | if (cmos->mon_alrm) { | |
307 | if (((unsigned)t->time.tm_mon) <= 0x12) | |
308 | t->time.tm_mon = bcd2bin(t->time.tm_mon)-1; | |
309 | else | |
310 | t->time.tm_mon = -1; | |
311 | } | |
7be2c7c9 DB |
312 | } |
313 | } | |
7be2c7c9 DB |
314 | |
315 | t->enabled = !!(rtc_control & RTC_AIE); | |
316 | t->pending = 0; | |
317 | ||
318 | return 0; | |
319 | } | |
320 | ||
7e2a31da DB |
321 | static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control) |
322 | { | |
323 | unsigned char rtc_intr; | |
324 | ||
325 | /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS; | |
326 | * allegedly some older rtcs need that to handle irqs properly | |
327 | */ | |
328 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); | |
329 | ||
311ee9c1 | 330 | if (use_hpet_alarm()) |
7e2a31da DB |
331 | return; |
332 | ||
333 | rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; | |
334 | if (is_intr(rtc_intr)) | |
335 | rtc_update_irq(cmos->rtc, 1, rtc_intr); | |
336 | } | |
337 | ||
338 | static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask) | |
339 | { | |
340 | unsigned char rtc_control; | |
341 | ||
342 | /* flush any pending IRQ status, notably for update irqs, | |
343 | * before we enable new IRQs | |
344 | */ | |
345 | rtc_control = CMOS_READ(RTC_CONTROL); | |
346 | cmos_checkintr(cmos, rtc_control); | |
347 | ||
348 | rtc_control |= mask; | |
349 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
311ee9c1 ZR |
350 | if (use_hpet_alarm()) |
351 | hpet_set_rtc_irq_bit(mask); | |
352 | ||
bc51098c | 353 | if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { |
311ee9c1 ZR |
354 | if (cmos->wake_on) |
355 | cmos->wake_on(cmos->dev); | |
356 | } | |
7e2a31da DB |
357 | |
358 | cmos_checkintr(cmos, rtc_control); | |
359 | } | |
360 | ||
361 | static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask) | |
362 | { | |
363 | unsigned char rtc_control; | |
364 | ||
365 | rtc_control = CMOS_READ(RTC_CONTROL); | |
366 | rtc_control &= ~mask; | |
367 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
311ee9c1 ZR |
368 | if (use_hpet_alarm()) |
369 | hpet_mask_rtc_irq_bit(mask); | |
370 | ||
bc51098c | 371 | if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { |
311ee9c1 ZR |
372 | if (cmos->wake_off) |
373 | cmos->wake_off(cmos->dev); | |
374 | } | |
7e2a31da DB |
375 | |
376 | cmos_checkintr(cmos, rtc_control); | |
377 | } | |
378 | ||
6a6af3d0 GM |
379 | static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t) |
380 | { | |
381 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
382 | struct rtc_time now; | |
383 | ||
384 | cmos_read_time(dev, &now); | |
385 | ||
386 | if (!cmos->day_alrm) { | |
387 | time64_t t_max_date; | |
388 | time64_t t_alrm; | |
389 | ||
390 | t_max_date = rtc_tm_to_time64(&now); | |
391 | t_max_date += 24 * 60 * 60 - 1; | |
392 | t_alrm = rtc_tm_to_time64(&t->time); | |
393 | if (t_alrm > t_max_date) { | |
394 | dev_err(dev, | |
395 | "Alarms can be up to one day in the future\n"); | |
396 | return -EINVAL; | |
397 | } | |
398 | } else if (!cmos->mon_alrm) { | |
399 | struct rtc_time max_date = now; | |
400 | time64_t t_max_date; | |
401 | time64_t t_alrm; | |
402 | int max_mday; | |
403 | ||
404 | if (max_date.tm_mon == 11) { | |
405 | max_date.tm_mon = 0; | |
406 | max_date.tm_year += 1; | |
407 | } else { | |
408 | max_date.tm_mon += 1; | |
409 | } | |
410 | max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); | |
411 | if (max_date.tm_mday > max_mday) | |
412 | max_date.tm_mday = max_mday; | |
413 | ||
414 | t_max_date = rtc_tm_to_time64(&max_date); | |
415 | t_max_date -= 1; | |
416 | t_alrm = rtc_tm_to_time64(&t->time); | |
417 | if (t_alrm > t_max_date) { | |
418 | dev_err(dev, | |
419 | "Alarms can be up to one month in the future\n"); | |
420 | return -EINVAL; | |
421 | } | |
422 | } else { | |
423 | struct rtc_time max_date = now; | |
424 | time64_t t_max_date; | |
425 | time64_t t_alrm; | |
426 | int max_mday; | |
427 | ||
428 | max_date.tm_year += 1; | |
429 | max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); | |
430 | if (max_date.tm_mday > max_mday) | |
431 | max_date.tm_mday = max_mday; | |
432 | ||
433 | t_max_date = rtc_tm_to_time64(&max_date); | |
434 | t_max_date -= 1; | |
435 | t_alrm = rtc_tm_to_time64(&t->time); | |
436 | if (t_alrm > t_max_date) { | |
437 | dev_err(dev, | |
438 | "Alarms can be up to one year in the future\n"); | |
439 | return -EINVAL; | |
440 | } | |
441 | } | |
442 | ||
443 | return 0; | |
444 | } | |
445 | ||
7be2c7c9 DB |
446 | static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
447 | { | |
448 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
5e8599d2 | 449 | unsigned char mon, mday, hrs, min, sec, rtc_control; |
6a6af3d0 | 450 | int ret; |
7be2c7c9 | 451 | |
fbb974ba | 452 | /* This not only a rtc_op, but also called directly */ |
7be2c7c9 DB |
453 | if (!is_valid_irq(cmos->irq)) |
454 | return -EIO; | |
455 | ||
6a6af3d0 GM |
456 | ret = cmos_validate_alarm(dev, t); |
457 | if (ret < 0) | |
458 | return ret; | |
459 | ||
2b653e06 | 460 | mon = t->time.tm_mon + 1; |
7be2c7c9 | 461 | mday = t->time.tm_mday; |
7be2c7c9 | 462 | hrs = t->time.tm_hour; |
7be2c7c9 | 463 | min = t->time.tm_min; |
7be2c7c9 | 464 | sec = t->time.tm_sec; |
3804a89b AP |
465 | |
466 | rtc_control = CMOS_READ(RTC_CONTROL); | |
467 | if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { | |
468 | /* Writing 0xff means "don't care" or "match all". */ | |
469 | mon = (mon <= 12) ? bin2bcd(mon) : 0xff; | |
470 | mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff; | |
471 | hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff; | |
472 | min = (min < 60) ? bin2bcd(min) : 0xff; | |
473 | sec = (sec < 60) ? bin2bcd(sec) : 0xff; | |
474 | } | |
7be2c7c9 DB |
475 | |
476 | spin_lock_irq(&rtc_lock); | |
477 | ||
478 | /* next rtc irq must not be from previous alarm setting */ | |
7e2a31da | 479 | cmos_irq_disable(cmos, RTC_AIE); |
7be2c7c9 DB |
480 | |
481 | /* update alarm */ | |
482 | CMOS_WRITE(hrs, RTC_HOURS_ALARM); | |
483 | CMOS_WRITE(min, RTC_MINUTES_ALARM); | |
484 | CMOS_WRITE(sec, RTC_SECONDS_ALARM); | |
485 | ||
486 | /* the system may support an "enhanced" alarm */ | |
487 | if (cmos->day_alrm) { | |
488 | CMOS_WRITE(mday, cmos->day_alrm); | |
489 | if (cmos->mon_alrm) | |
490 | CMOS_WRITE(mon, cmos->mon_alrm); | |
491 | } | |
492 | ||
311ee9c1 ZR |
493 | if (use_hpet_alarm()) { |
494 | /* | |
495 | * FIXME the HPET alarm glue currently ignores day_alrm | |
496 | * and mon_alrm ... | |
497 | */ | |
498 | hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, | |
499 | t->time.tm_sec); | |
500 | } | |
35d3fdd5 | 501 | |
7e2a31da DB |
502 | if (t->enabled) |
503 | cmos_irq_enable(cmos, RTC_AIE); | |
7be2c7c9 DB |
504 | |
505 | spin_unlock_irq(&rtc_lock); | |
506 | ||
88b8d33b AH |
507 | cmos->alarm_expires = rtc_tm_to_time64(&t->time); |
508 | ||
7be2c7c9 DB |
509 | return 0; |
510 | } | |
511 | ||
a8462ef6 | 512 | static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled) |
7be2c7c9 DB |
513 | { |
514 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
7be2c7c9 DB |
515 | unsigned long flags; |
516 | ||
7be2c7c9 | 517 | spin_lock_irqsave(&rtc_lock, flags); |
a8462ef6 HRK |
518 | |
519 | if (enabled) | |
7e2a31da | 520 | cmos_irq_enable(cmos, RTC_AIE); |
a8462ef6 HRK |
521 | else |
522 | cmos_irq_disable(cmos, RTC_AIE); | |
523 | ||
7be2c7c9 DB |
524 | spin_unlock_irqrestore(&rtc_lock, flags); |
525 | return 0; | |
526 | } | |
527 | ||
6fca3fc5 | 528 | #if IS_ENABLED(CONFIG_RTC_INTF_PROC) |
7be2c7c9 DB |
529 | |
530 | static int cmos_procfs(struct device *dev, struct seq_file *seq) | |
531 | { | |
532 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
533 | unsigned char rtc_control, valid; | |
534 | ||
535 | spin_lock_irq(&rtc_lock); | |
536 | rtc_control = CMOS_READ(RTC_CONTROL); | |
537 | valid = CMOS_READ(RTC_VALID); | |
538 | spin_unlock_irq(&rtc_lock); | |
539 | ||
540 | /* NOTE: at least ICH6 reports battery status using a different | |
541 | * (non-RTC) bit; and SQWE is ignored on many current systems. | |
542 | */ | |
4395eb1f JP |
543 | seq_printf(seq, |
544 | "periodic_IRQ\t: %s\n" | |
545 | "update_IRQ\t: %s\n" | |
546 | "HPET_emulated\t: %s\n" | |
547 | // "square_wave\t: %s\n" | |
548 | "BCD\t\t: %s\n" | |
549 | "DST_enable\t: %s\n" | |
550 | "periodic_freq\t: %d\n" | |
551 | "batt_status\t: %s\n", | |
552 | (rtc_control & RTC_PIE) ? "yes" : "no", | |
553 | (rtc_control & RTC_UIE) ? "yes" : "no", | |
311ee9c1 | 554 | use_hpet_alarm() ? "yes" : "no", |
4395eb1f JP |
555 | // (rtc_control & RTC_SQWE) ? "yes" : "no", |
556 | (rtc_control & RTC_DM_BINARY) ? "no" : "yes", | |
557 | (rtc_control & RTC_DST_EN) ? "yes" : "no", | |
558 | cmos->rtc->irq_freq, | |
559 | (valid & RTC_VRT) ? "okay" : "dead"); | |
560 | ||
561 | return 0; | |
7be2c7c9 DB |
562 | } |
563 | ||
564 | #else | |
565 | #define cmos_procfs NULL | |
566 | #endif | |
567 | ||
568 | static const struct rtc_class_ops cmos_rtc_ops = { | |
a8462ef6 HRK |
569 | .read_time = cmos_read_time, |
570 | .set_time = cmos_set_time, | |
571 | .read_alarm = cmos_read_alarm, | |
572 | .set_alarm = cmos_set_alarm, | |
573 | .proc = cmos_procfs, | |
a8462ef6 | 574 | .alarm_irq_enable = cmos_alarm_irq_enable, |
7be2c7c9 DB |
575 | }; |
576 | ||
fbb974ba HG |
577 | static const struct rtc_class_ops cmos_rtc_ops_no_alarm = { |
578 | .read_time = cmos_read_time, | |
579 | .set_time = cmos_set_time, | |
580 | .proc = cmos_procfs, | |
581 | }; | |
582 | ||
7be2c7c9 DB |
583 | /*----------------------------------------------------------------*/ |
584 | ||
e07e232c DB |
585 | /* |
586 | * All these chips have at least 64 bytes of address space, shared by | |
587 | * RTC registers and NVRAM. Most of those bytes of NVRAM are used | |
588 | * by boot firmware. Modern chips have 128 or 256 bytes. | |
589 | */ | |
590 | ||
591 | #define NVRAM_OFFSET (RTC_REG_D + 1) | |
592 | ||
8b5b7958 AB |
593 | static int cmos_nvram_read(void *priv, unsigned int off, void *val, |
594 | size_t count) | |
e07e232c | 595 | { |
8b5b7958 | 596 | unsigned char *buf = val; |
e07e232c DB |
597 | int retval; |
598 | ||
c8fc40cd | 599 | off += NVRAM_OFFSET; |
e07e232c | 600 | spin_lock_irq(&rtc_lock); |
c8fc40cd DB |
601 | for (retval = 0; count; count--, off++, retval++) { |
602 | if (off < 128) | |
603 | *buf++ = CMOS_READ(off); | |
604 | else if (can_bank2) | |
605 | *buf++ = cmos_read_bank2(off); | |
606 | else | |
607 | break; | |
608 | } | |
e07e232c DB |
609 | spin_unlock_irq(&rtc_lock); |
610 | ||
611 | return retval; | |
612 | } | |
613 | ||
8b5b7958 AB |
614 | static int cmos_nvram_write(void *priv, unsigned int off, void *val, |
615 | size_t count) | |
e07e232c | 616 | { |
8b5b7958 AB |
617 | struct cmos_rtc *cmos = priv; |
618 | unsigned char *buf = val; | |
e07e232c DB |
619 | int retval; |
620 | ||
e07e232c DB |
621 | /* NOTE: on at least PCs and Ataris, the boot firmware uses a |
622 | * checksum on part of the NVRAM data. That's currently ignored | |
623 | * here. If userspace is smart enough to know what fields of | |
624 | * NVRAM to update, updating checksums is also part of its job. | |
625 | */ | |
c8fc40cd | 626 | off += NVRAM_OFFSET; |
e07e232c | 627 | spin_lock_irq(&rtc_lock); |
c8fc40cd | 628 | for (retval = 0; count; count--, off++, retval++) { |
e07e232c DB |
629 | /* don't trash RTC registers */ |
630 | if (off == cmos->day_alrm | |
631 | || off == cmos->mon_alrm | |
632 | || off == cmos->century) | |
633 | buf++; | |
c8fc40cd | 634 | else if (off < 128) |
e07e232c | 635 | CMOS_WRITE(*buf++, off); |
c8fc40cd DB |
636 | else if (can_bank2) |
637 | cmos_write_bank2(*buf++, off); | |
638 | else | |
639 | break; | |
e07e232c DB |
640 | } |
641 | spin_unlock_irq(&rtc_lock); | |
642 | ||
643 | return retval; | |
644 | } | |
645 | ||
e07e232c DB |
646 | /*----------------------------------------------------------------*/ |
647 | ||
7be2c7c9 DB |
648 | static struct cmos_rtc cmos_rtc; |
649 | ||
650 | static irqreturn_t cmos_interrupt(int irq, void *p) | |
651 | { | |
66e4f4a9 | 652 | unsigned long flags; |
7be2c7c9 | 653 | u8 irqstat; |
8a0bdfd7 | 654 | u8 rtc_control; |
7be2c7c9 | 655 | |
66e4f4a9 | 656 | spin_lock_irqsave(&rtc_lock, flags); |
35d3fdd5 DB |
657 | |
658 | /* When the HPET interrupt handler calls us, the interrupt | |
659 | * status is passed as arg1 instead of the irq number. But | |
660 | * always clear irq status, even when HPET is in the way. | |
661 | * | |
662 | * Note that HPET and RTC are almost certainly out of phase, | |
663 | * giving different IRQ status ... | |
9d8af78b | 664 | */ |
35d3fdd5 DB |
665 | irqstat = CMOS_READ(RTC_INTR_FLAGS); |
666 | rtc_control = CMOS_READ(RTC_CONTROL); | |
311ee9c1 | 667 | if (use_hpet_alarm()) |
9d8af78b | 668 | irqstat = (unsigned long)irq & 0xF0; |
998a0605 DB |
669 | |
670 | /* If we were suspended, RTC_CONTROL may not be accurate since the | |
671 | * bios may have cleared it. | |
672 | */ | |
673 | if (!cmos_rtc.suspend_ctrl) | |
674 | irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; | |
675 | else | |
676 | irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF; | |
8a0bdfd7 DB |
677 | |
678 | /* All Linux RTC alarms should be treated as if they were oneshot. | |
679 | * Similar code may be needed in system wakeup paths, in case the | |
680 | * alarm woke the system. | |
681 | */ | |
682 | if (irqstat & RTC_AIE) { | |
998a0605 | 683 | cmos_rtc.suspend_ctrl &= ~RTC_AIE; |
8a0bdfd7 DB |
684 | rtc_control &= ~RTC_AIE; |
685 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
311ee9c1 ZR |
686 | if (use_hpet_alarm()) |
687 | hpet_mask_rtc_irq_bit(RTC_AIE); | |
8a0bdfd7 DB |
688 | CMOS_READ(RTC_INTR_FLAGS); |
689 | } | |
66e4f4a9 | 690 | spin_unlock_irqrestore(&rtc_lock, flags); |
7be2c7c9 | 691 | |
bcd9b89c | 692 | if (is_intr(irqstat)) { |
7be2c7c9 DB |
693 | rtc_update_irq(p, 1, irqstat); |
694 | return IRQ_HANDLED; | |
695 | } else | |
696 | return IRQ_NONE; | |
697 | } | |
698 | ||
41ac8df9 | 699 | #ifdef CONFIG_PNP |
7be2c7c9 DB |
700 | #define INITSECTION |
701 | ||
702 | #else | |
7be2c7c9 DB |
703 | #define INITSECTION __init |
704 | #endif | |
705 | ||
706 | static int INITSECTION | |
707 | cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) | |
708 | { | |
97a92e77 | 709 | struct cmos_rtc_board_info *info = dev_get_platdata(dev); |
7be2c7c9 DB |
710 | int retval = 0; |
711 | unsigned char rtc_control; | |
e07e232c | 712 | unsigned address_space; |
31632dbd | 713 | u32 flags = 0; |
8b5b7958 AB |
714 | struct nvmem_config nvmem_cfg = { |
715 | .name = "cmos_nvram", | |
716 | .word_size = 1, | |
717 | .stride = 1, | |
718 | .reg_read = cmos_nvram_read, | |
719 | .reg_write = cmos_nvram_write, | |
720 | .priv = &cmos_rtc, | |
721 | }; | |
7be2c7c9 DB |
722 | |
723 | /* there can be only one ... */ | |
724 | if (cmos_rtc.dev) | |
725 | return -EBUSY; | |
726 | ||
727 | if (!ports) | |
728 | return -ENODEV; | |
729 | ||
05440dfc DB |
730 | /* Claim I/O ports ASAP, minimizing conflict with legacy driver. |
731 | * | |
732 | * REVISIT non-x86 systems may instead use memory space resources | |
733 | * (needing ioremap etc), not i/o space resources like this ... | |
734 | */ | |
31632dbd MR |
735 | if (RTC_IOMAPPED) |
736 | ports = request_region(ports->start, resource_size(ports), | |
737 | driver_name); | |
738 | else | |
739 | ports = request_mem_region(ports->start, resource_size(ports), | |
740 | driver_name); | |
05440dfc DB |
741 | if (!ports) { |
742 | dev_dbg(dev, "i/o registers already in use\n"); | |
743 | return -EBUSY; | |
744 | } | |
745 | ||
7be2c7c9 DB |
746 | cmos_rtc.irq = rtc_irq; |
747 | cmos_rtc.iomem = ports; | |
748 | ||
e07e232c DB |
749 | /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM |
750 | * driver did, but don't reject unknown configs. Old hardware | |
c8fc40cd DB |
751 | * won't address 128 bytes. Newer chips have multiple banks, |
752 | * though they may not be listed in one I/O resource. | |
e07e232c DB |
753 | */ |
754 | #if defined(CONFIG_ATARI) | |
755 | address_space = 64; | |
95abd0df | 756 | #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ |
8cb7c71b | 757 | || defined(__sparc__) || defined(__mips__) \ |
739d875d | 758 | || defined(__powerpc__) |
e07e232c DB |
759 | address_space = 128; |
760 | #else | |
761 | #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. | |
762 | address_space = 128; | |
763 | #endif | |
c8fc40cd DB |
764 | if (can_bank2 && ports->end > (ports->start + 1)) |
765 | address_space = 256; | |
e07e232c | 766 | |
87ac84f4 DB |
767 | /* For ACPI systems extension info comes from the FADT. On others, |
768 | * board specific setup provides it as appropriate. Systems where | |
769 | * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and | |
770 | * some almost-clones) can provide hooks to make that behave. | |
e07e232c DB |
771 | * |
772 | * Note that ACPI doesn't preclude putting these registers into | |
773 | * "extended" areas of the chip, including some that we won't yet | |
774 | * expect CMOS_READ and friends to handle. | |
7be2c7c9 DB |
775 | */ |
776 | if (info) { | |
31632dbd MR |
777 | if (info->flags) |
778 | flags = info->flags; | |
779 | if (info->address_space) | |
780 | address_space = info->address_space; | |
781 | ||
e07e232c DB |
782 | if (info->rtc_day_alarm && info->rtc_day_alarm < 128) |
783 | cmos_rtc.day_alrm = info->rtc_day_alarm; | |
784 | if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) | |
785 | cmos_rtc.mon_alrm = info->rtc_mon_alarm; | |
786 | if (info->rtc_century && info->rtc_century < 128) | |
787 | cmos_rtc.century = info->rtc_century; | |
87ac84f4 DB |
788 | |
789 | if (info->wake_on && info->wake_off) { | |
790 | cmos_rtc.wake_on = info->wake_on; | |
791 | cmos_rtc.wake_off = info->wake_off; | |
792 | } | |
7be2c7c9 DB |
793 | } |
794 | ||
6ba8bcd4 DC |
795 | cmos_rtc.dev = dev; |
796 | dev_set_drvdata(dev, &cmos_rtc); | |
797 | ||
53d29e0a | 798 | cmos_rtc.rtc = devm_rtc_allocate_device(dev); |
05440dfc DB |
799 | if (IS_ERR(cmos_rtc.rtc)) { |
800 | retval = PTR_ERR(cmos_rtc.rtc); | |
801 | goto cleanup0; | |
802 | } | |
7be2c7c9 | 803 | |
d4afc76c | 804 | rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); |
7be2c7c9 DB |
805 | |
806 | spin_lock_irq(&rtc_lock); | |
807 | ||
31632dbd MR |
808 | if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) { |
809 | /* force periodic irq to CMOS reset default of 1024Hz; | |
810 | * | |
811 | * REVISIT it's been reported that at least one x86_64 ALI | |
812 | * mobo doesn't use 32KHz here ... for portability we might | |
813 | * need to do something about other clock frequencies. | |
814 | */ | |
815 | cmos_rtc.rtc->irq_freq = 1024; | |
311ee9c1 ZR |
816 | if (use_hpet_alarm()) |
817 | hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); | |
31632dbd MR |
818 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); |
819 | } | |
7be2c7c9 | 820 | |
7e2a31da | 821 | /* disable irqs */ |
31632dbd MR |
822 | if (is_valid_irq(rtc_irq)) |
823 | cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); | |
35d3fdd5 | 824 | |
7e2a31da | 825 | rtc_control = CMOS_READ(RTC_CONTROL); |
7be2c7c9 DB |
826 | |
827 | spin_unlock_irq(&rtc_lock); | |
828 | ||
5e8599d2 | 829 | if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { |
3804a89b | 830 | dev_warn(dev, "only 24-hr supported\n"); |
7be2c7c9 DB |
831 | retval = -ENXIO; |
832 | goto cleanup1; | |
833 | } | |
834 | ||
311ee9c1 ZR |
835 | if (use_hpet_alarm()) |
836 | hpet_rtc_timer_init(); | |
970fc7f4 | 837 | |
9d8af78b BW |
838 | if (is_valid_irq(rtc_irq)) { |
839 | irq_handler_t rtc_cmos_int_handler; | |
840 | ||
311ee9c1 | 841 | if (use_hpet_alarm()) { |
9d8af78b | 842 | rtc_cmos_int_handler = hpet_rtc_interrupt; |
24b34472 AM |
843 | retval = hpet_register_irq_handler(cmos_interrupt); |
844 | if (retval) { | |
970fc7f4 | 845 | hpet_mask_rtc_irq_bit(RTC_IRQMASK); |
ee443357 | 846 | dev_warn(dev, "hpet_register_irq_handler " |
9d8af78b BW |
847 | " failed in rtc_init()."); |
848 | goto cleanup1; | |
849 | } | |
850 | } else | |
851 | rtc_cmos_int_handler = cmos_interrupt; | |
852 | ||
853 | retval = request_irq(rtc_irq, rtc_cmos_int_handler, | |
b6da197a | 854 | 0, dev_name(&cmos_rtc.rtc->dev), |
ab6a2d70 | 855 | cmos_rtc.rtc); |
9d8af78b BW |
856 | if (retval < 0) { |
857 | dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); | |
858 | goto cleanup1; | |
859 | } | |
fbb974ba HG |
860 | |
861 | cmos_rtc.rtc->ops = &cmos_rtc_ops; | |
862 | } else { | |
863 | cmos_rtc.rtc->ops = &cmos_rtc_ops_no_alarm; | |
7be2c7c9 DB |
864 | } |
865 | ||
fdcfd854 | 866 | retval = devm_rtc_register_device(cmos_rtc.rtc); |
53d29e0a | 867 | if (retval) |
e07e232c | 868 | goto cleanup2; |
7be2c7c9 | 869 | |
b0ecd8e8 | 870 | /* Set the sync offset for the periodic 11min update correct */ |
69eca258 | 871 | cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2; |
b0ecd8e8 | 872 | |
8b5b7958 AB |
873 | /* export at least the first block of NVRAM */ |
874 | nvmem_cfg.size = address_space - NVRAM_OFFSET; | |
6746bc09 | 875 | devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg); |
8b5b7958 AB |
876 | |
877 | dev_info(dev, "%s%s, %d bytes nvram%s\n", | |
878 | !is_valid_irq(rtc_irq) ? "no alarms" : | |
879 | cmos_rtc.mon_alrm ? "alarms up to one year" : | |
880 | cmos_rtc.day_alrm ? "alarms up to one month" : | |
881 | "alarms up to one day", | |
882 | cmos_rtc.century ? ", y3k" : "", | |
883 | nvmem_cfg.size, | |
311ee9c1 | 884 | use_hpet_alarm() ? ", hpet irqs" : ""); |
7be2c7c9 DB |
885 | |
886 | return 0; | |
887 | ||
e07e232c DB |
888 | cleanup2: |
889 | if (is_valid_irq(rtc_irq)) | |
890 | free_irq(rtc_irq, cmos_rtc.rtc); | |
7be2c7c9 | 891 | cleanup1: |
05440dfc | 892 | cmos_rtc.dev = NULL; |
05440dfc | 893 | cleanup0: |
31632dbd MR |
894 | if (RTC_IOMAPPED) |
895 | release_region(ports->start, resource_size(ports)); | |
896 | else | |
897 | release_mem_region(ports->start, resource_size(ports)); | |
7be2c7c9 DB |
898 | return retval; |
899 | } | |
900 | ||
31632dbd | 901 | static void cmos_do_shutdown(int rtc_irq) |
7be2c7c9 | 902 | { |
7be2c7c9 | 903 | spin_lock_irq(&rtc_lock); |
31632dbd MR |
904 | if (is_valid_irq(rtc_irq)) |
905 | cmos_irq_disable(&cmos_rtc, RTC_IRQMASK); | |
7be2c7c9 DB |
906 | spin_unlock_irq(&rtc_lock); |
907 | } | |
908 | ||
a3a0673b | 909 | static void cmos_do_remove(struct device *dev) |
7be2c7c9 DB |
910 | { |
911 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
05440dfc | 912 | struct resource *ports; |
7be2c7c9 | 913 | |
31632dbd | 914 | cmos_do_shutdown(cmos->irq); |
7be2c7c9 | 915 | |
9d8af78b | 916 | if (is_valid_irq(cmos->irq)) { |
05440dfc | 917 | free_irq(cmos->irq, cmos->rtc); |
311ee9c1 ZR |
918 | if (use_hpet_alarm()) |
919 | hpet_unregister_irq_handler(cmos_interrupt); | |
9d8af78b | 920 | } |
7be2c7c9 | 921 | |
05440dfc | 922 | cmos->rtc = NULL; |
7be2c7c9 | 923 | |
05440dfc | 924 | ports = cmos->iomem; |
31632dbd MR |
925 | if (RTC_IOMAPPED) |
926 | release_region(ports->start, resource_size(ports)); | |
927 | else | |
928 | release_mem_region(ports->start, resource_size(ports)); | |
05440dfc DB |
929 | cmos->iomem = NULL; |
930 | ||
931 | cmos->dev = NULL; | |
7be2c7c9 DB |
932 | } |
933 | ||
88b8d33b AH |
934 | static int cmos_aie_poweroff(struct device *dev) |
935 | { | |
936 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
937 | struct rtc_time now; | |
938 | time64_t t_now; | |
939 | int retval = 0; | |
940 | unsigned char rtc_control; | |
941 | ||
942 | if (!cmos->alarm_expires) | |
943 | return -EINVAL; | |
944 | ||
945 | spin_lock_irq(&rtc_lock); | |
946 | rtc_control = CMOS_READ(RTC_CONTROL); | |
947 | spin_unlock_irq(&rtc_lock); | |
948 | ||
949 | /* We only care about the situation where AIE is disabled. */ | |
950 | if (rtc_control & RTC_AIE) | |
951 | return -EBUSY; | |
952 | ||
953 | cmos_read_time(dev, &now); | |
954 | t_now = rtc_tm_to_time64(&now); | |
955 | ||
956 | /* | |
957 | * When enabling "RTC wake-up" in BIOS setup, the machine reboots | |
958 | * automatically right after shutdown on some buggy boxes. | |
959 | * This automatic rebooting issue won't happen when the alarm | |
960 | * time is larger than now+1 seconds. | |
961 | * | |
962 | * If the alarm time is equal to now+1 seconds, the issue can be | |
963 | * prevented by cancelling the alarm. | |
964 | */ | |
965 | if (cmos->alarm_expires == t_now + 1) { | |
966 | struct rtc_wkalrm alarm; | |
967 | ||
968 | /* Cancel the AIE timer by configuring the past time. */ | |
969 | rtc_time64_to_tm(t_now - 1, &alarm.time); | |
970 | alarm.enabled = 0; | |
971 | retval = cmos_set_alarm(dev, &alarm); | |
972 | } else if (cmos->alarm_expires > t_now + 1) { | |
973 | retval = -EBUSY; | |
974 | } | |
975 | ||
976 | return retval; | |
977 | } | |
978 | ||
2fb08e6c | 979 | static int cmos_suspend(struct device *dev) |
7be2c7c9 DB |
980 | { |
981 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
bcd9b89c | 982 | unsigned char tmp; |
7be2c7c9 DB |
983 | |
984 | /* only the alarm might be a wakeup event source */ | |
985 | spin_lock_irq(&rtc_lock); | |
986 | cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); | |
987 | if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { | |
35d3fdd5 | 988 | unsigned char mask; |
bcd9b89c | 989 | |
74c4633d | 990 | if (device_may_wakeup(dev)) |
35d3fdd5 | 991 | mask = RTC_IRQMASK & ~RTC_AIE; |
7be2c7c9 | 992 | else |
35d3fdd5 DB |
993 | mask = RTC_IRQMASK; |
994 | tmp &= ~mask; | |
7be2c7c9 | 995 | CMOS_WRITE(tmp, RTC_CONTROL); |
311ee9c1 ZR |
996 | if (use_hpet_alarm()) |
997 | hpet_mask_rtc_irq_bit(mask); | |
7e2a31da | 998 | cmos_checkintr(cmos, tmp); |
bcd9b89c | 999 | } |
7be2c7c9 DB |
1000 | spin_unlock_irq(&rtc_lock); |
1001 | ||
bc51098c | 1002 | if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) { |
87ac84f4 DB |
1003 | cmos->enabled_wake = 1; |
1004 | if (cmos->wake_on) | |
1005 | cmos->wake_on(dev); | |
1006 | else | |
1007 | enable_irq_wake(cmos->irq); | |
1008 | } | |
7be2c7c9 | 1009 | |
c254bcd7 | 1010 | memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm)); |
68669d55 GM |
1011 | cmos_read_alarm(dev, &cmos->saved_wkalrm); |
1012 | ||
ee443357 | 1013 | dev_dbg(dev, "suspend%s, ctrl %02x\n", |
7be2c7c9 DB |
1014 | (tmp & RTC_AIE) ? ", alarm may wake" : "", |
1015 | tmp); | |
1016 | ||
1017 | return 0; | |
1018 | } | |
1019 | ||
74c4633d RW |
1020 | /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even |
1021 | * after a detour through G3 "mechanical off", although the ACPI spec | |
1022 | * says wakeup should only work from G1/S4 "hibernate". To most users, | |
1023 | * distinctions between S4 and S5 are pointless. So when the hardware | |
1024 | * allows, don't draw that distinction. | |
1025 | */ | |
1026 | static inline int cmos_poweroff(struct device *dev) | |
1027 | { | |
00f7f90c AB |
1028 | if (!IS_ENABLED(CONFIG_PM)) |
1029 | return -ENOSYS; | |
1030 | ||
2fb08e6c | 1031 | return cmos_suspend(dev); |
74c4633d RW |
1032 | } |
1033 | ||
68669d55 GM |
1034 | static void cmos_check_wkalrm(struct device *dev) |
1035 | { | |
1036 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
1037 | struct rtc_wkalrm current_alarm; | |
c6d3a278 | 1038 | time64_t t_now; |
68669d55 GM |
1039 | time64_t t_current_expires; |
1040 | time64_t t_saved_expires; | |
c6d3a278 ZR |
1041 | struct rtc_time now; |
1042 | ||
1043 | /* Check if we have RTC Alarm armed */ | |
1044 | if (!(cmos->suspend_ctrl & RTC_AIE)) | |
1045 | return; | |
1046 | ||
1047 | cmos_read_time(dev, &now); | |
1048 | t_now = rtc_tm_to_time64(&now); | |
1049 | ||
1050 | /* | |
1051 | * ACPI RTC wake event is cleared after resume from STR, | |
1052 | * ACK the rtc irq here | |
1053 | */ | |
bc51098c | 1054 | if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) { |
c6d3a278 ZR |
1055 | cmos_interrupt(0, (void *)cmos->rtc); |
1056 | return; | |
1057 | } | |
68669d55 | 1058 | |
c254bcd7 | 1059 | memset(¤t_alarm, 0, sizeof(struct rtc_wkalrm)); |
68669d55 GM |
1060 | cmos_read_alarm(dev, ¤t_alarm); |
1061 | t_current_expires = rtc_tm_to_time64(¤t_alarm.time); | |
1062 | t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time); | |
1063 | if (t_current_expires != t_saved_expires || | |
1064 | cmos->saved_wkalrm.enabled != current_alarm.enabled) { | |
1065 | cmos_set_alarm(dev, &cmos->saved_wkalrm); | |
1066 | } | |
1067 | } | |
1068 | ||
983bf125 GM |
1069 | static void cmos_check_acpi_rtc_status(struct device *dev, |
1070 | unsigned char *rtc_control); | |
1071 | ||
00f7f90c | 1072 | static int __maybe_unused cmos_resume(struct device *dev) |
7be2c7c9 DB |
1073 | { |
1074 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
998a0605 DB |
1075 | unsigned char tmp; |
1076 | ||
bc51098c | 1077 | if (cmos->enabled_wake && !cmos_use_acpi_alarm()) { |
998a0605 DB |
1078 | if (cmos->wake_off) |
1079 | cmos->wake_off(dev); | |
1080 | else | |
1081 | disable_irq_wake(cmos->irq); | |
1082 | cmos->enabled_wake = 0; | |
1083 | } | |
7be2c7c9 | 1084 | |
68669d55 GM |
1085 | /* The BIOS might have changed the alarm, restore it */ |
1086 | cmos_check_wkalrm(dev); | |
1087 | ||
998a0605 DB |
1088 | spin_lock_irq(&rtc_lock); |
1089 | tmp = cmos->suspend_ctrl; | |
1090 | cmos->suspend_ctrl = 0; | |
7be2c7c9 | 1091 | /* re-enable any irqs previously active */ |
35d3fdd5 DB |
1092 | if (tmp & RTC_IRQMASK) { |
1093 | unsigned char mask; | |
7be2c7c9 | 1094 | |
311ee9c1 | 1095 | if (device_may_wakeup(dev) && use_hpet_alarm()) |
ebf8d6c8 DB |
1096 | hpet_rtc_timer_init(); |
1097 | ||
35d3fdd5 DB |
1098 | do { |
1099 | CMOS_WRITE(tmp, RTC_CONTROL); | |
311ee9c1 ZR |
1100 | if (use_hpet_alarm()) |
1101 | hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); | |
35d3fdd5 DB |
1102 | |
1103 | mask = CMOS_READ(RTC_INTR_FLAGS); | |
1104 | mask &= (tmp & RTC_IRQMASK) | RTC_IRQF; | |
311ee9c1 | 1105 | if (!use_hpet_alarm() || !is_intr(mask)) |
35d3fdd5 DB |
1106 | break; |
1107 | ||
1108 | /* force one-shot behavior if HPET blocked | |
1109 | * the wake alarm's irq | |
1110 | */ | |
1111 | rtc_update_irq(cmos->rtc, 1, mask); | |
1112 | tmp &= ~RTC_AIE; | |
1113 | hpet_mask_rtc_irq_bit(RTC_AIE); | |
1114 | } while (mask & RTC_AIE); | |
983bf125 GM |
1115 | |
1116 | if (tmp & RTC_AIE) | |
1117 | cmos_check_acpi_rtc_status(dev, &tmp); | |
7be2c7c9 | 1118 | } |
998a0605 | 1119 | spin_unlock_irq(&rtc_lock); |
7be2c7c9 | 1120 | |
ee443357 | 1121 | dev_dbg(dev, "resume, ctrl %02x\n", tmp); |
7be2c7c9 DB |
1122 | |
1123 | return 0; | |
1124 | } | |
1125 | ||
b5ada460 MW |
1126 | static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume); |
1127 | ||
7be2c7c9 DB |
1128 | /*----------------------------------------------------------------*/ |
1129 | ||
e07e232c DB |
1130 | /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. |
1131 | * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs | |
1132 | * probably list them in similar PNPBIOS tables; so PNP is more common. | |
1133 | * | |
1134 | * We don't use legacy "poke at the hardware" probing. Ancient PCs that | |
1135 | * predate even PNPBIOS should set up platform_bus devices. | |
7be2c7c9 DB |
1136 | */ |
1137 | ||
a474aaed BH |
1138 | #ifdef CONFIG_ACPI |
1139 | ||
1140 | #include <linux/acpi.h> | |
1141 | ||
a474aaed BH |
1142 | static u32 rtc_handler(void *context) |
1143 | { | |
b2201e54 | 1144 | struct device *dev = context; |
983bf125 GM |
1145 | struct cmos_rtc *cmos = dev_get_drvdata(dev); |
1146 | unsigned char rtc_control = 0; | |
1147 | unsigned char rtc_intr; | |
368e21ae | 1148 | unsigned long flags; |
983bf125 | 1149 | |
311ee9c1 ZR |
1150 | |
1151 | /* | |
1152 | * Always update rtc irq when ACPI is used as RTC Alarm. | |
1153 | * Or else, ACPI SCI is enabled during suspend/resume only, | |
1154 | * update rtc irq in that case. | |
1155 | */ | |
bc51098c | 1156 | if (cmos_use_acpi_alarm()) |
311ee9c1 ZR |
1157 | cmos_interrupt(0, (void *)cmos->rtc); |
1158 | else { | |
1159 | /* Fix me: can we use cmos_interrupt() here as well? */ | |
1160 | spin_lock_irqsave(&rtc_lock, flags); | |
1161 | if (cmos_rtc.suspend_ctrl) | |
1162 | rtc_control = CMOS_READ(RTC_CONTROL); | |
1163 | if (rtc_control & RTC_AIE) { | |
1164 | cmos_rtc.suspend_ctrl &= ~RTC_AIE; | |
1165 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
1166 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); | |
1167 | rtc_update_irq(cmos->rtc, 1, rtc_intr); | |
1168 | } | |
1169 | spin_unlock_irqrestore(&rtc_lock, flags); | |
983bf125 | 1170 | } |
b2201e54 | 1171 | |
967b08c2 | 1172 | pm_wakeup_hard_event(dev); |
a474aaed BH |
1173 | acpi_clear_event(ACPI_EVENT_RTC); |
1174 | acpi_disable_event(ACPI_EVENT_RTC, 0); | |
1175 | return ACPI_INTERRUPT_HANDLED; | |
1176 | } | |
1177 | ||
b2201e54 | 1178 | static inline void rtc_wake_setup(struct device *dev) |
a474aaed | 1179 | { |
b2201e54 | 1180 | acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev); |
a474aaed BH |
1181 | /* |
1182 | * After the RTC handler is installed, the Fixed_RTC event should | |
1183 | * be disabled. Only when the RTC alarm is set will it be enabled. | |
1184 | */ | |
1185 | acpi_clear_event(ACPI_EVENT_RTC); | |
1186 | acpi_disable_event(ACPI_EVENT_RTC, 0); | |
1187 | } | |
1188 | ||
1189 | static void rtc_wake_on(struct device *dev) | |
1190 | { | |
1191 | acpi_clear_event(ACPI_EVENT_RTC); | |
1192 | acpi_enable_event(ACPI_EVENT_RTC, 0); | |
1193 | } | |
1194 | ||
1195 | static void rtc_wake_off(struct device *dev) | |
1196 | { | |
1197 | acpi_disable_event(ACPI_EVENT_RTC, 0); | |
1198 | } | |
a474aaed | 1199 | |
36d91a4d ZR |
1200 | #ifdef CONFIG_X86 |
1201 | /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */ | |
1202 | static void use_acpi_alarm_quirks(void) | |
1203 | { | |
36d91a4d ZR |
1204 | if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) |
1205 | return; | |
1206 | ||
1207 | if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)) | |
1208 | return; | |
1209 | ||
1210 | if (!is_hpet_enabled()) | |
1211 | return; | |
1212 | ||
604c5212 AS |
1213 | if (dmi_get_bios_year() < 2015) |
1214 | return; | |
1215 | ||
1216 | use_acpi_alarm = true; | |
36d91a4d ZR |
1217 | } |
1218 | #else | |
1219 | static inline void use_acpi_alarm_quirks(void) { } | |
1220 | #endif | |
1221 | ||
a474aaed BH |
1222 | /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find |
1223 | * its device node and pass extra config data. This helps its driver use | |
1224 | * capabilities that the now-obsolete mc146818 didn't have, and informs it | |
1225 | * that this board's RTC is wakeup-capable (per ACPI spec). | |
1226 | */ | |
1227 | static struct cmos_rtc_board_info acpi_rtc_info; | |
1228 | ||
5a167f45 | 1229 | static void cmos_wake_setup(struct device *dev) |
a474aaed BH |
1230 | { |
1231 | if (acpi_disabled) | |
1232 | return; | |
1233 | ||
36d91a4d ZR |
1234 | use_acpi_alarm_quirks(); |
1235 | ||
b2201e54 | 1236 | rtc_wake_setup(dev); |
a474aaed BH |
1237 | acpi_rtc_info.wake_on = rtc_wake_on; |
1238 | acpi_rtc_info.wake_off = rtc_wake_off; | |
1239 | ||
1240 | /* workaround bug in some ACPI tables */ | |
1241 | if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { | |
1242 | dev_dbg(dev, "bogus FADT month_alarm (%d)\n", | |
1243 | acpi_gbl_FADT.month_alarm); | |
1244 | acpi_gbl_FADT.month_alarm = 0; | |
1245 | } | |
1246 | ||
1247 | acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm; | |
1248 | acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm; | |
1249 | acpi_rtc_info.rtc_century = acpi_gbl_FADT.century; | |
1250 | ||
1251 | /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */ | |
1252 | if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) | |
1253 | dev_info(dev, "RTC can wake from S4\n"); | |
1254 | ||
1255 | dev->platform_data = &acpi_rtc_info; | |
1256 | ||
1257 | /* RTC always wakes from S1/S2/S3, and often S4/STD */ | |
1258 | device_init_wakeup(dev, 1); | |
1259 | } | |
1260 | ||
983bf125 GM |
1261 | static void cmos_check_acpi_rtc_status(struct device *dev, |
1262 | unsigned char *rtc_control) | |
1263 | { | |
1264 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
1265 | acpi_event_status rtc_status; | |
1266 | acpi_status status; | |
1267 | ||
1268 | if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC) | |
1269 | return; | |
1270 | ||
1271 | status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status); | |
1272 | if (ACPI_FAILURE(status)) { | |
1273 | dev_err(dev, "Could not get RTC status\n"); | |
1274 | } else if (rtc_status & ACPI_EVENT_FLAG_SET) { | |
1275 | unsigned char mask; | |
1276 | *rtc_control &= ~RTC_AIE; | |
1277 | CMOS_WRITE(*rtc_control, RTC_CONTROL); | |
1278 | mask = CMOS_READ(RTC_INTR_FLAGS); | |
1279 | rtc_update_irq(cmos->rtc, 1, mask); | |
1280 | } | |
1281 | } | |
1282 | ||
a474aaed BH |
1283 | #else |
1284 | ||
5a167f45 | 1285 | static void cmos_wake_setup(struct device *dev) |
a474aaed BH |
1286 | { |
1287 | } | |
1288 | ||
983bf125 GM |
1289 | static void cmos_check_acpi_rtc_status(struct device *dev, |
1290 | unsigned char *rtc_control) | |
1291 | { | |
1292 | } | |
1293 | ||
a474aaed BH |
1294 | #endif |
1295 | ||
41ac8df9 | 1296 | #ifdef CONFIG_PNP |
7be2c7c9 DB |
1297 | |
1298 | #include <linux/pnp.h> | |
1299 | ||
5a167f45 | 1300 | static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) |
7be2c7c9 | 1301 | { |
a474aaed BH |
1302 | cmos_wake_setup(&pnp->dev); |
1303 | ||
a1e23a42 HG |
1304 | if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) { |
1305 | unsigned int irq = 0; | |
1306 | #ifdef CONFIG_X86 | |
6cd8fa87 MG |
1307 | /* Some machines contain a PNP entry for the RTC, but |
1308 | * don't define the IRQ. It should always be safe to | |
a1e23a42 | 1309 | * hardcode it on systems with a legacy PIC. |
6cd8fa87 | 1310 | */ |
a1e23a42 | 1311 | if (nr_legacy_irqs()) |
5848ad2f | 1312 | irq = RTC_IRQ; |
a1e23a42 | 1313 | #endif |
8766ad0c | 1314 | return cmos_do_probe(&pnp->dev, |
a1e23a42 HG |
1315 | pnp_get_resource(pnp, IORESOURCE_IO, 0), irq); |
1316 | } else { | |
6cd8fa87 | 1317 | return cmos_do_probe(&pnp->dev, |
8766ad0c BH |
1318 | pnp_get_resource(pnp, IORESOURCE_IO, 0), |
1319 | pnp_irq(pnp, 0)); | |
a1e23a42 | 1320 | } |
7be2c7c9 DB |
1321 | } |
1322 | ||
a3a0673b | 1323 | static void cmos_pnp_remove(struct pnp_dev *pnp) |
7be2c7c9 DB |
1324 | { |
1325 | cmos_do_remove(&pnp->dev); | |
1326 | } | |
1327 | ||
004731b2 | 1328 | static void cmos_pnp_shutdown(struct pnp_dev *pnp) |
74c4633d | 1329 | { |
31632dbd MR |
1330 | struct device *dev = &pnp->dev; |
1331 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
1332 | ||
88b8d33b AH |
1333 | if (system_state == SYSTEM_POWER_OFF) { |
1334 | int retval = cmos_poweroff(dev); | |
1335 | ||
1336 | if (cmos_aie_poweroff(dev) < 0 && !retval) | |
1337 | return; | |
1338 | } | |
74c4633d | 1339 | |
31632dbd | 1340 | cmos_do_shutdown(cmos->irq); |
74c4633d | 1341 | } |
7be2c7c9 DB |
1342 | |
1343 | static const struct pnp_device_id rtc_ids[] = { | |
1344 | { .id = "PNP0b00", }, | |
1345 | { .id = "PNP0b01", }, | |
1346 | { .id = "PNP0b02", }, | |
1347 | { }, | |
1348 | }; | |
1349 | MODULE_DEVICE_TABLE(pnp, rtc_ids); | |
1350 | ||
1351 | static struct pnp_driver cmos_pnp_driver = { | |
8d4e59ec | 1352 | .name = driver_name, |
7be2c7c9 DB |
1353 | .id_table = rtc_ids, |
1354 | .probe = cmos_pnp_probe, | |
a3a0673b | 1355 | .remove = cmos_pnp_remove, |
004731b2 | 1356 | .shutdown = cmos_pnp_shutdown, |
7be2c7c9 DB |
1357 | |
1358 | /* flag ensures resume() gets called, and stops syslog spam */ | |
1359 | .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, | |
a8a3808b SK |
1360 | .driver = { |
1361 | .pm = &cmos_pm_ops, | |
1362 | }, | |
7be2c7c9 DB |
1363 | }; |
1364 | ||
1da2e3d6 | 1365 | #endif /* CONFIG_PNP */ |
7be2c7c9 | 1366 | |
3bcbaf6e SAS |
1367 | #ifdef CONFIG_OF |
1368 | static const struct of_device_id of_cmos_match[] = { | |
1369 | { | |
1370 | .compatible = "motorola,mc146818", | |
1371 | }, | |
1372 | { }, | |
1373 | }; | |
1374 | MODULE_DEVICE_TABLE(of, of_cmos_match); | |
1375 | ||
1376 | static __init void cmos_of_init(struct platform_device *pdev) | |
1377 | { | |
1378 | struct device_node *node = pdev->dev.of_node; | |
3bcbaf6e SAS |
1379 | const __be32 *val; |
1380 | ||
1381 | if (!node) | |
1382 | return; | |
1383 | ||
1384 | val = of_get_property(node, "ctrl-reg", NULL); | |
1385 | if (val) | |
1386 | CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL); | |
1387 | ||
1388 | val = of_get_property(node, "freq-reg", NULL); | |
1389 | if (val) | |
1390 | CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT); | |
3bcbaf6e SAS |
1391 | } |
1392 | #else | |
1393 | static inline void cmos_of_init(struct platform_device *pdev) {} | |
3bcbaf6e | 1394 | #endif |
7be2c7c9 DB |
1395 | /*----------------------------------------------------------------*/ |
1396 | ||
41ac8df9 | 1397 | /* Platform setup should have set up an RTC device, when PNP is |
bcd9b89c | 1398 | * unavailable ... this could happen even on (older) PCs. |
7be2c7c9 DB |
1399 | */ |
1400 | ||
1401 | static int __init cmos_platform_probe(struct platform_device *pdev) | |
1402 | { | |
31632dbd MR |
1403 | struct resource *resource; |
1404 | int irq; | |
1405 | ||
3bcbaf6e | 1406 | cmos_of_init(pdev); |
a474aaed | 1407 | cmos_wake_setup(&pdev->dev); |
31632dbd MR |
1408 | |
1409 | if (RTC_IOMAPPED) | |
1410 | resource = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
1411 | else | |
1412 | resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1413 | irq = platform_get_irq(pdev, 0); | |
1414 | if (irq < 0) | |
1415 | irq = -1; | |
1416 | ||
1417 | return cmos_do_probe(&pdev->dev, resource, irq); | |
7be2c7c9 DB |
1418 | } |
1419 | ||
a3a0673b | 1420 | static int cmos_platform_remove(struct platform_device *pdev) |
7be2c7c9 DB |
1421 | { |
1422 | cmos_do_remove(&pdev->dev); | |
1423 | return 0; | |
1424 | } | |
1425 | ||
1426 | static void cmos_platform_shutdown(struct platform_device *pdev) | |
1427 | { | |
31632dbd MR |
1428 | struct device *dev = &pdev->dev; |
1429 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
1430 | ||
88b8d33b AH |
1431 | if (system_state == SYSTEM_POWER_OFF) { |
1432 | int retval = cmos_poweroff(dev); | |
1433 | ||
1434 | if (cmos_aie_poweroff(dev) < 0 && !retval) | |
1435 | return; | |
1436 | } | |
74c4633d | 1437 | |
31632dbd | 1438 | cmos_do_shutdown(cmos->irq); |
7be2c7c9 DB |
1439 | } |
1440 | ||
ad28a07b KS |
1441 | /* work with hotplug and coldplug */ |
1442 | MODULE_ALIAS("platform:rtc_cmos"); | |
1443 | ||
7be2c7c9 | 1444 | static struct platform_driver cmos_platform_driver = { |
a3a0673b | 1445 | .remove = cmos_platform_remove, |
7be2c7c9 DB |
1446 | .shutdown = cmos_platform_shutdown, |
1447 | .driver = { | |
c823a202 | 1448 | .name = driver_name, |
2fb08e6c | 1449 | .pm = &cmos_pm_ops, |
c8a6046e | 1450 | .of_match_table = of_match_ptr(of_cmos_match), |
7be2c7c9 DB |
1451 | } |
1452 | }; | |
1453 | ||
65909814 TLSC |
1454 | #ifdef CONFIG_PNP |
1455 | static bool pnp_driver_registered; | |
1456 | #endif | |
1457 | static bool platform_driver_registered; | |
1458 | ||
7be2c7c9 DB |
1459 | static int __init cmos_init(void) |
1460 | { | |
72f22b1e BH |
1461 | int retval = 0; |
1462 | ||
1da2e3d6 | 1463 | #ifdef CONFIG_PNP |
65909814 TLSC |
1464 | retval = pnp_register_driver(&cmos_pnp_driver); |
1465 | if (retval == 0) | |
1466 | pnp_driver_registered = true; | |
72f22b1e BH |
1467 | #endif |
1468 | ||
65909814 | 1469 | if (!cmos_rtc.dev) { |
72f22b1e BH |
1470 | retval = platform_driver_probe(&cmos_platform_driver, |
1471 | cmos_platform_probe); | |
65909814 TLSC |
1472 | if (retval == 0) |
1473 | platform_driver_registered = true; | |
1474 | } | |
72f22b1e BH |
1475 | |
1476 | if (retval == 0) | |
1477 | return 0; | |
1478 | ||
1479 | #ifdef CONFIG_PNP | |
65909814 TLSC |
1480 | if (pnp_driver_registered) |
1481 | pnp_unregister_driver(&cmos_pnp_driver); | |
72f22b1e BH |
1482 | #endif |
1483 | return retval; | |
7be2c7c9 DB |
1484 | } |
1485 | module_init(cmos_init); | |
1486 | ||
1487 | static void __exit cmos_exit(void) | |
1488 | { | |
1da2e3d6 | 1489 | #ifdef CONFIG_PNP |
65909814 TLSC |
1490 | if (pnp_driver_registered) |
1491 | pnp_unregister_driver(&cmos_pnp_driver); | |
72f22b1e | 1492 | #endif |
65909814 TLSC |
1493 | if (platform_driver_registered) |
1494 | platform_driver_unregister(&cmos_platform_driver); | |
7be2c7c9 DB |
1495 | } |
1496 | module_exit(cmos_exit); | |
1497 | ||
1498 | ||
7be2c7c9 DB |
1499 | MODULE_AUTHOR("David Brownell"); |
1500 | MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); | |
1501 | MODULE_LICENSE("GPL"); |