Commit | Line | Data |
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7be2c7c9 DB |
1 | /* |
2 | * RTC class driver for "CMOS RTC": PCs, ACPI, etc | |
3 | * | |
4 | * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) | |
5 | * Copyright (C) 2006 David Brownell (convert to new framework) | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | /* | |
14 | * The original "cmos clock" chip was an MC146818 chip, now obsolete. | |
15 | * That defined the register interface now provided by all PCs, some | |
16 | * non-PC systems, and incorporated into ACPI. Modern PC chipsets | |
17 | * integrate an MC146818 clone in their southbridge, and boards use | |
18 | * that instead of discrete clones like the DS12887 or M48T86. There | |
19 | * are also clones that connect using the LPC bus. | |
20 | * | |
21 | * That register API is also used directly by various other drivers | |
22 | * (notably for integrated NVRAM), infrastructure (x86 has code to | |
23 | * bypass the RTC framework, directly reading the RTC during boot | |
24 | * and updating minutes/seconds for systems using NTP synch) and | |
25 | * utilities (like userspace 'hwclock', if no /dev node exists). | |
26 | * | |
27 | * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with | |
28 | * interrupts disabled, holding the global rtc_lock, to exclude those | |
29 | * other drivers and utilities on correctly configured systems. | |
30 | */ | |
a737e835 JP |
31 | |
32 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
33 | ||
7be2c7c9 DB |
34 | #include <linux/kernel.h> |
35 | #include <linux/module.h> | |
36 | #include <linux/init.h> | |
37 | #include <linux/interrupt.h> | |
38 | #include <linux/spinlock.h> | |
39 | #include <linux/platform_device.h> | |
5d2a5037 | 40 | #include <linux/log2.h> |
2fb08e6c | 41 | #include <linux/pm.h> |
3bcbaf6e SAS |
42 | #include <linux/of.h> |
43 | #include <linux/of_platform.h> | |
a1e23a42 HG |
44 | #ifdef CONFIG_X86 |
45 | #include <asm/i8259.h> | |
46 | #endif | |
7be2c7c9 DB |
47 | |
48 | /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ | |
5ab788d7 | 49 | #include <linux/mc146818rtc.h> |
7be2c7c9 | 50 | |
7be2c7c9 DB |
51 | struct cmos_rtc { |
52 | struct rtc_device *rtc; | |
53 | struct device *dev; | |
54 | int irq; | |
55 | struct resource *iomem; | |
88b8d33b | 56 | time64_t alarm_expires; |
7be2c7c9 | 57 | |
87ac84f4 DB |
58 | void (*wake_on)(struct device *); |
59 | void (*wake_off)(struct device *); | |
60 | ||
61 | u8 enabled_wake; | |
7be2c7c9 DB |
62 | u8 suspend_ctrl; |
63 | ||
64 | /* newer hardware extends the original register set */ | |
65 | u8 day_alrm; | |
66 | u8 mon_alrm; | |
67 | u8 century; | |
68669d55 GM |
68 | |
69 | struct rtc_wkalrm saved_wkalrm; | |
7be2c7c9 DB |
70 | }; |
71 | ||
72 | /* both platform and pnp busses use negative numbers for invalid irqs */ | |
2fac6674 | 73 | #define is_valid_irq(n) ((n) > 0) |
7be2c7c9 DB |
74 | |
75 | static const char driver_name[] = "rtc_cmos"; | |
76 | ||
bcd9b89c DB |
77 | /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; |
78 | * always mask it against the irq enable bits in RTC_CONTROL. Bit values | |
79 | * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. | |
80 | */ | |
81 | #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) | |
82 | ||
83 | static inline int is_intr(u8 rtc_intr) | |
84 | { | |
85 | if (!(rtc_intr & RTC_IRQF)) | |
86 | return 0; | |
87 | return rtc_intr & RTC_IRQMASK; | |
88 | } | |
89 | ||
7be2c7c9 DB |
90 | /*----------------------------------------------------------------*/ |
91 | ||
35d3fdd5 DB |
92 | /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because |
93 | * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly | |
94 | * used in a broken "legacy replacement" mode. The breakage includes | |
95 | * HPET #1 hijacking the IRQ for this RTC, and being unavailable for | |
96 | * other (better) use. | |
97 | * | |
98 | * When that broken mode is in use, platform glue provides a partial | |
99 | * emulation of hardware RTC IRQ facilities using HPET #1. We don't | |
100 | * want to use HPET for anything except those IRQs though... | |
101 | */ | |
102 | #ifdef CONFIG_HPET_EMULATE_RTC | |
103 | #include <asm/hpet.h> | |
104 | #else | |
105 | ||
106 | static inline int is_hpet_enabled(void) | |
107 | { | |
108 | return 0; | |
109 | } | |
110 | ||
111 | static inline int hpet_mask_rtc_irq_bit(unsigned long mask) | |
112 | { | |
113 | return 0; | |
114 | } | |
115 | ||
116 | static inline int hpet_set_rtc_irq_bit(unsigned long mask) | |
117 | { | |
118 | return 0; | |
119 | } | |
120 | ||
121 | static inline int | |
122 | hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) | |
123 | { | |
124 | return 0; | |
125 | } | |
126 | ||
127 | static inline int hpet_set_periodic_freq(unsigned long freq) | |
128 | { | |
129 | return 0; | |
130 | } | |
131 | ||
132 | static inline int hpet_rtc_dropped_irq(void) | |
133 | { | |
134 | return 0; | |
135 | } | |
136 | ||
137 | static inline int hpet_rtc_timer_init(void) | |
138 | { | |
139 | return 0; | |
140 | } | |
141 | ||
142 | extern irq_handler_t hpet_rtc_interrupt; | |
143 | ||
144 | static inline int hpet_register_irq_handler(irq_handler_t handler) | |
145 | { | |
146 | return 0; | |
147 | } | |
148 | ||
149 | static inline int hpet_unregister_irq_handler(irq_handler_t handler) | |
150 | { | |
151 | return 0; | |
152 | } | |
153 | ||
154 | #endif | |
155 | ||
156 | /*----------------------------------------------------------------*/ | |
157 | ||
c8fc40cd DB |
158 | #ifdef RTC_PORT |
159 | ||
160 | /* Most newer x86 systems have two register banks, the first used | |
161 | * for RTC and NVRAM and the second only for NVRAM. Caller must | |
162 | * own rtc_lock ... and we won't worry about access during NMI. | |
163 | */ | |
164 | #define can_bank2 true | |
165 | ||
166 | static inline unsigned char cmos_read_bank2(unsigned char addr) | |
167 | { | |
168 | outb(addr, RTC_PORT(2)); | |
169 | return inb(RTC_PORT(3)); | |
170 | } | |
171 | ||
172 | static inline void cmos_write_bank2(unsigned char val, unsigned char addr) | |
173 | { | |
174 | outb(addr, RTC_PORT(2)); | |
b43c1ea4 | 175 | outb(val, RTC_PORT(3)); |
c8fc40cd DB |
176 | } |
177 | ||
178 | #else | |
179 | ||
180 | #define can_bank2 false | |
181 | ||
182 | static inline unsigned char cmos_read_bank2(unsigned char addr) | |
183 | { | |
184 | return 0; | |
185 | } | |
186 | ||
187 | static inline void cmos_write_bank2(unsigned char val, unsigned char addr) | |
188 | { | |
189 | } | |
190 | ||
191 | #endif | |
192 | ||
193 | /*----------------------------------------------------------------*/ | |
194 | ||
7be2c7c9 DB |
195 | static int cmos_read_time(struct device *dev, struct rtc_time *t) |
196 | { | |
ba58d102 CY |
197 | /* |
198 | * If pm_trace abused the RTC for storage, set the timespec to 0, | |
199 | * which tells the caller that this RTC value is unusable. | |
200 | */ | |
201 | if (!pm_trace_rtc_valid()) | |
202 | return -EIO; | |
203 | ||
7be2c7c9 | 204 | /* REVISIT: if the clock has a "century" register, use |
5ab788d7 | 205 | * that instead of the heuristic in mc146818_get_time(). |
7be2c7c9 DB |
206 | * That'll make Y3K compatility (year > 2070) easy! |
207 | */ | |
5ab788d7 | 208 | mc146818_get_time(t); |
7be2c7c9 DB |
209 | return 0; |
210 | } | |
211 | ||
212 | static int cmos_set_time(struct device *dev, struct rtc_time *t) | |
213 | { | |
214 | /* REVISIT: set the "century" register if available | |
215 | * | |
216 | * NOTE: this ignores the issue whereby updating the seconds | |
217 | * takes effect exactly 500ms after we write the register. | |
218 | * (Also queueing and other delays before we get this far.) | |
219 | */ | |
5ab788d7 | 220 | return mc146818_set_time(t); |
7be2c7c9 DB |
221 | } |
222 | ||
223 | static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |
224 | { | |
225 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
226 | unsigned char rtc_control; | |
227 | ||
228 | if (!is_valid_irq(cmos->irq)) | |
229 | return -EIO; | |
230 | ||
231 | /* Basic alarms only support hour, minute, and seconds fields. | |
232 | * Some also support day and month, for alarms up to a year in | |
233 | * the future. | |
234 | */ | |
7be2c7c9 DB |
235 | |
236 | spin_lock_irq(&rtc_lock); | |
237 | t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM); | |
238 | t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM); | |
239 | t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM); | |
240 | ||
241 | if (cmos->day_alrm) { | |
615bb29c ML |
242 | /* ignore upper bits on readback per ACPI spec */ |
243 | t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f; | |
7be2c7c9 DB |
244 | if (!t->time.tm_mday) |
245 | t->time.tm_mday = -1; | |
246 | ||
247 | if (cmos->mon_alrm) { | |
248 | t->time.tm_mon = CMOS_READ(cmos->mon_alrm); | |
249 | if (!t->time.tm_mon) | |
250 | t->time.tm_mon = -1; | |
251 | } | |
252 | } | |
253 | ||
254 | rtc_control = CMOS_READ(RTC_CONTROL); | |
255 | spin_unlock_irq(&rtc_lock); | |
256 | ||
3804a89b AP |
257 | if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { |
258 | if (((unsigned)t->time.tm_sec) < 0x60) | |
259 | t->time.tm_sec = bcd2bin(t->time.tm_sec); | |
7be2c7c9 | 260 | else |
3804a89b AP |
261 | t->time.tm_sec = -1; |
262 | if (((unsigned)t->time.tm_min) < 0x60) | |
263 | t->time.tm_min = bcd2bin(t->time.tm_min); | |
264 | else | |
265 | t->time.tm_min = -1; | |
266 | if (((unsigned)t->time.tm_hour) < 0x24) | |
267 | t->time.tm_hour = bcd2bin(t->time.tm_hour); | |
268 | else | |
269 | t->time.tm_hour = -1; | |
270 | ||
271 | if (cmos->day_alrm) { | |
272 | if (((unsigned)t->time.tm_mday) <= 0x31) | |
273 | t->time.tm_mday = bcd2bin(t->time.tm_mday); | |
7be2c7c9 | 274 | else |
3804a89b AP |
275 | t->time.tm_mday = -1; |
276 | ||
277 | if (cmos->mon_alrm) { | |
278 | if (((unsigned)t->time.tm_mon) <= 0x12) | |
279 | t->time.tm_mon = bcd2bin(t->time.tm_mon)-1; | |
280 | else | |
281 | t->time.tm_mon = -1; | |
282 | } | |
7be2c7c9 DB |
283 | } |
284 | } | |
7be2c7c9 DB |
285 | |
286 | t->enabled = !!(rtc_control & RTC_AIE); | |
287 | t->pending = 0; | |
288 | ||
289 | return 0; | |
290 | } | |
291 | ||
7e2a31da DB |
292 | static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control) |
293 | { | |
294 | unsigned char rtc_intr; | |
295 | ||
296 | /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS; | |
297 | * allegedly some older rtcs need that to handle irqs properly | |
298 | */ | |
299 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); | |
300 | ||
301 | if (is_hpet_enabled()) | |
302 | return; | |
303 | ||
304 | rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; | |
305 | if (is_intr(rtc_intr)) | |
306 | rtc_update_irq(cmos->rtc, 1, rtc_intr); | |
307 | } | |
308 | ||
309 | static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask) | |
310 | { | |
311 | unsigned char rtc_control; | |
312 | ||
313 | /* flush any pending IRQ status, notably for update irqs, | |
314 | * before we enable new IRQs | |
315 | */ | |
316 | rtc_control = CMOS_READ(RTC_CONTROL); | |
317 | cmos_checkintr(cmos, rtc_control); | |
318 | ||
319 | rtc_control |= mask; | |
320 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
321 | hpet_set_rtc_irq_bit(mask); | |
322 | ||
323 | cmos_checkintr(cmos, rtc_control); | |
324 | } | |
325 | ||
326 | static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask) | |
327 | { | |
328 | unsigned char rtc_control; | |
329 | ||
330 | rtc_control = CMOS_READ(RTC_CONTROL); | |
331 | rtc_control &= ~mask; | |
332 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
333 | hpet_mask_rtc_irq_bit(mask); | |
334 | ||
335 | cmos_checkintr(cmos, rtc_control); | |
336 | } | |
337 | ||
6a6af3d0 GM |
338 | static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t) |
339 | { | |
340 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
341 | struct rtc_time now; | |
342 | ||
343 | cmos_read_time(dev, &now); | |
344 | ||
345 | if (!cmos->day_alrm) { | |
346 | time64_t t_max_date; | |
347 | time64_t t_alrm; | |
348 | ||
349 | t_max_date = rtc_tm_to_time64(&now); | |
350 | t_max_date += 24 * 60 * 60 - 1; | |
351 | t_alrm = rtc_tm_to_time64(&t->time); | |
352 | if (t_alrm > t_max_date) { | |
353 | dev_err(dev, | |
354 | "Alarms can be up to one day in the future\n"); | |
355 | return -EINVAL; | |
356 | } | |
357 | } else if (!cmos->mon_alrm) { | |
358 | struct rtc_time max_date = now; | |
359 | time64_t t_max_date; | |
360 | time64_t t_alrm; | |
361 | int max_mday; | |
362 | ||
363 | if (max_date.tm_mon == 11) { | |
364 | max_date.tm_mon = 0; | |
365 | max_date.tm_year += 1; | |
366 | } else { | |
367 | max_date.tm_mon += 1; | |
368 | } | |
369 | max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); | |
370 | if (max_date.tm_mday > max_mday) | |
371 | max_date.tm_mday = max_mday; | |
372 | ||
373 | t_max_date = rtc_tm_to_time64(&max_date); | |
374 | t_max_date -= 1; | |
375 | t_alrm = rtc_tm_to_time64(&t->time); | |
376 | if (t_alrm > t_max_date) { | |
377 | dev_err(dev, | |
378 | "Alarms can be up to one month in the future\n"); | |
379 | return -EINVAL; | |
380 | } | |
381 | } else { | |
382 | struct rtc_time max_date = now; | |
383 | time64_t t_max_date; | |
384 | time64_t t_alrm; | |
385 | int max_mday; | |
386 | ||
387 | max_date.tm_year += 1; | |
388 | max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); | |
389 | if (max_date.tm_mday > max_mday) | |
390 | max_date.tm_mday = max_mday; | |
391 | ||
392 | t_max_date = rtc_tm_to_time64(&max_date); | |
393 | t_max_date -= 1; | |
394 | t_alrm = rtc_tm_to_time64(&t->time); | |
395 | if (t_alrm > t_max_date) { | |
396 | dev_err(dev, | |
397 | "Alarms can be up to one year in the future\n"); | |
398 | return -EINVAL; | |
399 | } | |
400 | } | |
401 | ||
402 | return 0; | |
403 | } | |
404 | ||
7be2c7c9 DB |
405 | static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
406 | { | |
407 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
5e8599d2 | 408 | unsigned char mon, mday, hrs, min, sec, rtc_control; |
6a6af3d0 | 409 | int ret; |
7be2c7c9 DB |
410 | |
411 | if (!is_valid_irq(cmos->irq)) | |
412 | return -EIO; | |
413 | ||
6a6af3d0 GM |
414 | ret = cmos_validate_alarm(dev, t); |
415 | if (ret < 0) | |
416 | return ret; | |
417 | ||
2b653e06 | 418 | mon = t->time.tm_mon + 1; |
7be2c7c9 | 419 | mday = t->time.tm_mday; |
7be2c7c9 | 420 | hrs = t->time.tm_hour; |
7be2c7c9 | 421 | min = t->time.tm_min; |
7be2c7c9 | 422 | sec = t->time.tm_sec; |
3804a89b AP |
423 | |
424 | rtc_control = CMOS_READ(RTC_CONTROL); | |
425 | if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { | |
426 | /* Writing 0xff means "don't care" or "match all". */ | |
427 | mon = (mon <= 12) ? bin2bcd(mon) : 0xff; | |
428 | mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff; | |
429 | hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff; | |
430 | min = (min < 60) ? bin2bcd(min) : 0xff; | |
431 | sec = (sec < 60) ? bin2bcd(sec) : 0xff; | |
432 | } | |
7be2c7c9 DB |
433 | |
434 | spin_lock_irq(&rtc_lock); | |
435 | ||
436 | /* next rtc irq must not be from previous alarm setting */ | |
7e2a31da | 437 | cmos_irq_disable(cmos, RTC_AIE); |
7be2c7c9 DB |
438 | |
439 | /* update alarm */ | |
440 | CMOS_WRITE(hrs, RTC_HOURS_ALARM); | |
441 | CMOS_WRITE(min, RTC_MINUTES_ALARM); | |
442 | CMOS_WRITE(sec, RTC_SECONDS_ALARM); | |
443 | ||
444 | /* the system may support an "enhanced" alarm */ | |
445 | if (cmos->day_alrm) { | |
446 | CMOS_WRITE(mday, cmos->day_alrm); | |
447 | if (cmos->mon_alrm) | |
448 | CMOS_WRITE(mon, cmos->mon_alrm); | |
449 | } | |
450 | ||
35d3fdd5 DB |
451 | /* FIXME the HPET alarm glue currently ignores day_alrm |
452 | * and mon_alrm ... | |
453 | */ | |
454 | hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec); | |
455 | ||
7e2a31da DB |
456 | if (t->enabled) |
457 | cmos_irq_enable(cmos, RTC_AIE); | |
7be2c7c9 DB |
458 | |
459 | spin_unlock_irq(&rtc_lock); | |
460 | ||
88b8d33b AH |
461 | cmos->alarm_expires = rtc_tm_to_time64(&t->time); |
462 | ||
7be2c7c9 DB |
463 | return 0; |
464 | } | |
465 | ||
a8462ef6 | 466 | static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled) |
7be2c7c9 DB |
467 | { |
468 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
7be2c7c9 DB |
469 | unsigned long flags; |
470 | ||
a8462ef6 HRK |
471 | if (!is_valid_irq(cmos->irq)) |
472 | return -EINVAL; | |
7be2c7c9 DB |
473 | |
474 | spin_lock_irqsave(&rtc_lock, flags); | |
a8462ef6 HRK |
475 | |
476 | if (enabled) | |
7e2a31da | 477 | cmos_irq_enable(cmos, RTC_AIE); |
a8462ef6 HRK |
478 | else |
479 | cmos_irq_disable(cmos, RTC_AIE); | |
480 | ||
7be2c7c9 DB |
481 | spin_unlock_irqrestore(&rtc_lock, flags); |
482 | return 0; | |
483 | } | |
484 | ||
6fca3fc5 | 485 | #if IS_ENABLED(CONFIG_RTC_INTF_PROC) |
7be2c7c9 DB |
486 | |
487 | static int cmos_procfs(struct device *dev, struct seq_file *seq) | |
488 | { | |
489 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
490 | unsigned char rtc_control, valid; | |
491 | ||
492 | spin_lock_irq(&rtc_lock); | |
493 | rtc_control = CMOS_READ(RTC_CONTROL); | |
494 | valid = CMOS_READ(RTC_VALID); | |
495 | spin_unlock_irq(&rtc_lock); | |
496 | ||
497 | /* NOTE: at least ICH6 reports battery status using a different | |
498 | * (non-RTC) bit; and SQWE is ignored on many current systems. | |
499 | */ | |
4395eb1f JP |
500 | seq_printf(seq, |
501 | "periodic_IRQ\t: %s\n" | |
502 | "update_IRQ\t: %s\n" | |
503 | "HPET_emulated\t: %s\n" | |
504 | // "square_wave\t: %s\n" | |
505 | "BCD\t\t: %s\n" | |
506 | "DST_enable\t: %s\n" | |
507 | "periodic_freq\t: %d\n" | |
508 | "batt_status\t: %s\n", | |
509 | (rtc_control & RTC_PIE) ? "yes" : "no", | |
510 | (rtc_control & RTC_UIE) ? "yes" : "no", | |
511 | is_hpet_enabled() ? "yes" : "no", | |
512 | // (rtc_control & RTC_SQWE) ? "yes" : "no", | |
513 | (rtc_control & RTC_DM_BINARY) ? "no" : "yes", | |
514 | (rtc_control & RTC_DST_EN) ? "yes" : "no", | |
515 | cmos->rtc->irq_freq, | |
516 | (valid & RTC_VRT) ? "okay" : "dead"); | |
517 | ||
518 | return 0; | |
7be2c7c9 DB |
519 | } |
520 | ||
521 | #else | |
522 | #define cmos_procfs NULL | |
523 | #endif | |
524 | ||
525 | static const struct rtc_class_ops cmos_rtc_ops = { | |
a8462ef6 HRK |
526 | .read_time = cmos_read_time, |
527 | .set_time = cmos_set_time, | |
528 | .read_alarm = cmos_read_alarm, | |
529 | .set_alarm = cmos_set_alarm, | |
530 | .proc = cmos_procfs, | |
a8462ef6 | 531 | .alarm_irq_enable = cmos_alarm_irq_enable, |
7be2c7c9 DB |
532 | }; |
533 | ||
534 | /*----------------------------------------------------------------*/ | |
535 | ||
e07e232c DB |
536 | /* |
537 | * All these chips have at least 64 bytes of address space, shared by | |
538 | * RTC registers and NVRAM. Most of those bytes of NVRAM are used | |
539 | * by boot firmware. Modern chips have 128 or 256 bytes. | |
540 | */ | |
541 | ||
542 | #define NVRAM_OFFSET (RTC_REG_D + 1) | |
543 | ||
8b5b7958 AB |
544 | static int cmos_nvram_read(void *priv, unsigned int off, void *val, |
545 | size_t count) | |
e07e232c | 546 | { |
8b5b7958 | 547 | unsigned char *buf = val; |
e07e232c DB |
548 | int retval; |
549 | ||
c8fc40cd | 550 | off += NVRAM_OFFSET; |
e07e232c | 551 | spin_lock_irq(&rtc_lock); |
c8fc40cd DB |
552 | for (retval = 0; count; count--, off++, retval++) { |
553 | if (off < 128) | |
554 | *buf++ = CMOS_READ(off); | |
555 | else if (can_bank2) | |
556 | *buf++ = cmos_read_bank2(off); | |
557 | else | |
558 | break; | |
559 | } | |
e07e232c DB |
560 | spin_unlock_irq(&rtc_lock); |
561 | ||
562 | return retval; | |
563 | } | |
564 | ||
8b5b7958 AB |
565 | static int cmos_nvram_write(void *priv, unsigned int off, void *val, |
566 | size_t count) | |
e07e232c | 567 | { |
8b5b7958 AB |
568 | struct cmos_rtc *cmos = priv; |
569 | unsigned char *buf = val; | |
e07e232c DB |
570 | int retval; |
571 | ||
e07e232c DB |
572 | /* NOTE: on at least PCs and Ataris, the boot firmware uses a |
573 | * checksum on part of the NVRAM data. That's currently ignored | |
574 | * here. If userspace is smart enough to know what fields of | |
575 | * NVRAM to update, updating checksums is also part of its job. | |
576 | */ | |
c8fc40cd | 577 | off += NVRAM_OFFSET; |
e07e232c | 578 | spin_lock_irq(&rtc_lock); |
c8fc40cd | 579 | for (retval = 0; count; count--, off++, retval++) { |
e07e232c DB |
580 | /* don't trash RTC registers */ |
581 | if (off == cmos->day_alrm | |
582 | || off == cmos->mon_alrm | |
583 | || off == cmos->century) | |
584 | buf++; | |
c8fc40cd | 585 | else if (off < 128) |
e07e232c | 586 | CMOS_WRITE(*buf++, off); |
c8fc40cd DB |
587 | else if (can_bank2) |
588 | cmos_write_bank2(*buf++, off); | |
589 | else | |
590 | break; | |
e07e232c DB |
591 | } |
592 | spin_unlock_irq(&rtc_lock); | |
593 | ||
594 | return retval; | |
595 | } | |
596 | ||
e07e232c DB |
597 | /*----------------------------------------------------------------*/ |
598 | ||
7be2c7c9 DB |
599 | static struct cmos_rtc cmos_rtc; |
600 | ||
601 | static irqreturn_t cmos_interrupt(int irq, void *p) | |
602 | { | |
603 | u8 irqstat; | |
8a0bdfd7 | 604 | u8 rtc_control; |
7be2c7c9 DB |
605 | |
606 | spin_lock(&rtc_lock); | |
35d3fdd5 DB |
607 | |
608 | /* When the HPET interrupt handler calls us, the interrupt | |
609 | * status is passed as arg1 instead of the irq number. But | |
610 | * always clear irq status, even when HPET is in the way. | |
611 | * | |
612 | * Note that HPET and RTC are almost certainly out of phase, | |
613 | * giving different IRQ status ... | |
9d8af78b | 614 | */ |
35d3fdd5 DB |
615 | irqstat = CMOS_READ(RTC_INTR_FLAGS); |
616 | rtc_control = CMOS_READ(RTC_CONTROL); | |
9d8af78b BW |
617 | if (is_hpet_enabled()) |
618 | irqstat = (unsigned long)irq & 0xF0; | |
998a0605 DB |
619 | |
620 | /* If we were suspended, RTC_CONTROL may not be accurate since the | |
621 | * bios may have cleared it. | |
622 | */ | |
623 | if (!cmos_rtc.suspend_ctrl) | |
624 | irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; | |
625 | else | |
626 | irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF; | |
8a0bdfd7 DB |
627 | |
628 | /* All Linux RTC alarms should be treated as if they were oneshot. | |
629 | * Similar code may be needed in system wakeup paths, in case the | |
630 | * alarm woke the system. | |
631 | */ | |
632 | if (irqstat & RTC_AIE) { | |
998a0605 | 633 | cmos_rtc.suspend_ctrl &= ~RTC_AIE; |
8a0bdfd7 DB |
634 | rtc_control &= ~RTC_AIE; |
635 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
35d3fdd5 | 636 | hpet_mask_rtc_irq_bit(RTC_AIE); |
8a0bdfd7 DB |
637 | CMOS_READ(RTC_INTR_FLAGS); |
638 | } | |
7be2c7c9 DB |
639 | spin_unlock(&rtc_lock); |
640 | ||
bcd9b89c | 641 | if (is_intr(irqstat)) { |
7be2c7c9 DB |
642 | rtc_update_irq(p, 1, irqstat); |
643 | return IRQ_HANDLED; | |
644 | } else | |
645 | return IRQ_NONE; | |
646 | } | |
647 | ||
41ac8df9 | 648 | #ifdef CONFIG_PNP |
7be2c7c9 DB |
649 | #define INITSECTION |
650 | ||
651 | #else | |
7be2c7c9 DB |
652 | #define INITSECTION __init |
653 | #endif | |
654 | ||
655 | static int INITSECTION | |
656 | cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) | |
657 | { | |
97a92e77 | 658 | struct cmos_rtc_board_info *info = dev_get_platdata(dev); |
7be2c7c9 DB |
659 | int retval = 0; |
660 | unsigned char rtc_control; | |
e07e232c | 661 | unsigned address_space; |
31632dbd | 662 | u32 flags = 0; |
8b5b7958 AB |
663 | struct nvmem_config nvmem_cfg = { |
664 | .name = "cmos_nvram", | |
665 | .word_size = 1, | |
666 | .stride = 1, | |
667 | .reg_read = cmos_nvram_read, | |
668 | .reg_write = cmos_nvram_write, | |
669 | .priv = &cmos_rtc, | |
670 | }; | |
7be2c7c9 DB |
671 | |
672 | /* there can be only one ... */ | |
673 | if (cmos_rtc.dev) | |
674 | return -EBUSY; | |
675 | ||
676 | if (!ports) | |
677 | return -ENODEV; | |
678 | ||
05440dfc DB |
679 | /* Claim I/O ports ASAP, minimizing conflict with legacy driver. |
680 | * | |
681 | * REVISIT non-x86 systems may instead use memory space resources | |
682 | * (needing ioremap etc), not i/o space resources like this ... | |
683 | */ | |
31632dbd MR |
684 | if (RTC_IOMAPPED) |
685 | ports = request_region(ports->start, resource_size(ports), | |
686 | driver_name); | |
687 | else | |
688 | ports = request_mem_region(ports->start, resource_size(ports), | |
689 | driver_name); | |
05440dfc DB |
690 | if (!ports) { |
691 | dev_dbg(dev, "i/o registers already in use\n"); | |
692 | return -EBUSY; | |
693 | } | |
694 | ||
7be2c7c9 DB |
695 | cmos_rtc.irq = rtc_irq; |
696 | cmos_rtc.iomem = ports; | |
697 | ||
e07e232c DB |
698 | /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM |
699 | * driver did, but don't reject unknown configs. Old hardware | |
c8fc40cd DB |
700 | * won't address 128 bytes. Newer chips have multiple banks, |
701 | * though they may not be listed in one I/O resource. | |
e07e232c DB |
702 | */ |
703 | #if defined(CONFIG_ATARI) | |
704 | address_space = 64; | |
95abd0df | 705 | #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ |
8cb7c71b | 706 | || defined(__sparc__) || defined(__mips__) \ |
739d875d | 707 | || defined(__powerpc__) |
e07e232c DB |
708 | address_space = 128; |
709 | #else | |
710 | #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. | |
711 | address_space = 128; | |
712 | #endif | |
c8fc40cd DB |
713 | if (can_bank2 && ports->end > (ports->start + 1)) |
714 | address_space = 256; | |
e07e232c | 715 | |
87ac84f4 DB |
716 | /* For ACPI systems extension info comes from the FADT. On others, |
717 | * board specific setup provides it as appropriate. Systems where | |
718 | * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and | |
719 | * some almost-clones) can provide hooks to make that behave. | |
e07e232c DB |
720 | * |
721 | * Note that ACPI doesn't preclude putting these registers into | |
722 | * "extended" areas of the chip, including some that we won't yet | |
723 | * expect CMOS_READ and friends to handle. | |
7be2c7c9 DB |
724 | */ |
725 | if (info) { | |
31632dbd MR |
726 | if (info->flags) |
727 | flags = info->flags; | |
728 | if (info->address_space) | |
729 | address_space = info->address_space; | |
730 | ||
e07e232c DB |
731 | if (info->rtc_day_alarm && info->rtc_day_alarm < 128) |
732 | cmos_rtc.day_alrm = info->rtc_day_alarm; | |
733 | if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) | |
734 | cmos_rtc.mon_alrm = info->rtc_mon_alarm; | |
735 | if (info->rtc_century && info->rtc_century < 128) | |
736 | cmos_rtc.century = info->rtc_century; | |
87ac84f4 DB |
737 | |
738 | if (info->wake_on && info->wake_off) { | |
739 | cmos_rtc.wake_on = info->wake_on; | |
740 | cmos_rtc.wake_off = info->wake_off; | |
741 | } | |
7be2c7c9 DB |
742 | } |
743 | ||
6ba8bcd4 DC |
744 | cmos_rtc.dev = dev; |
745 | dev_set_drvdata(dev, &cmos_rtc); | |
746 | ||
53d29e0a | 747 | cmos_rtc.rtc = devm_rtc_allocate_device(dev); |
05440dfc DB |
748 | if (IS_ERR(cmos_rtc.rtc)) { |
749 | retval = PTR_ERR(cmos_rtc.rtc); | |
750 | goto cleanup0; | |
751 | } | |
7be2c7c9 | 752 | |
d4afc76c | 753 | rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); |
7be2c7c9 DB |
754 | |
755 | spin_lock_irq(&rtc_lock); | |
756 | ||
31632dbd MR |
757 | if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) { |
758 | /* force periodic irq to CMOS reset default of 1024Hz; | |
759 | * | |
760 | * REVISIT it's been reported that at least one x86_64 ALI | |
761 | * mobo doesn't use 32KHz here ... for portability we might | |
762 | * need to do something about other clock frequencies. | |
763 | */ | |
764 | cmos_rtc.rtc->irq_freq = 1024; | |
765 | hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); | |
766 | CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); | |
767 | } | |
7be2c7c9 | 768 | |
7e2a31da | 769 | /* disable irqs */ |
31632dbd MR |
770 | if (is_valid_irq(rtc_irq)) |
771 | cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); | |
35d3fdd5 | 772 | |
7e2a31da | 773 | rtc_control = CMOS_READ(RTC_CONTROL); |
7be2c7c9 DB |
774 | |
775 | spin_unlock_irq(&rtc_lock); | |
776 | ||
5e8599d2 | 777 | if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { |
3804a89b | 778 | dev_warn(dev, "only 24-hr supported\n"); |
7be2c7c9 DB |
779 | retval = -ENXIO; |
780 | goto cleanup1; | |
781 | } | |
782 | ||
970fc7f4 PA |
783 | hpet_rtc_timer_init(); |
784 | ||
9d8af78b BW |
785 | if (is_valid_irq(rtc_irq)) { |
786 | irq_handler_t rtc_cmos_int_handler; | |
787 | ||
788 | if (is_hpet_enabled()) { | |
9d8af78b | 789 | rtc_cmos_int_handler = hpet_rtc_interrupt; |
24b34472 AM |
790 | retval = hpet_register_irq_handler(cmos_interrupt); |
791 | if (retval) { | |
970fc7f4 | 792 | hpet_mask_rtc_irq_bit(RTC_IRQMASK); |
ee443357 | 793 | dev_warn(dev, "hpet_register_irq_handler " |
9d8af78b BW |
794 | " failed in rtc_init()."); |
795 | goto cleanup1; | |
796 | } | |
797 | } else | |
798 | rtc_cmos_int_handler = cmos_interrupt; | |
799 | ||
800 | retval = request_irq(rtc_irq, rtc_cmos_int_handler, | |
079062b2 | 801 | IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev), |
ab6a2d70 | 802 | cmos_rtc.rtc); |
9d8af78b BW |
803 | if (retval < 0) { |
804 | dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); | |
805 | goto cleanup1; | |
806 | } | |
7be2c7c9 DB |
807 | } |
808 | ||
53d29e0a | 809 | cmos_rtc.rtc->ops = &cmos_rtc_ops; |
8b5b7958 | 810 | cmos_rtc.rtc->nvram_old_abi = true; |
53d29e0a AB |
811 | retval = rtc_register_device(cmos_rtc.rtc); |
812 | if (retval) | |
e07e232c | 813 | goto cleanup2; |
7be2c7c9 | 814 | |
8b5b7958 AB |
815 | /* export at least the first block of NVRAM */ |
816 | nvmem_cfg.size = address_space - NVRAM_OFFSET; | |
817 | if (rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg)) | |
818 | dev_err(dev, "nvmem registration failed\n"); | |
819 | ||
820 | dev_info(dev, "%s%s, %d bytes nvram%s\n", | |
821 | !is_valid_irq(rtc_irq) ? "no alarms" : | |
822 | cmos_rtc.mon_alrm ? "alarms up to one year" : | |
823 | cmos_rtc.day_alrm ? "alarms up to one month" : | |
824 | "alarms up to one day", | |
825 | cmos_rtc.century ? ", y3k" : "", | |
826 | nvmem_cfg.size, | |
827 | is_hpet_enabled() ? ", hpet irqs" : ""); | |
7be2c7c9 DB |
828 | |
829 | return 0; | |
830 | ||
e07e232c DB |
831 | cleanup2: |
832 | if (is_valid_irq(rtc_irq)) | |
833 | free_irq(rtc_irq, cmos_rtc.rtc); | |
7be2c7c9 | 834 | cleanup1: |
05440dfc | 835 | cmos_rtc.dev = NULL; |
05440dfc | 836 | cleanup0: |
31632dbd MR |
837 | if (RTC_IOMAPPED) |
838 | release_region(ports->start, resource_size(ports)); | |
839 | else | |
840 | release_mem_region(ports->start, resource_size(ports)); | |
7be2c7c9 DB |
841 | return retval; |
842 | } | |
843 | ||
31632dbd | 844 | static void cmos_do_shutdown(int rtc_irq) |
7be2c7c9 | 845 | { |
7be2c7c9 | 846 | spin_lock_irq(&rtc_lock); |
31632dbd MR |
847 | if (is_valid_irq(rtc_irq)) |
848 | cmos_irq_disable(&cmos_rtc, RTC_IRQMASK); | |
7be2c7c9 DB |
849 | spin_unlock_irq(&rtc_lock); |
850 | } | |
851 | ||
a3a0673b | 852 | static void cmos_do_remove(struct device *dev) |
7be2c7c9 DB |
853 | { |
854 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
05440dfc | 855 | struct resource *ports; |
7be2c7c9 | 856 | |
31632dbd | 857 | cmos_do_shutdown(cmos->irq); |
7be2c7c9 | 858 | |
9d8af78b | 859 | if (is_valid_irq(cmos->irq)) { |
05440dfc | 860 | free_irq(cmos->irq, cmos->rtc); |
9d8af78b BW |
861 | hpet_unregister_irq_handler(cmos_interrupt); |
862 | } | |
7be2c7c9 | 863 | |
05440dfc | 864 | cmos->rtc = NULL; |
7be2c7c9 | 865 | |
05440dfc | 866 | ports = cmos->iomem; |
31632dbd MR |
867 | if (RTC_IOMAPPED) |
868 | release_region(ports->start, resource_size(ports)); | |
869 | else | |
870 | release_mem_region(ports->start, resource_size(ports)); | |
05440dfc DB |
871 | cmos->iomem = NULL; |
872 | ||
873 | cmos->dev = NULL; | |
7be2c7c9 DB |
874 | } |
875 | ||
88b8d33b AH |
876 | static int cmos_aie_poweroff(struct device *dev) |
877 | { | |
878 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
879 | struct rtc_time now; | |
880 | time64_t t_now; | |
881 | int retval = 0; | |
882 | unsigned char rtc_control; | |
883 | ||
884 | if (!cmos->alarm_expires) | |
885 | return -EINVAL; | |
886 | ||
887 | spin_lock_irq(&rtc_lock); | |
888 | rtc_control = CMOS_READ(RTC_CONTROL); | |
889 | spin_unlock_irq(&rtc_lock); | |
890 | ||
891 | /* We only care about the situation where AIE is disabled. */ | |
892 | if (rtc_control & RTC_AIE) | |
893 | return -EBUSY; | |
894 | ||
895 | cmos_read_time(dev, &now); | |
896 | t_now = rtc_tm_to_time64(&now); | |
897 | ||
898 | /* | |
899 | * When enabling "RTC wake-up" in BIOS setup, the machine reboots | |
900 | * automatically right after shutdown on some buggy boxes. | |
901 | * This automatic rebooting issue won't happen when the alarm | |
902 | * time is larger than now+1 seconds. | |
903 | * | |
904 | * If the alarm time is equal to now+1 seconds, the issue can be | |
905 | * prevented by cancelling the alarm. | |
906 | */ | |
907 | if (cmos->alarm_expires == t_now + 1) { | |
908 | struct rtc_wkalrm alarm; | |
909 | ||
910 | /* Cancel the AIE timer by configuring the past time. */ | |
911 | rtc_time64_to_tm(t_now - 1, &alarm.time); | |
912 | alarm.enabled = 0; | |
913 | retval = cmos_set_alarm(dev, &alarm); | |
914 | } else if (cmos->alarm_expires > t_now + 1) { | |
915 | retval = -EBUSY; | |
916 | } | |
917 | ||
918 | return retval; | |
919 | } | |
920 | ||
2fb08e6c | 921 | static int cmos_suspend(struct device *dev) |
7be2c7c9 DB |
922 | { |
923 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
bcd9b89c | 924 | unsigned char tmp; |
7be2c7c9 DB |
925 | |
926 | /* only the alarm might be a wakeup event source */ | |
927 | spin_lock_irq(&rtc_lock); | |
928 | cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); | |
929 | if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { | |
35d3fdd5 | 930 | unsigned char mask; |
bcd9b89c | 931 | |
74c4633d | 932 | if (device_may_wakeup(dev)) |
35d3fdd5 | 933 | mask = RTC_IRQMASK & ~RTC_AIE; |
7be2c7c9 | 934 | else |
35d3fdd5 DB |
935 | mask = RTC_IRQMASK; |
936 | tmp &= ~mask; | |
7be2c7c9 | 937 | CMOS_WRITE(tmp, RTC_CONTROL); |
e005715e | 938 | hpet_mask_rtc_irq_bit(mask); |
35d3fdd5 | 939 | |
7e2a31da | 940 | cmos_checkintr(cmos, tmp); |
bcd9b89c | 941 | } |
7be2c7c9 DB |
942 | spin_unlock_irq(&rtc_lock); |
943 | ||
87ac84f4 DB |
944 | if (tmp & RTC_AIE) { |
945 | cmos->enabled_wake = 1; | |
946 | if (cmos->wake_on) | |
947 | cmos->wake_on(dev); | |
948 | else | |
949 | enable_irq_wake(cmos->irq); | |
950 | } | |
7be2c7c9 | 951 | |
68669d55 GM |
952 | cmos_read_alarm(dev, &cmos->saved_wkalrm); |
953 | ||
ee443357 | 954 | dev_dbg(dev, "suspend%s, ctrl %02x\n", |
7be2c7c9 DB |
955 | (tmp & RTC_AIE) ? ", alarm may wake" : "", |
956 | tmp); | |
957 | ||
958 | return 0; | |
959 | } | |
960 | ||
74c4633d RW |
961 | /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even |
962 | * after a detour through G3 "mechanical off", although the ACPI spec | |
963 | * says wakeup should only work from G1/S4 "hibernate". To most users, | |
964 | * distinctions between S4 and S5 are pointless. So when the hardware | |
965 | * allows, don't draw that distinction. | |
966 | */ | |
967 | static inline int cmos_poweroff(struct device *dev) | |
968 | { | |
00f7f90c AB |
969 | if (!IS_ENABLED(CONFIG_PM)) |
970 | return -ENOSYS; | |
971 | ||
2fb08e6c | 972 | return cmos_suspend(dev); |
74c4633d RW |
973 | } |
974 | ||
68669d55 GM |
975 | static void cmos_check_wkalrm(struct device *dev) |
976 | { | |
977 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
978 | struct rtc_wkalrm current_alarm; | |
979 | time64_t t_current_expires; | |
980 | time64_t t_saved_expires; | |
981 | ||
982 | cmos_read_alarm(dev, ¤t_alarm); | |
983 | t_current_expires = rtc_tm_to_time64(¤t_alarm.time); | |
984 | t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time); | |
985 | if (t_current_expires != t_saved_expires || | |
986 | cmos->saved_wkalrm.enabled != current_alarm.enabled) { | |
987 | cmos_set_alarm(dev, &cmos->saved_wkalrm); | |
988 | } | |
989 | } | |
990 | ||
983bf125 GM |
991 | static void cmos_check_acpi_rtc_status(struct device *dev, |
992 | unsigned char *rtc_control); | |
993 | ||
00f7f90c | 994 | static int __maybe_unused cmos_resume(struct device *dev) |
7be2c7c9 DB |
995 | { |
996 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
998a0605 DB |
997 | unsigned char tmp; |
998 | ||
999 | if (cmos->enabled_wake) { | |
1000 | if (cmos->wake_off) | |
1001 | cmos->wake_off(dev); | |
1002 | else | |
1003 | disable_irq_wake(cmos->irq); | |
1004 | cmos->enabled_wake = 0; | |
1005 | } | |
7be2c7c9 | 1006 | |
68669d55 GM |
1007 | /* The BIOS might have changed the alarm, restore it */ |
1008 | cmos_check_wkalrm(dev); | |
1009 | ||
998a0605 DB |
1010 | spin_lock_irq(&rtc_lock); |
1011 | tmp = cmos->suspend_ctrl; | |
1012 | cmos->suspend_ctrl = 0; | |
7be2c7c9 | 1013 | /* re-enable any irqs previously active */ |
35d3fdd5 DB |
1014 | if (tmp & RTC_IRQMASK) { |
1015 | unsigned char mask; | |
7be2c7c9 | 1016 | |
ebf8d6c8 DB |
1017 | if (device_may_wakeup(dev)) |
1018 | hpet_rtc_timer_init(); | |
1019 | ||
35d3fdd5 DB |
1020 | do { |
1021 | CMOS_WRITE(tmp, RTC_CONTROL); | |
1022 | hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); | |
1023 | ||
1024 | mask = CMOS_READ(RTC_INTR_FLAGS); | |
1025 | mask &= (tmp & RTC_IRQMASK) | RTC_IRQF; | |
7e2a31da | 1026 | if (!is_hpet_enabled() || !is_intr(mask)) |
35d3fdd5 DB |
1027 | break; |
1028 | ||
1029 | /* force one-shot behavior if HPET blocked | |
1030 | * the wake alarm's irq | |
1031 | */ | |
1032 | rtc_update_irq(cmos->rtc, 1, mask); | |
1033 | tmp &= ~RTC_AIE; | |
1034 | hpet_mask_rtc_irq_bit(RTC_AIE); | |
1035 | } while (mask & RTC_AIE); | |
983bf125 GM |
1036 | |
1037 | if (tmp & RTC_AIE) | |
1038 | cmos_check_acpi_rtc_status(dev, &tmp); | |
7be2c7c9 | 1039 | } |
998a0605 | 1040 | spin_unlock_irq(&rtc_lock); |
7be2c7c9 | 1041 | |
ee443357 | 1042 | dev_dbg(dev, "resume, ctrl %02x\n", tmp); |
7be2c7c9 DB |
1043 | |
1044 | return 0; | |
1045 | } | |
1046 | ||
b5ada460 MW |
1047 | static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume); |
1048 | ||
7be2c7c9 DB |
1049 | /*----------------------------------------------------------------*/ |
1050 | ||
e07e232c DB |
1051 | /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. |
1052 | * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs | |
1053 | * probably list them in similar PNPBIOS tables; so PNP is more common. | |
1054 | * | |
1055 | * We don't use legacy "poke at the hardware" probing. Ancient PCs that | |
1056 | * predate even PNPBIOS should set up platform_bus devices. | |
7be2c7c9 DB |
1057 | */ |
1058 | ||
a474aaed BH |
1059 | #ifdef CONFIG_ACPI |
1060 | ||
1061 | #include <linux/acpi.h> | |
1062 | ||
a474aaed BH |
1063 | static u32 rtc_handler(void *context) |
1064 | { | |
b2201e54 | 1065 | struct device *dev = context; |
983bf125 GM |
1066 | struct cmos_rtc *cmos = dev_get_drvdata(dev); |
1067 | unsigned char rtc_control = 0; | |
1068 | unsigned char rtc_intr; | |
368e21ae | 1069 | unsigned long flags; |
983bf125 | 1070 | |
368e21ae | 1071 | spin_lock_irqsave(&rtc_lock, flags); |
983bf125 GM |
1072 | if (cmos_rtc.suspend_ctrl) |
1073 | rtc_control = CMOS_READ(RTC_CONTROL); | |
1074 | if (rtc_control & RTC_AIE) { | |
1075 | cmos_rtc.suspend_ctrl &= ~RTC_AIE; | |
1076 | CMOS_WRITE(rtc_control, RTC_CONTROL); | |
1077 | rtc_intr = CMOS_READ(RTC_INTR_FLAGS); | |
1078 | rtc_update_irq(cmos->rtc, 1, rtc_intr); | |
1079 | } | |
368e21ae | 1080 | spin_unlock_irqrestore(&rtc_lock, flags); |
b2201e54 | 1081 | |
967b08c2 | 1082 | pm_wakeup_hard_event(dev); |
a474aaed BH |
1083 | acpi_clear_event(ACPI_EVENT_RTC); |
1084 | acpi_disable_event(ACPI_EVENT_RTC, 0); | |
1085 | return ACPI_INTERRUPT_HANDLED; | |
1086 | } | |
1087 | ||
b2201e54 | 1088 | static inline void rtc_wake_setup(struct device *dev) |
a474aaed | 1089 | { |
b2201e54 | 1090 | acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev); |
a474aaed BH |
1091 | /* |
1092 | * After the RTC handler is installed, the Fixed_RTC event should | |
1093 | * be disabled. Only when the RTC alarm is set will it be enabled. | |
1094 | */ | |
1095 | acpi_clear_event(ACPI_EVENT_RTC); | |
1096 | acpi_disable_event(ACPI_EVENT_RTC, 0); | |
1097 | } | |
1098 | ||
1099 | static void rtc_wake_on(struct device *dev) | |
1100 | { | |
1101 | acpi_clear_event(ACPI_EVENT_RTC); | |
1102 | acpi_enable_event(ACPI_EVENT_RTC, 0); | |
1103 | } | |
1104 | ||
1105 | static void rtc_wake_off(struct device *dev) | |
1106 | { | |
1107 | acpi_disable_event(ACPI_EVENT_RTC, 0); | |
1108 | } | |
a474aaed BH |
1109 | |
1110 | /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find | |
1111 | * its device node and pass extra config data. This helps its driver use | |
1112 | * capabilities that the now-obsolete mc146818 didn't have, and informs it | |
1113 | * that this board's RTC is wakeup-capable (per ACPI spec). | |
1114 | */ | |
1115 | static struct cmos_rtc_board_info acpi_rtc_info; | |
1116 | ||
5a167f45 | 1117 | static void cmos_wake_setup(struct device *dev) |
a474aaed BH |
1118 | { |
1119 | if (acpi_disabled) | |
1120 | return; | |
1121 | ||
b2201e54 | 1122 | rtc_wake_setup(dev); |
a474aaed BH |
1123 | acpi_rtc_info.wake_on = rtc_wake_on; |
1124 | acpi_rtc_info.wake_off = rtc_wake_off; | |
1125 | ||
1126 | /* workaround bug in some ACPI tables */ | |
1127 | if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { | |
1128 | dev_dbg(dev, "bogus FADT month_alarm (%d)\n", | |
1129 | acpi_gbl_FADT.month_alarm); | |
1130 | acpi_gbl_FADT.month_alarm = 0; | |
1131 | } | |
1132 | ||
1133 | acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm; | |
1134 | acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm; | |
1135 | acpi_rtc_info.rtc_century = acpi_gbl_FADT.century; | |
1136 | ||
1137 | /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */ | |
1138 | if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) | |
1139 | dev_info(dev, "RTC can wake from S4\n"); | |
1140 | ||
1141 | dev->platform_data = &acpi_rtc_info; | |
1142 | ||
1143 | /* RTC always wakes from S1/S2/S3, and often S4/STD */ | |
1144 | device_init_wakeup(dev, 1); | |
1145 | } | |
1146 | ||
983bf125 GM |
1147 | static void cmos_check_acpi_rtc_status(struct device *dev, |
1148 | unsigned char *rtc_control) | |
1149 | { | |
1150 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
1151 | acpi_event_status rtc_status; | |
1152 | acpi_status status; | |
1153 | ||
1154 | if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC) | |
1155 | return; | |
1156 | ||
1157 | status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status); | |
1158 | if (ACPI_FAILURE(status)) { | |
1159 | dev_err(dev, "Could not get RTC status\n"); | |
1160 | } else if (rtc_status & ACPI_EVENT_FLAG_SET) { | |
1161 | unsigned char mask; | |
1162 | *rtc_control &= ~RTC_AIE; | |
1163 | CMOS_WRITE(*rtc_control, RTC_CONTROL); | |
1164 | mask = CMOS_READ(RTC_INTR_FLAGS); | |
1165 | rtc_update_irq(cmos->rtc, 1, mask); | |
1166 | } | |
1167 | } | |
1168 | ||
a474aaed BH |
1169 | #else |
1170 | ||
5a167f45 | 1171 | static void cmos_wake_setup(struct device *dev) |
a474aaed BH |
1172 | { |
1173 | } | |
1174 | ||
983bf125 GM |
1175 | static void cmos_check_acpi_rtc_status(struct device *dev, |
1176 | unsigned char *rtc_control) | |
1177 | { | |
1178 | } | |
1179 | ||
a474aaed BH |
1180 | #endif |
1181 | ||
41ac8df9 | 1182 | #ifdef CONFIG_PNP |
7be2c7c9 DB |
1183 | |
1184 | #include <linux/pnp.h> | |
1185 | ||
5a167f45 | 1186 | static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) |
7be2c7c9 | 1187 | { |
a474aaed BH |
1188 | cmos_wake_setup(&pnp->dev); |
1189 | ||
a1e23a42 HG |
1190 | if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) { |
1191 | unsigned int irq = 0; | |
1192 | #ifdef CONFIG_X86 | |
6cd8fa87 MG |
1193 | /* Some machines contain a PNP entry for the RTC, but |
1194 | * don't define the IRQ. It should always be safe to | |
a1e23a42 | 1195 | * hardcode it on systems with a legacy PIC. |
6cd8fa87 | 1196 | */ |
a1e23a42 HG |
1197 | if (nr_legacy_irqs()) |
1198 | irq = 8; | |
1199 | #endif | |
8766ad0c | 1200 | return cmos_do_probe(&pnp->dev, |
a1e23a42 HG |
1201 | pnp_get_resource(pnp, IORESOURCE_IO, 0), irq); |
1202 | } else { | |
6cd8fa87 | 1203 | return cmos_do_probe(&pnp->dev, |
8766ad0c BH |
1204 | pnp_get_resource(pnp, IORESOURCE_IO, 0), |
1205 | pnp_irq(pnp, 0)); | |
a1e23a42 | 1206 | } |
7be2c7c9 DB |
1207 | } |
1208 | ||
a3a0673b | 1209 | static void cmos_pnp_remove(struct pnp_dev *pnp) |
7be2c7c9 DB |
1210 | { |
1211 | cmos_do_remove(&pnp->dev); | |
1212 | } | |
1213 | ||
004731b2 | 1214 | static void cmos_pnp_shutdown(struct pnp_dev *pnp) |
74c4633d | 1215 | { |
31632dbd MR |
1216 | struct device *dev = &pnp->dev; |
1217 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
1218 | ||
88b8d33b AH |
1219 | if (system_state == SYSTEM_POWER_OFF) { |
1220 | int retval = cmos_poweroff(dev); | |
1221 | ||
1222 | if (cmos_aie_poweroff(dev) < 0 && !retval) | |
1223 | return; | |
1224 | } | |
74c4633d | 1225 | |
31632dbd | 1226 | cmos_do_shutdown(cmos->irq); |
74c4633d | 1227 | } |
7be2c7c9 DB |
1228 | |
1229 | static const struct pnp_device_id rtc_ids[] = { | |
1230 | { .id = "PNP0b00", }, | |
1231 | { .id = "PNP0b01", }, | |
1232 | { .id = "PNP0b02", }, | |
1233 | { }, | |
1234 | }; | |
1235 | MODULE_DEVICE_TABLE(pnp, rtc_ids); | |
1236 | ||
1237 | static struct pnp_driver cmos_pnp_driver = { | |
1238 | .name = (char *) driver_name, | |
1239 | .id_table = rtc_ids, | |
1240 | .probe = cmos_pnp_probe, | |
a3a0673b | 1241 | .remove = cmos_pnp_remove, |
004731b2 | 1242 | .shutdown = cmos_pnp_shutdown, |
7be2c7c9 DB |
1243 | |
1244 | /* flag ensures resume() gets called, and stops syslog spam */ | |
1245 | .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, | |
a8a3808b SK |
1246 | .driver = { |
1247 | .pm = &cmos_pm_ops, | |
1248 | }, | |
7be2c7c9 DB |
1249 | }; |
1250 | ||
1da2e3d6 | 1251 | #endif /* CONFIG_PNP */ |
7be2c7c9 | 1252 | |
3bcbaf6e SAS |
1253 | #ifdef CONFIG_OF |
1254 | static const struct of_device_id of_cmos_match[] = { | |
1255 | { | |
1256 | .compatible = "motorola,mc146818", | |
1257 | }, | |
1258 | { }, | |
1259 | }; | |
1260 | MODULE_DEVICE_TABLE(of, of_cmos_match); | |
1261 | ||
1262 | static __init void cmos_of_init(struct platform_device *pdev) | |
1263 | { | |
1264 | struct device_node *node = pdev->dev.of_node; | |
3bcbaf6e SAS |
1265 | const __be32 *val; |
1266 | ||
1267 | if (!node) | |
1268 | return; | |
1269 | ||
1270 | val = of_get_property(node, "ctrl-reg", NULL); | |
1271 | if (val) | |
1272 | CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL); | |
1273 | ||
1274 | val = of_get_property(node, "freq-reg", NULL); | |
1275 | if (val) | |
1276 | CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT); | |
3bcbaf6e SAS |
1277 | } |
1278 | #else | |
1279 | static inline void cmos_of_init(struct platform_device *pdev) {} | |
3bcbaf6e | 1280 | #endif |
7be2c7c9 DB |
1281 | /*----------------------------------------------------------------*/ |
1282 | ||
41ac8df9 | 1283 | /* Platform setup should have set up an RTC device, when PNP is |
bcd9b89c | 1284 | * unavailable ... this could happen even on (older) PCs. |
7be2c7c9 DB |
1285 | */ |
1286 | ||
1287 | static int __init cmos_platform_probe(struct platform_device *pdev) | |
1288 | { | |
31632dbd MR |
1289 | struct resource *resource; |
1290 | int irq; | |
1291 | ||
3bcbaf6e | 1292 | cmos_of_init(pdev); |
a474aaed | 1293 | cmos_wake_setup(&pdev->dev); |
31632dbd MR |
1294 | |
1295 | if (RTC_IOMAPPED) | |
1296 | resource = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
1297 | else | |
1298 | resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1299 | irq = platform_get_irq(pdev, 0); | |
1300 | if (irq < 0) | |
1301 | irq = -1; | |
1302 | ||
1303 | return cmos_do_probe(&pdev->dev, resource, irq); | |
7be2c7c9 DB |
1304 | } |
1305 | ||
a3a0673b | 1306 | static int cmos_platform_remove(struct platform_device *pdev) |
7be2c7c9 DB |
1307 | { |
1308 | cmos_do_remove(&pdev->dev); | |
1309 | return 0; | |
1310 | } | |
1311 | ||
1312 | static void cmos_platform_shutdown(struct platform_device *pdev) | |
1313 | { | |
31632dbd MR |
1314 | struct device *dev = &pdev->dev; |
1315 | struct cmos_rtc *cmos = dev_get_drvdata(dev); | |
1316 | ||
88b8d33b AH |
1317 | if (system_state == SYSTEM_POWER_OFF) { |
1318 | int retval = cmos_poweroff(dev); | |
1319 | ||
1320 | if (cmos_aie_poweroff(dev) < 0 && !retval) | |
1321 | return; | |
1322 | } | |
74c4633d | 1323 | |
31632dbd | 1324 | cmos_do_shutdown(cmos->irq); |
7be2c7c9 DB |
1325 | } |
1326 | ||
ad28a07b KS |
1327 | /* work with hotplug and coldplug */ |
1328 | MODULE_ALIAS("platform:rtc_cmos"); | |
1329 | ||
7be2c7c9 | 1330 | static struct platform_driver cmos_platform_driver = { |
a3a0673b | 1331 | .remove = cmos_platform_remove, |
7be2c7c9 DB |
1332 | .shutdown = cmos_platform_shutdown, |
1333 | .driver = { | |
c823a202 | 1334 | .name = driver_name, |
2fb08e6c | 1335 | .pm = &cmos_pm_ops, |
c8a6046e | 1336 | .of_match_table = of_match_ptr(of_cmos_match), |
7be2c7c9 DB |
1337 | } |
1338 | }; | |
1339 | ||
65909814 TLSC |
1340 | #ifdef CONFIG_PNP |
1341 | static bool pnp_driver_registered; | |
1342 | #endif | |
1343 | static bool platform_driver_registered; | |
1344 | ||
7be2c7c9 DB |
1345 | static int __init cmos_init(void) |
1346 | { | |
72f22b1e BH |
1347 | int retval = 0; |
1348 | ||
1da2e3d6 | 1349 | #ifdef CONFIG_PNP |
65909814 TLSC |
1350 | retval = pnp_register_driver(&cmos_pnp_driver); |
1351 | if (retval == 0) | |
1352 | pnp_driver_registered = true; | |
72f22b1e BH |
1353 | #endif |
1354 | ||
65909814 | 1355 | if (!cmos_rtc.dev) { |
72f22b1e BH |
1356 | retval = platform_driver_probe(&cmos_platform_driver, |
1357 | cmos_platform_probe); | |
65909814 TLSC |
1358 | if (retval == 0) |
1359 | platform_driver_registered = true; | |
1360 | } | |
72f22b1e BH |
1361 | |
1362 | if (retval == 0) | |
1363 | return 0; | |
1364 | ||
1365 | #ifdef CONFIG_PNP | |
65909814 TLSC |
1366 | if (pnp_driver_registered) |
1367 | pnp_unregister_driver(&cmos_pnp_driver); | |
72f22b1e BH |
1368 | #endif |
1369 | return retval; | |
7be2c7c9 DB |
1370 | } |
1371 | module_init(cmos_init); | |
1372 | ||
1373 | static void __exit cmos_exit(void) | |
1374 | { | |
1da2e3d6 | 1375 | #ifdef CONFIG_PNP |
65909814 TLSC |
1376 | if (pnp_driver_registered) |
1377 | pnp_unregister_driver(&cmos_pnp_driver); | |
72f22b1e | 1378 | #endif |
65909814 TLSC |
1379 | if (platform_driver_registered) |
1380 | platform_driver_unregister(&cmos_platform_driver); | |
7be2c7c9 DB |
1381 | } |
1382 | module_exit(cmos_exit); | |
1383 | ||
1384 | ||
7be2c7c9 DB |
1385 | MODULE_AUTHOR("David Brownell"); |
1386 | MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); | |
1387 | MODULE_LICENSE("GPL"); |