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Merge tag 'for-5.19-rc7-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave...
[linux-2.6-block.git] / drivers / rtc / rtc-abx80x.c
CommitLineData
2fcdf5fd 1// SPDX-License-Identifier: GPL-2.0
4d61ff6b
PDM		 2/*
3 * A driver for the I2C members of the Abracon AB x8xx RTC family,
4 * and compatible: AB 1805 and AB 0805
5 *
6 * Copyright 2014-2015 Macq S.A.
7 *
8 * Author: Philippe De Muyter <phdm@macqel.be>
7d1e5bfe 9 * Author: Alexandre Belloni <alexandre.belloni@bootlin.com>
4d61ff6b 10 *
4d61ff6b
PDM		 11 */
12
13#include <linux/bcd.h>
14#include <linux/i2c.h>
15#include <linux/module.h>
ac363ace 16#include <linux/of_device.h>
4d61ff6b 17#include <linux/rtc.h>
749e36d0 18#include <linux/watchdog.h>
4d61ff6b
PDM		 19
20#define ABX8XX_REG_HTH 0x00
21#define ABX8XX_REG_SC 0x01
22#define ABX8XX_REG_MN 0x02
23#define ABX8XX_REG_HR 0x03
24#define ABX8XX_REG_DA 0x04
25#define ABX8XX_REG_MO 0x05
26#define ABX8XX_REG_YR 0x06
27#define ABX8XX_REG_WD 0x07
28
718a820a
AB		 29#define ABX8XX_REG_AHTH 0x08
30#define ABX8XX_REG_ASC 0x09
31#define ABX8XX_REG_AMN 0x0a
32#define ABX8XX_REG_AHR 0x0b
33#define ABX8XX_REG_ADA 0x0c
34#define ABX8XX_REG_AMO 0x0d
35#define ABX8XX_REG_AWD 0x0e
36
37#define ABX8XX_REG_STATUS 0x0f
38#define ABX8XX_STATUS_AF BIT(2)
ffe1c5a2 39#define ABX8XX_STATUS_BLF BIT(4)
749e36d0 40#define ABX8XX_STATUS_WDT BIT(6)
718a820a 41
4d61ff6b 42#define ABX8XX_REG_CTRL1 0x10
5f1b2f77 43#define ABX8XX_CTRL_WRITE BIT(0)
718a820a 44#define ABX8XX_CTRL_ARST BIT(2)
4d61ff6b
PDM		 45#define ABX8XX_CTRL_12_24 BIT(6)
46
75455e25
MV		 47#define ABX8XX_REG_CTRL2 0x11
48#define ABX8XX_CTRL2_RSVD BIT(5)
49
718a820a
AB		 50#define ABX8XX_REG_IRQ 0x12
51#define ABX8XX_IRQ_AIE BIT(2)
52#define ABX8XX_IRQ_IM_1_4 (0x3 << 5)
53
54#define ABX8XX_REG_CD_TIMER_CTL 0x18
55
59a8383a
MJ		 56#define ABX8XX_REG_OSC 0x1c
57#define ABX8XX_OSC_FOS BIT(3)
58#define ABX8XX_OSC_BOS BIT(4)
59#define ABX8XX_OSC_ACAL_512 BIT(5)
60#define ABX8XX_OSC_ACAL_1024 BIT(6)
61
62#define ABX8XX_OSC_OSEL BIT(7)
63
64#define ABX8XX_REG_OSS 0x1d
ee087744 65#define ABX8XX_OSS_OF BIT(1)
59a8383a
MJ		 66#define ABX8XX_OSS_OMODE BIT(4)
67
749e36d0
JG		 68#define ABX8XX_REG_WDT 0x1b
69#define ABX8XX_WDT_WDS BIT(7)
70#define ABX8XX_WDT_BMB_MASK 0x7c
71#define ABX8XX_WDT_BMB_SHIFT 2
72#define ABX8XX_WDT_MAX_TIME (ABX8XX_WDT_BMB_MASK >> ABX8XX_WDT_BMB_SHIFT)
73#define ABX8XX_WDT_WRB_MASK 0x03
74#define ABX8XX_WDT_WRB_1HZ 0x02
75
4d61ff6b 76#define ABX8XX_REG_CFG_KEY 0x1f
59a8383a 77#define ABX8XX_CFG_KEY_OSC 0xa1
4d61ff6b
PDM		 78#define ABX8XX_CFG_KEY_MISC 0x9d
79
80#define ABX8XX_REG_ID0 0x28
81
75455e25
MV		 82#define ABX8XX_REG_OUT_CTRL 0x30
83#define ABX8XX_OUT_CTRL_EXDS BIT(4)
84
4d61ff6b
PDM		 85#define ABX8XX_REG_TRICKLE 0x20
86#define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0
87#define ABX8XX_TRICKLE_STANDARD_DIODE 0x8
88#define ABX8XX_TRICKLE_SCHOTTKY_DIODE 0x4
89
90static u8 trickle_resistors[] = {0, 3, 6, 11};
91
92enum abx80x_chip {AB0801, AB0803, AB0804, AB0805,
75455e25 93 AB1801, AB1803, AB1804, AB1805, RV1805, ABX80X};
4d61ff6b
PDM		 94
95struct abx80x_cap {
96 u16 pn;
97 bool has_tc;
749e36d0 98 bool has_wdog;
4d61ff6b
PDM		 99};
100
101static struct abx80x_cap abx80x_caps[] = {
102 [AB0801] = {.pn = 0x0801},
103 [AB0803] = {.pn = 0x0803},
749e36d0
JG		 104 [AB0804] = {.pn = 0x0804, .has_tc = true, .has_wdog = true},
105 [AB0805] = {.pn = 0x0805, .has_tc = true, .has_wdog = true},
4d61ff6b
PDM		 106 [AB1801] = {.pn = 0x1801},
107 [AB1803] = {.pn = 0x1803},
749e36d0
JG		 108 [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true},
109 [AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
75455e25 110 [RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
4d61ff6b
PDM		 111 [ABX80X] = {.pn = 0}
112};
113
af69f9a7
JG		 114struct abx80x_priv {
115 struct rtc_device *rtc;
116 struct i2c_client *client;
749e36d0 117 struct watchdog_device wdog;
af69f9a7
JG		 118};
119
49dfc1f1
KF		 120static int abx80x_write_config_key(struct i2c_client *client, u8 key)
121{
122 if (i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY, key) < 0) {
123 dev_err(&client->dev, "Unable to write configuration key\n");
124 return -EIO;
125 }
126
127 return 0;
128}
129
59a8383a
MJ		 130static int abx80x_is_rc_mode(struct i2c_client *client)
131{
132 int flags = 0;
133
134 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
135 if (flags < 0) {
136 dev_err(&client->dev,
137 "Failed to read autocalibration attribute\n");
138 return flags;
139 }
140
141 return (flags & ABX8XX_OSS_OMODE) ? 1 : 0;
142}
143
4d61ff6b
PDM		 144static int abx80x_enable_trickle_charger(struct i2c_client *client,
145 u8 trickle_cfg)
146{
147 int err;
148
149 /*
150 * Write the configuration key register to enable access to the Trickle
151 * register
152 */
49dfc1f1 153 if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_MISC) < 0)
4d61ff6b 154 return -EIO;
4d61ff6b
PDM		 155
156 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_TRICKLE,
157 ABX8XX_TRICKLE_CHARGE_ENABLE |
158 trickle_cfg);
159 if (err < 0) {
160 dev_err(&client->dev, "Unable to write trickle register\n");
161 return -EIO;
162 }
163
164 return 0;
165}
166
167static int abx80x_rtc_read_time(struct device *dev, struct rtc_time *tm)
168{
169 struct i2c_client *client = to_i2c_client(dev);
170 unsigned char buf[8];
ee087744
MJ		 171 int err, flags, rc_mode = 0;
172
173 /* Read the Oscillator Failure only in XT mode */
174 rc_mode = abx80x_is_rc_mode(client);
175 if (rc_mode < 0)
176 return rc_mode;
177
178 if (!rc_mode) {
179 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
180 if (flags < 0)
181 return flags;
182
183 if (flags & ABX8XX_OSS_OF) {
184 dev_err(dev, "Oscillator failure, data is invalid.\n");
185 return -EINVAL;
186 }
187 }
4d61ff6b
PDM		 188
189 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_HTH,
190 sizeof(buf), buf);
191 if (err < 0) {
192 dev_err(&client->dev, "Unable to read date\n");
193 return -EIO;
194 }
195
196 tm->tm_sec = bcd2bin(buf[ABX8XX_REG_SC] & 0x7F);
197 tm->tm_min = bcd2bin(buf[ABX8XX_REG_MN] & 0x7F);
198 tm->tm_hour = bcd2bin(buf[ABX8XX_REG_HR] & 0x3F);
199 tm->tm_wday = buf[ABX8XX_REG_WD] & 0x7;
200 tm->tm_mday = bcd2bin(buf[ABX8XX_REG_DA] & 0x3F);
201 tm->tm_mon = bcd2bin(buf[ABX8XX_REG_MO] & 0x1F) - 1;
202 tm->tm_year = bcd2bin(buf[ABX8XX_REG_YR]) + 100;
203
fbfd36fd 204 return 0;
4d61ff6b
PDM		 205}
206
207static int abx80x_rtc_set_time(struct device *dev, struct rtc_time *tm)
208{
209 struct i2c_client *client = to_i2c_client(dev);
210 unsigned char buf[8];
ee087744 211 int err, flags;
4d61ff6b
PDM		 212
213 if (tm->tm_year < 100)
214 return -EINVAL;
215
216 buf[ABX8XX_REG_HTH] = 0;
217 buf[ABX8XX_REG_SC] = bin2bcd(tm->tm_sec);
218 buf[ABX8XX_REG_MN] = bin2bcd(tm->tm_min);
219 buf[ABX8XX_REG_HR] = bin2bcd(tm->tm_hour);
220 buf[ABX8XX_REG_DA] = bin2bcd(tm->tm_mday);
221 buf[ABX8XX_REG_MO] = bin2bcd(tm->tm_mon + 1);
222 buf[ABX8XX_REG_YR] = bin2bcd(tm->tm_year - 100);
223 buf[ABX8XX_REG_WD] = tm->tm_wday;
224
225 err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_HTH,
226 sizeof(buf), buf);
227 if (err < 0) {
228 dev_err(&client->dev, "Unable to write to date registers\n");
229 return -EIO;
230 }
231
ee087744
MJ		 232 /* Clear the OF bit of Oscillator Status Register */
233 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
234 if (flags < 0)
235 return flags;
236
237 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSS,
238 flags & ~ABX8XX_OSS_OF);
239 if (err < 0) {
240 dev_err(&client->dev, "Unable to write oscillator status register\n");
241 return err;
242 }
243
4d61ff6b
PDM		 244 return 0;
245}
246
718a820a
AB		 247static irqreturn_t abx80x_handle_irq(int irq, void *dev_id)
248{
249 struct i2c_client *client = dev_id;
af69f9a7
JG		 250 struct abx80x_priv *priv = i2c_get_clientdata(client);
251 struct rtc_device *rtc = priv->rtc;
718a820a
AB		 252 int status;
253
254 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
255 if (status < 0)
256 return IRQ_NONE;
257
258 if (status & ABX8XX_STATUS_AF)
259 rtc_update_irq(rtc, 1, RTC_AF | RTC_IRQF);
260
749e36d0
JG		 261 /*
262 * It is unclear if we'll get an interrupt before the external
263 * reset kicks in.
264 */
265 if (status & ABX8XX_STATUS_WDT)
266 dev_alert(&client->dev, "watchdog timeout interrupt.\n");
267
718a820a
AB		 268 i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0);
269
270 return IRQ_HANDLED;
271}
272
273static int abx80x_read_alarm(struct device *dev, struct rtc_wkalrm *t)
274{
275 struct i2c_client *client = to_i2c_client(dev);
276 unsigned char buf[7];
277
278 int irq_mask, err;
279
280 if (client->irq <= 0)
281 return -EINVAL;
282
283 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ASC,
284 sizeof(buf), buf);
285 if (err)
286 return err;
287
288 irq_mask = i2c_smbus_read_byte_data(client, ABX8XX_REG_IRQ);
289 if (irq_mask < 0)
290 return irq_mask;
291
292 t->time.tm_sec = bcd2bin(buf[0] & 0x7F);
293 t->time.tm_min = bcd2bin(buf[1] & 0x7F);
294 t->time.tm_hour = bcd2bin(buf[2] & 0x3F);
295 t->time.tm_mday = bcd2bin(buf[3] & 0x3F);
296 t->time.tm_mon = bcd2bin(buf[4] & 0x1F) - 1;
297 t->time.tm_wday = buf[5] & 0x7;
298
299 t->enabled = !!(irq_mask & ABX8XX_IRQ_AIE);
300 t->pending = (buf[6] & ABX8XX_STATUS_AF) && t->enabled;
301
302 return err;
303}
304
305static int abx80x_set_alarm(struct device *dev, struct rtc_wkalrm *t)
306{
307 struct i2c_client *client = to_i2c_client(dev);
308 u8 alarm[6];
309 int err;
310
311 if (client->irq <= 0)
312 return -EINVAL;
313
314 alarm[0] = 0x0;
315 alarm[1] = bin2bcd(t->time.tm_sec);
316 alarm[2] = bin2bcd(t->time.tm_min);
317 alarm[3] = bin2bcd(t->time.tm_hour);
318 alarm[4] = bin2bcd(t->time.tm_mday);
319 alarm[5] = bin2bcd(t->time.tm_mon + 1);
320
321 err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_AHTH,
322 sizeof(alarm), alarm);
323 if (err < 0) {
324 dev_err(&client->dev, "Unable to write alarm registers\n");
325 return -EIO;
326 }
327
328 if (t->enabled) {
329 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
330 (ABX8XX_IRQ_IM_1_4 |
331 ABX8XX_IRQ_AIE));
332 if (err)
333 return err;
334 }
335
336 return 0;
337}
338
59a8383a
MJ		 339static int abx80x_rtc_set_autocalibration(struct device *dev,
340 int autocalibration)
341{
342 struct i2c_client *client = to_i2c_client(dev);
343 int retval, flags = 0;
344
345 if ((autocalibration != 0) && (autocalibration != 1024) &&
346 (autocalibration != 512)) {
347 dev_err(dev, "autocalibration value outside permitted range\n");
348 return -EINVAL;
349 }
350
351 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
352 if (flags < 0)
353 return flags;
354
355 if (autocalibration == 0) {
356 flags &= ~(ABX8XX_OSC_ACAL_512 | ABX8XX_OSC_ACAL_1024);
357 } else if (autocalibration == 1024) {
358 /* 1024 autocalibration is 0x10 */
359 flags |= ABX8XX_OSC_ACAL_1024;
360 flags &= ~(ABX8XX_OSC_ACAL_512);
361 } else {
362 /* 512 autocalibration is 0x11 */
363 flags |= (ABX8XX_OSC_ACAL_1024 | ABX8XX_OSC_ACAL_512);
364 }
365
366 /* Unlock write access to Oscillator Control Register */
49dfc1f1
KF		 367 if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_OSC) < 0)
368 return -EIO;
59a8383a
MJ		 369
370 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
371
372 return retval;
373}
374
375static int abx80x_rtc_get_autocalibration(struct device *dev)
376{
377 struct i2c_client *client = to_i2c_client(dev);
378 int flags = 0, autocalibration;
379
380 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
381 if (flags < 0)
382 return flags;
383
384 if (flags & ABX8XX_OSC_ACAL_512)
385 autocalibration = 512;
386 else if (flags & ABX8XX_OSC_ACAL_1024)
387 autocalibration = 1024;
388 else
389 autocalibration = 0;
390
391 return autocalibration;
392}
393
394static ssize_t autocalibration_store(struct device *dev,
395 struct device_attribute *attr,
396 const char *buf, size_t count)
397{
398 int retval;
399 unsigned long autocalibration = 0;
400
401 retval = kstrtoul(buf, 10, &autocalibration);
402 if (retval < 0) {
403 dev_err(dev, "Failed to store RTC autocalibration attribute\n");
404 return -EINVAL;
405 }
406
559e883e 407 retval = abx80x_rtc_set_autocalibration(dev->parent, autocalibration);
59a8383a
MJ		 408
409 return retval ? retval : count;
410}
411
412static ssize_t autocalibration_show(struct device *dev,
413 struct device_attribute *attr, char *buf)
414{
415 int autocalibration = 0;
416
559e883e 417 autocalibration = abx80x_rtc_get_autocalibration(dev->parent);
59a8383a
MJ		 418 if (autocalibration < 0) {
419 dev_err(dev, "Failed to read RTC autocalibration\n");
420 sprintf(buf, "0\n");
421 return autocalibration;
422 }
423
424 return sprintf(buf, "%d\n", autocalibration);
425}
426
427static DEVICE_ATTR_RW(autocalibration);
428
429static ssize_t oscillator_store(struct device *dev,
430 struct device_attribute *attr,
431 const char *buf, size_t count)
432{
559e883e 433 struct i2c_client *client = to_i2c_client(dev->parent);
59a8383a
MJ		 434 int retval, flags, rc_mode = 0;
435
436 if (strncmp(buf, "rc", 2) == 0) {
437 rc_mode = 1;
438 } else if (strncmp(buf, "xtal", 4) == 0) {
439 rc_mode = 0;
440 } else {
441 dev_err(dev, "Oscillator selection value outside permitted ones\n");
442 return -EINVAL;
443 }
444
445 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
446 if (flags < 0)
447 return flags;
448
449 if (rc_mode == 0)
450 flags &= ~(ABX8XX_OSC_OSEL);
451 else
452 flags |= (ABX8XX_OSC_OSEL);
453
454 /* Unlock write access on Oscillator Control register */
49dfc1f1
KF		 455 if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_OSC) < 0)
456 return -EIO;
59a8383a
MJ		 457
458 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
459 if (retval < 0) {
460 dev_err(dev, "Failed to write Oscillator Control register\n");
461 return retval;
462 }
463
464 return retval ? retval : count;
465}
466
467static ssize_t oscillator_show(struct device *dev,
468 struct device_attribute *attr, char *buf)
469{
470 int rc_mode = 0;
559e883e 471 struct i2c_client *client = to_i2c_client(dev->parent);
59a8383a
MJ		 472
473 rc_mode = abx80x_is_rc_mode(client);
474
475 if (rc_mode < 0) {
476 dev_err(dev, "Failed to read RTC oscillator selection\n");
477 sprintf(buf, "\n");
478 return rc_mode;
479 }
480
481 if (rc_mode)
482 return sprintf(buf, "rc\n");
483 else
484 return sprintf(buf, "xtal\n");
485}
486
487static DEVICE_ATTR_RW(oscillator);
488
489static struct attribute *rtc_calib_attrs[] = {
490 &dev_attr_autocalibration.attr,
491 &dev_attr_oscillator.attr,
492 NULL,
493};
494
495static const struct attribute_group rtc_calib_attr_group = {
496 .attrs = rtc_calib_attrs,
497};
498
718a820a
AB		 499static int abx80x_alarm_irq_enable(struct device *dev, unsigned int enabled)
500{
501 struct i2c_client *client = to_i2c_client(dev);
502 int err;
503
504 if (enabled)
505 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
506 (ABX8XX_IRQ_IM_1_4 |
507 ABX8XX_IRQ_AIE));
508 else
509 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
510 ABX8XX_IRQ_IM_1_4);
511 return err;
512}
513
ffe1c5a2
MV		 514static int abx80x_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
515{
516 struct i2c_client *client = to_i2c_client(dev);
517 int status, tmp;
518
519 switch (cmd) {
520 case RTC_VL_READ:
521 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
522 if (status < 0)
523 return status;
524
9f05342a 525 tmp = status & ABX8XX_STATUS_BLF ? RTC_VL_BACKUP_LOW : 0;
ffe1c5a2 526
9f05342a 527 return put_user(tmp, (unsigned int __user *)arg);
ffe1c5a2
MV		 528
529 case RTC_VL_CLR:
530 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
531 if (status < 0)
532 return status;
533
534 status &= ~ABX8XX_STATUS_BLF;
535
536 tmp = i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0);
537 if (tmp < 0)
538 return tmp;
539
540 return 0;
541
542 default:
543 return -ENOIOCTLCMD;
544 }
545}
546
4d61ff6b
PDM		 547static const struct rtc_class_ops abx80x_rtc_ops = {
548 .read_time = abx80x_rtc_read_time,
549 .set_time = abx80x_rtc_set_time,
718a820a
AB		 550 .read_alarm = abx80x_read_alarm,
551 .set_alarm = abx80x_set_alarm,
552 .alarm_irq_enable = abx80x_alarm_irq_enable,
ffe1c5a2 553 .ioctl = abx80x_ioctl,
4d61ff6b
PDM		 554};
555
6e429f6b 556static int abx80x_dt_trickle_cfg(struct i2c_client *client)
4d61ff6b 557{
6e429f6b 558 struct device_node *np = client->dev.of_node;
4d61ff6b
PDM		 559 const char *diode;
560 int trickle_cfg = 0;
561 int i, ret;
562 u32 tmp;
563
564 ret = of_property_read_string(np, "abracon,tc-diode", &diode);
565 if (ret)
566 return ret;
567
6e429f6b 568 if (!strcmp(diode, "standard")) {
4d61ff6b 569 trickle_cfg |= ABX8XX_TRICKLE_STANDARD_DIODE;
6e429f6b 570 } else if (!strcmp(diode, "schottky")) {
4d61ff6b 571 trickle_cfg |= ABX8XX_TRICKLE_SCHOTTKY_DIODE;
6e429f6b
KF		 572 } else {
573 dev_dbg(&client->dev, "Invalid tc-diode value: %s\n", diode);
4d61ff6b 574 return -EINVAL;
6e429f6b 575 }
4d61ff6b
PDM		 576
577 ret = of_property_read_u32(np, "abracon,tc-resistor", &tmp);
578 if (ret)
579 return ret;
580
581 for (i = 0; i < sizeof(trickle_resistors); i++)
582 if (trickle_resistors[i] == tmp)
583 break;
584
6e429f6b
KF		 585 if (i == sizeof(trickle_resistors)) {
586 dev_dbg(&client->dev, "Invalid tc-resistor value: %u\n", tmp);
4d61ff6b 587 return -EINVAL;
6e429f6b 588 }
4d61ff6b
PDM		 589
590 return (trickle_cfg | i);
591}
592
749e36d0
JG		 593#ifdef CONFIG_WATCHDOG
594
595static inline u8 timeout_bits(unsigned int timeout)
596{
597 return ((timeout << ABX8XX_WDT_BMB_SHIFT) & ABX8XX_WDT_BMB_MASK) |
598 ABX8XX_WDT_WRB_1HZ;
599}
600
601static int __abx80x_wdog_set_timeout(struct watchdog_device *wdog,
602 unsigned int timeout)
603{
604 struct abx80x_priv *priv = watchdog_get_drvdata(wdog);
605 u8 val = ABX8XX_WDT_WDS | timeout_bits(timeout);
606
607 /*
608 * Writing any timeout to the WDT register resets the watchdog timer.
609 * Writing 0 disables it.
610 */
611 return i2c_smbus_write_byte_data(priv->client, ABX8XX_REG_WDT, val);
612}
613
614static int abx80x_wdog_set_timeout(struct watchdog_device *wdog,
615 unsigned int new_timeout)
616{
617 int err = 0;
618
619 if (watchdog_hw_running(wdog))
620 err = __abx80x_wdog_set_timeout(wdog, new_timeout);
621
622 if (err == 0)
623 wdog->timeout = new_timeout;
624
625 return err;
626}
627
628static int abx80x_wdog_ping(struct watchdog_device *wdog)
629{
630 return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
631}
632
633static int abx80x_wdog_start(struct watchdog_device *wdog)
634{
635 return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
636}
637
638static int abx80x_wdog_stop(struct watchdog_device *wdog)
639{
640 return __abx80x_wdog_set_timeout(wdog, 0);
641}
642
643static const struct watchdog_info abx80x_wdog_info = {
644 .identity = "abx80x watchdog",
645 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
646};
647
648static const struct watchdog_ops abx80x_wdog_ops = {
649 .owner = THIS_MODULE,
650 .start = abx80x_wdog_start,
651 .stop = abx80x_wdog_stop,
652 .ping = abx80x_wdog_ping,
653 .set_timeout = abx80x_wdog_set_timeout,
654};
655
656static int abx80x_setup_watchdog(struct abx80x_priv *priv)
657{
658 priv->wdog.parent = &priv->client->dev;
659 priv->wdog.ops = &abx80x_wdog_ops;
660 priv->wdog.info = &abx80x_wdog_info;
661 priv->wdog.min_timeout = 1;
662 priv->wdog.max_timeout = ABX8XX_WDT_MAX_TIME;
663 priv->wdog.timeout = ABX8XX_WDT_MAX_TIME;
664
665 watchdog_set_drvdata(&priv->wdog, priv);
666
667 return devm_watchdog_register_device(&priv->client->dev, &priv->wdog);
668}
669#else
670static int abx80x_setup_watchdog(struct abx80x_priv *priv)
671{
672 return 0;
673}
674#endif
675
4d61ff6b
PDM		 676static int abx80x_probe(struct i2c_client *client,
677 const struct i2c_device_id *id)
678{
679 struct device_node *np = client->dev.of_node;
af69f9a7 680 struct abx80x_priv *priv;
4d61ff6b
PDM		 681 int i, data, err, trickle_cfg = -EINVAL;
682 char buf[7];
683 unsigned int part = id->driver_data;
684 unsigned int partnumber;
685 unsigned int majrev, minrev;
686 unsigned int lot;
687 unsigned int wafer;
688 unsigned int uid;
689
690 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
691 return -ENODEV;
692
693 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ID0,
694 sizeof(buf), buf);
695 if (err < 0) {
696 dev_err(&client->dev, "Unable to read partnumber\n");
697 return -EIO;
698 }
699
700 partnumber = (buf[0] << 8) | buf[1];
701 majrev = buf[2] >> 3;
702 minrev = buf[2] & 0x7;
703 lot = ((buf[4] & 0x80) << 2) | ((buf[6] & 0x80) << 1) | buf[3];
704 uid = ((buf[4] & 0x7f) << 8) | buf[5];
705 wafer = (buf[6] & 0x7c) >> 2;
706 dev_info(&client->dev, "model %04x, revision %u.%u, lot %x, wafer %x, uid %x\n",
707 partnumber, majrev, minrev, lot, wafer, uid);
708
709 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL1);
710 if (data < 0) {
711 dev_err(&client->dev, "Unable to read control register\n");
712 return -EIO;
713 }
714
715 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL1,
718a820a
AB		 716 ((data & ~(ABX8XX_CTRL_12_24 |
717 ABX8XX_CTRL_ARST)) |
4d61ff6b
PDM		 718 ABX8XX_CTRL_WRITE));
719 if (err < 0) {
720 dev_err(&client->dev, "Unable to write control register\n");
721 return -EIO;
722 }
723
75455e25
MV		 724 /* Configure RV1805 specifics */
725 if (part == RV1805) {
726 /*
727 * Avoid accidentally entering test mode. This can happen
728 * on the RV1805 in case the reserved bit 5 in control2
729 * register is set. RV-1805-C3 datasheet indicates that
730 * the bit should be cleared in section 11h - Control2.
731 */
732 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL2);
733 if (data < 0) {
734 dev_err(&client->dev,
735 "Unable to read control2 register\n");
736 return -EIO;
737 }
738
739 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL2,
740 data & ~ABX8XX_CTRL2_RSVD);
741 if (err < 0) {
742 dev_err(&client->dev,
743 "Unable to write control2 register\n");
744 return -EIO;
745 }
746
747 /*
748 * Avoid extra power leakage. The RV1805 uses smaller
749 * 10pin package and the EXTI input is not present.
750 * Disable it to avoid leakage.
751 */
752 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_OUT_CTRL);
753 if (data < 0) {
754 dev_err(&client->dev,
755 "Unable to read output control register\n");
756 return -EIO;
757 }
758
759 /*
760 * Write the configuration key register to enable access to
761 * the config2 register
762 */
49dfc1f1 763 if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_MISC) < 0)
75455e25 764 return -EIO;
75455e25
MV		 765
766 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OUT_CTRL,
767 data | ABX8XX_OUT_CTRL_EXDS);
768 if (err < 0) {
769 dev_err(&client->dev,
770 "Unable to write output control register\n");
771 return -EIO;
772 }
773 }
774
4d61ff6b
PDM		 775 /* part autodetection */
776 if (part == ABX80X) {
777 for (i = 0; abx80x_caps[i].pn; i++)
778 if (partnumber == abx80x_caps[i].pn)
779 break;
780 if (abx80x_caps[i].pn == 0) {
781 dev_err(&client->dev, "Unknown part: %04x\n",
782 partnumber);
783 return -EINVAL;
784 }
785 part = i;
786 }
787
788 if (partnumber != abx80x_caps[part].pn) {
789 dev_err(&client->dev, "partnumber mismatch %04x != %04x\n",
790 partnumber, abx80x_caps[part].pn);
791 return -EINVAL;
792 }
793
794 if (np && abx80x_caps[part].has_tc)
6e429f6b 795 trickle_cfg = abx80x_dt_trickle_cfg(client);
4d61ff6b
PDM		 796
797 if (trickle_cfg > 0) {
798 dev_info(&client->dev, "Enabling trickle charger: %02x\n",
799 trickle_cfg);
800 abx80x_enable_trickle_charger(client, trickle_cfg);
801 }
802
718a820a
AB		 803 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CD_TIMER_CTL,
804 BIT(2));
805 if (err)
806 return err;
807
af69f9a7
JG		 808 priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
809 if (priv == NULL)
810 return -ENOMEM;
811
812 priv->rtc = devm_rtc_allocate_device(&client->dev);
813 if (IS_ERR(priv->rtc))
814 return PTR_ERR(priv->rtc);
4d61ff6b 815
af69f9a7
JG		 816 priv->rtc->ops = &abx80x_rtc_ops;
817 priv->client = client;
9360a6a8 818
af69f9a7 819 i2c_set_clientdata(client, priv);
4d61ff6b 820
749e36d0
JG		 821 if (abx80x_caps[part].has_wdog) {
822 err = abx80x_setup_watchdog(priv);
823 if (err)
824 return err;
825 }
826
718a820a
AB		 827 if (client->irq > 0) {
828 dev_info(&client->dev, "IRQ %d supplied\n", client->irq);
829 err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
830 abx80x_handle_irq,
831 IRQF_SHARED | IRQF_ONESHOT,
832 "abx8xx",
833 client);
834 if (err) {
835 dev_err(&client->dev, "unable to request IRQ, alarms disabled\n");
836 client->irq = 0;
837 }
838 }
839
559e883e 840 err = rtc_add_group(priv->rtc, &rtc_calib_attr_group);
59a8383a
MJ		 841 if (err) {
842 dev_err(&client->dev, "Failed to create sysfs group: %d\n",
843 err);
844 return err;
845 }
846
fdcfd854 847 return devm_rtc_register_device(priv->rtc);
4d61ff6b
PDM		 848}
849
4d61ff6b
PDM		 850static const struct i2c_device_id abx80x_id[] = {
851 { "abx80x", ABX80X },
852 { "ab0801", AB0801 },
853 { "ab0803", AB0803 },
854 { "ab0804", AB0804 },
855 { "ab0805", AB0805 },
856 { "ab1801", AB1801 },
857 { "ab1803", AB1803 },
858 { "ab1804", AB1804 },
859 { "ab1805", AB1805 },
75455e25 860 { "rv1805", RV1805 },
4d61ff6b
PDM		 861 { }
862};
863MODULE_DEVICE_TABLE(i2c, abx80x_id);
864
ac363ace
KF		 865#ifdef CONFIG_OF
866static const struct of_device_id abx80x_of_match[] = {
867 {
868 .compatible = "abracon,abx80x",
869 .data = (void *)ABX80X
870 },
871 {
872 .compatible = "abracon,ab0801",
873 .data = (void *)AB0801
874 },
875 {
876 .compatible = "abracon,ab0803",
877 .data = (void *)AB0803
878 },
879 {
880 .compatible = "abracon,ab0804",
881 .data = (void *)AB0804
882 },
883 {
884 .compatible = "abracon,ab0805",
885 .data = (void *)AB0805
886 },
887 {
888 .compatible = "abracon,ab1801",
889 .data = (void *)AB1801
890 },
891 {
892 .compatible = "abracon,ab1803",
893 .data = (void *)AB1803
894 },
895 {
896 .compatible = "abracon,ab1804",
897 .data = (void *)AB1804
898 },
899 {
900 .compatible = "abracon,ab1805",
901 .data = (void *)AB1805
902 },
903 {
904 .compatible = "microcrystal,rv1805",
905 .data = (void *)RV1805
906 },
907 { }
908};
909MODULE_DEVICE_TABLE(of, abx80x_of_match);
910#endif
911
4d61ff6b
PDM		 912static struct i2c_driver abx80x_driver = {
913 .driver = {
914 .name = "rtc-abx80x",
ac363ace 915 .of_match_table = of_match_ptr(abx80x_of_match),
4d61ff6b
PDM		 916 },
917 .probe = abx80x_probe,
4d61ff6b
PDM		 918 .id_table = abx80x_id,
919};
920
921module_i2c_driver(abx80x_driver);
922
923MODULE_AUTHOR("Philippe De Muyter <phdm@macqel.be>");
7d1e5bfe 924MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
4d61ff6b
PDM		 925MODULE_DESCRIPTION("Abracon ABX80X RTC driver");
926MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)