[linux-block.git] / drivers / rpmsg / qcom_glink_smem.c

/*
 * Copyright (c) 2016, Linaro Ltd
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/mfd/syscon.h>
#include <linux/slab.h>
#include <linux/rpmsg.h>
#include <linux/idr.h>
#include <linux/circ_buf.h>
#include <linux/soc/qcom/smem.h>
#include <linux/sizes.h>
#include <linux/delay.h>
#include <linux/regmap.h>
#include <linux/workqueue.h>
#include <linux/list.h>

#include <linux/rpmsg/qcom_glink.h>

#include "qcom_glink_native.h"

#define FIFO_FULL_RESERVE 8
#define FIFO_ALIGNMENT 8
#define TX_BLOCKED_CMD_RESERVE 8 /* size of struct read_notif_request */

#define SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR	478
#define SMEM_GLINK_NATIVE_XPRT_FIFO_0		479
#define SMEM_GLINK_NATIVE_XPRT_FIFO_1		480

struct glink_smem_pipe {
	struct qcom_glink_pipe native;

	__le32 *tail;
	__le32 *head;

	void *fifo;

	int remote_pid;
};

#define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native)

static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np)
{
	struct glink_smem_pipe *pipe = to_smem_pipe(np);
	size_t len;
	void *fifo;
	u32 head;
	u32 tail;

	if (!pipe->fifo) {
		fifo = qcom_smem_get(pipe->remote_pid,
				     SMEM_GLINK_NATIVE_XPRT_FIFO_1, &len);
		if (IS_ERR(fifo)) {
			pr_err("failed to acquire RX fifo handle: %ld\n",
			       PTR_ERR(fifo));
			return 0;
		}

		pipe->fifo = fifo;
		pipe->native.length = len;
	}

	head = le32_to_cpu(*pipe->head);
	tail = le32_to_cpu(*pipe->tail);

	if (head < tail)
		return pipe->native.length - tail + head;
	else
		return head - tail;
}

static void glink_smem_rx_peak(struct qcom_glink_pipe *np,
			       void *data, unsigned int offset, size_t count)
{
	struct glink_smem_pipe *pipe = to_smem_pipe(np);
	size_t len;
	u32 tail;

	tail = le32_to_cpu(*pipe->tail);
	tail += offset;
	if (tail >= pipe->native.length)
		tail -= pipe->native.length;

	len = min_t(size_t, count, pipe->native.length - tail);
	if (len) {
		__ioread32_copy(data, pipe->fifo + tail,
				len / sizeof(u32));
	}

	if (len != count) {
		__ioread32_copy(data + len, pipe->fifo,
				(count - len) / sizeof(u32));
	}
}

static void glink_smem_rx_advance(struct qcom_glink_pipe *np,
				  size_t count)
{
	struct glink_smem_pipe *pipe = to_smem_pipe(np);
	u32 tail;

	tail = le32_to_cpu(*pipe->tail);

	tail += count;
	if (tail > pipe->native.length)
		tail -= pipe->native.length;

	*pipe->tail = cpu_to_le32(tail);
}

static size_t glink_smem_tx_avail(struct qcom_glink_pipe *np)
{
	struct glink_smem_pipe *pipe = to_smem_pipe(np);
	u32 head;
	u32 tail;
	u32 avail;

	head = le32_to_cpu(*pipe->head);
	tail = le32_to_cpu(*pipe->tail);

	if (tail <= head)
		avail = pipe->native.length - head + tail;
	else
		avail = tail - head;

	if (avail < (FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE))
		avail = 0;
	else
		avail -= FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE;

	return avail;
}

static unsigned int glink_smem_tx_write_one(struct glink_smem_pipe *pipe,
					    unsigned int head,
					    const void *data, size_t count)
{
	size_t len;

	len = min_t(size_t, count, pipe->native.length - head);
	if (len)
		memcpy(pipe->fifo + head, data, len);

	if (len != count)
		memcpy(pipe->fifo, data + len, count - len);

	head += count;
	if (head >= pipe->native.length)
		head -= pipe->native.length;

	return head;
}

static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe,
				const void *hdr, size_t hlen,
				const void *data, size_t dlen)
{
	struct glink_smem_pipe *pipe = to_smem_pipe(glink_pipe);
	unsigned int head;

	head = le32_to_cpu(*pipe->head);

	head = glink_smem_tx_write_one(pipe, head, hdr, hlen);
	head = glink_smem_tx_write_one(pipe, head, data, dlen);

	/* Ensure head is always aligned to 8 bytes */
	head = ALIGN(head, 8);
	if (head >= pipe->native.length)
		head -= pipe->native.length;

	/* Ensure ordering of fifo and head update */
	wmb();

	*pipe->head = cpu_to_le32(head);
}

static void qcom_glink_smem_release(struct device *dev)
{
	kfree(dev);
}

struct qcom_glink *qcom_glink_smem_register(struct device *parent,
					    struct device_node *node)
{
	struct glink_smem_pipe *rx_pipe;
	struct glink_smem_pipe *tx_pipe;
	struct qcom_glink *glink;
	struct device *dev;
	u32 remote_pid;
	__le32 *descs;
	size_t size;
	int ret;

	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
	if (!dev)
		return ERR_PTR(-ENOMEM);

	dev->parent = parent;
	dev->of_node = node;
	dev->release = qcom_glink_smem_release;
	dev_set_name(dev, "%s:%s", node->parent->name, node->name);
	ret = device_register(dev);
	if (ret) {
		pr_err("failed to register glink edge\n");
		put_device(dev);
		return ERR_PTR(ret);
	}

	ret = of_property_read_u32(dev->of_node, "qcom,remote-pid",
				   &remote_pid);
	if (ret) {
		dev_err(dev, "failed to parse qcom,remote-pid\n");
		goto err_put_dev;
	}

	rx_pipe = devm_kzalloc(dev, sizeof(*rx_pipe), GFP_KERNEL);
	tx_pipe = devm_kzalloc(dev, sizeof(*tx_pipe), GFP_KERNEL);
	if (!rx_pipe || !tx_pipe) {
		ret = -ENOMEM;
		goto err_put_dev;
	}

	ret = qcom_smem_alloc(remote_pid,
			      SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, 32);
	if (ret && ret != -EEXIST) {
		dev_err(dev, "failed to allocate glink descriptors\n");
		goto err_put_dev;
	}

	descs = qcom_smem_get(remote_pid,
			      SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, &size);
	if (IS_ERR(descs)) {
		dev_err(dev, "failed to acquire xprt descriptor\n");
		ret = PTR_ERR(descs);
		goto err_put_dev;
	}

	if (size != 32) {
		dev_err(dev, "glink descriptor of invalid size\n");
		ret = -EINVAL;
		goto err_put_dev;
	}

	tx_pipe->tail = &descs[0];
	tx_pipe->head = &descs[1];
	rx_pipe->tail = &descs[2];
	rx_pipe->head = &descs[3];

	ret = qcom_smem_alloc(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
			      SZ_16K);
	if (ret && ret != -EEXIST) {
		dev_err(dev, "failed to allocate TX fifo\n");
		goto err_put_dev;
	}

	tx_pipe->fifo = qcom_smem_get(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
				      &tx_pipe->native.length);
	if (IS_ERR(tx_pipe->fifo)) {
		dev_err(dev, "failed to acquire TX fifo\n");
		ret = PTR_ERR(tx_pipe->fifo);
		goto err_put_dev;
	}

	rx_pipe->native.avail = glink_smem_rx_avail;
	rx_pipe->native.peak = glink_smem_rx_peak;
	rx_pipe->native.advance = glink_smem_rx_advance;
	rx_pipe->remote_pid = remote_pid;

	tx_pipe->native.avail = glink_smem_tx_avail;
	tx_pipe->native.write = glink_smem_tx_write;
	tx_pipe->remote_pid = remote_pid;

	*rx_pipe->tail = 0;
	*tx_pipe->head = 0;

	glink = qcom_glink_native_probe(dev,
					GLINK_FEATURE_INTENT_REUSE,
					&rx_pipe->native, &tx_pipe->native,
					false);
	if (IS_ERR(glink)) {
		ret = PTR_ERR(glink);
		goto err_put_dev;
	}

	return glink;

err_put_dev:
	device_unregister(dev);

	return ERR_PTR(ret);
}
EXPORT_SYMBOL_GPL(qcom_glink_smem_register);

void qcom_glink_smem_unregister(struct qcom_glink *glink)
{
	qcom_glink_native_remove(glink);
	qcom_glink_native_unregister(glink);
}
EXPORT_SYMBOL_GPL(qcom_glink_smem_unregister);

MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@linaro.org>");
MODULE_DESCRIPTION("Qualcomm GLINK SMEM driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
caf989c3 BA	1	/*
	2	* Copyright (c) 2016, Linaro Ltd
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 and
	6	* only version 2 as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope that it will be useful,
	9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*/
	13
	14	#include <linux/io.h>
	15	#include <linux/module.h>
	16	#include <linux/of.h>
	17	#include <linux/of_address.h>
	18	#include <linux/interrupt.h>
	19	#include <linux/platform_device.h>
	20	#include <linux/mfd/syscon.h>
	21	#include <linux/slab.h>
	22	#include <linux/rpmsg.h>
	23	#include <linux/idr.h>
	24	#include <linux/circ_buf.h>
	25	#include <linux/soc/qcom/smem.h>
	26	#include <linux/sizes.h>
	27	#include <linux/delay.h>
	28	#include <linux/regmap.h>
	29	#include <linux/workqueue.h>
	30	#include <linux/list.h>
	31
caf989c3 BA	32	#include <linux/rpmsg/qcom_glink.h>
	33
	34	#include "qcom_glink_native.h"
	35
	36	#define FIFO_FULL_RESERVE 8
	37	#define FIFO_ALIGNMENT 8
	38	#define TX_BLOCKED_CMD_RESERVE 8 /* size of struct read_notif_request */
	39
	40	#define SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR 478
	41	#define SMEM_GLINK_NATIVE_XPRT_FIFO_0 479
	42	#define SMEM_GLINK_NATIVE_XPRT_FIFO_1 480
	43
	44	struct glink_smem_pipe {
	45	struct qcom_glink_pipe native;
	46
	47	__le32 *tail;
	48	__le32 *head;
	49
	50	void *fifo;
	51
	52	int remote_pid;
	53	};
	54
	55	#define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native)
	56
	57	static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np)
	58	{
	59	struct glink_smem_pipe *pipe = to_smem_pipe(np);
	60	size_t len;
	61	void *fifo;
	62	u32 head;
	63	u32 tail;
	64
	65	if (!pipe->fifo) {
	66	fifo = qcom_smem_get(pipe->remote_pid,
	67	SMEM_GLINK_NATIVE_XPRT_FIFO_1, &len);
	68	if (IS_ERR(fifo)) {
	69	pr_err("failed to acquire RX fifo handle: %ld\n",
	70	PTR_ERR(fifo));
	71	return 0;
	72	}
	73
	74	pipe->fifo = fifo;
	75	pipe->native.length = len;
	76	}
	77
	78	head = le32_to_cpu(*pipe->head);
	79	tail = le32_to_cpu(*pipe->tail);
	80
	81	if (head < tail)
	82	return pipe->native.length - tail + head;
	83	else
	84	return head - tail;
	85	}
	86
	87	static void glink_smem_rx_peak(struct qcom_glink_pipe *np,
b88eee97	88	void *data, unsigned int offset, size_t count)
caf989c3 BA	89	{
	90	struct glink_smem_pipe *pipe = to_smem_pipe(np);
	91	size_t len;
	92	u32 tail;
	93
	94	tail = le32_to_cpu(*pipe->tail);
b88eee97 BA	95	tail += offset;
	96	if (tail >= pipe->native.length)
	97	tail -= pipe->native.length;
caf989c3 BA	98
	99	len = min_t(size_t, count, pipe->native.length - tail);
	100	if (len) {
	101	__ioread32_copy(data, pipe->fifo + tail,
	102	len / sizeof(u32));
	103	}
	104
	105	if (len != count) {
	106	__ioread32_copy(data + len, pipe->fifo,
	107	(count - len) / sizeof(u32));
	108	}
	109	}
	110
	111	static void glink_smem_rx_advance(struct qcom_glink_pipe *np,
	112	size_t count)
	113	{
	114	struct glink_smem_pipe *pipe = to_smem_pipe(np);
	115	u32 tail;
	116
	117	tail = le32_to_cpu(*pipe->tail);
	118
	119	tail += count;
	120	if (tail > pipe->native.length)
	121	tail -= pipe->native.length;
	122
	123	*pipe->tail = cpu_to_le32(tail);
	124	}
	125
	126	static size_t glink_smem_tx_avail(struct qcom_glink_pipe *np)
	127	{
	128	struct glink_smem_pipe *pipe = to_smem_pipe(np);
	129	u32 head;
	130	u32 tail;
	131	u32 avail;
	132
	133	head = le32_to_cpu(*pipe->head);
	134	tail = le32_to_cpu(*pipe->tail);
	135
	136	if (tail <= head)
	137	avail = pipe->native.length - head + tail;
	138	else
	139	avail = tail - head;
	140
	141	if (avail < (FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE))
	142	avail = 0;
	143	else
	144	avail -= FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE;
	145
	146	return avail;
	147	}
	148
	149	static unsigned int glink_smem_tx_write_one(struct glink_smem_pipe *pipe,
	150	unsigned int head,
	151	const void *data, size_t count)
	152	{
	153	size_t len;
	154
	155	len = min_t(size_t, count, pipe->native.length - head);
	156	if (len)
	157	memcpy(pipe->fifo + head, data, len);
	158
	159	if (len != count)
	160	memcpy(pipe->fifo, data + len, count - len);
	161
162	head += count;
163	if (head >= pipe->native.length)
164	head -= pipe->native.length;
165
166	return head;
167	}
168
169	static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe,
170	const void *hdr, size_t hlen,
171	const void *data, size_t dlen)
172	{
173	struct glink_smem_pipe *pipe = to_smem_pipe(glink_pipe);
174	unsigned int head;
175
176	head = le32_to_cpu(*pipe->head);
177
178	head = glink_smem_tx_write_one(pipe, head, hdr, hlen);
179	head = glink_smem_tx_write_one(pipe, head, data, dlen);
180
181	/* Ensure head is always aligned to 8 bytes */
182	head = ALIGN(head, 8);
183	if (head >= pipe->native.length)
184	head -= pipe->native.length;
185
9d324973 BA	186	/* Ensure ordering of fifo and head update */
	187	wmb();
	188
caf989c3 BA	189	*pipe->head = cpu_to_le32(head);
	190	}
	191
	192	static void qcom_glink_smem_release(struct device *dev)
	193	{
	194	kfree(dev);
	195	}
	196
	197	struct qcom_glink qcom_glink_smem_register(struct device parent,
	198	struct device_node *node)
	199	{
	200	struct glink_smem_pipe *rx_pipe;
	201	struct glink_smem_pipe *tx_pipe;
	202	struct qcom_glink *glink;
	203	struct device *dev;
	204	u32 remote_pid;
	205	__le32 *descs;
	206	size_t size;
	207	int ret;
	208
	209	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
	210	if (!dev)
	211	return ERR_PTR(-ENOMEM);
	212
	213	dev->parent = parent;
	214	dev->of_node = node;
	215	dev->release = qcom_glink_smem_release;
	216	dev_set_name(dev, "%s:%s", node->parent->name, node->name);
	217	ret = device_register(dev);
	218	if (ret) {
	219	pr_err("failed to register glink edge\n");
a9011726	220	put_device(dev);
caf989c3 BA	221	return ERR_PTR(ret);
	222	}
	223
	224	ret = of_property_read_u32(dev->of_node, "qcom,remote-pid",
	225	&remote_pid);
	226	if (ret) {
	227	dev_err(dev, "failed to parse qcom,remote-pid\n");
	228	goto err_put_dev;
	229	}
	230
	231	rx_pipe = devm_kzalloc(dev, sizeof(*rx_pipe), GFP_KERNEL);
	232	tx_pipe = devm_kzalloc(dev, sizeof(*tx_pipe), GFP_KERNEL);
	233	if (!rx_pipe \|\| !tx_pipe) {
	234	ret = -ENOMEM;
	235	goto err_put_dev;
	236	}
	237
	238	ret = qcom_smem_alloc(remote_pid,
	239	SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, 32);
	240	if (ret && ret != -EEXIST) {
	241	dev_err(dev, "failed to allocate glink descriptors\n");
	242	goto err_put_dev;
	243	}
	244
	245	descs = qcom_smem_get(remote_pid,
	246	SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, &size);
	247	if (IS_ERR(descs)) {
	248	dev_err(dev, "failed to acquire xprt descriptor\n");
	249	ret = PTR_ERR(descs);
	250	goto err_put_dev;
	251	}
	252
	253	if (size != 32) {
	254	dev_err(dev, "glink descriptor of invalid size\n");
	255	ret = -EINVAL;
	256	goto err_put_dev;
	257	}
	258
	259	tx_pipe->tail = &descs[0];
	260	tx_pipe->head = &descs[1];
	261	rx_pipe->tail = &descs[2];
	262	rx_pipe->head = &descs[3];
	263
	264	ret = qcom_smem_alloc(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
	265	SZ_16K);
	266	if (ret && ret != -EEXIST) {
	267	dev_err(dev, "failed to allocate TX fifo\n");
	268	goto err_put_dev;
	269	}
	270
	271	tx_pipe->fifo = qcom_smem_get(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
	272	&tx_pipe->native.length);
	273	if (IS_ERR(tx_pipe->fifo)) {
	274	dev_err(dev, "failed to acquire TX fifo\n");
	275	ret = PTR_ERR(tx_pipe->fifo);
	276	goto err_put_dev;
	277	}
	278
	279	rx_pipe->native.avail = glink_smem_rx_avail;
	280	rx_pipe->native.peak = glink_smem_rx_peak;
	281	rx_pipe->native.advance = glink_smem_rx_advance;
	282	rx_pipe->remote_pid = remote_pid;
	283
	284	tx_pipe->native.avail = glink_smem_tx_avail;
285	tx_pipe->native.write = glink_smem_tx_write;
286	tx_pipe->remote_pid = remote_pid;
287
288	*rx_pipe->tail = 0;
289	*tx_pipe->head = 0;
290
291	glink = qcom_glink_native_probe(dev,
933b45da S	292	GLINK_FEATURE_INTENT_REUSE,
	293	&rx_pipe->native, &tx_pipe->native,
	294	false);
caf989c3 BA	295	if (IS_ERR(glink)) {
	296	ret = PTR_ERR(glink);
	297	goto err_put_dev;
	298	}
	299
	300	return glink;
	301
	302	err_put_dev:
a9011726	303	device_unregister(dev);
caf989c3 BA	304
	305	return ERR_PTR(ret);
	306	}
	307	EXPORT_SYMBOL_GPL(qcom_glink_smem_register);
	308
	309	void qcom_glink_smem_unregister(struct qcom_glink *glink)
	310	{
	311	qcom_glink_native_remove(glink);
	312	qcom_glink_native_unregister(glink);
	313	}
	314	EXPORT_SYMBOL_GPL(qcom_glink_smem_unregister);
	315
	316	MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@linaro.org>");
	317	MODULE_DESCRIPTION("Qualcomm GLINK SMEM driver");
	318	MODULE_LICENSE("GPL v2");