Commit | Line | Data |
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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
61fc4131 PZ |
2 | /* |
3 | * Reset Controller framework | |
4 | * | |
5 | * Copyright 2013 Philipp Zabel, Pengutronix | |
61fc4131 | 6 | */ |
0b52297f | 7 | #include <linux/atomic.h> |
61fc4131 PZ |
8 | #include <linux/device.h> |
9 | #include <linux/err.h> | |
10 | #include <linux/export.h> | |
11 | #include <linux/kernel.h> | |
d25e4334 | 12 | #include <linux/kref.h> |
61fc4131 PZ |
13 | #include <linux/module.h> |
14 | #include <linux/of.h> | |
82816b4f | 15 | #include <linux/acpi.h> |
61fc4131 PZ |
16 | #include <linux/reset.h> |
17 | #include <linux/reset-controller.h> | |
18 | #include <linux/slab.h> | |
19 | ||
c15ddec2 | 20 | static DEFINE_MUTEX(reset_list_mutex); |
61fc4131 PZ |
21 | static LIST_HEAD(reset_controller_list); |
22 | ||
6691dffa BG |
23 | static DEFINE_MUTEX(reset_lookup_mutex); |
24 | static LIST_HEAD(reset_lookup_list); | |
25 | ||
61fc4131 PZ |
26 | /** |
27 | * struct reset_control - a reset control | |
28 | * @rcdev: a pointer to the reset controller device | |
29 | * this reset control belongs to | |
c15ddec2 | 30 | * @list: list entry for the rcdev's reset controller list |
61fc4131 PZ |
31 | * @id: ID of the reset controller in the reset |
32 | * controller device | |
c15ddec2 | 33 | * @refcnt: Number of gets of this reset_control |
c84b0326 | 34 | * @acquired: Only one reset_control may be acquired for a given rcdev and id. |
0b52297f | 35 | * @shared: Is this a shared (1), or an exclusive (0) reset_control? |
3315be57 KK |
36 | * @array: Is this an array of reset controls (1)? |
37 | * @deassert_count: Number of times this reset line has been deasserted | |
7da33a37 MB |
38 | * @triggered_count: Number of times this reset line has been reset. Currently |
39 | * only used for shared resets, which means that the value | |
40 | * will be either 0 or 1. | |
61fc4131 PZ |
41 | */ |
42 | struct reset_control { | |
43 | struct reset_controller_dev *rcdev; | |
c15ddec2 | 44 | struct list_head list; |
61fc4131 | 45 | unsigned int id; |
d25e4334 | 46 | struct kref refcnt; |
c84b0326 | 47 | bool acquired; |
ee48c726 | 48 | bool shared; |
17c82e20 | 49 | bool array; |
0b52297f | 50 | atomic_t deassert_count; |
7da33a37 | 51 | atomic_t triggered_count; |
61fc4131 PZ |
52 | }; |
53 | ||
17c82e20 VG |
54 | /** |
55 | * struct reset_control_array - an array of reset controls | |
56 | * @base: reset control for compatibility with reset control API functions | |
57 | * @num_rstcs: number of reset controls | |
58 | * @rstc: array of reset controls | |
59 | */ | |
60 | struct reset_control_array { | |
61 | struct reset_control base; | |
62 | unsigned int num_rstcs; | |
63 | struct reset_control *rstc[]; | |
64 | }; | |
65 | ||
c84b0326 PZ |
66 | static const char *rcdev_name(struct reset_controller_dev *rcdev) |
67 | { | |
68 | if (rcdev->dev) | |
69 | return dev_name(rcdev->dev); | |
70 | ||
71 | if (rcdev->of_node) | |
72 | return rcdev->of_node->full_name; | |
73 | ||
74 | return NULL; | |
75 | } | |
76 | ||
61fc4131 PZ |
77 | /** |
78 | * of_reset_simple_xlate - translate reset_spec to the reset line number | |
79 | * @rcdev: a pointer to the reset controller device | |
80 | * @reset_spec: reset line specifier as found in the device tree | |
61fc4131 | 81 | * |
a48108c0 PZ |
82 | * This static translation function is used by default if of_xlate in |
83 | * :c:type:`reset_controller_dev` is not set. It is useful for all reset | |
84 | * controllers with 1:1 mapping, where reset lines can be indexed by number | |
85 | * without gaps. | |
61fc4131 | 86 | */ |
0c5b2b91 | 87 | static int of_reset_simple_xlate(struct reset_controller_dev *rcdev, |
1c5e05c2 | 88 | const struct of_phandle_args *reset_spec) |
61fc4131 | 89 | { |
61fc4131 PZ |
90 | if (reset_spec->args[0] >= rcdev->nr_resets) |
91 | return -EINVAL; | |
92 | ||
93 | return reset_spec->args[0]; | |
94 | } | |
61fc4131 PZ |
95 | |
96 | /** | |
97 | * reset_controller_register - register a reset controller device | |
98 | * @rcdev: a pointer to the initialized reset controller device | |
99 | */ | |
100 | int reset_controller_register(struct reset_controller_dev *rcdev) | |
101 | { | |
102 | if (!rcdev->of_xlate) { | |
103 | rcdev->of_reset_n_cells = 1; | |
104 | rcdev->of_xlate = of_reset_simple_xlate; | |
105 | } | |
106 | ||
c15ddec2 HG |
107 | INIT_LIST_HEAD(&rcdev->reset_control_head); |
108 | ||
109 | mutex_lock(&reset_list_mutex); | |
61fc4131 | 110 | list_add(&rcdev->list, &reset_controller_list); |
c15ddec2 | 111 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
112 | |
113 | return 0; | |
114 | } | |
115 | EXPORT_SYMBOL_GPL(reset_controller_register); | |
116 | ||
117 | /** | |
118 | * reset_controller_unregister - unregister a reset controller device | |
119 | * @rcdev: a pointer to the reset controller device | |
120 | */ | |
121 | void reset_controller_unregister(struct reset_controller_dev *rcdev) | |
122 | { | |
c15ddec2 | 123 | mutex_lock(&reset_list_mutex); |
61fc4131 | 124 | list_del(&rcdev->list); |
c15ddec2 | 125 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
126 | } |
127 | EXPORT_SYMBOL_GPL(reset_controller_unregister); | |
128 | ||
8d5b5d5c MY |
129 | static void devm_reset_controller_release(struct device *dev, void *res) |
130 | { | |
131 | reset_controller_unregister(*(struct reset_controller_dev **)res); | |
132 | } | |
133 | ||
134 | /** | |
135 | * devm_reset_controller_register - resource managed reset_controller_register() | |
136 | * @dev: device that is registering this reset controller | |
137 | * @rcdev: a pointer to the initialized reset controller device | |
138 | * | |
139 | * Managed reset_controller_register(). For reset controllers registered by | |
140 | * this function, reset_controller_unregister() is automatically called on | |
141 | * driver detach. See reset_controller_register() for more information. | |
142 | */ | |
143 | int devm_reset_controller_register(struct device *dev, | |
144 | struct reset_controller_dev *rcdev) | |
145 | { | |
146 | struct reset_controller_dev **rcdevp; | |
147 | int ret; | |
148 | ||
149 | rcdevp = devres_alloc(devm_reset_controller_release, sizeof(*rcdevp), | |
150 | GFP_KERNEL); | |
151 | if (!rcdevp) | |
152 | return -ENOMEM; | |
153 | ||
154 | ret = reset_controller_register(rcdev); | |
a9457ed2 | 155 | if (ret) { |
8d5b5d5c | 156 | devres_free(rcdevp); |
a9457ed2 | 157 | return ret; |
8d5b5d5c MY |
158 | } |
159 | ||
a9457ed2 GU |
160 | *rcdevp = rcdev; |
161 | devres_add(dev, rcdevp); | |
162 | ||
8d5b5d5c MY |
163 | return ret; |
164 | } | |
165 | EXPORT_SYMBOL_GPL(devm_reset_controller_register); | |
166 | ||
6691dffa BG |
167 | /** |
168 | * reset_controller_add_lookup - register a set of lookup entries | |
6691dffa BG |
169 | * @lookup: array of reset lookup entries |
170 | * @num_entries: number of entries in the lookup array | |
171 | */ | |
e2749bb9 | 172 | void reset_controller_add_lookup(struct reset_control_lookup *lookup, |
6691dffa BG |
173 | unsigned int num_entries) |
174 | { | |
175 | struct reset_control_lookup *entry; | |
176 | unsigned int i; | |
177 | ||
178 | mutex_lock(&reset_lookup_mutex); | |
179 | for (i = 0; i < num_entries; i++) { | |
180 | entry = &lookup[i]; | |
181 | ||
e2749bb9 BG |
182 | if (!entry->dev_id || !entry->provider) { |
183 | pr_warn("%s(): reset lookup entry badly specified, skipping\n", | |
6691dffa BG |
184 | __func__); |
185 | continue; | |
186 | } | |
187 | ||
6691dffa BG |
188 | list_add_tail(&entry->list, &reset_lookup_list); |
189 | } | |
190 | mutex_unlock(&reset_lookup_mutex); | |
191 | } | |
192 | EXPORT_SYMBOL_GPL(reset_controller_add_lookup); | |
193 | ||
17c82e20 VG |
194 | static inline struct reset_control_array * |
195 | rstc_to_array(struct reset_control *rstc) { | |
196 | return container_of(rstc, struct reset_control_array, base); | |
197 | } | |
198 | ||
199 | static int reset_control_array_reset(struct reset_control_array *resets) | |
200 | { | |
201 | int ret, i; | |
202 | ||
203 | for (i = 0; i < resets->num_rstcs; i++) { | |
204 | ret = reset_control_reset(resets->rstc[i]); | |
205 | if (ret) | |
206 | return ret; | |
207 | } | |
208 | ||
209 | return 0; | |
210 | } | |
211 | ||
557acb3d AOA |
212 | static int reset_control_array_rearm(struct reset_control_array *resets) |
213 | { | |
214 | struct reset_control *rstc; | |
215 | int i; | |
216 | ||
217 | for (i = 0; i < resets->num_rstcs; i++) { | |
218 | rstc = resets->rstc[i]; | |
219 | ||
220 | if (!rstc) | |
221 | continue; | |
222 | ||
223 | if (WARN_ON(IS_ERR(rstc))) | |
224 | return -EINVAL; | |
225 | ||
226 | if (rstc->shared) { | |
227 | if (WARN_ON(atomic_read(&rstc->deassert_count) != 0)) | |
228 | return -EINVAL; | |
229 | } else { | |
230 | if (!rstc->acquired) | |
231 | return -EPERM; | |
232 | } | |
233 | } | |
234 | ||
235 | for (i = 0; i < resets->num_rstcs; i++) { | |
236 | rstc = resets->rstc[i]; | |
237 | ||
238 | if (rstc && rstc->shared) | |
239 | WARN_ON(atomic_dec_return(&rstc->triggered_count) < 0); | |
240 | } | |
241 | ||
242 | return 0; | |
243 | } | |
244 | ||
17c82e20 VG |
245 | static int reset_control_array_assert(struct reset_control_array *resets) |
246 | { | |
247 | int ret, i; | |
248 | ||
249 | for (i = 0; i < resets->num_rstcs; i++) { | |
250 | ret = reset_control_assert(resets->rstc[i]); | |
251 | if (ret) | |
252 | goto err; | |
253 | } | |
254 | ||
255 | return 0; | |
256 | ||
257 | err: | |
258 | while (i--) | |
259 | reset_control_deassert(resets->rstc[i]); | |
260 | return ret; | |
261 | } | |
262 | ||
263 | static int reset_control_array_deassert(struct reset_control_array *resets) | |
264 | { | |
265 | int ret, i; | |
266 | ||
267 | for (i = 0; i < resets->num_rstcs; i++) { | |
268 | ret = reset_control_deassert(resets->rstc[i]); | |
269 | if (ret) | |
270 | goto err; | |
271 | } | |
272 | ||
273 | return 0; | |
274 | ||
275 | err: | |
276 | while (i--) | |
277 | reset_control_assert(resets->rstc[i]); | |
278 | return ret; | |
279 | } | |
280 | ||
22815f18 TR |
281 | static int reset_control_array_acquire(struct reset_control_array *resets) |
282 | { | |
283 | unsigned int i; | |
284 | int err; | |
285 | ||
286 | for (i = 0; i < resets->num_rstcs; i++) { | |
287 | err = reset_control_acquire(resets->rstc[i]); | |
288 | if (err < 0) | |
289 | goto release; | |
290 | } | |
291 | ||
292 | return 0; | |
293 | ||
294 | release: | |
295 | while (i--) | |
296 | reset_control_release(resets->rstc[i]); | |
297 | ||
298 | return err; | |
299 | } | |
300 | ||
301 | static void reset_control_array_release(struct reset_control_array *resets) | |
302 | { | |
303 | unsigned int i; | |
304 | ||
305 | for (i = 0; i < resets->num_rstcs; i++) | |
306 | reset_control_release(resets->rstc[i]); | |
307 | } | |
308 | ||
17c82e20 VG |
309 | static inline bool reset_control_is_array(struct reset_control *rstc) |
310 | { | |
311 | return rstc->array; | |
312 | } | |
313 | ||
61fc4131 PZ |
314 | /** |
315 | * reset_control_reset - reset the controlled device | |
316 | * @rstc: reset controller | |
0b52297f | 317 | * |
7da33a37 MB |
318 | * On a shared reset line the actual reset pulse is only triggered once for the |
319 | * lifetime of the reset_control instance: for all but the first caller this is | |
320 | * a no-op. | |
321 | * Consumers must not use reset_control_(de)assert on shared reset lines when | |
322 | * reset_control_reset has been used. | |
bb475230 RO |
323 | * |
324 | * If rstc is NULL it is an optional reset and the function will just | |
325 | * return 0. | |
61fc4131 PZ |
326 | */ |
327 | int reset_control_reset(struct reset_control *rstc) | |
328 | { | |
7da33a37 MB |
329 | int ret; |
330 | ||
bb475230 RO |
331 | if (!rstc) |
332 | return 0; | |
333 | ||
334 | if (WARN_ON(IS_ERR(rstc))) | |
0b52297f HG |
335 | return -EINVAL; |
336 | ||
17c82e20 VG |
337 | if (reset_control_is_array(rstc)) |
338 | return reset_control_array_reset(rstc_to_array(rstc)); | |
339 | ||
7da33a37 MB |
340 | if (!rstc->rcdev->ops->reset) |
341 | return -ENOTSUPP; | |
342 | ||
343 | if (rstc->shared) { | |
344 | if (WARN_ON(atomic_read(&rstc->deassert_count) != 0)) | |
345 | return -EINVAL; | |
346 | ||
347 | if (atomic_inc_return(&rstc->triggered_count) != 1) | |
348 | return 0; | |
c84b0326 PZ |
349 | } else { |
350 | if (!rstc->acquired) | |
351 | return -EPERM; | |
7da33a37 | 352 | } |
61fc4131 | 353 | |
7da33a37 | 354 | ret = rstc->rcdev->ops->reset(rstc->rcdev, rstc->id); |
e5a1dade | 355 | if (rstc->shared && ret) |
7da33a37 MB |
356 | atomic_dec(&rstc->triggered_count); |
357 | ||
358 | return ret; | |
61fc4131 PZ |
359 | } |
360 | EXPORT_SYMBOL_GPL(reset_control_reset); | |
361 | ||
48d71395 PZ |
362 | /** |
363 | * reset_control_bulk_reset - reset the controlled devices in order | |
364 | * @num_rstcs: number of entries in rstcs array | |
365 | * @rstcs: array of struct reset_control_bulk_data with reset controls set | |
366 | * | |
367 | * Issue a reset on all provided reset controls, in order. | |
368 | * | |
369 | * See also: reset_control_reset() | |
370 | */ | |
371 | int reset_control_bulk_reset(int num_rstcs, | |
372 | struct reset_control_bulk_data *rstcs) | |
373 | { | |
374 | int ret, i; | |
375 | ||
376 | for (i = 0; i < num_rstcs; i++) { | |
377 | ret = reset_control_reset(rstcs[i].rstc); | |
378 | if (ret) | |
379 | return ret; | |
380 | } | |
381 | ||
382 | return 0; | |
383 | } | |
384 | EXPORT_SYMBOL_GPL(reset_control_bulk_reset); | |
385 | ||
557acb3d AOA |
386 | /** |
387 | * reset_control_rearm - allow shared reset line to be re-triggered" | |
388 | * @rstc: reset controller | |
389 | * | |
390 | * On a shared reset line the actual reset pulse is only triggered once for the | |
391 | * lifetime of the reset_control instance, except if this call is used. | |
392 | * | |
393 | * Calls to this function must be balanced with calls to reset_control_reset, | |
394 | * a warning is thrown in case triggered_count ever dips below 0. | |
395 | * | |
396 | * Consumers must not use reset_control_(de)assert on shared reset lines when | |
397 | * reset_control_reset or reset_control_rearm have been used. | |
398 | * | |
399 | * If rstc is NULL the function will just return 0. | |
400 | */ | |
401 | int reset_control_rearm(struct reset_control *rstc) | |
402 | { | |
403 | if (!rstc) | |
404 | return 0; | |
405 | ||
406 | if (WARN_ON(IS_ERR(rstc))) | |
407 | return -EINVAL; | |
408 | ||
409 | if (reset_control_is_array(rstc)) | |
410 | return reset_control_array_rearm(rstc_to_array(rstc)); | |
411 | ||
412 | if (rstc->shared) { | |
413 | if (WARN_ON(atomic_read(&rstc->deassert_count) != 0)) | |
414 | return -EINVAL; | |
415 | ||
416 | WARN_ON(atomic_dec_return(&rstc->triggered_count) < 0); | |
417 | } else { | |
418 | if (!rstc->acquired) | |
419 | return -EPERM; | |
420 | } | |
421 | ||
422 | return 0; | |
423 | } | |
424 | EXPORT_SYMBOL_GPL(reset_control_rearm); | |
425 | ||
61fc4131 PZ |
426 | /** |
427 | * reset_control_assert - asserts the reset line | |
428 | * @rstc: reset controller | |
0b52297f HG |
429 | * |
430 | * Calling this on an exclusive reset controller guarantees that the reset | |
431 | * will be asserted. When called on a shared reset controller the line may | |
432 | * still be deasserted, as long as other users keep it so. | |
433 | * | |
434 | * For shared reset controls a driver cannot expect the hw's registers and | |
435 | * internal state to be reset, but must be prepared for this to happen. | |
7da33a37 MB |
436 | * Consumers must not use reset_control_reset on shared reset lines when |
437 | * reset_control_(de)assert has been used. | |
bb475230 RO |
438 | * |
439 | * If rstc is NULL it is an optional reset and the function will just | |
440 | * return 0. | |
61fc4131 PZ |
441 | */ |
442 | int reset_control_assert(struct reset_control *rstc) | |
443 | { | |
bb475230 RO |
444 | if (!rstc) |
445 | return 0; | |
446 | ||
447 | if (WARN_ON(IS_ERR(rstc))) | |
a3774e14 PZ |
448 | return -EINVAL; |
449 | ||
17c82e20 VG |
450 | if (reset_control_is_array(rstc)) |
451 | return reset_control_array_assert(rstc_to_array(rstc)); | |
452 | ||
0b52297f | 453 | if (rstc->shared) { |
7da33a37 MB |
454 | if (WARN_ON(atomic_read(&rstc->triggered_count) != 0)) |
455 | return -EINVAL; | |
456 | ||
0b52297f HG |
457 | if (WARN_ON(atomic_read(&rstc->deassert_count) == 0)) |
458 | return -EINVAL; | |
459 | ||
460 | if (atomic_dec_return(&rstc->deassert_count) != 0) | |
461 | return 0; | |
21240eb9 PZ |
462 | |
463 | /* | |
464 | * Shared reset controls allow the reset line to be in any state | |
465 | * after this call, so doing nothing is a valid option. | |
466 | */ | |
467 | if (!rstc->rcdev->ops->assert) | |
468 | return 0; | |
469 | } else { | |
470 | /* | |
471 | * If the reset controller does not implement .assert(), there | |
472 | * is no way to guarantee that the reset line is asserted after | |
473 | * this call. | |
474 | */ | |
475 | if (!rstc->rcdev->ops->assert) | |
476 | return -ENOTSUPP; | |
c84b0326 PZ |
477 | |
478 | if (!rstc->acquired) { | |
479 | WARN(1, "reset %s (ID: %u) is not acquired\n", | |
480 | rcdev_name(rstc->rcdev), rstc->id); | |
481 | return -EPERM; | |
482 | } | |
0b52297f HG |
483 | } |
484 | ||
485 | return rstc->rcdev->ops->assert(rstc->rcdev, rstc->id); | |
61fc4131 PZ |
486 | } |
487 | EXPORT_SYMBOL_GPL(reset_control_assert); | |
488 | ||
48d71395 PZ |
489 | /** |
490 | * reset_control_bulk_assert - asserts the reset lines in order | |
491 | * @num_rstcs: number of entries in rstcs array | |
492 | * @rstcs: array of struct reset_control_bulk_data with reset controls set | |
493 | * | |
494 | * Assert the reset lines for all provided reset controls, in order. | |
495 | * If an assertion fails, already asserted resets are deasserted again. | |
496 | * | |
497 | * See also: reset_control_assert() | |
498 | */ | |
499 | int reset_control_bulk_assert(int num_rstcs, | |
500 | struct reset_control_bulk_data *rstcs) | |
501 | { | |
502 | int ret, i; | |
503 | ||
504 | for (i = 0; i < num_rstcs; i++) { | |
505 | ret = reset_control_assert(rstcs[i].rstc); | |
506 | if (ret) | |
507 | goto err; | |
508 | } | |
509 | ||
510 | return 0; | |
511 | ||
512 | err: | |
513 | while (i--) | |
514 | reset_control_deassert(rstcs[i].rstc); | |
515 | return ret; | |
516 | } | |
517 | EXPORT_SYMBOL_GPL(reset_control_bulk_assert); | |
518 | ||
61fc4131 PZ |
519 | /** |
520 | * reset_control_deassert - deasserts the reset line | |
521 | * @rstc: reset controller | |
0b52297f HG |
522 | * |
523 | * After calling this function, the reset is guaranteed to be deasserted. | |
7da33a37 MB |
524 | * Consumers must not use reset_control_reset on shared reset lines when |
525 | * reset_control_(de)assert has been used. | |
bb475230 RO |
526 | * |
527 | * If rstc is NULL it is an optional reset and the function will just | |
528 | * return 0. | |
61fc4131 PZ |
529 | */ |
530 | int reset_control_deassert(struct reset_control *rstc) | |
531 | { | |
bb475230 RO |
532 | if (!rstc) |
533 | return 0; | |
534 | ||
535 | if (WARN_ON(IS_ERR(rstc))) | |
a3774e14 PZ |
536 | return -EINVAL; |
537 | ||
17c82e20 VG |
538 | if (reset_control_is_array(rstc)) |
539 | return reset_control_array_deassert(rstc_to_array(rstc)); | |
540 | ||
0b52297f | 541 | if (rstc->shared) { |
7da33a37 MB |
542 | if (WARN_ON(atomic_read(&rstc->triggered_count) != 0)) |
543 | return -EINVAL; | |
544 | ||
0b52297f HG |
545 | if (atomic_inc_return(&rstc->deassert_count) != 1) |
546 | return 0; | |
c84b0326 PZ |
547 | } else { |
548 | if (!rstc->acquired) { | |
549 | WARN(1, "reset %s (ID: %u) is not acquired\n", | |
550 | rcdev_name(rstc->rcdev), rstc->id); | |
551 | return -EPERM; | |
552 | } | |
0b52297f HG |
553 | } |
554 | ||
21240eb9 PZ |
555 | /* |
556 | * If the reset controller does not implement .deassert(), we assume | |
557 | * that it handles self-deasserting reset lines via .reset(). In that | |
558 | * case, the reset lines are deasserted by default. If that is not the | |
559 | * case, the reset controller driver should implement .deassert() and | |
560 | * return -ENOTSUPP. | |
561 | */ | |
562 | if (!rstc->rcdev->ops->deassert) | |
563 | return 0; | |
564 | ||
0b52297f | 565 | return rstc->rcdev->ops->deassert(rstc->rcdev, rstc->id); |
61fc4131 PZ |
566 | } |
567 | EXPORT_SYMBOL_GPL(reset_control_deassert); | |
568 | ||
48d71395 PZ |
569 | /** |
570 | * reset_control_bulk_deassert - deasserts the reset lines in reverse order | |
571 | * @num_rstcs: number of entries in rstcs array | |
572 | * @rstcs: array of struct reset_control_bulk_data with reset controls set | |
573 | * | |
574 | * Deassert the reset lines for all provided reset controls, in reverse order. | |
575 | * If a deassertion fails, already deasserted resets are asserted again. | |
576 | * | |
577 | * See also: reset_control_deassert() | |
578 | */ | |
579 | int reset_control_bulk_deassert(int num_rstcs, | |
580 | struct reset_control_bulk_data *rstcs) | |
581 | { | |
582 | int ret, i; | |
583 | ||
584 | for (i = num_rstcs - 1; i >= 0; i--) { | |
585 | ret = reset_control_deassert(rstcs[i].rstc); | |
586 | if (ret) | |
587 | goto err; | |
588 | } | |
589 | ||
590 | return 0; | |
591 | ||
592 | err: | |
593 | while (i < num_rstcs) | |
594 | reset_control_assert(rstcs[i++].rstc); | |
595 | return ret; | |
596 | } | |
597 | EXPORT_SYMBOL_GPL(reset_control_bulk_deassert); | |
598 | ||
729de41b DN |
599 | /** |
600 | * reset_control_status - returns a negative errno if not supported, a | |
601 | * positive value if the reset line is asserted, or zero if the reset | |
bb475230 | 602 | * line is not asserted or if the desc is NULL (optional reset). |
729de41b DN |
603 | * @rstc: reset controller |
604 | */ | |
605 | int reset_control_status(struct reset_control *rstc) | |
606 | { | |
bb475230 RO |
607 | if (!rstc) |
608 | return 0; | |
609 | ||
17c82e20 | 610 | if (WARN_ON(IS_ERR(rstc)) || reset_control_is_array(rstc)) |
a3774e14 PZ |
611 | return -EINVAL; |
612 | ||
729de41b DN |
613 | if (rstc->rcdev->ops->status) |
614 | return rstc->rcdev->ops->status(rstc->rcdev, rstc->id); | |
615 | ||
39b4da71 | 616 | return -ENOTSUPP; |
729de41b DN |
617 | } |
618 | EXPORT_SYMBOL_GPL(reset_control_status); | |
619 | ||
c84b0326 PZ |
620 | /** |
621 | * reset_control_acquire() - acquires a reset control for exclusive use | |
622 | * @rstc: reset control | |
623 | * | |
624 | * This is used to explicitly acquire a reset control for exclusive use. Note | |
625 | * that exclusive resets are requested as acquired by default. In order for a | |
626 | * second consumer to be able to control the reset, the first consumer has to | |
627 | * release it first. Typically the easiest way to achieve this is to call the | |
628 | * reset_control_get_exclusive_released() to obtain an instance of the reset | |
629 | * control. Such reset controls are not acquired by default. | |
630 | * | |
631 | * Consumers implementing shared access to an exclusive reset need to follow | |
632 | * a specific protocol in order to work together. Before consumers can change | |
633 | * a reset they must acquire exclusive access using reset_control_acquire(). | |
634 | * After they are done operating the reset, they must release exclusive access | |
635 | * with a call to reset_control_release(). Consumers are not granted exclusive | |
636 | * access to the reset as long as another consumer hasn't released a reset. | |
637 | * | |
638 | * See also: reset_control_release() | |
639 | */ | |
640 | int reset_control_acquire(struct reset_control *rstc) | |
641 | { | |
642 | struct reset_control *rc; | |
643 | ||
644 | if (!rstc) | |
645 | return 0; | |
646 | ||
647 | if (WARN_ON(IS_ERR(rstc))) | |
648 | return -EINVAL; | |
649 | ||
22815f18 TR |
650 | if (reset_control_is_array(rstc)) |
651 | return reset_control_array_acquire(rstc_to_array(rstc)); | |
652 | ||
c84b0326 PZ |
653 | mutex_lock(&reset_list_mutex); |
654 | ||
655 | if (rstc->acquired) { | |
656 | mutex_unlock(&reset_list_mutex); | |
657 | return 0; | |
658 | } | |
659 | ||
660 | list_for_each_entry(rc, &rstc->rcdev->reset_control_head, list) { | |
661 | if (rstc != rc && rstc->id == rc->id) { | |
662 | if (rc->acquired) { | |
663 | mutex_unlock(&reset_list_mutex); | |
664 | return -EBUSY; | |
665 | } | |
666 | } | |
667 | } | |
668 | ||
669 | rstc->acquired = true; | |
670 | ||
671 | mutex_unlock(&reset_list_mutex); | |
672 | return 0; | |
673 | } | |
674 | EXPORT_SYMBOL_GPL(reset_control_acquire); | |
675 | ||
48d71395 PZ |
676 | /** |
677 | * reset_control_bulk_acquire - acquires reset controls for exclusive use | |
678 | * @num_rstcs: number of entries in rstcs array | |
679 | * @rstcs: array of struct reset_control_bulk_data with reset controls set | |
680 | * | |
681 | * This is used to explicitly acquire reset controls requested with | |
682 | * reset_control_bulk_get_exclusive_release() for temporary exclusive use. | |
683 | * | |
684 | * See also: reset_control_acquire(), reset_control_bulk_release() | |
685 | */ | |
686 | int reset_control_bulk_acquire(int num_rstcs, | |
687 | struct reset_control_bulk_data *rstcs) | |
688 | { | |
689 | int ret, i; | |
690 | ||
691 | for (i = 0; i < num_rstcs; i++) { | |
692 | ret = reset_control_acquire(rstcs[i].rstc); | |
693 | if (ret) | |
694 | goto err; | |
695 | } | |
696 | ||
697 | return 0; | |
698 | ||
699 | err: | |
700 | while (i--) | |
701 | reset_control_release(rstcs[i].rstc); | |
702 | return ret; | |
703 | } | |
704 | EXPORT_SYMBOL_GPL(reset_control_bulk_acquire); | |
705 | ||
c84b0326 PZ |
706 | /** |
707 | * reset_control_release() - releases exclusive access to a reset control | |
708 | * @rstc: reset control | |
709 | * | |
710 | * Releases exclusive access right to a reset control previously obtained by a | |
711 | * call to reset_control_acquire(). Until a consumer calls this function, no | |
712 | * other consumers will be granted exclusive access. | |
713 | * | |
714 | * See also: reset_control_acquire() | |
715 | */ | |
716 | void reset_control_release(struct reset_control *rstc) | |
717 | { | |
718 | if (!rstc || WARN_ON(IS_ERR(rstc))) | |
719 | return; | |
720 | ||
22815f18 TR |
721 | if (reset_control_is_array(rstc)) |
722 | reset_control_array_release(rstc_to_array(rstc)); | |
723 | else | |
724 | rstc->acquired = false; | |
c84b0326 PZ |
725 | } |
726 | EXPORT_SYMBOL_GPL(reset_control_release); | |
727 | ||
48d71395 PZ |
728 | /** |
729 | * reset_control_bulk_release() - releases exclusive access to reset controls | |
730 | * @num_rstcs: number of entries in rstcs array | |
731 | * @rstcs: array of struct reset_control_bulk_data with reset controls set | |
732 | * | |
733 | * Releases exclusive access right to reset controls previously obtained by a | |
734 | * call to reset_control_bulk_acquire(). | |
735 | * | |
736 | * See also: reset_control_release(), reset_control_bulk_acquire() | |
737 | */ | |
738 | void reset_control_bulk_release(int num_rstcs, | |
739 | struct reset_control_bulk_data *rstcs) | |
740 | { | |
741 | int i; | |
742 | ||
743 | for (i = 0; i < num_rstcs; i++) | |
744 | reset_control_release(rstcs[i].rstc); | |
745 | } | |
746 | EXPORT_SYMBOL_GPL(reset_control_bulk_release); | |
747 | ||
1c5e05c2 PZ |
748 | static struct reset_control * |
749 | __reset_control_get_internal(struct reset_controller_dev *rcdev, | |
750 | unsigned int index, bool shared, bool acquired) | |
c15ddec2 HG |
751 | { |
752 | struct reset_control *rstc; | |
753 | ||
754 | lockdep_assert_held(&reset_list_mutex); | |
755 | ||
756 | list_for_each_entry(rstc, &rcdev->reset_control_head, list) { | |
757 | if (rstc->id == index) { | |
c84b0326 PZ |
758 | /* |
759 | * Allow creating a secondary exclusive reset_control | |
760 | * that is initially not acquired for an already | |
761 | * controlled reset line. | |
762 | */ | |
763 | if (!rstc->shared && !shared && !acquired) | |
764 | break; | |
765 | ||
0b52297f HG |
766 | if (WARN_ON(!rstc->shared || !shared)) |
767 | return ERR_PTR(-EBUSY); | |
768 | ||
d25e4334 | 769 | kref_get(&rstc->refcnt); |
c15ddec2 HG |
770 | return rstc; |
771 | } | |
772 | } | |
773 | ||
774 | rstc = kzalloc(sizeof(*rstc), GFP_KERNEL); | |
775 | if (!rstc) | |
776 | return ERR_PTR(-ENOMEM); | |
777 | ||
4fb26fb8 PZ |
778 | if (!try_module_get(rcdev->owner)) { |
779 | kfree(rstc); | |
780 | return ERR_PTR(-ENODEV); | |
781 | } | |
c15ddec2 HG |
782 | |
783 | rstc->rcdev = rcdev; | |
784 | list_add(&rstc->list, &rcdev->reset_control_head); | |
785 | rstc->id = index; | |
d25e4334 | 786 | kref_init(&rstc->refcnt); |
c84b0326 | 787 | rstc->acquired = acquired; |
0b52297f | 788 | rstc->shared = shared; |
c15ddec2 HG |
789 | |
790 | return rstc; | |
791 | } | |
792 | ||
d25e4334 | 793 | static void __reset_control_release(struct kref *kref) |
c15ddec2 | 794 | { |
d25e4334 PZ |
795 | struct reset_control *rstc = container_of(kref, struct reset_control, |
796 | refcnt); | |
c15ddec2 | 797 | |
d25e4334 | 798 | lockdep_assert_held(&reset_list_mutex); |
c15ddec2 HG |
799 | |
800 | module_put(rstc->rcdev->owner); | |
801 | ||
802 | list_del(&rstc->list); | |
803 | kfree(rstc); | |
804 | } | |
805 | ||
d25e4334 PZ |
806 | static void __reset_control_put_internal(struct reset_control *rstc) |
807 | { | |
808 | lockdep_assert_held(&reset_list_mutex); | |
809 | ||
810 | kref_put(&rstc->refcnt, __reset_control_release); | |
811 | } | |
812 | ||
1c5e05c2 PZ |
813 | struct reset_control * |
814 | __of_reset_control_get(struct device_node *node, const char *id, int index, | |
815 | bool shared, bool optional, bool acquired) | |
61fc4131 | 816 | { |
d056c9b8 | 817 | struct reset_control *rstc; |
61fc4131 PZ |
818 | struct reset_controller_dev *r, *rcdev; |
819 | struct of_phandle_args args; | |
61fc4131 PZ |
820 | int rstc_id; |
821 | int ret; | |
822 | ||
6c96f05c HG |
823 | if (!node) |
824 | return ERR_PTR(-EINVAL); | |
825 | ||
826 | if (id) { | |
827 | index = of_property_match_string(node, | |
828 | "reset-names", id); | |
bb475230 RO |
829 | if (index == -EILSEQ) |
830 | return ERR_PTR(index); | |
6c96f05c | 831 | if (index < 0) |
bb475230 | 832 | return optional ? NULL : ERR_PTR(-ENOENT); |
6c96f05c HG |
833 | } |
834 | ||
fc0a5921 | 835 | ret = of_parse_phandle_with_args(node, "resets", "#reset-cells", |
61fc4131 | 836 | index, &args); |
bb475230 | 837 | if (ret == -EINVAL) |
61fc4131 | 838 | return ERR_PTR(ret); |
bb475230 RO |
839 | if (ret) |
840 | return optional ? NULL : ERR_PTR(ret); | |
61fc4131 | 841 | |
c15ddec2 | 842 | mutex_lock(&reset_list_mutex); |
61fc4131 PZ |
843 | rcdev = NULL; |
844 | list_for_each_entry(r, &reset_controller_list, list) { | |
845 | if (args.np == r->of_node) { | |
846 | rcdev = r; | |
847 | break; | |
848 | } | |
849 | } | |
61fc4131 PZ |
850 | |
851 | if (!rcdev) { | |
b790c8ea GU |
852 | rstc = ERR_PTR(-EPROBE_DEFER); |
853 | goto out; | |
61fc4131 PZ |
854 | } |
855 | ||
e677774f | 856 | if (WARN_ON(args.args_count != rcdev->of_reset_n_cells)) { |
b790c8ea GU |
857 | rstc = ERR_PTR(-EINVAL); |
858 | goto out; | |
e677774f MR |
859 | } |
860 | ||
61fc4131 PZ |
861 | rstc_id = rcdev->of_xlate(rcdev, &args); |
862 | if (rstc_id < 0) { | |
b790c8ea GU |
863 | rstc = ERR_PTR(rstc_id); |
864 | goto out; | |
61fc4131 PZ |
865 | } |
866 | ||
c15ddec2 | 867 | /* reset_list_mutex also protects the rcdev's reset_control list */ |
c84b0326 | 868 | rstc = __reset_control_get_internal(rcdev, rstc_id, shared, acquired); |
61fc4131 | 869 | |
b790c8ea | 870 | out: |
c15ddec2 | 871 | mutex_unlock(&reset_list_mutex); |
b790c8ea | 872 | of_node_put(args.np); |
61fc4131 PZ |
873 | |
874 | return rstc; | |
875 | } | |
6c96f05c | 876 | EXPORT_SYMBOL_GPL(__of_reset_control_get); |
61fc4131 | 877 | |
e2749bb9 BG |
878 | static struct reset_controller_dev * |
879 | __reset_controller_by_name(const char *name) | |
880 | { | |
881 | struct reset_controller_dev *rcdev; | |
882 | ||
883 | lockdep_assert_held(&reset_list_mutex); | |
884 | ||
885 | list_for_each_entry(rcdev, &reset_controller_list, list) { | |
886 | if (!rcdev->dev) | |
887 | continue; | |
888 | ||
889 | if (!strcmp(name, dev_name(rcdev->dev))) | |
890 | return rcdev; | |
891 | } | |
892 | ||
893 | return NULL; | |
894 | } | |
895 | ||
6691dffa BG |
896 | static struct reset_control * |
897 | __reset_control_get_from_lookup(struct device *dev, const char *con_id, | |
c84b0326 | 898 | bool shared, bool optional, bool acquired) |
6691dffa BG |
899 | { |
900 | const struct reset_control_lookup *lookup; | |
e2749bb9 | 901 | struct reset_controller_dev *rcdev; |
6691dffa BG |
902 | const char *dev_id = dev_name(dev); |
903 | struct reset_control *rstc = NULL; | |
904 | ||
6691dffa BG |
905 | mutex_lock(&reset_lookup_mutex); |
906 | ||
907 | list_for_each_entry(lookup, &reset_lookup_list, list) { | |
908 | if (strcmp(lookup->dev_id, dev_id)) | |
909 | continue; | |
910 | ||
911 | if ((!con_id && !lookup->con_id) || | |
912 | ((con_id && lookup->con_id) && | |
913 | !strcmp(con_id, lookup->con_id))) { | |
914 | mutex_lock(&reset_list_mutex); | |
e2749bb9 BG |
915 | rcdev = __reset_controller_by_name(lookup->provider); |
916 | if (!rcdev) { | |
917 | mutex_unlock(&reset_list_mutex); | |
918 | mutex_unlock(&reset_lookup_mutex); | |
919 | /* Reset provider may not be ready yet. */ | |
920 | return ERR_PTR(-EPROBE_DEFER); | |
921 | } | |
922 | ||
923 | rstc = __reset_control_get_internal(rcdev, | |
6691dffa | 924 | lookup->index, |
c84b0326 | 925 | shared, acquired); |
6691dffa BG |
926 | mutex_unlock(&reset_list_mutex); |
927 | break; | |
928 | } | |
929 | } | |
930 | ||
931 | mutex_unlock(&reset_lookup_mutex); | |
932 | ||
933 | if (!rstc) | |
934 | return optional ? NULL : ERR_PTR(-ENOENT); | |
935 | ||
936 | return rstc; | |
937 | } | |
938 | ||
62e24c57 | 939 | struct reset_control *__reset_control_get(struct device *dev, const char *id, |
c84b0326 PZ |
940 | int index, bool shared, bool optional, |
941 | bool acquired) | |
62e24c57 | 942 | { |
c84b0326 PZ |
943 | if (WARN_ON(shared && acquired)) |
944 | return ERR_PTR(-EINVAL); | |
945 | ||
62e24c57 PZ |
946 | if (dev->of_node) |
947 | return __of_reset_control_get(dev->of_node, id, index, shared, | |
c84b0326 | 948 | optional, acquired); |
62e24c57 | 949 | |
c84b0326 PZ |
950 | return __reset_control_get_from_lookup(dev, id, shared, optional, |
951 | acquired); | |
62e24c57 PZ |
952 | } |
953 | EXPORT_SYMBOL_GPL(__reset_control_get); | |
954 | ||
48d71395 PZ |
955 | int __reset_control_bulk_get(struct device *dev, int num_rstcs, |
956 | struct reset_control_bulk_data *rstcs, | |
957 | bool shared, bool optional, bool acquired) | |
958 | { | |
959 | int ret, i; | |
960 | ||
961 | for (i = 0; i < num_rstcs; i++) { | |
962 | rstcs[i].rstc = __reset_control_get(dev, rstcs[i].id, 0, | |
963 | shared, optional, acquired); | |
964 | if (IS_ERR(rstcs[i].rstc)) { | |
965 | ret = PTR_ERR(rstcs[i].rstc); | |
966 | goto err; | |
967 | } | |
968 | } | |
969 | ||
970 | return 0; | |
971 | ||
972 | err: | |
973 | mutex_lock(&reset_list_mutex); | |
974 | while (i--) | |
975 | __reset_control_put_internal(rstcs[i].rstc); | |
976 | mutex_unlock(&reset_list_mutex); | |
977 | return ret; | |
978 | } | |
979 | EXPORT_SYMBOL_GPL(__reset_control_bulk_get); | |
980 | ||
17c82e20 VG |
981 | static void reset_control_array_put(struct reset_control_array *resets) |
982 | { | |
983 | int i; | |
984 | ||
985 | mutex_lock(&reset_list_mutex); | |
986 | for (i = 0; i < resets->num_rstcs; i++) | |
987 | __reset_control_put_internal(resets->rstc[i]); | |
988 | mutex_unlock(&reset_list_mutex); | |
532f9cd6 | 989 | kfree(resets); |
17c82e20 VG |
990 | } |
991 | ||
61fc4131 PZ |
992 | /** |
993 | * reset_control_put - free the reset controller | |
994 | * @rstc: reset controller | |
995 | */ | |
61fc4131 PZ |
996 | void reset_control_put(struct reset_control *rstc) |
997 | { | |
4891486f | 998 | if (IS_ERR_OR_NULL(rstc)) |
61fc4131 PZ |
999 | return; |
1000 | ||
17c82e20 VG |
1001 | if (reset_control_is_array(rstc)) { |
1002 | reset_control_array_put(rstc_to_array(rstc)); | |
1003 | return; | |
1004 | } | |
1005 | ||
c15ddec2 | 1006 | mutex_lock(&reset_list_mutex); |
62e24c57 | 1007 | __reset_control_put_internal(rstc); |
c15ddec2 | 1008 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
1009 | } |
1010 | EXPORT_SYMBOL_GPL(reset_control_put); | |
1011 | ||
48d71395 PZ |
1012 | /** |
1013 | * reset_control_bulk_put - free the reset controllers | |
1014 | * @num_rstcs: number of entries in rstcs array | |
1015 | * @rstcs: array of struct reset_control_bulk_data with reset controls set | |
1016 | */ | |
1017 | void reset_control_bulk_put(int num_rstcs, struct reset_control_bulk_data *rstcs) | |
1018 | { | |
1019 | mutex_lock(&reset_list_mutex); | |
1020 | while (num_rstcs--) { | |
1021 | if (IS_ERR_OR_NULL(rstcs[num_rstcs].rstc)) | |
1022 | continue; | |
1023 | __reset_control_put_internal(rstcs[num_rstcs].rstc); | |
1024 | } | |
1025 | mutex_unlock(&reset_list_mutex); | |
1026 | } | |
1027 | EXPORT_SYMBOL_GPL(reset_control_bulk_put); | |
1028 | ||
61fc4131 PZ |
1029 | static void devm_reset_control_release(struct device *dev, void *res) |
1030 | { | |
1031 | reset_control_put(*(struct reset_control **)res); | |
1032 | } | |
1033 | ||
1c5e05c2 PZ |
1034 | struct reset_control * |
1035 | __devm_reset_control_get(struct device *dev, const char *id, int index, | |
1036 | bool shared, bool optional, bool acquired) | |
61fc4131 PZ |
1037 | { |
1038 | struct reset_control **ptr, *rstc; | |
1039 | ||
1040 | ptr = devres_alloc(devm_reset_control_release, sizeof(*ptr), | |
1041 | GFP_KERNEL); | |
1042 | if (!ptr) | |
1043 | return ERR_PTR(-ENOMEM); | |
1044 | ||
c84b0326 | 1045 | rstc = __reset_control_get(dev, id, index, shared, optional, acquired); |
a9457ed2 | 1046 | if (IS_ERR_OR_NULL(rstc)) { |
61fc4131 | 1047 | devres_free(ptr); |
a9457ed2 | 1048 | return rstc; |
61fc4131 PZ |
1049 | } |
1050 | ||
a9457ed2 GU |
1051 | *ptr = rstc; |
1052 | devres_add(dev, ptr); | |
1053 | ||
61fc4131 PZ |
1054 | return rstc; |
1055 | } | |
6c96f05c | 1056 | EXPORT_SYMBOL_GPL(__devm_reset_control_get); |
61fc4131 | 1057 | |
48d71395 PZ |
1058 | struct reset_control_bulk_devres { |
1059 | int num_rstcs; | |
1060 | struct reset_control_bulk_data *rstcs; | |
1061 | }; | |
1062 | ||
1063 | static void devm_reset_control_bulk_release(struct device *dev, void *res) | |
1064 | { | |
1065 | struct reset_control_bulk_devres *devres = res; | |
1066 | ||
1067 | reset_control_bulk_put(devres->num_rstcs, devres->rstcs); | |
1068 | } | |
1069 | ||
1070 | int __devm_reset_control_bulk_get(struct device *dev, int num_rstcs, | |
1071 | struct reset_control_bulk_data *rstcs, | |
1072 | bool shared, bool optional, bool acquired) | |
1073 | { | |
1074 | struct reset_control_bulk_devres *ptr; | |
1075 | int ret; | |
1076 | ||
1077 | ptr = devres_alloc(devm_reset_control_bulk_release, sizeof(*ptr), | |
1078 | GFP_KERNEL); | |
1079 | if (!ptr) | |
1080 | return -ENOMEM; | |
1081 | ||
1082 | ret = __reset_control_bulk_get(dev, num_rstcs, rstcs, shared, optional, acquired); | |
1083 | if (ret < 0) { | |
1084 | devres_free(ptr); | |
1085 | return ret; | |
1086 | } | |
1087 | ||
1088 | ptr->num_rstcs = num_rstcs; | |
1089 | ptr->rstcs = rstcs; | |
1090 | devres_add(dev, ptr); | |
1091 | ||
1092 | return 0; | |
1093 | } | |
1094 | EXPORT_SYMBOL_GPL(__devm_reset_control_bulk_get); | |
1095 | ||
61fc4131 | 1096 | /** |
ac9b7554 MCC |
1097 | * __device_reset - find reset controller associated with the device |
1098 | * and perform reset | |
61fc4131 | 1099 | * @dev: device to be reset by the controller |
1554bbd4 | 1100 | * @optional: whether it is optional to reset the device |
61fc4131 | 1101 | * |
1554bbd4 | 1102 | * Convenience wrapper for __reset_control_get() and reset_control_reset(). |
61fc4131 | 1103 | * This is useful for the common case of devices with single, dedicated reset |
82816b4f | 1104 | * lines. _RST firmware method will be called for devices with ACPI. |
61fc4131 | 1105 | */ |
1554bbd4 | 1106 | int __device_reset(struct device *dev, bool optional) |
61fc4131 PZ |
1107 | { |
1108 | struct reset_control *rstc; | |
1109 | int ret; | |
1110 | ||
82816b4f KY |
1111 | #ifdef CONFIG_ACPI |
1112 | acpi_handle handle = ACPI_HANDLE(dev); | |
1113 | ||
1114 | if (handle) { | |
1115 | if (!acpi_has_method(handle, "_RST")) | |
1116 | return optional ? 0 : -ENOENT; | |
1117 | if (ACPI_FAILURE(acpi_evaluate_object(handle, "_RST", NULL, | |
1118 | NULL))) | |
1119 | return -EIO; | |
1120 | } | |
1121 | #endif | |
1122 | ||
c84b0326 | 1123 | rstc = __reset_control_get(dev, NULL, 0, 0, optional, true); |
61fc4131 PZ |
1124 | if (IS_ERR(rstc)) |
1125 | return PTR_ERR(rstc); | |
1126 | ||
1127 | ret = reset_control_reset(rstc); | |
1128 | ||
1129 | reset_control_put(rstc); | |
1130 | ||
1131 | return ret; | |
1132 | } | |
1554bbd4 | 1133 | EXPORT_SYMBOL_GPL(__device_reset); |
17c82e20 | 1134 | |
77d551b9 | 1135 | /* |
17c82e20 VG |
1136 | * APIs to manage an array of reset controls. |
1137 | */ | |
77d551b9 | 1138 | |
17c82e20 VG |
1139 | /** |
1140 | * of_reset_control_get_count - Count number of resets available with a device | |
1141 | * | |
1142 | * @node: device node that contains 'resets'. | |
1143 | * | |
1144 | * Returns positive reset count on success, or error number on failure and | |
1145 | * on count being zero. | |
1146 | */ | |
1147 | static int of_reset_control_get_count(struct device_node *node) | |
1148 | { | |
1149 | int count; | |
1150 | ||
1151 | if (!node) | |
1152 | return -EINVAL; | |
1153 | ||
1154 | count = of_count_phandle_with_args(node, "resets", "#reset-cells"); | |
1155 | if (count == 0) | |
1156 | count = -ENOENT; | |
1157 | ||
1158 | return count; | |
1159 | } | |
1160 | ||
1161 | /** | |
1162 | * of_reset_control_array_get - Get a list of reset controls using | |
1163 | * device node. | |
1164 | * | |
1165 | * @np: device node for the device that requests the reset controls array | |
1166 | * @shared: whether reset controls are shared or not | |
1167 | * @optional: whether it is optional to get the reset controls | |
f31d5c24 TR |
1168 | * @acquired: only one reset control may be acquired for a given controller |
1169 | * and ID | |
17c82e20 | 1170 | * |
723c0011 | 1171 | * Returns pointer to allocated reset_control on success or error on failure |
17c82e20 VG |
1172 | */ |
1173 | struct reset_control * | |
f31d5c24 TR |
1174 | of_reset_control_array_get(struct device_node *np, bool shared, bool optional, |
1175 | bool acquired) | |
17c82e20 VG |
1176 | { |
1177 | struct reset_control_array *resets; | |
1178 | struct reset_control *rstc; | |
1179 | int num, i; | |
1180 | ||
1181 | num = of_reset_control_get_count(np); | |
1182 | if (num < 0) | |
1183 | return optional ? NULL : ERR_PTR(num); | |
1184 | ||
acafe7e3 | 1185 | resets = kzalloc(struct_size(resets, rstc, num), GFP_KERNEL); |
17c82e20 VG |
1186 | if (!resets) |
1187 | return ERR_PTR(-ENOMEM); | |
1188 | ||
1189 | for (i = 0; i < num; i++) { | |
c84b0326 | 1190 | rstc = __of_reset_control_get(np, NULL, i, shared, optional, |
f31d5c24 | 1191 | acquired); |
17c82e20 VG |
1192 | if (IS_ERR(rstc)) |
1193 | goto err_rst; | |
1194 | resets->rstc[i] = rstc; | |
1195 | } | |
1196 | resets->num_rstcs = num; | |
1197 | resets->base.array = true; | |
1198 | ||
1199 | return &resets->base; | |
1200 | ||
1201 | err_rst: | |
1202 | mutex_lock(&reset_list_mutex); | |
1203 | while (--i >= 0) | |
1204 | __reset_control_put_internal(resets->rstc[i]); | |
1205 | mutex_unlock(&reset_list_mutex); | |
1206 | ||
1207 | kfree(resets); | |
1208 | ||
1209 | return rstc; | |
1210 | } | |
1211 | EXPORT_SYMBOL_GPL(of_reset_control_array_get); | |
1212 | ||
1213 | /** | |
1214 | * devm_reset_control_array_get - Resource managed reset control array get | |
1215 | * | |
1216 | * @dev: device that requests the list of reset controls | |
1217 | * @shared: whether reset controls are shared or not | |
1218 | * @optional: whether it is optional to get the reset controls | |
1219 | * | |
1220 | * The reset control array APIs are intended for a list of resets | |
1221 | * that just have to be asserted or deasserted, without any | |
1222 | * requirements on the order. | |
1223 | * | |
723c0011 | 1224 | * Returns pointer to allocated reset_control on success or error on failure |
17c82e20 VG |
1225 | */ |
1226 | struct reset_control * | |
1227 | devm_reset_control_array_get(struct device *dev, bool shared, bool optional) | |
1228 | { | |
a9457ed2 | 1229 | struct reset_control **ptr, *rstc; |
17c82e20 | 1230 | |
a9457ed2 GU |
1231 | ptr = devres_alloc(devm_reset_control_release, sizeof(*ptr), |
1232 | GFP_KERNEL); | |
1233 | if (!ptr) | |
17c82e20 VG |
1234 | return ERR_PTR(-ENOMEM); |
1235 | ||
f31d5c24 | 1236 | rstc = of_reset_control_array_get(dev->of_node, shared, optional, true); |
db238086 | 1237 | if (IS_ERR_OR_NULL(rstc)) { |
a9457ed2 | 1238 | devres_free(ptr); |
17c82e20 VG |
1239 | return rstc; |
1240 | } | |
1241 | ||
a9457ed2 GU |
1242 | *ptr = rstc; |
1243 | devres_add(dev, ptr); | |
17c82e20 VG |
1244 | |
1245 | return rstc; | |
1246 | } | |
1247 | EXPORT_SYMBOL_GPL(devm_reset_control_array_get); | |
eaf91db0 GU |
1248 | |
1249 | static int reset_control_get_count_from_lookup(struct device *dev) | |
1250 | { | |
1251 | const struct reset_control_lookup *lookup; | |
151f72f4 | 1252 | const char *dev_id; |
eaf91db0 GU |
1253 | int count = 0; |
1254 | ||
1255 | if (!dev) | |
1256 | return -EINVAL; | |
1257 | ||
151f72f4 | 1258 | dev_id = dev_name(dev); |
eaf91db0 GU |
1259 | mutex_lock(&reset_lookup_mutex); |
1260 | ||
1261 | list_for_each_entry(lookup, &reset_lookup_list, list) { | |
1262 | if (!strcmp(lookup->dev_id, dev_id)) | |
1263 | count++; | |
1264 | } | |
1265 | ||
1266 | mutex_unlock(&reset_lookup_mutex); | |
1267 | ||
1268 | if (count == 0) | |
1269 | count = -ENOENT; | |
1270 | ||
1271 | return count; | |
1272 | } | |
1273 | ||
1274 | /** | |
1275 | * reset_control_get_count - Count number of resets available with a device | |
1276 | * | |
1277 | * @dev: device for which to return the number of resets | |
1278 | * | |
1279 | * Returns positive reset count on success, or error number on failure and | |
1280 | * on count being zero. | |
1281 | */ | |
1282 | int reset_control_get_count(struct device *dev) | |
1283 | { | |
1284 | if (dev->of_node) | |
1285 | return of_reset_control_get_count(dev->of_node); | |
1286 | ||
1287 | return reset_control_get_count_from_lookup(dev); | |
1288 | } | |
1289 | EXPORT_SYMBOL_GPL(reset_control_get_count); |