Commit | Line | Data |
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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
61fc4131 PZ |
2 | /* |
3 | * Reset Controller framework | |
4 | * | |
5 | * Copyright 2013 Philipp Zabel, Pengutronix | |
61fc4131 | 6 | */ |
0b52297f | 7 | #include <linux/atomic.h> |
61fc4131 PZ |
8 | #include <linux/device.h> |
9 | #include <linux/err.h> | |
10 | #include <linux/export.h> | |
11 | #include <linux/kernel.h> | |
d25e4334 | 12 | #include <linux/kref.h> |
61fc4131 PZ |
13 | #include <linux/module.h> |
14 | #include <linux/of.h> | |
15 | #include <linux/reset.h> | |
16 | #include <linux/reset-controller.h> | |
17 | #include <linux/slab.h> | |
18 | ||
c15ddec2 | 19 | static DEFINE_MUTEX(reset_list_mutex); |
61fc4131 PZ |
20 | static LIST_HEAD(reset_controller_list); |
21 | ||
6691dffa BG |
22 | static DEFINE_MUTEX(reset_lookup_mutex); |
23 | static LIST_HEAD(reset_lookup_list); | |
24 | ||
61fc4131 PZ |
25 | /** |
26 | * struct reset_control - a reset control | |
27 | * @rcdev: a pointer to the reset controller device | |
28 | * this reset control belongs to | |
c15ddec2 | 29 | * @list: list entry for the rcdev's reset controller list |
61fc4131 PZ |
30 | * @id: ID of the reset controller in the reset |
31 | * controller device | |
c15ddec2 | 32 | * @refcnt: Number of gets of this reset_control |
c84b0326 | 33 | * @acquired: Only one reset_control may be acquired for a given rcdev and id. |
0b52297f | 34 | * @shared: Is this a shared (1), or an exclusive (0) reset_control? |
3315be57 KK |
35 | * @array: Is this an array of reset controls (1)? |
36 | * @deassert_count: Number of times this reset line has been deasserted | |
7da33a37 MB |
37 | * @triggered_count: Number of times this reset line has been reset. Currently |
38 | * only used for shared resets, which means that the value | |
39 | * will be either 0 or 1. | |
61fc4131 PZ |
40 | */ |
41 | struct reset_control { | |
42 | struct reset_controller_dev *rcdev; | |
c15ddec2 | 43 | struct list_head list; |
61fc4131 | 44 | unsigned int id; |
d25e4334 | 45 | struct kref refcnt; |
c84b0326 | 46 | bool acquired; |
ee48c726 | 47 | bool shared; |
17c82e20 | 48 | bool array; |
0b52297f | 49 | atomic_t deassert_count; |
7da33a37 | 50 | atomic_t triggered_count; |
61fc4131 PZ |
51 | }; |
52 | ||
17c82e20 VG |
53 | /** |
54 | * struct reset_control_array - an array of reset controls | |
55 | * @base: reset control for compatibility with reset control API functions | |
56 | * @num_rstcs: number of reset controls | |
57 | * @rstc: array of reset controls | |
58 | */ | |
59 | struct reset_control_array { | |
60 | struct reset_control base; | |
61 | unsigned int num_rstcs; | |
62 | struct reset_control *rstc[]; | |
63 | }; | |
64 | ||
c84b0326 PZ |
65 | static const char *rcdev_name(struct reset_controller_dev *rcdev) |
66 | { | |
67 | if (rcdev->dev) | |
68 | return dev_name(rcdev->dev); | |
69 | ||
70 | if (rcdev->of_node) | |
71 | return rcdev->of_node->full_name; | |
72 | ||
73 | return NULL; | |
74 | } | |
75 | ||
61fc4131 PZ |
76 | /** |
77 | * of_reset_simple_xlate - translate reset_spec to the reset line number | |
78 | * @rcdev: a pointer to the reset controller device | |
79 | * @reset_spec: reset line specifier as found in the device tree | |
61fc4131 | 80 | * |
a48108c0 PZ |
81 | * This static translation function is used by default if of_xlate in |
82 | * :c:type:`reset_controller_dev` is not set. It is useful for all reset | |
83 | * controllers with 1:1 mapping, where reset lines can be indexed by number | |
84 | * without gaps. | |
61fc4131 | 85 | */ |
0c5b2b91 | 86 | static int of_reset_simple_xlate(struct reset_controller_dev *rcdev, |
61fc4131 PZ |
87 | const struct of_phandle_args *reset_spec) |
88 | { | |
61fc4131 PZ |
89 | if (reset_spec->args[0] >= rcdev->nr_resets) |
90 | return -EINVAL; | |
91 | ||
92 | return reset_spec->args[0]; | |
93 | } | |
61fc4131 PZ |
94 | |
95 | /** | |
96 | * reset_controller_register - register a reset controller device | |
97 | * @rcdev: a pointer to the initialized reset controller device | |
98 | */ | |
99 | int reset_controller_register(struct reset_controller_dev *rcdev) | |
100 | { | |
101 | if (!rcdev->of_xlate) { | |
102 | rcdev->of_reset_n_cells = 1; | |
103 | rcdev->of_xlate = of_reset_simple_xlate; | |
104 | } | |
105 | ||
c15ddec2 HG |
106 | INIT_LIST_HEAD(&rcdev->reset_control_head); |
107 | ||
108 | mutex_lock(&reset_list_mutex); | |
61fc4131 | 109 | list_add(&rcdev->list, &reset_controller_list); |
c15ddec2 | 110 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
111 | |
112 | return 0; | |
113 | } | |
114 | EXPORT_SYMBOL_GPL(reset_controller_register); | |
115 | ||
116 | /** | |
117 | * reset_controller_unregister - unregister a reset controller device | |
118 | * @rcdev: a pointer to the reset controller device | |
119 | */ | |
120 | void reset_controller_unregister(struct reset_controller_dev *rcdev) | |
121 | { | |
c15ddec2 | 122 | mutex_lock(&reset_list_mutex); |
61fc4131 | 123 | list_del(&rcdev->list); |
c15ddec2 | 124 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
125 | } |
126 | EXPORT_SYMBOL_GPL(reset_controller_unregister); | |
127 | ||
8d5b5d5c MY |
128 | static void devm_reset_controller_release(struct device *dev, void *res) |
129 | { | |
130 | reset_controller_unregister(*(struct reset_controller_dev **)res); | |
131 | } | |
132 | ||
133 | /** | |
134 | * devm_reset_controller_register - resource managed reset_controller_register() | |
135 | * @dev: device that is registering this reset controller | |
136 | * @rcdev: a pointer to the initialized reset controller device | |
137 | * | |
138 | * Managed reset_controller_register(). For reset controllers registered by | |
139 | * this function, reset_controller_unregister() is automatically called on | |
140 | * driver detach. See reset_controller_register() for more information. | |
141 | */ | |
142 | int devm_reset_controller_register(struct device *dev, | |
143 | struct reset_controller_dev *rcdev) | |
144 | { | |
145 | struct reset_controller_dev **rcdevp; | |
146 | int ret; | |
147 | ||
148 | rcdevp = devres_alloc(devm_reset_controller_release, sizeof(*rcdevp), | |
149 | GFP_KERNEL); | |
150 | if (!rcdevp) | |
151 | return -ENOMEM; | |
152 | ||
153 | ret = reset_controller_register(rcdev); | |
a9457ed2 | 154 | if (ret) { |
8d5b5d5c | 155 | devres_free(rcdevp); |
a9457ed2 | 156 | return ret; |
8d5b5d5c MY |
157 | } |
158 | ||
a9457ed2 GU |
159 | *rcdevp = rcdev; |
160 | devres_add(dev, rcdevp); | |
161 | ||
8d5b5d5c MY |
162 | return ret; |
163 | } | |
164 | EXPORT_SYMBOL_GPL(devm_reset_controller_register); | |
165 | ||
6691dffa BG |
166 | /** |
167 | * reset_controller_add_lookup - register a set of lookup entries | |
6691dffa BG |
168 | * @lookup: array of reset lookup entries |
169 | * @num_entries: number of entries in the lookup array | |
170 | */ | |
e2749bb9 | 171 | void reset_controller_add_lookup(struct reset_control_lookup *lookup, |
6691dffa BG |
172 | unsigned int num_entries) |
173 | { | |
174 | struct reset_control_lookup *entry; | |
175 | unsigned int i; | |
176 | ||
177 | mutex_lock(&reset_lookup_mutex); | |
178 | for (i = 0; i < num_entries; i++) { | |
179 | entry = &lookup[i]; | |
180 | ||
e2749bb9 BG |
181 | if (!entry->dev_id || !entry->provider) { |
182 | pr_warn("%s(): reset lookup entry badly specified, skipping\n", | |
6691dffa BG |
183 | __func__); |
184 | continue; | |
185 | } | |
186 | ||
6691dffa BG |
187 | list_add_tail(&entry->list, &reset_lookup_list); |
188 | } | |
189 | mutex_unlock(&reset_lookup_mutex); | |
190 | } | |
191 | EXPORT_SYMBOL_GPL(reset_controller_add_lookup); | |
192 | ||
17c82e20 VG |
193 | static inline struct reset_control_array * |
194 | rstc_to_array(struct reset_control *rstc) { | |
195 | return container_of(rstc, struct reset_control_array, base); | |
196 | } | |
197 | ||
198 | static int reset_control_array_reset(struct reset_control_array *resets) | |
199 | { | |
200 | int ret, i; | |
201 | ||
202 | for (i = 0; i < resets->num_rstcs; i++) { | |
203 | ret = reset_control_reset(resets->rstc[i]); | |
204 | if (ret) | |
205 | return ret; | |
206 | } | |
207 | ||
208 | return 0; | |
209 | } | |
210 | ||
557acb3d AOA |
211 | static int reset_control_array_rearm(struct reset_control_array *resets) |
212 | { | |
213 | struct reset_control *rstc; | |
214 | int i; | |
215 | ||
216 | for (i = 0; i < resets->num_rstcs; i++) { | |
217 | rstc = resets->rstc[i]; | |
218 | ||
219 | if (!rstc) | |
220 | continue; | |
221 | ||
222 | if (WARN_ON(IS_ERR(rstc))) | |
223 | return -EINVAL; | |
224 | ||
225 | if (rstc->shared) { | |
226 | if (WARN_ON(atomic_read(&rstc->deassert_count) != 0)) | |
227 | return -EINVAL; | |
228 | } else { | |
229 | if (!rstc->acquired) | |
230 | return -EPERM; | |
231 | } | |
232 | } | |
233 | ||
234 | for (i = 0; i < resets->num_rstcs; i++) { | |
235 | rstc = resets->rstc[i]; | |
236 | ||
237 | if (rstc && rstc->shared) | |
238 | WARN_ON(atomic_dec_return(&rstc->triggered_count) < 0); | |
239 | } | |
240 | ||
241 | return 0; | |
242 | } | |
243 | ||
17c82e20 VG |
244 | static int reset_control_array_assert(struct reset_control_array *resets) |
245 | { | |
246 | int ret, i; | |
247 | ||
248 | for (i = 0; i < resets->num_rstcs; i++) { | |
249 | ret = reset_control_assert(resets->rstc[i]); | |
250 | if (ret) | |
251 | goto err; | |
252 | } | |
253 | ||
254 | return 0; | |
255 | ||
256 | err: | |
257 | while (i--) | |
258 | reset_control_deassert(resets->rstc[i]); | |
259 | return ret; | |
260 | } | |
261 | ||
262 | static int reset_control_array_deassert(struct reset_control_array *resets) | |
263 | { | |
264 | int ret, i; | |
265 | ||
266 | for (i = 0; i < resets->num_rstcs; i++) { | |
267 | ret = reset_control_deassert(resets->rstc[i]); | |
268 | if (ret) | |
269 | goto err; | |
270 | } | |
271 | ||
272 | return 0; | |
273 | ||
274 | err: | |
275 | while (i--) | |
276 | reset_control_assert(resets->rstc[i]); | |
277 | return ret; | |
278 | } | |
279 | ||
22815f18 TR |
280 | static int reset_control_array_acquire(struct reset_control_array *resets) |
281 | { | |
282 | unsigned int i; | |
283 | int err; | |
284 | ||
285 | for (i = 0; i < resets->num_rstcs; i++) { | |
286 | err = reset_control_acquire(resets->rstc[i]); | |
287 | if (err < 0) | |
288 | goto release; | |
289 | } | |
290 | ||
291 | return 0; | |
292 | ||
293 | release: | |
294 | while (i--) | |
295 | reset_control_release(resets->rstc[i]); | |
296 | ||
297 | return err; | |
298 | } | |
299 | ||
300 | static void reset_control_array_release(struct reset_control_array *resets) | |
301 | { | |
302 | unsigned int i; | |
303 | ||
304 | for (i = 0; i < resets->num_rstcs; i++) | |
305 | reset_control_release(resets->rstc[i]); | |
306 | } | |
307 | ||
17c82e20 VG |
308 | static inline bool reset_control_is_array(struct reset_control *rstc) |
309 | { | |
310 | return rstc->array; | |
311 | } | |
312 | ||
61fc4131 PZ |
313 | /** |
314 | * reset_control_reset - reset the controlled device | |
315 | * @rstc: reset controller | |
0b52297f | 316 | * |
7da33a37 MB |
317 | * On a shared reset line the actual reset pulse is only triggered once for the |
318 | * lifetime of the reset_control instance: for all but the first caller this is | |
319 | * a no-op. | |
320 | * Consumers must not use reset_control_(de)assert on shared reset lines when | |
321 | * reset_control_reset has been used. | |
bb475230 RO |
322 | * |
323 | * If rstc is NULL it is an optional reset and the function will just | |
324 | * return 0. | |
61fc4131 PZ |
325 | */ |
326 | int reset_control_reset(struct reset_control *rstc) | |
327 | { | |
7da33a37 MB |
328 | int ret; |
329 | ||
bb475230 RO |
330 | if (!rstc) |
331 | return 0; | |
332 | ||
333 | if (WARN_ON(IS_ERR(rstc))) | |
0b52297f HG |
334 | return -EINVAL; |
335 | ||
17c82e20 VG |
336 | if (reset_control_is_array(rstc)) |
337 | return reset_control_array_reset(rstc_to_array(rstc)); | |
338 | ||
7da33a37 MB |
339 | if (!rstc->rcdev->ops->reset) |
340 | return -ENOTSUPP; | |
341 | ||
342 | if (rstc->shared) { | |
343 | if (WARN_ON(atomic_read(&rstc->deassert_count) != 0)) | |
344 | return -EINVAL; | |
345 | ||
346 | if (atomic_inc_return(&rstc->triggered_count) != 1) | |
347 | return 0; | |
c84b0326 PZ |
348 | } else { |
349 | if (!rstc->acquired) | |
350 | return -EPERM; | |
7da33a37 | 351 | } |
61fc4131 | 352 | |
7da33a37 | 353 | ret = rstc->rcdev->ops->reset(rstc->rcdev, rstc->id); |
e5a1dade | 354 | if (rstc->shared && ret) |
7da33a37 MB |
355 | atomic_dec(&rstc->triggered_count); |
356 | ||
357 | return ret; | |
61fc4131 PZ |
358 | } |
359 | EXPORT_SYMBOL_GPL(reset_control_reset); | |
360 | ||
48d71395 PZ |
361 | /** |
362 | * reset_control_bulk_reset - reset the controlled devices in order | |
363 | * @num_rstcs: number of entries in rstcs array | |
364 | * @rstcs: array of struct reset_control_bulk_data with reset controls set | |
365 | * | |
366 | * Issue a reset on all provided reset controls, in order. | |
367 | * | |
368 | * See also: reset_control_reset() | |
369 | */ | |
370 | int reset_control_bulk_reset(int num_rstcs, | |
371 | struct reset_control_bulk_data *rstcs) | |
372 | { | |
373 | int ret, i; | |
374 | ||
375 | for (i = 0; i < num_rstcs; i++) { | |
376 | ret = reset_control_reset(rstcs[i].rstc); | |
377 | if (ret) | |
378 | return ret; | |
379 | } | |
380 | ||
381 | return 0; | |
382 | } | |
383 | EXPORT_SYMBOL_GPL(reset_control_bulk_reset); | |
384 | ||
557acb3d AOA |
385 | /** |
386 | * reset_control_rearm - allow shared reset line to be re-triggered" | |
387 | * @rstc: reset controller | |
388 | * | |
389 | * On a shared reset line the actual reset pulse is only triggered once for the | |
390 | * lifetime of the reset_control instance, except if this call is used. | |
391 | * | |
392 | * Calls to this function must be balanced with calls to reset_control_reset, | |
393 | * a warning is thrown in case triggered_count ever dips below 0. | |
394 | * | |
395 | * Consumers must not use reset_control_(de)assert on shared reset lines when | |
396 | * reset_control_reset or reset_control_rearm have been used. | |
397 | * | |
398 | * If rstc is NULL the function will just return 0. | |
399 | */ | |
400 | int reset_control_rearm(struct reset_control *rstc) | |
401 | { | |
402 | if (!rstc) | |
403 | return 0; | |
404 | ||
405 | if (WARN_ON(IS_ERR(rstc))) | |
406 | return -EINVAL; | |
407 | ||
408 | if (reset_control_is_array(rstc)) | |
409 | return reset_control_array_rearm(rstc_to_array(rstc)); | |
410 | ||
411 | if (rstc->shared) { | |
412 | if (WARN_ON(atomic_read(&rstc->deassert_count) != 0)) | |
413 | return -EINVAL; | |
414 | ||
415 | WARN_ON(atomic_dec_return(&rstc->triggered_count) < 0); | |
416 | } else { | |
417 | if (!rstc->acquired) | |
418 | return -EPERM; | |
419 | } | |
420 | ||
421 | return 0; | |
422 | } | |
423 | EXPORT_SYMBOL_GPL(reset_control_rearm); | |
424 | ||
61fc4131 PZ |
425 | /** |
426 | * reset_control_assert - asserts the reset line | |
427 | * @rstc: reset controller | |
0b52297f HG |
428 | * |
429 | * Calling this on an exclusive reset controller guarantees that the reset | |
430 | * will be asserted. When called on a shared reset controller the line may | |
431 | * still be deasserted, as long as other users keep it so. | |
432 | * | |
433 | * For shared reset controls a driver cannot expect the hw's registers and | |
434 | * internal state to be reset, but must be prepared for this to happen. | |
7da33a37 MB |
435 | * Consumers must not use reset_control_reset on shared reset lines when |
436 | * reset_control_(de)assert has been used. | |
bb475230 RO |
437 | * |
438 | * If rstc is NULL it is an optional reset and the function will just | |
439 | * return 0. | |
61fc4131 PZ |
440 | */ |
441 | int reset_control_assert(struct reset_control *rstc) | |
442 | { | |
bb475230 RO |
443 | if (!rstc) |
444 | return 0; | |
445 | ||
446 | if (WARN_ON(IS_ERR(rstc))) | |
a3774e14 PZ |
447 | return -EINVAL; |
448 | ||
17c82e20 VG |
449 | if (reset_control_is_array(rstc)) |
450 | return reset_control_array_assert(rstc_to_array(rstc)); | |
451 | ||
0b52297f | 452 | if (rstc->shared) { |
7da33a37 MB |
453 | if (WARN_ON(atomic_read(&rstc->triggered_count) != 0)) |
454 | return -EINVAL; | |
455 | ||
0b52297f HG |
456 | if (WARN_ON(atomic_read(&rstc->deassert_count) == 0)) |
457 | return -EINVAL; | |
458 | ||
459 | if (atomic_dec_return(&rstc->deassert_count) != 0) | |
460 | return 0; | |
21240eb9 PZ |
461 | |
462 | /* | |
463 | * Shared reset controls allow the reset line to be in any state | |
464 | * after this call, so doing nothing is a valid option. | |
465 | */ | |
466 | if (!rstc->rcdev->ops->assert) | |
467 | return 0; | |
468 | } else { | |
469 | /* | |
470 | * If the reset controller does not implement .assert(), there | |
471 | * is no way to guarantee that the reset line is asserted after | |
472 | * this call. | |
473 | */ | |
474 | if (!rstc->rcdev->ops->assert) | |
475 | return -ENOTSUPP; | |
c84b0326 PZ |
476 | |
477 | if (!rstc->acquired) { | |
478 | WARN(1, "reset %s (ID: %u) is not acquired\n", | |
479 | rcdev_name(rstc->rcdev), rstc->id); | |
480 | return -EPERM; | |
481 | } | |
0b52297f HG |
482 | } |
483 | ||
484 | return rstc->rcdev->ops->assert(rstc->rcdev, rstc->id); | |
61fc4131 PZ |
485 | } |
486 | EXPORT_SYMBOL_GPL(reset_control_assert); | |
487 | ||
48d71395 PZ |
488 | /** |
489 | * reset_control_bulk_assert - asserts the reset lines in order | |
490 | * @num_rstcs: number of entries in rstcs array | |
491 | * @rstcs: array of struct reset_control_bulk_data with reset controls set | |
492 | * | |
493 | * Assert the reset lines for all provided reset controls, in order. | |
494 | * If an assertion fails, already asserted resets are deasserted again. | |
495 | * | |
496 | * See also: reset_control_assert() | |
497 | */ | |
498 | int reset_control_bulk_assert(int num_rstcs, | |
499 | struct reset_control_bulk_data *rstcs) | |
500 | { | |
501 | int ret, i; | |
502 | ||
503 | for (i = 0; i < num_rstcs; i++) { | |
504 | ret = reset_control_assert(rstcs[i].rstc); | |
505 | if (ret) | |
506 | goto err; | |
507 | } | |
508 | ||
509 | return 0; | |
510 | ||
511 | err: | |
512 | while (i--) | |
513 | reset_control_deassert(rstcs[i].rstc); | |
514 | return ret; | |
515 | } | |
516 | EXPORT_SYMBOL_GPL(reset_control_bulk_assert); | |
517 | ||
61fc4131 PZ |
518 | /** |
519 | * reset_control_deassert - deasserts the reset line | |
520 | * @rstc: reset controller | |
0b52297f HG |
521 | * |
522 | * After calling this function, the reset is guaranteed to be deasserted. | |
7da33a37 MB |
523 | * Consumers must not use reset_control_reset on shared reset lines when |
524 | * reset_control_(de)assert has been used. | |
bb475230 RO |
525 | * |
526 | * If rstc is NULL it is an optional reset and the function will just | |
527 | * return 0. | |
61fc4131 PZ |
528 | */ |
529 | int reset_control_deassert(struct reset_control *rstc) | |
530 | { | |
bb475230 RO |
531 | if (!rstc) |
532 | return 0; | |
533 | ||
534 | if (WARN_ON(IS_ERR(rstc))) | |
a3774e14 PZ |
535 | return -EINVAL; |
536 | ||
17c82e20 VG |
537 | if (reset_control_is_array(rstc)) |
538 | return reset_control_array_deassert(rstc_to_array(rstc)); | |
539 | ||
0b52297f | 540 | if (rstc->shared) { |
7da33a37 MB |
541 | if (WARN_ON(atomic_read(&rstc->triggered_count) != 0)) |
542 | return -EINVAL; | |
543 | ||
0b52297f HG |
544 | if (atomic_inc_return(&rstc->deassert_count) != 1) |
545 | return 0; | |
c84b0326 PZ |
546 | } else { |
547 | if (!rstc->acquired) { | |
548 | WARN(1, "reset %s (ID: %u) is not acquired\n", | |
549 | rcdev_name(rstc->rcdev), rstc->id); | |
550 | return -EPERM; | |
551 | } | |
0b52297f HG |
552 | } |
553 | ||
21240eb9 PZ |
554 | /* |
555 | * If the reset controller does not implement .deassert(), we assume | |
556 | * that it handles self-deasserting reset lines via .reset(). In that | |
557 | * case, the reset lines are deasserted by default. If that is not the | |
558 | * case, the reset controller driver should implement .deassert() and | |
559 | * return -ENOTSUPP. | |
560 | */ | |
561 | if (!rstc->rcdev->ops->deassert) | |
562 | return 0; | |
563 | ||
0b52297f | 564 | return rstc->rcdev->ops->deassert(rstc->rcdev, rstc->id); |
61fc4131 PZ |
565 | } |
566 | EXPORT_SYMBOL_GPL(reset_control_deassert); | |
567 | ||
48d71395 PZ |
568 | /** |
569 | * reset_control_bulk_deassert - deasserts the reset lines in reverse order | |
570 | * @num_rstcs: number of entries in rstcs array | |
571 | * @rstcs: array of struct reset_control_bulk_data with reset controls set | |
572 | * | |
573 | * Deassert the reset lines for all provided reset controls, in reverse order. | |
574 | * If a deassertion fails, already deasserted resets are asserted again. | |
575 | * | |
576 | * See also: reset_control_deassert() | |
577 | */ | |
578 | int reset_control_bulk_deassert(int num_rstcs, | |
579 | struct reset_control_bulk_data *rstcs) | |
580 | { | |
581 | int ret, i; | |
582 | ||
583 | for (i = num_rstcs - 1; i >= 0; i--) { | |
584 | ret = reset_control_deassert(rstcs[i].rstc); | |
585 | if (ret) | |
586 | goto err; | |
587 | } | |
588 | ||
589 | return 0; | |
590 | ||
591 | err: | |
592 | while (i < num_rstcs) | |
593 | reset_control_assert(rstcs[i++].rstc); | |
594 | return ret; | |
595 | } | |
596 | EXPORT_SYMBOL_GPL(reset_control_bulk_deassert); | |
597 | ||
729de41b DN |
598 | /** |
599 | * reset_control_status - returns a negative errno if not supported, a | |
600 | * positive value if the reset line is asserted, or zero if the reset | |
bb475230 | 601 | * line is not asserted or if the desc is NULL (optional reset). |
729de41b DN |
602 | * @rstc: reset controller |
603 | */ | |
604 | int reset_control_status(struct reset_control *rstc) | |
605 | { | |
bb475230 RO |
606 | if (!rstc) |
607 | return 0; | |
608 | ||
17c82e20 | 609 | if (WARN_ON(IS_ERR(rstc)) || reset_control_is_array(rstc)) |
a3774e14 PZ |
610 | return -EINVAL; |
611 | ||
729de41b DN |
612 | if (rstc->rcdev->ops->status) |
613 | return rstc->rcdev->ops->status(rstc->rcdev, rstc->id); | |
614 | ||
39b4da71 | 615 | return -ENOTSUPP; |
729de41b DN |
616 | } |
617 | EXPORT_SYMBOL_GPL(reset_control_status); | |
618 | ||
c84b0326 PZ |
619 | /** |
620 | * reset_control_acquire() - acquires a reset control for exclusive use | |
621 | * @rstc: reset control | |
622 | * | |
623 | * This is used to explicitly acquire a reset control for exclusive use. Note | |
624 | * that exclusive resets are requested as acquired by default. In order for a | |
625 | * second consumer to be able to control the reset, the first consumer has to | |
626 | * release it first. Typically the easiest way to achieve this is to call the | |
627 | * reset_control_get_exclusive_released() to obtain an instance of the reset | |
628 | * control. Such reset controls are not acquired by default. | |
629 | * | |
630 | * Consumers implementing shared access to an exclusive reset need to follow | |
631 | * a specific protocol in order to work together. Before consumers can change | |
632 | * a reset they must acquire exclusive access using reset_control_acquire(). | |
633 | * After they are done operating the reset, they must release exclusive access | |
634 | * with a call to reset_control_release(). Consumers are not granted exclusive | |
635 | * access to the reset as long as another consumer hasn't released a reset. | |
636 | * | |
637 | * See also: reset_control_release() | |
638 | */ | |
639 | int reset_control_acquire(struct reset_control *rstc) | |
640 | { | |
641 | struct reset_control *rc; | |
642 | ||
643 | if (!rstc) | |
644 | return 0; | |
645 | ||
646 | if (WARN_ON(IS_ERR(rstc))) | |
647 | return -EINVAL; | |
648 | ||
22815f18 TR |
649 | if (reset_control_is_array(rstc)) |
650 | return reset_control_array_acquire(rstc_to_array(rstc)); | |
651 | ||
c84b0326 PZ |
652 | mutex_lock(&reset_list_mutex); |
653 | ||
654 | if (rstc->acquired) { | |
655 | mutex_unlock(&reset_list_mutex); | |
656 | return 0; | |
657 | } | |
658 | ||
659 | list_for_each_entry(rc, &rstc->rcdev->reset_control_head, list) { | |
660 | if (rstc != rc && rstc->id == rc->id) { | |
661 | if (rc->acquired) { | |
662 | mutex_unlock(&reset_list_mutex); | |
663 | return -EBUSY; | |
664 | } | |
665 | } | |
666 | } | |
667 | ||
668 | rstc->acquired = true; | |
669 | ||
670 | mutex_unlock(&reset_list_mutex); | |
671 | return 0; | |
672 | } | |
673 | EXPORT_SYMBOL_GPL(reset_control_acquire); | |
674 | ||
48d71395 PZ |
675 | /** |
676 | * reset_control_bulk_acquire - acquires reset controls for exclusive use | |
677 | * @num_rstcs: number of entries in rstcs array | |
678 | * @rstcs: array of struct reset_control_bulk_data with reset controls set | |
679 | * | |
680 | * This is used to explicitly acquire reset controls requested with | |
681 | * reset_control_bulk_get_exclusive_release() for temporary exclusive use. | |
682 | * | |
683 | * See also: reset_control_acquire(), reset_control_bulk_release() | |
684 | */ | |
685 | int reset_control_bulk_acquire(int num_rstcs, | |
686 | struct reset_control_bulk_data *rstcs) | |
687 | { | |
688 | int ret, i; | |
689 | ||
690 | for (i = 0; i < num_rstcs; i++) { | |
691 | ret = reset_control_acquire(rstcs[i].rstc); | |
692 | if (ret) | |
693 | goto err; | |
694 | } | |
695 | ||
696 | return 0; | |
697 | ||
698 | err: | |
699 | while (i--) | |
700 | reset_control_release(rstcs[i].rstc); | |
701 | return ret; | |
702 | } | |
703 | EXPORT_SYMBOL_GPL(reset_control_bulk_acquire); | |
704 | ||
c84b0326 PZ |
705 | /** |
706 | * reset_control_release() - releases exclusive access to a reset control | |
707 | * @rstc: reset control | |
708 | * | |
709 | * Releases exclusive access right to a reset control previously obtained by a | |
710 | * call to reset_control_acquire(). Until a consumer calls this function, no | |
711 | * other consumers will be granted exclusive access. | |
712 | * | |
713 | * See also: reset_control_acquire() | |
714 | */ | |
715 | void reset_control_release(struct reset_control *rstc) | |
716 | { | |
717 | if (!rstc || WARN_ON(IS_ERR(rstc))) | |
718 | return; | |
719 | ||
22815f18 TR |
720 | if (reset_control_is_array(rstc)) |
721 | reset_control_array_release(rstc_to_array(rstc)); | |
722 | else | |
723 | rstc->acquired = false; | |
c84b0326 PZ |
724 | } |
725 | EXPORT_SYMBOL_GPL(reset_control_release); | |
726 | ||
48d71395 PZ |
727 | /** |
728 | * reset_control_bulk_release() - releases exclusive access to reset controls | |
729 | * @num_rstcs: number of entries in rstcs array | |
730 | * @rstcs: array of struct reset_control_bulk_data with reset controls set | |
731 | * | |
732 | * Releases exclusive access right to reset controls previously obtained by a | |
733 | * call to reset_control_bulk_acquire(). | |
734 | * | |
735 | * See also: reset_control_release(), reset_control_bulk_acquire() | |
736 | */ | |
737 | void reset_control_bulk_release(int num_rstcs, | |
738 | struct reset_control_bulk_data *rstcs) | |
739 | { | |
740 | int i; | |
741 | ||
742 | for (i = 0; i < num_rstcs; i++) | |
743 | reset_control_release(rstcs[i].rstc); | |
744 | } | |
745 | EXPORT_SYMBOL_GPL(reset_control_bulk_release); | |
746 | ||
62e24c57 | 747 | static struct reset_control *__reset_control_get_internal( |
c15ddec2 | 748 | struct reset_controller_dev *rcdev, |
c84b0326 | 749 | unsigned int index, bool shared, bool acquired) |
c15ddec2 HG |
750 | { |
751 | struct reset_control *rstc; | |
752 | ||
753 | lockdep_assert_held(&reset_list_mutex); | |
754 | ||
755 | list_for_each_entry(rstc, &rcdev->reset_control_head, list) { | |
756 | if (rstc->id == index) { | |
c84b0326 PZ |
757 | /* |
758 | * Allow creating a secondary exclusive reset_control | |
759 | * that is initially not acquired for an already | |
760 | * controlled reset line. | |
761 | */ | |
762 | if (!rstc->shared && !shared && !acquired) | |
763 | break; | |
764 | ||
0b52297f HG |
765 | if (WARN_ON(!rstc->shared || !shared)) |
766 | return ERR_PTR(-EBUSY); | |
767 | ||
d25e4334 | 768 | kref_get(&rstc->refcnt); |
c15ddec2 HG |
769 | return rstc; |
770 | } | |
771 | } | |
772 | ||
773 | rstc = kzalloc(sizeof(*rstc), GFP_KERNEL); | |
774 | if (!rstc) | |
775 | return ERR_PTR(-ENOMEM); | |
776 | ||
777 | try_module_get(rcdev->owner); | |
778 | ||
779 | rstc->rcdev = rcdev; | |
780 | list_add(&rstc->list, &rcdev->reset_control_head); | |
781 | rstc->id = index; | |
d25e4334 | 782 | kref_init(&rstc->refcnt); |
c84b0326 | 783 | rstc->acquired = acquired; |
0b52297f | 784 | rstc->shared = shared; |
c15ddec2 HG |
785 | |
786 | return rstc; | |
787 | } | |
788 | ||
d25e4334 | 789 | static void __reset_control_release(struct kref *kref) |
c15ddec2 | 790 | { |
d25e4334 PZ |
791 | struct reset_control *rstc = container_of(kref, struct reset_control, |
792 | refcnt); | |
c15ddec2 | 793 | |
d25e4334 | 794 | lockdep_assert_held(&reset_list_mutex); |
c15ddec2 HG |
795 | |
796 | module_put(rstc->rcdev->owner); | |
797 | ||
798 | list_del(&rstc->list); | |
799 | kfree(rstc); | |
800 | } | |
801 | ||
d25e4334 PZ |
802 | static void __reset_control_put_internal(struct reset_control *rstc) |
803 | { | |
804 | lockdep_assert_held(&reset_list_mutex); | |
805 | ||
806 | kref_put(&rstc->refcnt, __reset_control_release); | |
807 | } | |
808 | ||
6c96f05c | 809 | struct reset_control *__of_reset_control_get(struct device_node *node, |
bb475230 | 810 | const char *id, int index, bool shared, |
c84b0326 | 811 | bool optional, bool acquired) |
61fc4131 | 812 | { |
d056c9b8 | 813 | struct reset_control *rstc; |
61fc4131 PZ |
814 | struct reset_controller_dev *r, *rcdev; |
815 | struct of_phandle_args args; | |
61fc4131 PZ |
816 | int rstc_id; |
817 | int ret; | |
818 | ||
6c96f05c HG |
819 | if (!node) |
820 | return ERR_PTR(-EINVAL); | |
821 | ||
822 | if (id) { | |
823 | index = of_property_match_string(node, | |
824 | "reset-names", id); | |
bb475230 RO |
825 | if (index == -EILSEQ) |
826 | return ERR_PTR(index); | |
6c96f05c | 827 | if (index < 0) |
bb475230 | 828 | return optional ? NULL : ERR_PTR(-ENOENT); |
6c96f05c HG |
829 | } |
830 | ||
fc0a5921 | 831 | ret = of_parse_phandle_with_args(node, "resets", "#reset-cells", |
61fc4131 | 832 | index, &args); |
bb475230 | 833 | if (ret == -EINVAL) |
61fc4131 | 834 | return ERR_PTR(ret); |
bb475230 RO |
835 | if (ret) |
836 | return optional ? NULL : ERR_PTR(ret); | |
61fc4131 | 837 | |
c15ddec2 | 838 | mutex_lock(&reset_list_mutex); |
61fc4131 PZ |
839 | rcdev = NULL; |
840 | list_for_each_entry(r, &reset_controller_list, list) { | |
841 | if (args.np == r->of_node) { | |
842 | rcdev = r; | |
843 | break; | |
844 | } | |
845 | } | |
61fc4131 PZ |
846 | |
847 | if (!rcdev) { | |
b790c8ea GU |
848 | rstc = ERR_PTR(-EPROBE_DEFER); |
849 | goto out; | |
61fc4131 PZ |
850 | } |
851 | ||
e677774f | 852 | if (WARN_ON(args.args_count != rcdev->of_reset_n_cells)) { |
b790c8ea GU |
853 | rstc = ERR_PTR(-EINVAL); |
854 | goto out; | |
e677774f MR |
855 | } |
856 | ||
61fc4131 PZ |
857 | rstc_id = rcdev->of_xlate(rcdev, &args); |
858 | if (rstc_id < 0) { | |
b790c8ea GU |
859 | rstc = ERR_PTR(rstc_id); |
860 | goto out; | |
61fc4131 PZ |
861 | } |
862 | ||
c15ddec2 | 863 | /* reset_list_mutex also protects the rcdev's reset_control list */ |
c84b0326 | 864 | rstc = __reset_control_get_internal(rcdev, rstc_id, shared, acquired); |
61fc4131 | 865 | |
b790c8ea | 866 | out: |
c15ddec2 | 867 | mutex_unlock(&reset_list_mutex); |
b790c8ea | 868 | of_node_put(args.np); |
61fc4131 PZ |
869 | |
870 | return rstc; | |
871 | } | |
6c96f05c | 872 | EXPORT_SYMBOL_GPL(__of_reset_control_get); |
61fc4131 | 873 | |
e2749bb9 BG |
874 | static struct reset_controller_dev * |
875 | __reset_controller_by_name(const char *name) | |
876 | { | |
877 | struct reset_controller_dev *rcdev; | |
878 | ||
879 | lockdep_assert_held(&reset_list_mutex); | |
880 | ||
881 | list_for_each_entry(rcdev, &reset_controller_list, list) { | |
882 | if (!rcdev->dev) | |
883 | continue; | |
884 | ||
885 | if (!strcmp(name, dev_name(rcdev->dev))) | |
886 | return rcdev; | |
887 | } | |
888 | ||
889 | return NULL; | |
890 | } | |
891 | ||
6691dffa BG |
892 | static struct reset_control * |
893 | __reset_control_get_from_lookup(struct device *dev, const char *con_id, | |
c84b0326 | 894 | bool shared, bool optional, bool acquired) |
6691dffa BG |
895 | { |
896 | const struct reset_control_lookup *lookup; | |
e2749bb9 | 897 | struct reset_controller_dev *rcdev; |
6691dffa BG |
898 | const char *dev_id = dev_name(dev); |
899 | struct reset_control *rstc = NULL; | |
900 | ||
6691dffa BG |
901 | mutex_lock(&reset_lookup_mutex); |
902 | ||
903 | list_for_each_entry(lookup, &reset_lookup_list, list) { | |
904 | if (strcmp(lookup->dev_id, dev_id)) | |
905 | continue; | |
906 | ||
907 | if ((!con_id && !lookup->con_id) || | |
908 | ((con_id && lookup->con_id) && | |
909 | !strcmp(con_id, lookup->con_id))) { | |
910 | mutex_lock(&reset_list_mutex); | |
e2749bb9 BG |
911 | rcdev = __reset_controller_by_name(lookup->provider); |
912 | if (!rcdev) { | |
913 | mutex_unlock(&reset_list_mutex); | |
914 | mutex_unlock(&reset_lookup_mutex); | |
915 | /* Reset provider may not be ready yet. */ | |
916 | return ERR_PTR(-EPROBE_DEFER); | |
917 | } | |
918 | ||
919 | rstc = __reset_control_get_internal(rcdev, | |
6691dffa | 920 | lookup->index, |
c84b0326 | 921 | shared, acquired); |
6691dffa BG |
922 | mutex_unlock(&reset_list_mutex); |
923 | break; | |
924 | } | |
925 | } | |
926 | ||
927 | mutex_unlock(&reset_lookup_mutex); | |
928 | ||
929 | if (!rstc) | |
930 | return optional ? NULL : ERR_PTR(-ENOENT); | |
931 | ||
932 | return rstc; | |
933 | } | |
934 | ||
62e24c57 | 935 | struct reset_control *__reset_control_get(struct device *dev, const char *id, |
c84b0326 PZ |
936 | int index, bool shared, bool optional, |
937 | bool acquired) | |
62e24c57 | 938 | { |
c84b0326 PZ |
939 | if (WARN_ON(shared && acquired)) |
940 | return ERR_PTR(-EINVAL); | |
941 | ||
62e24c57 PZ |
942 | if (dev->of_node) |
943 | return __of_reset_control_get(dev->of_node, id, index, shared, | |
c84b0326 | 944 | optional, acquired); |
62e24c57 | 945 | |
c84b0326 PZ |
946 | return __reset_control_get_from_lookup(dev, id, shared, optional, |
947 | acquired); | |
62e24c57 PZ |
948 | } |
949 | EXPORT_SYMBOL_GPL(__reset_control_get); | |
950 | ||
48d71395 PZ |
951 | int __reset_control_bulk_get(struct device *dev, int num_rstcs, |
952 | struct reset_control_bulk_data *rstcs, | |
953 | bool shared, bool optional, bool acquired) | |
954 | { | |
955 | int ret, i; | |
956 | ||
957 | for (i = 0; i < num_rstcs; i++) { | |
958 | rstcs[i].rstc = __reset_control_get(dev, rstcs[i].id, 0, | |
959 | shared, optional, acquired); | |
960 | if (IS_ERR(rstcs[i].rstc)) { | |
961 | ret = PTR_ERR(rstcs[i].rstc); | |
962 | goto err; | |
963 | } | |
964 | } | |
965 | ||
966 | return 0; | |
967 | ||
968 | err: | |
969 | mutex_lock(&reset_list_mutex); | |
970 | while (i--) | |
971 | __reset_control_put_internal(rstcs[i].rstc); | |
972 | mutex_unlock(&reset_list_mutex); | |
973 | return ret; | |
974 | } | |
975 | EXPORT_SYMBOL_GPL(__reset_control_bulk_get); | |
976 | ||
17c82e20 VG |
977 | static void reset_control_array_put(struct reset_control_array *resets) |
978 | { | |
979 | int i; | |
980 | ||
981 | mutex_lock(&reset_list_mutex); | |
982 | for (i = 0; i < resets->num_rstcs; i++) | |
983 | __reset_control_put_internal(resets->rstc[i]); | |
984 | mutex_unlock(&reset_list_mutex); | |
532f9cd6 | 985 | kfree(resets); |
17c82e20 VG |
986 | } |
987 | ||
61fc4131 PZ |
988 | /** |
989 | * reset_control_put - free the reset controller | |
990 | * @rstc: reset controller | |
991 | */ | |
61fc4131 PZ |
992 | void reset_control_put(struct reset_control *rstc) |
993 | { | |
4891486f | 994 | if (IS_ERR_OR_NULL(rstc)) |
61fc4131 PZ |
995 | return; |
996 | ||
17c82e20 VG |
997 | if (reset_control_is_array(rstc)) { |
998 | reset_control_array_put(rstc_to_array(rstc)); | |
999 | return; | |
1000 | } | |
1001 | ||
c15ddec2 | 1002 | mutex_lock(&reset_list_mutex); |
62e24c57 | 1003 | __reset_control_put_internal(rstc); |
c15ddec2 | 1004 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
1005 | } |
1006 | EXPORT_SYMBOL_GPL(reset_control_put); | |
1007 | ||
48d71395 PZ |
1008 | /** |
1009 | * reset_control_bulk_put - free the reset controllers | |
1010 | * @num_rstcs: number of entries in rstcs array | |
1011 | * @rstcs: array of struct reset_control_bulk_data with reset controls set | |
1012 | */ | |
1013 | void reset_control_bulk_put(int num_rstcs, struct reset_control_bulk_data *rstcs) | |
1014 | { | |
1015 | mutex_lock(&reset_list_mutex); | |
1016 | while (num_rstcs--) { | |
1017 | if (IS_ERR_OR_NULL(rstcs[num_rstcs].rstc)) | |
1018 | continue; | |
1019 | __reset_control_put_internal(rstcs[num_rstcs].rstc); | |
1020 | } | |
1021 | mutex_unlock(&reset_list_mutex); | |
1022 | } | |
1023 | EXPORT_SYMBOL_GPL(reset_control_bulk_put); | |
1024 | ||
61fc4131 PZ |
1025 | static void devm_reset_control_release(struct device *dev, void *res) |
1026 | { | |
1027 | reset_control_put(*(struct reset_control **)res); | |
1028 | } | |
1029 | ||
6c96f05c | 1030 | struct reset_control *__devm_reset_control_get(struct device *dev, |
bb475230 | 1031 | const char *id, int index, bool shared, |
c84b0326 | 1032 | bool optional, bool acquired) |
61fc4131 PZ |
1033 | { |
1034 | struct reset_control **ptr, *rstc; | |
1035 | ||
1036 | ptr = devres_alloc(devm_reset_control_release, sizeof(*ptr), | |
1037 | GFP_KERNEL); | |
1038 | if (!ptr) | |
1039 | return ERR_PTR(-ENOMEM); | |
1040 | ||
c84b0326 | 1041 | rstc = __reset_control_get(dev, id, index, shared, optional, acquired); |
a9457ed2 | 1042 | if (IS_ERR_OR_NULL(rstc)) { |
61fc4131 | 1043 | devres_free(ptr); |
a9457ed2 | 1044 | return rstc; |
61fc4131 PZ |
1045 | } |
1046 | ||
a9457ed2 GU |
1047 | *ptr = rstc; |
1048 | devres_add(dev, ptr); | |
1049 | ||
61fc4131 PZ |
1050 | return rstc; |
1051 | } | |
6c96f05c | 1052 | EXPORT_SYMBOL_GPL(__devm_reset_control_get); |
61fc4131 | 1053 | |
48d71395 PZ |
1054 | struct reset_control_bulk_devres { |
1055 | int num_rstcs; | |
1056 | struct reset_control_bulk_data *rstcs; | |
1057 | }; | |
1058 | ||
1059 | static void devm_reset_control_bulk_release(struct device *dev, void *res) | |
1060 | { | |
1061 | struct reset_control_bulk_devres *devres = res; | |
1062 | ||
1063 | reset_control_bulk_put(devres->num_rstcs, devres->rstcs); | |
1064 | } | |
1065 | ||
1066 | int __devm_reset_control_bulk_get(struct device *dev, int num_rstcs, | |
1067 | struct reset_control_bulk_data *rstcs, | |
1068 | bool shared, bool optional, bool acquired) | |
1069 | { | |
1070 | struct reset_control_bulk_devres *ptr; | |
1071 | int ret; | |
1072 | ||
1073 | ptr = devres_alloc(devm_reset_control_bulk_release, sizeof(*ptr), | |
1074 | GFP_KERNEL); | |
1075 | if (!ptr) | |
1076 | return -ENOMEM; | |
1077 | ||
1078 | ret = __reset_control_bulk_get(dev, num_rstcs, rstcs, shared, optional, acquired); | |
1079 | if (ret < 0) { | |
1080 | devres_free(ptr); | |
1081 | return ret; | |
1082 | } | |
1083 | ||
1084 | ptr->num_rstcs = num_rstcs; | |
1085 | ptr->rstcs = rstcs; | |
1086 | devres_add(dev, ptr); | |
1087 | ||
1088 | return 0; | |
1089 | } | |
1090 | EXPORT_SYMBOL_GPL(__devm_reset_control_bulk_get); | |
1091 | ||
61fc4131 | 1092 | /** |
ac9b7554 MCC |
1093 | * __device_reset - find reset controller associated with the device |
1094 | * and perform reset | |
61fc4131 | 1095 | * @dev: device to be reset by the controller |
1554bbd4 | 1096 | * @optional: whether it is optional to reset the device |
61fc4131 | 1097 | * |
1554bbd4 | 1098 | * Convenience wrapper for __reset_control_get() and reset_control_reset(). |
61fc4131 PZ |
1099 | * This is useful for the common case of devices with single, dedicated reset |
1100 | * lines. | |
1101 | */ | |
1554bbd4 | 1102 | int __device_reset(struct device *dev, bool optional) |
61fc4131 PZ |
1103 | { |
1104 | struct reset_control *rstc; | |
1105 | int ret; | |
1106 | ||
c84b0326 | 1107 | rstc = __reset_control_get(dev, NULL, 0, 0, optional, true); |
61fc4131 PZ |
1108 | if (IS_ERR(rstc)) |
1109 | return PTR_ERR(rstc); | |
1110 | ||
1111 | ret = reset_control_reset(rstc); | |
1112 | ||
1113 | reset_control_put(rstc); | |
1114 | ||
1115 | return ret; | |
1116 | } | |
1554bbd4 | 1117 | EXPORT_SYMBOL_GPL(__device_reset); |
17c82e20 | 1118 | |
77d551b9 | 1119 | /* |
17c82e20 VG |
1120 | * APIs to manage an array of reset controls. |
1121 | */ | |
77d551b9 | 1122 | |
17c82e20 VG |
1123 | /** |
1124 | * of_reset_control_get_count - Count number of resets available with a device | |
1125 | * | |
1126 | * @node: device node that contains 'resets'. | |
1127 | * | |
1128 | * Returns positive reset count on success, or error number on failure and | |
1129 | * on count being zero. | |
1130 | */ | |
1131 | static int of_reset_control_get_count(struct device_node *node) | |
1132 | { | |
1133 | int count; | |
1134 | ||
1135 | if (!node) | |
1136 | return -EINVAL; | |
1137 | ||
1138 | count = of_count_phandle_with_args(node, "resets", "#reset-cells"); | |
1139 | if (count == 0) | |
1140 | count = -ENOENT; | |
1141 | ||
1142 | return count; | |
1143 | } | |
1144 | ||
1145 | /** | |
1146 | * of_reset_control_array_get - Get a list of reset controls using | |
1147 | * device node. | |
1148 | * | |
1149 | * @np: device node for the device that requests the reset controls array | |
1150 | * @shared: whether reset controls are shared or not | |
1151 | * @optional: whether it is optional to get the reset controls | |
f31d5c24 TR |
1152 | * @acquired: only one reset control may be acquired for a given controller |
1153 | * and ID | |
17c82e20 | 1154 | * |
723c0011 | 1155 | * Returns pointer to allocated reset_control on success or error on failure |
17c82e20 VG |
1156 | */ |
1157 | struct reset_control * | |
f31d5c24 TR |
1158 | of_reset_control_array_get(struct device_node *np, bool shared, bool optional, |
1159 | bool acquired) | |
17c82e20 VG |
1160 | { |
1161 | struct reset_control_array *resets; | |
1162 | struct reset_control *rstc; | |
1163 | int num, i; | |
1164 | ||
1165 | num = of_reset_control_get_count(np); | |
1166 | if (num < 0) | |
1167 | return optional ? NULL : ERR_PTR(num); | |
1168 | ||
acafe7e3 | 1169 | resets = kzalloc(struct_size(resets, rstc, num), GFP_KERNEL); |
17c82e20 VG |
1170 | if (!resets) |
1171 | return ERR_PTR(-ENOMEM); | |
1172 | ||
1173 | for (i = 0; i < num; i++) { | |
c84b0326 | 1174 | rstc = __of_reset_control_get(np, NULL, i, shared, optional, |
f31d5c24 | 1175 | acquired); |
17c82e20 VG |
1176 | if (IS_ERR(rstc)) |
1177 | goto err_rst; | |
1178 | resets->rstc[i] = rstc; | |
1179 | } | |
1180 | resets->num_rstcs = num; | |
1181 | resets->base.array = true; | |
1182 | ||
1183 | return &resets->base; | |
1184 | ||
1185 | err_rst: | |
1186 | mutex_lock(&reset_list_mutex); | |
1187 | while (--i >= 0) | |
1188 | __reset_control_put_internal(resets->rstc[i]); | |
1189 | mutex_unlock(&reset_list_mutex); | |
1190 | ||
1191 | kfree(resets); | |
1192 | ||
1193 | return rstc; | |
1194 | } | |
1195 | EXPORT_SYMBOL_GPL(of_reset_control_array_get); | |
1196 | ||
1197 | /** | |
1198 | * devm_reset_control_array_get - Resource managed reset control array get | |
1199 | * | |
1200 | * @dev: device that requests the list of reset controls | |
1201 | * @shared: whether reset controls are shared or not | |
1202 | * @optional: whether it is optional to get the reset controls | |
1203 | * | |
1204 | * The reset control array APIs are intended for a list of resets | |
1205 | * that just have to be asserted or deasserted, without any | |
1206 | * requirements on the order. | |
1207 | * | |
723c0011 | 1208 | * Returns pointer to allocated reset_control on success or error on failure |
17c82e20 VG |
1209 | */ |
1210 | struct reset_control * | |
1211 | devm_reset_control_array_get(struct device *dev, bool shared, bool optional) | |
1212 | { | |
a9457ed2 | 1213 | struct reset_control **ptr, *rstc; |
17c82e20 | 1214 | |
a9457ed2 GU |
1215 | ptr = devres_alloc(devm_reset_control_release, sizeof(*ptr), |
1216 | GFP_KERNEL); | |
1217 | if (!ptr) | |
17c82e20 VG |
1218 | return ERR_PTR(-ENOMEM); |
1219 | ||
f31d5c24 | 1220 | rstc = of_reset_control_array_get(dev->of_node, shared, optional, true); |
db238086 | 1221 | if (IS_ERR_OR_NULL(rstc)) { |
a9457ed2 | 1222 | devres_free(ptr); |
17c82e20 VG |
1223 | return rstc; |
1224 | } | |
1225 | ||
a9457ed2 GU |
1226 | *ptr = rstc; |
1227 | devres_add(dev, ptr); | |
17c82e20 VG |
1228 | |
1229 | return rstc; | |
1230 | } | |
1231 | EXPORT_SYMBOL_GPL(devm_reset_control_array_get); | |
eaf91db0 GU |
1232 | |
1233 | static int reset_control_get_count_from_lookup(struct device *dev) | |
1234 | { | |
1235 | const struct reset_control_lookup *lookup; | |
151f72f4 | 1236 | const char *dev_id; |
eaf91db0 GU |
1237 | int count = 0; |
1238 | ||
1239 | if (!dev) | |
1240 | return -EINVAL; | |
1241 | ||
151f72f4 | 1242 | dev_id = dev_name(dev); |
eaf91db0 GU |
1243 | mutex_lock(&reset_lookup_mutex); |
1244 | ||
1245 | list_for_each_entry(lookup, &reset_lookup_list, list) { | |
1246 | if (!strcmp(lookup->dev_id, dev_id)) | |
1247 | count++; | |
1248 | } | |
1249 | ||
1250 | mutex_unlock(&reset_lookup_mutex); | |
1251 | ||
1252 | if (count == 0) | |
1253 | count = -ENOENT; | |
1254 | ||
1255 | return count; | |
1256 | } | |
1257 | ||
1258 | /** | |
1259 | * reset_control_get_count - Count number of resets available with a device | |
1260 | * | |
1261 | * @dev: device for which to return the number of resets | |
1262 | * | |
1263 | * Returns positive reset count on success, or error number on failure and | |
1264 | * on count being zero. | |
1265 | */ | |
1266 | int reset_control_get_count(struct device *dev) | |
1267 | { | |
1268 | if (dev->of_node) | |
1269 | return of_reset_control_get_count(dev->of_node); | |
1270 | ||
1271 | return reset_control_get_count_from_lookup(dev); | |
1272 | } | |
1273 | EXPORT_SYMBOL_GPL(reset_control_get_count); |