Merge tag 'for-linus-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml
[linux-2.6-block.git] / drivers / reset / Kconfig
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ec8f24b7 1# SPDX-License-Identifier: GPL-2.0-only
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2config ARCH_HAS_RESET_CONTROLLER
3 bool
4
5menuconfig RESET_CONTROLLER
6 bool "Reset Controller Support"
7 default y if ARCH_HAS_RESET_CONTROLLER
8 help
9 Generic Reset Controller support.
10
11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
13
14 If unsure, say no.
e5d76075 15
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16if RESET_CONTROLLER
17
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18config RESET_A10SR
19 tristate "Altera Arria10 System Resource Reset"
20 depends on MFD_ALTERA_A10SR
21 help
22 This option enables support for the external reset functions for
23 peripheral PHYs on the Altera Arria10 System Resource Chip.
24
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25config RESET_ATH79
26 bool "AR71xx Reset Driver" if COMPILE_TEST
27 default ATH79
28 help
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
31
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32config RESET_AXS10X
33 bool "AXS10x Reset Driver" if COMPILE_TEST
34 default ARC_PLAT_AXS10X
35 help
36 This enables the reset controller driver for AXS10x.
37
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38config RESET_BCM6345
39 bool "BCM6345 Reset Controller"
40 depends on BMIPS_GENERIC || COMPILE_TEST
41 default BMIPS_GENERIC
42 help
43 This enables the reset controller driver for BCM6345 SoCs.
44
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45config RESET_BERLIN
46 bool "Berlin Reset Driver" if COMPILE_TEST
47 default ARCH_BERLIN
48 help
49 This enables the reset controller driver for Marvell Berlin SoCs.
50
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51config RESET_BRCMSTB
52 tristate "Broadcom STB reset controller"
53 depends on ARCH_BRCMSTB || COMPILE_TEST
54 default ARCH_BRCMSTB
55 help
56 This enables the reset controller driver for Broadcom STB SoCs using
57 a SUN_TOP_CTRL_SW_INIT style controller.
58
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59config RESET_BRCMSTB_RESCAL
60 bool "Broadcom STB RESCAL reset controller"
7fbcc535 61 depends on HAS_IOMEM
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62 default ARCH_BRCMSTB || COMPILE_TEST
63 help
64 This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
65 BCM7216.
66
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67config RESET_HSDK
68 bool "Synopsys HSDK Reset Driver"
2d48a237 69 depends on HAS_IOMEM
544e3bf4 70 depends on ARC_SOC_HSDK || COMPILE_TEST
e0be864f 71 help
13541226 72 This enables the reset controller driver for HSDK board.
e0be864f 73
abf97755 74config RESET_IMX7
a442abbb 75 tristate "i.MX7/8 Reset Driver"
8fa56620 76 depends on HAS_IOMEM
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77 depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
78 default y if SOC_IMX7D
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79 select MFD_SYSCON
80 help
81 This enables the reset controller driver for i.MX7 SoCs.
82
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83config RESET_INTEL_GW
84 bool "Intel Reset Controller Driver"
b460e0a9 85 depends on OF && HAS_IOMEM
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86 select REGMAP_MMIO
87 help
88 This enables the reset controller driver for Intel Gateway SoCs.
89 Say Y to control the reset signals provided by reset controller.
90 Otherwise, say N.
91
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92config RESET_LANTIQ
93 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
94 default SOC_TYPE_XWAY
95 help
96 This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
97
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98config RESET_LPC18XX
99 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
100 default ARCH_LPC18XX
101 help
102 This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
103
44336c24 104config RESET_MESON
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105 tristate "Meson Reset Driver"
106 depends on ARCH_MESON || COMPILE_TEST
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107 default ARCH_MESON
108 help
109 This enables the reset driver for Amlogic Meson SoCs.
110
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111config RESET_MESON_AUDIO_ARB
112 tristate "Meson Audio Memory Arbiter Reset Driver"
113 depends on ARCH_MESON || COMPILE_TEST
114 help
115 This enables the reset driver for Audio Memory Arbiter of
116 Amlogic's A113 based SoCs
117
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118config RESET_NPCM
119 bool "NPCM BMC Reset Driver" if COMPILE_TEST
120 default ARCH_NPCM
121 help
122 This enables the reset controller driver for Nuvoton NPCM
123 BMC SoCs.
124
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125config RESET_OXNAS
126 bool
127
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128config RESET_PISTACHIO
129 bool "Pistachio Reset Driver" if COMPILE_TEST
130 default MACH_PISTACHIO
131 help
132 This enables the reset driver for ImgTec Pistachio SoCs.
133
5ecb0651 134config RESET_QCOM_AOSS
e2d5e833 135 tristate "Qcom AOSS Reset Driver"
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136 depends on ARCH_QCOM || COMPILE_TEST
137 help
138 This enables the AOSS (always on subsystem) reset driver
139 for Qualcomm SDM845 SoCs. Say Y if you want to control
140 reset signals provided by AOSS for Modem, Venus, ADSP,
141 GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
142
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143config RESET_QCOM_PDC
144 tristate "Qualcomm PDC Reset Driver"
145 depends on ARCH_QCOM || COMPILE_TEST
146 help
147 This enables the PDC (Power Domain Controller) reset driver
148 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
149 to control reset signals provided by PDC for Modem, Compute,
150 Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
151
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152config RESET_RASPBERRYPI
153 tristate "Raspberry Pi 4 Firmware Reset Driver"
154 depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
155 default USB_XHCI_PCI
156 help
157 Raspberry Pi 4's co-processor controls some of the board's HW
158 initialization process, but it's up to Linux to trigger it when
159 relevant. This driver provides a reset controller capable of
160 interfacing with RPi4's co-processor and model these firmware
161 initialization routines as reset lines.
162
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163config RESET_SCMI
164 tristate "Reset driver controlled via ARM SCMI interface"
165 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
166 default ARM_SCMI_PROTOCOL
167 help
168 This driver provides support for reset signal/domains that are
169 controlled by firmware that implements the SCMI interface.
170
171 This driver uses SCMI Message Protocol to interact with the
172 firmware controlling all the reset signals.
173
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174config RESET_SIMPLE
175 bool "Simple Reset Controller Driver" if COMPILE_TEST
3ab831e5 176 default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
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177 help
178 This enables a simple reset controller driver for reset lines that
179 that can be asserted and deasserted by toggling bits in a contiguous,
180 exclusive register space.
181
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182 Currently this driver supports:
183 - Altera SoCFPGAs
184 - ASPEED BMC SoCs
5ac33eeb 185 - Bitmain BM1880 SoC
3ab831e5 186 - Realtek SoCs
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187 - RCC reset controller in STM32 MCUs
188 - Allwinner SoCs
189 - ZTE's zx2967 family
7e0e901d 190
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191config RESET_STM32MP157
192 bool "STM32MP157 Reset Driver" if COMPILE_TEST
193 default MACH_STM32MP157
194 help
195 This enables the RCC reset controller driver for STM32 MPUs.
196
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197config RESET_SOCFPGA
198 bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
199 default ARCH_SOCFPGA
200 select RESET_SIMPLE
201 help
202 This enables the reset driver for the SoCFPGA ARMv7 platforms. This
203 driver gets initialized early during platform init calls.
204
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205config RESET_SUNXI
206 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
207 default ARCH_SUNXI
e13c205a 208 select RESET_SIMPLE
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209 help
210 This enables the reset driver for Allwinner SoCs.
211
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212config RESET_TI_SCI
213 tristate "TI System Control Interface (TI-SCI) reset driver"
214 depends on TI_SCI_PROTOCOL
215 help
216 This enables the reset driver support over TI System Control Interface
217 available on some new TI's SoCs. If you wish to use reset resources
218 managed by the TI System Controller, say Y here. Otherwise, say N.
219
dd9bf863 220config RESET_TI_SYSCON
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221 tristate "TI SYSCON Reset Driver"
222 depends on HAS_IOMEM
223 select MFD_SYSCON
224 help
225 This enables the reset driver support for TI devices with
226 memory-mapped reset registers as part of a syscon device node. If
227 you wish to use the reset framework for such memory-mapped devices,
228 say Y here. Otherwise, say N.
229
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230config RESET_UNIPHIER
231 tristate "Reset controller driver for UniPhier SoCs"
232 depends on ARCH_UNIPHIER || COMPILE_TEST
233 depends on OF && MFD_SYSCON
234 default ARCH_UNIPHIER
235 help
236 Support for reset controllers on UniPhier SoCs.
237 Say Y if you want to control reset signals provided by System Control
238 block, Media I/O block, Peripheral Block.
239
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240config RESET_UNIPHIER_GLUE
241 tristate "Reset driver in glue layer for UniPhier SoCs"
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242 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
243 default ARCH_UNIPHIER
244 select RESET_SIMPLE
245 help
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246 Support for peripheral core reset included in its own glue layer
247 on UniPhier SoCs. Say Y if you want to control reset signals
248 provided by the glue layer.
499fef09 249
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250config RESET_ZYNQ
251 bool "ZYNQ Reset Driver" if COMPILE_TEST
252 default ARCH_ZYNQ
253 help
254 This enables the reset controller driver for Xilinx Zynq SoCs.
255
e5d76075 256source "drivers/reset/sti/Kconfig"
f59d23c2 257source "drivers/reset/hisilicon/Kconfig"
dc606c52 258source "drivers/reset/tegra/Kconfig"
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259
260endif