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b9e718e9 BA |
1 | /* |
2 | * Qualcomm ADSP Peripheral Image Loader for MSM8974 and MSM8996 | |
3 | * | |
4 | * Copyright (C) 2016 Linaro Ltd | |
5 | * Copyright (C) 2014 Sony Mobile Communications AB | |
6 | * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License | |
10 | * version 2 as published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | */ | |
17 | ||
f33a7358 | 18 | #include <linux/clk.h> |
b9e718e9 BA |
19 | #include <linux/firmware.h> |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/kernel.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/of_address.h> | |
24 | #include <linux/of_device.h> | |
25 | #include <linux/platform_device.h> | |
26 | #include <linux/qcom_scm.h> | |
27 | #include <linux/regulator/consumer.h> | |
28 | #include <linux/remoteproc.h> | |
29 | #include <linux/soc/qcom/smem.h> | |
30 | #include <linux/soc/qcom/smem_state.h> | |
31 | ||
32 | #include "qcom_mdt_loader.h" | |
33 | #include "remoteproc_internal.h" | |
34 | ||
35 | #define ADSP_CRASH_REASON_SMEM 423 | |
36 | #define ADSP_FIRMWARE_NAME "adsp.mdt" | |
37 | #define ADSP_PAS_ID 1 | |
38 | ||
39 | struct qcom_adsp { | |
40 | struct device *dev; | |
41 | struct rproc *rproc; | |
42 | ||
43 | int wdog_irq; | |
44 | int fatal_irq; | |
45 | int ready_irq; | |
46 | int handover_irq; | |
47 | int stop_ack_irq; | |
48 | ||
49 | struct qcom_smem_state *state; | |
50 | unsigned stop_bit; | |
51 | ||
f33a7358 SJ |
52 | struct clk *xo; |
53 | ||
b9e718e9 BA |
54 | struct regulator *cx_supply; |
55 | ||
56 | struct completion start_done; | |
57 | struct completion stop_done; | |
58 | ||
59 | phys_addr_t mem_phys; | |
60 | phys_addr_t mem_reloc; | |
61 | void *mem_region; | |
62 | size_t mem_size; | |
63 | }; | |
64 | ||
65 | static int adsp_load(struct rproc *rproc, const struct firmware *fw) | |
66 | { | |
67 | struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; | |
68 | phys_addr_t fw_addr; | |
69 | size_t fw_size; | |
70 | bool relocate; | |
71 | int ret; | |
72 | ||
73 | ret = qcom_scm_pas_init_image(ADSP_PAS_ID, fw->data, fw->size); | |
74 | if (ret) { | |
75 | dev_err(&rproc->dev, "invalid firmware metadata\n"); | |
76 | return ret; | |
77 | } | |
78 | ||
79 | ret = qcom_mdt_parse(fw, &fw_addr, &fw_size, &relocate); | |
80 | if (ret) { | |
81 | dev_err(&rproc->dev, "failed to parse mdt header\n"); | |
82 | return ret; | |
83 | } | |
84 | ||
85 | if (relocate) { | |
86 | adsp->mem_reloc = fw_addr; | |
87 | ||
88 | ret = qcom_scm_pas_mem_setup(ADSP_PAS_ID, adsp->mem_phys, fw_size); | |
89 | if (ret) { | |
90 | dev_err(&rproc->dev, "unable to setup memory for image\n"); | |
91 | return ret; | |
92 | } | |
93 | } | |
94 | ||
95 | return qcom_mdt_load(rproc, fw, rproc->firmware); | |
96 | } | |
97 | ||
98 | static const struct rproc_fw_ops adsp_fw_ops = { | |
99 | .find_rsc_table = qcom_mdt_find_rsc_table, | |
100 | .load = adsp_load, | |
101 | }; | |
102 | ||
103 | static int adsp_start(struct rproc *rproc) | |
104 | { | |
105 | struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; | |
106 | int ret; | |
107 | ||
f33a7358 | 108 | ret = clk_prepare_enable(adsp->xo); |
b9e718e9 BA |
109 | if (ret) |
110 | return ret; | |
111 | ||
f33a7358 SJ |
112 | ret = regulator_enable(adsp->cx_supply); |
113 | if (ret) | |
114 | goto disable_clocks; | |
115 | ||
b9e718e9 BA |
116 | ret = qcom_scm_pas_auth_and_reset(ADSP_PAS_ID); |
117 | if (ret) { | |
118 | dev_err(adsp->dev, | |
119 | "failed to authenticate image and release reset\n"); | |
120 | goto disable_regulators; | |
121 | } | |
122 | ||
123 | ret = wait_for_completion_timeout(&adsp->start_done, | |
124 | msecs_to_jiffies(5000)); | |
125 | if (!ret) { | |
126 | dev_err(adsp->dev, "start timed out\n"); | |
127 | qcom_scm_pas_shutdown(ADSP_PAS_ID); | |
128 | ret = -ETIMEDOUT; | |
129 | goto disable_regulators; | |
130 | } | |
131 | ||
132 | ret = 0; | |
133 | ||
134 | disable_regulators: | |
135 | regulator_disable(adsp->cx_supply); | |
f33a7358 SJ |
136 | disable_clocks: |
137 | clk_disable_unprepare(adsp->xo); | |
b9e718e9 BA |
138 | |
139 | return ret; | |
140 | } | |
141 | ||
142 | static int adsp_stop(struct rproc *rproc) | |
143 | { | |
144 | struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; | |
145 | int ret; | |
146 | ||
147 | qcom_smem_state_update_bits(adsp->state, | |
148 | BIT(adsp->stop_bit), | |
149 | BIT(adsp->stop_bit)); | |
150 | ||
151 | ret = wait_for_completion_timeout(&adsp->stop_done, | |
152 | msecs_to_jiffies(5000)); | |
153 | if (ret == 0) | |
154 | dev_err(adsp->dev, "timed out on wait\n"); | |
155 | ||
156 | qcom_smem_state_update_bits(adsp->state, | |
157 | BIT(adsp->stop_bit), | |
158 | 0); | |
159 | ||
160 | ret = qcom_scm_pas_shutdown(ADSP_PAS_ID); | |
161 | if (ret) | |
162 | dev_err(adsp->dev, "failed to shutdown: %d\n", ret); | |
163 | ||
164 | return ret; | |
165 | } | |
166 | ||
167 | static void *adsp_da_to_va(struct rproc *rproc, u64 da, int len) | |
168 | { | |
169 | struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; | |
170 | int offset; | |
171 | ||
172 | offset = da - adsp->mem_reloc; | |
173 | if (offset < 0 || offset + len > adsp->mem_size) | |
174 | return NULL; | |
175 | ||
176 | return adsp->mem_region + offset; | |
177 | } | |
178 | ||
179 | static const struct rproc_ops adsp_ops = { | |
180 | .start = adsp_start, | |
181 | .stop = adsp_stop, | |
182 | .da_to_va = adsp_da_to_va, | |
183 | }; | |
184 | ||
185 | static irqreturn_t adsp_wdog_interrupt(int irq, void *dev) | |
186 | { | |
187 | struct qcom_adsp *adsp = dev; | |
188 | ||
189 | rproc_report_crash(adsp->rproc, RPROC_WATCHDOG); | |
190 | ||
191 | return IRQ_HANDLED; | |
192 | } | |
193 | ||
194 | static irqreturn_t adsp_fatal_interrupt(int irq, void *dev) | |
195 | { | |
196 | struct qcom_adsp *adsp = dev; | |
197 | size_t len; | |
198 | char *msg; | |
199 | ||
200 | msg = qcom_smem_get(QCOM_SMEM_HOST_ANY, ADSP_CRASH_REASON_SMEM, &len); | |
201 | if (!IS_ERR(msg) && len > 0 && msg[0]) | |
202 | dev_err(adsp->dev, "fatal error received: %s\n", msg); | |
203 | ||
204 | rproc_report_crash(adsp->rproc, RPROC_FATAL_ERROR); | |
205 | ||
206 | if (!IS_ERR(msg)) | |
207 | msg[0] = '\0'; | |
208 | ||
209 | return IRQ_HANDLED; | |
210 | } | |
211 | ||
212 | static irqreturn_t adsp_ready_interrupt(int irq, void *dev) | |
213 | { | |
214 | return IRQ_HANDLED; | |
215 | } | |
216 | ||
217 | static irqreturn_t adsp_handover_interrupt(int irq, void *dev) | |
218 | { | |
219 | struct qcom_adsp *adsp = dev; | |
220 | ||
221 | complete(&adsp->start_done); | |
222 | ||
223 | return IRQ_HANDLED; | |
224 | } | |
225 | ||
226 | static irqreturn_t adsp_stop_ack_interrupt(int irq, void *dev) | |
227 | { | |
228 | struct qcom_adsp *adsp = dev; | |
229 | ||
230 | complete(&adsp->stop_done); | |
231 | ||
232 | return IRQ_HANDLED; | |
233 | } | |
234 | ||
f33a7358 SJ |
235 | static int adsp_init_clock(struct qcom_adsp *adsp) |
236 | { | |
237 | int ret; | |
238 | ||
239 | adsp->xo = devm_clk_get(adsp->dev, "xo"); | |
240 | if (IS_ERR(adsp->xo)) { | |
241 | ret = PTR_ERR(adsp->xo); | |
242 | if (ret != -EPROBE_DEFER) | |
243 | dev_err(adsp->dev, "failed to get xo clock"); | |
244 | return ret; | |
245 | } | |
246 | ||
247 | return 0; | |
248 | } | |
249 | ||
b9e718e9 BA |
250 | static int adsp_init_regulator(struct qcom_adsp *adsp) |
251 | { | |
252 | adsp->cx_supply = devm_regulator_get(adsp->dev, "cx"); | |
253 | if (IS_ERR(adsp->cx_supply)) | |
254 | return PTR_ERR(adsp->cx_supply); | |
255 | ||
256 | regulator_set_load(adsp->cx_supply, 100000); | |
257 | ||
258 | return 0; | |
259 | } | |
260 | ||
261 | static int adsp_request_irq(struct qcom_adsp *adsp, | |
262 | struct platform_device *pdev, | |
263 | const char *name, | |
264 | irq_handler_t thread_fn) | |
265 | { | |
266 | int ret; | |
267 | ||
268 | ret = platform_get_irq_byname(pdev, name); | |
269 | if (ret < 0) { | |
270 | dev_err(&pdev->dev, "no %s IRQ defined\n", name); | |
271 | return ret; | |
272 | } | |
273 | ||
274 | ret = devm_request_threaded_irq(&pdev->dev, ret, | |
275 | NULL, thread_fn, | |
276 | IRQF_ONESHOT, | |
277 | "adsp", adsp); | |
278 | if (ret) | |
279 | dev_err(&pdev->dev, "request %s IRQ failed\n", name); | |
280 | ||
281 | return ret; | |
282 | } | |
283 | ||
284 | static int adsp_alloc_memory_region(struct qcom_adsp *adsp) | |
285 | { | |
286 | struct device_node *node; | |
287 | struct resource r; | |
288 | int ret; | |
289 | ||
290 | node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0); | |
291 | if (!node) { | |
292 | dev_err(adsp->dev, "no memory-region specified\n"); | |
293 | return -EINVAL; | |
294 | } | |
295 | ||
296 | ret = of_address_to_resource(node, 0, &r); | |
297 | if (ret) | |
298 | return ret; | |
299 | ||
300 | adsp->mem_phys = adsp->mem_reloc = r.start; | |
301 | adsp->mem_size = resource_size(&r); | |
302 | adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size); | |
303 | if (!adsp->mem_region) { | |
304 | dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n", | |
305 | &r.start, adsp->mem_size); | |
306 | return -EBUSY; | |
307 | } | |
308 | ||
309 | return 0; | |
310 | } | |
311 | ||
312 | static int adsp_probe(struct platform_device *pdev) | |
313 | { | |
314 | struct qcom_adsp *adsp; | |
315 | struct rproc *rproc; | |
316 | int ret; | |
317 | ||
318 | if (!qcom_scm_is_available()) | |
319 | return -EPROBE_DEFER; | |
320 | ||
321 | if (!qcom_scm_pas_supported(ADSP_PAS_ID)) { | |
322 | dev_err(&pdev->dev, "PAS is not available for ADSP\n"); | |
323 | return -ENXIO; | |
324 | } | |
325 | ||
326 | rproc = rproc_alloc(&pdev->dev, pdev->name, &adsp_ops, | |
327 | ADSP_FIRMWARE_NAME, sizeof(*adsp)); | |
328 | if (!rproc) { | |
329 | dev_err(&pdev->dev, "unable to allocate remoteproc\n"); | |
330 | return -ENOMEM; | |
331 | } | |
332 | ||
333 | rproc->fw_ops = &adsp_fw_ops; | |
334 | ||
335 | adsp = (struct qcom_adsp *)rproc->priv; | |
336 | adsp->dev = &pdev->dev; | |
337 | adsp->rproc = rproc; | |
338 | platform_set_drvdata(pdev, adsp); | |
339 | ||
340 | init_completion(&adsp->start_done); | |
341 | init_completion(&adsp->stop_done); | |
342 | ||
343 | ret = adsp_alloc_memory_region(adsp); | |
344 | if (ret) | |
345 | goto free_rproc; | |
346 | ||
f33a7358 SJ |
347 | ret = adsp_init_clock(adsp); |
348 | if (ret) | |
349 | goto free_rproc; | |
350 | ||
b9e718e9 BA |
351 | ret = adsp_init_regulator(adsp); |
352 | if (ret) | |
353 | goto free_rproc; | |
354 | ||
355 | ret = adsp_request_irq(adsp, pdev, "wdog", adsp_wdog_interrupt); | |
356 | if (ret < 0) | |
357 | goto free_rproc; | |
358 | adsp->wdog_irq = ret; | |
359 | ||
360 | ret = adsp_request_irq(adsp, pdev, "fatal", adsp_fatal_interrupt); | |
361 | if (ret < 0) | |
362 | goto free_rproc; | |
363 | adsp->fatal_irq = ret; | |
364 | ||
365 | ret = adsp_request_irq(adsp, pdev, "ready", adsp_ready_interrupt); | |
366 | if (ret < 0) | |
367 | goto free_rproc; | |
368 | adsp->ready_irq = ret; | |
369 | ||
370 | ret = adsp_request_irq(adsp, pdev, "handover", adsp_handover_interrupt); | |
371 | if (ret < 0) | |
372 | goto free_rproc; | |
373 | adsp->handover_irq = ret; | |
374 | ||
375 | ret = adsp_request_irq(adsp, pdev, "stop-ack", adsp_stop_ack_interrupt); | |
376 | if (ret < 0) | |
377 | goto free_rproc; | |
378 | adsp->stop_ack_irq = ret; | |
379 | ||
380 | adsp->state = qcom_smem_state_get(&pdev->dev, "stop", | |
381 | &adsp->stop_bit); | |
382 | if (IS_ERR(adsp->state)) { | |
383 | ret = PTR_ERR(adsp->state); | |
384 | goto free_rproc; | |
385 | } | |
386 | ||
387 | ret = rproc_add(rproc); | |
388 | if (ret) | |
389 | goto free_rproc; | |
390 | ||
391 | return 0; | |
392 | ||
393 | free_rproc: | |
394 | rproc_put(rproc); | |
395 | ||
396 | return ret; | |
397 | } | |
398 | ||
399 | static int adsp_remove(struct platform_device *pdev) | |
400 | { | |
401 | struct qcom_adsp *adsp = platform_get_drvdata(pdev); | |
402 | ||
403 | qcom_smem_state_put(adsp->state); | |
404 | rproc_del(adsp->rproc); | |
405 | rproc_put(adsp->rproc); | |
406 | ||
407 | return 0; | |
408 | } | |
409 | ||
410 | static const struct of_device_id adsp_of_match[] = { | |
411 | { .compatible = "qcom,msm8974-adsp-pil" }, | |
412 | { .compatible = "qcom,msm8996-adsp-pil" }, | |
413 | { }, | |
414 | }; | |
415 | ||
416 | static struct platform_driver adsp_driver = { | |
417 | .probe = adsp_probe, | |
418 | .remove = adsp_remove, | |
419 | .driver = { | |
420 | .name = "qcom_adsp_pil", | |
421 | .of_match_table = adsp_of_match, | |
422 | }, | |
423 | }; | |
424 | ||
425 | module_platform_driver(adsp_driver); | |
426 | MODULE_DESCRIPTION("Qualcomm MSM8974/MSM8996 ADSP Peripherial Image Loader"); | |
427 | MODULE_LICENSE("GPL v2"); |