[linux-block.git] / drivers / remoteproc / da8xx_remoteproc.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Remote processor machine-specific module for DA8XX
 *
 * Copyright (C) 2013 Texas Instruments, Inc.
 */

#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/reset.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_reserved_mem.h>
#include <linux/platform_device.h>
#include <linux/remoteproc.h>

#include "remoteproc_internal.h"

static char *da8xx_fw_name;
module_param(da8xx_fw_name, charp, 0444);
MODULE_PARM_DESC(da8xx_fw_name,
		 "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')");

/*
 * OMAP-L138 Technical References:
 * http://www.ti.com/product/omap-l138
 */
#define SYSCFG_CHIPSIG0 BIT(0)
#define SYSCFG_CHIPSIG1 BIT(1)
#define SYSCFG_CHIPSIG2 BIT(2)
#define SYSCFG_CHIPSIG3 BIT(3)
#define SYSCFG_CHIPSIG4 BIT(4)

#define DA8XX_RPROC_LOCAL_ADDRESS_MASK	(SZ_16M - 1)

/**
 * struct da8xx_rproc_mem - internal memory structure
 * @cpu_addr: MPU virtual address of the memory region
 * @bus_addr: Bus address used to access the memory region
 * @dev_addr: Device address of the memory region from DSP view
 * @size: Size of the memory region
 */
struct da8xx_rproc_mem {
	void __iomem *cpu_addr;
	phys_addr_t bus_addr;
	u32 dev_addr;
	size_t size;
};

/**
 * struct da8xx_rproc - da8xx remote processor instance state
 * @rproc: rproc handle
 * @mem: internal memory regions data
 * @num_mems: number of internal memory regions
 * @dsp_clk: placeholder for platform's DSP clk
 * @ack_fxn: chip-specific ack function for ack'ing irq
 * @irq_data: ack_fxn function parameter
 * @chipsig: virt ptr to DSP interrupt registers (CHIPSIG & CHIPSIG_CLR)
 * @bootreg: virt ptr to DSP boot address register (HOST1CFG)
 * @irq: irq # used by this instance
 */
struct da8xx_rproc {
	struct rproc *rproc;
	struct da8xx_rproc_mem *mem;
	int num_mems;
	struct clk *dsp_clk;
	struct reset_control *dsp_reset;
	void (*ack_fxn)(struct irq_data *data);
	struct irq_data *irq_data;
	void __iomem *chipsig;
	void __iomem *bootreg;
	int irq;
};

/**
 * handle_event() - inbound virtqueue message workqueue function
 *
 * This function is registered as a kernel thread and is scheduled by the
 * kernel handler.
 */
static irqreturn_t handle_event(int irq, void *p)
{
	struct rproc *rproc = p;

	/* Process incoming buffers on all our vrings */
	rproc_vq_interrupt(rproc, 0);
	rproc_vq_interrupt(rproc, 1);

	return IRQ_HANDLED;
}

/**
 * da8xx_rproc_callback() - inbound virtqueue message handler
 *
 * This handler is invoked directly by the kernel whenever the remote
 * core (DSP) has modified the state of a virtqueue.  There is no
 * "payload" message indicating the virtqueue index as is the case with
 * mailbox-based implementations on OMAP4.  As such, this handler "polls"
 * each known virtqueue index for every invocation.
 */
static irqreturn_t da8xx_rproc_callback(int irq, void *p)
{
	struct rproc *rproc = p;
	struct da8xx_rproc *drproc = rproc->priv;
	u32 chipsig;

	chipsig = readl(drproc->chipsig);
	if (chipsig & SYSCFG_CHIPSIG0) {
		/* Clear interrupt level source */
		writel(SYSCFG_CHIPSIG0, drproc->chipsig + 4);

		/*
		 * ACK intr to AINTC.
		 *
		 * It has already been ack'ed by the kernel before calling
		 * this function, but since the ARM<->DSP interrupts in the
		 * CHIPSIG register are "level" instead of "pulse" variety,
		 * we need to ack it after taking down the level else we'll
		 * be called again immediately after returning.
		 */
		drproc->ack_fxn(drproc->irq_data);

		return IRQ_WAKE_THREAD;
	}

	return IRQ_HANDLED;
}

static int da8xx_rproc_start(struct rproc *rproc)
{
	struct device *dev = rproc->dev.parent;
	struct da8xx_rproc *drproc = rproc->priv;
	struct clk *dsp_clk = drproc->dsp_clk;
	struct reset_control *dsp_reset = drproc->dsp_reset;
	int ret;

	/* hw requires the start (boot) address be on 1KB boundary */
	if (rproc->bootaddr & 0x3ff) {
		dev_err(dev, "invalid boot address: must be aligned to 1KB\n");

		return -EINVAL;
	}

	writel(rproc->bootaddr, drproc->bootreg);

	ret = clk_prepare_enable(dsp_clk);
	if (ret) {
		dev_err(dev, "clk_prepare_enable() failed: %d\n", ret);
		return ret;
	}

	ret = reset_control_deassert(dsp_reset);
	if (ret) {
		dev_err(dev, "reset_control_deassert() failed: %d\n", ret);
		clk_disable_unprepare(dsp_clk);
		return ret;
	}

	return 0;
}

static int da8xx_rproc_stop(struct rproc *rproc)
{
	struct da8xx_rproc *drproc = rproc->priv;
	struct device *dev = rproc->dev.parent;
	int ret;

	ret = reset_control_assert(drproc->dsp_reset);
	if (ret) {
		dev_err(dev, "reset_control_assert() failed: %d\n", ret);
		return ret;
	}

	clk_disable_unprepare(drproc->dsp_clk);

	return 0;
}

/* kick a virtqueue */
static void da8xx_rproc_kick(struct rproc *rproc, int vqid)
{
	struct da8xx_rproc *drproc = rproc->priv;

	/* Interrupt remote proc */
	writel(SYSCFG_CHIPSIG2, drproc->chipsig);
}

static const struct rproc_ops da8xx_rproc_ops = {
	.start = da8xx_rproc_start,
	.stop = da8xx_rproc_stop,
	.kick = da8xx_rproc_kick,
};

static int da8xx_rproc_get_internal_memories(struct platform_device *pdev,
					     struct da8xx_rproc *drproc)
{
	static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"};
	int num_mems = ARRAY_SIZE(mem_names);
	struct device *dev = &pdev->dev;
	struct resource *res;
	int i;

	drproc->mem = devm_kcalloc(dev, num_mems, sizeof(*drproc->mem),
				   GFP_KERNEL);
	if (!drproc->mem)
		return -ENOMEM;

	for (i = 0; i < num_mems; i++) {
		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
						   mem_names[i]);
		drproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res);
		if (IS_ERR(drproc->mem[i].cpu_addr)) {
			dev_err(dev, "failed to parse and map %s memory\n",
				mem_names[i]);
			return PTR_ERR(drproc->mem[i].cpu_addr);
		}
		drproc->mem[i].bus_addr = res->start;
		drproc->mem[i].dev_addr =
				res->start & DA8XX_RPROC_LOCAL_ADDRESS_MASK;
		drproc->mem[i].size = resource_size(res);

		dev_dbg(dev, "memory %8s: bus addr %pa size 0x%zx va %p da 0x%x\n",
			mem_names[i], &drproc->mem[i].bus_addr,
			drproc->mem[i].size, drproc->mem[i].cpu_addr,
			drproc->mem[i].dev_addr);
	}
	drproc->num_mems = num_mems;

	return 0;
}

static int da8xx_rproc_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct da8xx_rproc *drproc;
	struct rproc *rproc;
	struct irq_data *irq_data;
	struct resource *bootreg_res;
	struct resource *chipsig_res;
	struct clk *dsp_clk;
	struct reset_control *dsp_reset;
	void __iomem *chipsig;
	void __iomem *bootreg;
	int irq;
	int ret;

	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return irq;

	irq_data = irq_get_irq_data(irq);
	if (!irq_data) {
		dev_err(dev, "irq_get_irq_data(%d): NULL\n", irq);
		return -EINVAL;
	}

	bootreg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
						   "host1cfg");
	bootreg = devm_ioremap_resource(dev, bootreg_res);
	if (IS_ERR(bootreg))
		return PTR_ERR(bootreg);

	chipsig_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
						   "chipsig");
	chipsig = devm_ioremap_resource(dev, chipsig_res);
	if (IS_ERR(chipsig))
		return PTR_ERR(chipsig);

	dsp_clk = devm_clk_get(dev, NULL);
	if (IS_ERR(dsp_clk)) {
		dev_err(dev, "clk_get error: %ld\n", PTR_ERR(dsp_clk));

		return PTR_ERR(dsp_clk);
	}

	dsp_reset = devm_reset_control_get_exclusive(dev, NULL);
	if (IS_ERR(dsp_reset)) {
		if (PTR_ERR(dsp_reset) != -EPROBE_DEFER)
			dev_err(dev, "unable to get reset control: %ld\n",
				PTR_ERR(dsp_reset));

		return PTR_ERR(dsp_reset);
	}

	if (dev->of_node) {
		ret = of_reserved_mem_device_init(dev);
		if (ret) {
			dev_err(dev, "device does not have specific CMA pool: %d\n",
				ret);
			return ret;
		}
	}

	rproc = rproc_alloc(dev, "dsp", &da8xx_rproc_ops, da8xx_fw_name,
		sizeof(*drproc));
	if (!rproc) {
		ret = -ENOMEM;
		goto free_mem;
	}

	/* error recovery is not supported at present */
	rproc->recovery_disabled = true;

	drproc = rproc->priv;
	drproc->rproc = rproc;
	drproc->dsp_clk = dsp_clk;
	drproc->dsp_reset = dsp_reset;
	rproc->has_iommu = false;

	ret = da8xx_rproc_get_internal_memories(pdev, drproc);
	if (ret)
		goto free_rproc;

	platform_set_drvdata(pdev, rproc);

	/* everything the ISR needs is now setup, so hook it up */
	ret = devm_request_threaded_irq(dev, irq, da8xx_rproc_callback,
					handle_event, 0, "da8xx-remoteproc",
					rproc);
	if (ret) {
		dev_err(dev, "devm_request_threaded_irq error: %d\n", ret);
		goto free_rproc;
	}

	/*
	 * rproc_add() can end up enabling the DSP's clk with the DSP
	 * *not* in reset, but da8xx_rproc_start() needs the DSP to be
	 * held in reset at the time it is called.
	 */
	ret = reset_control_assert(dsp_reset);
	if (ret)
		goto free_rproc;

	drproc->chipsig = chipsig;
	drproc->bootreg = bootreg;
	drproc->ack_fxn = irq_data->chip->irq_ack;
	drproc->irq_data = irq_data;
	drproc->irq = irq;

	ret = rproc_add(rproc);
	if (ret) {
		dev_err(dev, "rproc_add failed: %d\n", ret);
		goto free_rproc;
	}

	return 0;

free_rproc:
	rproc_free(rproc);
free_mem:
	if (dev->of_node)
		of_reserved_mem_device_release(dev);
	return ret;
}

static int da8xx_rproc_remove(struct platform_device *pdev)
{
	struct rproc *rproc = platform_get_drvdata(pdev);
	struct da8xx_rproc *drproc = rproc->priv;
	struct device *dev = &pdev->dev;

	/*
	 * The devm subsystem might end up releasing things before
	 * freeing the irq, thus allowing an interrupt to sneak in while
	 * the device is being removed.  This should prevent that.
	 */
	disable_irq(drproc->irq);

	rproc_del(rproc);
	rproc_free(rproc);
	if (dev->of_node)
		of_reserved_mem_device_release(dev);

	return 0;
}

static const struct of_device_id davinci_rproc_of_match[] __maybe_unused = {
	{ .compatible = "ti,da850-dsp", },
	{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, davinci_rproc_of_match);

static struct platform_driver da8xx_rproc_driver = {
	.probe = da8xx_rproc_probe,
	.remove = da8xx_rproc_remove,
	.driver = {
		.name = "davinci-rproc",
		.of_match_table = of_match_ptr(davinci_rproc_of_match),
	},
};

module_platform_driver(da8xx_rproc_driver);

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("DA8XX Remote Processor control driver");
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
13be5432 RT	2	/*
	3	* Remote processor machine-specific module for DA8XX
	4	*
	5	* Copyright (C) 2013 Texas Instruments, Inc.
13be5432 RT	6	*/
	7
	8	#include <linux/bitops.h>
	9	#include <linux/clk.h>
b2201ee5	10	#include <linux/reset.h>
13be5432 RT	11	#include <linux/err.h>
	12	#include <linux/interrupt.h>
	13	#include <linux/io.h>
	14	#include <linux/irq.h>
	15	#include <linux/kernel.h>
	16	#include <linux/module.h>
61696580	17	#include <linux/of_reserved_mem.h>
13be5432 RT	18	#include <linux/platform_device.h>
	19	#include <linux/remoteproc.h>
	20
13be5432 RT	21	#include "remoteproc_internal.h"
	22
	23	static char *da8xx_fw_name;
24ff1417	24	module_param(da8xx_fw_name, charp, 0444);
13be5432	25	MODULE_PARM_DESC(da8xx_fw_name,
e17aee37	26	"Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')");
13be5432 RT	27
	28	/*
	29	* OMAP-L138 Technical References:
	30	* http://www.ti.com/product/omap-l138
	31	*/
	32	#define SYSCFG_CHIPSIG0 BIT(0)
	33	#define SYSCFG_CHIPSIG1 BIT(1)
	34	#define SYSCFG_CHIPSIG2 BIT(2)
	35	#define SYSCFG_CHIPSIG3 BIT(3)
	36	#define SYSCFG_CHIPSIG4 BIT(4)
	37
59b2355f SA	38	#define DA8XX_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1)
	39
	40	/**
	41	* struct da8xx_rproc_mem - internal memory structure
	42	* @cpu_addr: MPU virtual address of the memory region
	43	* @bus_addr: Bus address used to access the memory region
	44	* @dev_addr: Device address of the memory region from DSP view
	45	* @size: Size of the memory region
	46	*/
	47	struct da8xx_rproc_mem {
	48	void __iomem *cpu_addr;
	49	phys_addr_t bus_addr;
	50	u32 dev_addr;
	51	size_t size;
	52	};
	53
13be5432 RT	54	/**
	55	* struct da8xx_rproc - da8xx remote processor instance state
	56	* @rproc: rproc handle
59b2355f SA	57	* @mem: internal memory regions data
59b2355f SA	58	* @num_mems: number of internal memory regions
13be5432 RT	59	* @dsp_clk: placeholder for platform's DSP clk
	60	* @ack_fxn: chip-specific ack function for ack'ing irq
	61	* @irq_data: ack_fxn function parameter
	62	* @chipsig: virt ptr to DSP interrupt registers (CHIPSIG & CHIPSIG_CLR)
	63	* @bootreg: virt ptr to DSP boot address register (HOST1CFG)
	64	* @irq: irq # used by this instance
	65	*/
	66	struct da8xx_rproc {
	67	struct rproc *rproc;
59b2355f SA	68	struct da8xx_rproc_mem *mem;
59b2355f SA	69	int num_mems;
13be5432	70	struct clk *dsp_clk;
b2201ee5	71	struct reset_control *dsp_reset;
13be5432 RT	72	void (ack_fxn)(struct irq_data data);
	73	struct irq_data *irq_data;
	74	void __iomem *chipsig;
	75	void __iomem *bootreg;
	76	int irq;
	77	};
	78
	79	/**
	80	* handle_event() - inbound virtqueue message workqueue function
	81	*
	82	* This function is registered as a kernel thread and is scheduled by the
	83	* kernel handler.
	84	*/
	85	static irqreturn_t handle_event(int irq, void *p)
	86	{
86660713	87	struct rproc *rproc = p;
13be5432 RT	88
	89	/* Process incoming buffers on all our vrings */
	90	rproc_vq_interrupt(rproc, 0);
	91	rproc_vq_interrupt(rproc, 1);
	92
	93	return IRQ_HANDLED;
	94	}
	95
	96	/**
	97	* da8xx_rproc_callback() - inbound virtqueue message handler
	98	*
	99	* This handler is invoked directly by the kernel whenever the remote
	100	* core (DSP) has modified the state of a virtqueue. There is no
	101	* "payload" message indicating the virtqueue index as is the case with
	102	* mailbox-based implementations on OMAP4. As such, this handler "polls"
	103	* each known virtqueue index for every invocation.
	104	*/
	105	static irqreturn_t da8xx_rproc_callback(int irq, void *p)
	106	{
86660713 YZ	107	struct rproc *rproc = p;
86660713 YZ	108	struct da8xx_rproc *drproc = rproc->priv;
13be5432 RT	109	u32 chipsig;
	110
	111	chipsig = readl(drproc->chipsig);
	112	if (chipsig & SYSCFG_CHIPSIG0) {
	113	/* Clear interrupt level source */
	114	writel(SYSCFG_CHIPSIG0, drproc->chipsig + 4);
	115
	116	/*
	117	* ACK intr to AINTC.
	118	*
	119	* It has already been ack'ed by the kernel before calling
	120	* this function, but since the ARM<->DSP interrupts in the
	121	* CHIPSIG register are "level" instead of "pulse" variety,
	122	* we need to ack it after taking down the level else we'll
	123	* be called again immediately after returning.
	124	*/
	125	drproc->ack_fxn(drproc->irq_data);
	126
	127	return IRQ_WAKE_THREAD;
	128	}
	129
	130	return IRQ_HANDLED;
	131	}
	132
	133	static int da8xx_rproc_start(struct rproc *rproc)
	134	{
	135	struct device *dev = rproc->dev.parent;
86660713	136	struct da8xx_rproc *drproc = rproc->priv;
13be5432	137	struct clk *dsp_clk = drproc->dsp_clk;
b2201ee5	138	struct reset_control *dsp_reset = drproc->dsp_reset;
2310eae9	139	int ret;
13be5432 RT	140
	141	/* hw requires the start (boot) address be on 1KB boundary */
	142	if (rproc->bootaddr & 0x3ff) {
	143	dev_err(dev, "invalid boot address: must be aligned to 1KB\n");
	144
	145	return -EINVAL;
	146	}
	147
	148	writel(rproc->bootaddr, drproc->bootreg);
	149
5d26f068	150	ret = clk_prepare_enable(dsp_clk);
2310eae9	151	if (ret) {
5d26f068	152	dev_err(dev, "clk_prepare_enable() failed: %d\n", ret);
2310eae9 BG	153	return ret;
	154	}
	155
b2201ee5 BG	156	ret = reset_control_deassert(dsp_reset);
	157	if (ret) {
	158	dev_err(dev, "reset_control_deassert() failed: %d\n", ret);
	159	clk_disable_unprepare(dsp_clk);
	160	return ret;
	161	}
13be5432 RT	162
	163	return 0;
	164	}
	165
	166	static int da8xx_rproc_stop(struct rproc *rproc)
	167	{
	168	struct da8xx_rproc *drproc = rproc->priv;
b2201ee5 BG	169	struct device *dev = rproc->dev.parent;
	170	int ret;
	171
	172	ret = reset_control_assert(drproc->dsp_reset);
	173	if (ret) {
	174	dev_err(dev, "reset_control_assert() failed: %d\n", ret);
	175	return ret;
	176	}
13be5432	177
5d26f068	178	clk_disable_unprepare(drproc->dsp_clk);
13be5432 RT	179
	180	return 0;
	181	}
	182
	183	/* kick a virtqueue */
	184	static void da8xx_rproc_kick(struct rproc *rproc, int vqid)
	185	{
86660713	186	struct da8xx_rproc *drproc = rproc->priv;
13be5432	187
56324d7a	188	/* Interrupt remote proc */
13be5432 RT	189	writel(SYSCFG_CHIPSIG2, drproc->chipsig);
	190	}
	191
c008fad2	192	static const struct rproc_ops da8xx_rproc_ops = {
13be5432 RT	193	.start = da8xx_rproc_start,
	194	.stop = da8xx_rproc_stop,
	195	.kick = da8xx_rproc_kick,
	196	};
	197
59b2355f SA	198	static int da8xx_rproc_get_internal_memories(struct platform_device *pdev,
	199	struct da8xx_rproc *drproc)
	200	{
	201	static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"};
	202	int num_mems = ARRAY_SIZE(mem_names);
	203	struct device *dev = &pdev->dev;
	204	struct resource *res;
	205	int i;
	206
	207	drproc->mem = devm_kcalloc(dev, num_mems, sizeof(*drproc->mem),
	208	GFP_KERNEL);
	209	if (!drproc->mem)
	210	return -ENOMEM;
	211
	212	for (i = 0; i < num_mems; i++) {
	213	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
	214	mem_names[i]);
	215	drproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res);
	216	if (IS_ERR(drproc->mem[i].cpu_addr)) {
	217	dev_err(dev, "failed to parse and map %s memory\n",
	218	mem_names[i]);
	219	return PTR_ERR(drproc->mem[i].cpu_addr);
	220	}
	221	drproc->mem[i].bus_addr = res->start;
	222	drproc->mem[i].dev_addr =
	223	res->start & DA8XX_RPROC_LOCAL_ADDRESS_MASK;
	224	drproc->mem[i].size = resource_size(res);
	225
1e28dbbe	226	dev_dbg(dev, "memory %8s: bus addr %pa size 0x%zx va %p da 0x%x\n",
59b2355f SA	227	mem_names[i], &drproc->mem[i].bus_addr,
	228	drproc->mem[i].size, drproc->mem[i].cpu_addr,
	229	drproc->mem[i].dev_addr);
	230	}
	231	drproc->num_mems = num_mems;
	232
	233	return 0;
	234	}
	235
13be5432 RT	236	static int da8xx_rproc_probe(struct platform_device *pdev)
	237	{
	238	struct device *dev = &pdev->dev;
	239	struct da8xx_rproc *drproc;
	240	struct rproc *rproc;
	241	struct irq_data *irq_data;
	242	struct resource *bootreg_res;
	243	struct resource *chipsig_res;
	244	struct clk *dsp_clk;
b2201ee5	245	struct reset_control *dsp_reset;
13be5432 RT	246	void __iomem *chipsig;
	247	void __iomem *bootreg;
	248	int irq;
	249	int ret;
	250
	251	irq = platform_get_irq(pdev, 0);
d446609d	252	if (irq < 0)
13be5432	253	return irq;
13be5432 RT	254
	255	irq_data = irq_get_irq_data(irq);
	256	if (!irq_data) {
	257	dev_err(dev, "irq_get_irq_data(%d): NULL\n", irq);
	258	return -EINVAL;
	259	}
	260
6fb9a8f5 SA	261	bootreg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
6fb9a8f5 SA	262	"host1cfg");
13be5432 RT	263	bootreg = devm_ioremap_resource(dev, bootreg_res);
	264	if (IS_ERR(bootreg))
	265	return PTR_ERR(bootreg);
	266
6fb9a8f5 SA	267	chipsig_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
6fb9a8f5 SA	268	"chipsig");
13be5432 RT	269	chipsig = devm_ioremap_resource(dev, chipsig_res);
	270	if (IS_ERR(chipsig))
	271	return PTR_ERR(chipsig);
	272
	273	dsp_clk = devm_clk_get(dev, NULL);
	274	if (IS_ERR(dsp_clk)) {
	275	dev_err(dev, "clk_get error: %ld\n", PTR_ERR(dsp_clk));
	276
	277	return PTR_ERR(dsp_clk);
	278	}
	279
b2201ee5 BG	280	dsp_reset = devm_reset_control_get_exclusive(dev, NULL);
	281	if (IS_ERR(dsp_reset)) {
	282	if (PTR_ERR(dsp_reset) != -EPROBE_DEFER)
	283	dev_err(dev, "unable to get reset control: %ld\n",
	284	PTR_ERR(dsp_reset));
	285
	286	return PTR_ERR(dsp_reset);
	287	}
	288
61696580 SA	289	if (dev->of_node) {
	290	ret = of_reserved_mem_device_init(dev);
	291	if (ret) {
	292	dev_err(dev, "device does not have specific CMA pool: %d\n",
	293	ret);
	294	return ret;
	295	}
	296	}
	297
13be5432 RT	298	rproc = rproc_alloc(dev, "dsp", &da8xx_rproc_ops, da8xx_fw_name,
13be5432 RT	299	sizeof(*drproc));
61696580 SA	300	if (!rproc) {
	301	ret = -ENOMEM;
	302	goto free_mem;
	303	}
13be5432	304
491278b6 SA	305	/* error recovery is not supported at present */
	306	rproc->recovery_disabled = true;
	307
13be5432 RT	308	drproc = rproc->priv;
13be5432 RT	309	drproc->rproc = rproc;
470ac62f	310	drproc->dsp_clk = dsp_clk;
b2201ee5	311	drproc->dsp_reset = dsp_reset;
315491e5	312	rproc->has_iommu = false;
13be5432	313
59b2355f SA	314	ret = da8xx_rproc_get_internal_memories(pdev, drproc);
	315	if (ret)
	316	goto free_rproc;
	317
13be5432 RT	318	platform_set_drvdata(pdev, rproc);
	319
	320	/* everything the ISR needs is now setup, so hook it up */
	321	ret = devm_request_threaded_irq(dev, irq, da8xx_rproc_callback,
	322	handle_event, 0, "da8xx-remoteproc",
	323	rproc);
	324	if (ret) {
	325	dev_err(dev, "devm_request_threaded_irq error: %d\n", ret);
	326	goto free_rproc;
	327	}
	328
	329	/*
	330	* rproc_add() can end up enabling the DSP's clk with the DSP
	331	* not in reset, but da8xx_rproc_start() needs the DSP to be
	332	* held in reset at the time it is called.
	333	*/
b2201ee5	334	ret = reset_control_assert(dsp_reset);
13be5432 RT	335	if (ret)
	336	goto free_rproc;
	337
	338	drproc->chipsig = chipsig;
	339	drproc->bootreg = bootreg;
	340	drproc->ack_fxn = irq_data->chip->irq_ack;
	341	drproc->irq_data = irq_data;
	342	drproc->irq = irq;
13be5432 RT	343
	344	ret = rproc_add(rproc);
	345	if (ret) {
	346	dev_err(dev, "rproc_add failed: %d\n", ret);
	347	goto free_rproc;
	348	}
	349
	350	return 0;
	351
	352	free_rproc:
433c0e04	353	rproc_free(rproc);
61696580 SA	354	free_mem:
	355	if (dev->of_node)
	356	of_reserved_mem_device_release(dev);
13be5432 RT	357	return ret;
	358	}
	359
	360	static int da8xx_rproc_remove(struct platform_device *pdev)
	361	{
13be5432	362	struct rproc *rproc = platform_get_drvdata(pdev);
86660713	363	struct da8xx_rproc *drproc = rproc->priv;
61696580	364	struct device *dev = &pdev->dev;
13be5432	365
13be5432 RT	366	/*
	367	* The devm subsystem might end up releasing things before
	368	* freeing the irq, thus allowing an interrupt to sneak in while
	369	* the device is being removed. This should prevent that.
	370	*/
	371	disable_irq(drproc->irq);
	372
13be5432	373	rproc_del(rproc);
433c0e04	374	rproc_free(rproc);
61696580 SA	375	if (dev->of_node)
61696580 SA	376	of_reserved_mem_device_release(dev);
13be5432 RT	377
	378	return 0;
	379	}
	380
61696580 SA	381	static const struct of_device_id davinci_rproc_of_match[] __maybe_unused = {
	382	{ .compatible = "ti,da850-dsp", },
	383	{ /* sentinel */ },
	384	};
	385	MODULE_DEVICE_TABLE(of, davinci_rproc_of_match);
	386
13be5432 RT	387	static struct platform_driver da8xx_rproc_driver = {
	388	.probe = da8xx_rproc_probe,
	389	.remove = da8xx_rproc_remove,
	390	.driver = {
	391	.name = "davinci-rproc",
61696580	392	.of_match_table = of_match_ptr(davinci_rproc_of_match),
13be5432 RT	393	},
	394	};
	395
	396	module_platform_driver(da8xx_rproc_driver);
	397
	398	MODULE_LICENSE("GPL v2");
	399	MODULE_DESCRIPTION("DA8XX Remote Processor control driver");