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Merge tag 'upstream-3.17-rc1' of git://git.infradead.org/linux-ubifs
[linux-2.6-block.git] / drivers / regulator / wm831x-dcdc.c
CommitLineData
e4ee831f
MB		 1/*
2 * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/bitops.h>
18#include <linux/err.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
e24a04c4
MB		 22#include <linux/regulator/machine.h>
23#include <linux/gpio.h>
5a0e3ad6 24#include <linux/slab.h>
e4ee831f
MB		 25
26#include <linux/mfd/wm831x/core.h>
27#include <linux/mfd/wm831x/regulator.h>
28#include <linux/mfd/wm831x/pdata.h>
29
30#define WM831X_BUCKV_MAX_SELECTOR 0x68
31#define WM831X_BUCKP_MAX_SELECTOR 0x66
32
33#define WM831X_DCDC_MODE_FAST 0
34#define WM831X_DCDC_MODE_NORMAL 1
35#define WM831X_DCDC_MODE_IDLE 2
36#define WM831X_DCDC_MODE_STANDBY 3
37
82caa978 38#define WM831X_DCDC_MAX_NAME 9
e4ee831f
MB		 39
40/* Register offsets in control block */
41#define WM831X_DCDC_CONTROL_1 0
42#define WM831X_DCDC_CONTROL_2 1
43#define WM831X_DCDC_ON_CONFIG 2
44#define WM831X_DCDC_SLEEP_CONTROL 3
e24a04c4 45#define WM831X_DCDC_DVS_CONTROL 4
e4ee831f
MB		 46
47/*
48 * Shared
49 */
50
51struct wm831x_dcdc {
52 char name[WM831X_DCDC_MAX_NAME];
82caa978 53 char supply_name[WM831X_DCDC_MAX_NAME];
e4ee831f
MB		 54 struct regulator_desc desc;
55 int base;
56 struct wm831x *wm831x;
57 struct regulator_dev *regulator;
e24a04c4
MB		 58 int dvs_gpio;
59 int dvs_gpio_state;
60 int on_vsel;
61 int dvs_vsel;
e4ee831f
MB		 62};
63
e4ee831f
MB		 64static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
65
66{
67 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
68 struct wm831x *wm831x = dcdc->wm831x;
69 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
70 int val;
71
72 val = wm831x_reg_read(wm831x, reg);
73 if (val < 0)
74 return val;
75
76 val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
77
78 switch (val) {
79 case WM831X_DCDC_MODE_FAST:
80 return REGULATOR_MODE_FAST;
81 case WM831X_DCDC_MODE_NORMAL:
82 return REGULATOR_MODE_NORMAL;
83 case WM831X_DCDC_MODE_STANDBY:
84 return REGULATOR_MODE_STANDBY;
85 case WM831X_DCDC_MODE_IDLE:
86 return REGULATOR_MODE_IDLE;
87 default:
88 BUG();
9ee291a4 89 return -EINVAL;
e4ee831f
MB		 90 }
91}
92
93static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
94 unsigned int mode)
95{
96 int val;
97
98 switch (mode) {
99 case REGULATOR_MODE_FAST:
100 val = WM831X_DCDC_MODE_FAST;
101 break;
102 case REGULATOR_MODE_NORMAL:
103 val = WM831X_DCDC_MODE_NORMAL;
104 break;
105 case REGULATOR_MODE_STANDBY:
106 val = WM831X_DCDC_MODE_STANDBY;
107 break;
108 case REGULATOR_MODE_IDLE:
109 val = WM831X_DCDC_MODE_IDLE;
110 break;
111 default:
112 return -EINVAL;
113 }
114
115 return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
116 val << WM831X_DC1_ON_MODE_SHIFT);
117}
118
119static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
120{
121 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
122 struct wm831x *wm831x = dcdc->wm831x;
123 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
124
125 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
126}
127
128static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
129 unsigned int mode)
130{
131 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
132 struct wm831x *wm831x = dcdc->wm831x;
133 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
134
135 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
136}
137
138static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
139{
140 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
141 struct wm831x *wm831x = dcdc->wm831x;
142 int ret;
143
144 /* First, check for errors */
145 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
146 if (ret < 0)
147 return ret;
148
149 if (ret & (1 << rdev_get_id(rdev))) {
150 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
151 rdev_get_id(rdev) + 1);
152 return REGULATOR_STATUS_ERROR;
153 }
154
155 /* DCDC1 and DCDC2 can additionally detect high voltage/current */
156 if (rdev_get_id(rdev) < 2) {
157 if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
158 dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
159 rdev_get_id(rdev) + 1);
160 return REGULATOR_STATUS_ERROR;
161 }
162
163 if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
164 dev_dbg(wm831x->dev, "DCDC%d over current\n",
165 rdev_get_id(rdev) + 1);
166 return REGULATOR_STATUS_ERROR;
167 }
168 }
169
170 /* Is the regulator on? */
171 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
172 if (ret < 0)
173 return ret;
174 if (!(ret & (1 << rdev_get_id(rdev))))
175 return REGULATOR_STATUS_OFF;
176
177 /* TODO: When we handle hardware control modes so we can report the
178 * current mode. */
179 return REGULATOR_STATUS_ON;
180}
181
182static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
183{
184 struct wm831x_dcdc *dcdc = data;
185
186 regulator_notifier_call_chain(dcdc->regulator,
187 REGULATOR_EVENT_UNDER_VOLTAGE,
188 NULL);
189
190 return IRQ_HANDLED;
191}
192
193static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
194{
195 struct wm831x_dcdc *dcdc = data;
196
197 regulator_notifier_call_chain(dcdc->regulator,
198 REGULATOR_EVENT_OVER_CURRENT,
199 NULL);
200
201 return IRQ_HANDLED;
202}
203
204/*
205 * BUCKV specifics
206 */
207
208static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
209 unsigned selector)
210{
211 if (selector <= 0x8)
212 return 600000;
213 if (selector <= WM831X_BUCKV_MAX_SELECTOR)
214 return 600000 + ((selector - 0x8) * 12500);
215 return -EINVAL;
216}
217
b5fb77e0
AL		 218static int wm831x_buckv_map_voltage(struct regulator_dev *rdev,
219 int min_uV, int max_uV)
e4ee831f 220{
e4ee831f
MB		 221 u16 vsel;
222
223 if (min_uV < 600000)
224 vsel = 0;
225 else if (min_uV <= 1800000)
1a679930 226 vsel = DIV_ROUND_UP(min_uV - 600000, 12500) + 8;
e4ee831f
MB		 227 else
228 return -EINVAL;
229
230 if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
231 return -EINVAL;
232
e24a04c4
MB		 233 return vsel;
234}
235
e24a04c4
MB		 236static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
237{
238 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
239
240 if (state == dcdc->dvs_gpio_state)
241 return 0;
242
243 dcdc->dvs_gpio_state = state;
244 gpio_set_value(dcdc->dvs_gpio, state);
245
246 /* Should wait for DVS state change to be asserted if we have
247 * a GPIO for it, for now assume the device is configured
248 * for the fastest possible transition.
249 */
250
251 return 0;
e4ee831f
MB		 252}
253
b5fb77e0
AL		 254static int wm831x_buckv_set_voltage_sel(struct regulator_dev *rdev,
255 unsigned vsel)
e4ee831f
MB		 256{
257 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4
MB		 258 struct wm831x *wm831x = dcdc->wm831x;
259 int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
260 int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
b5fb77e0 261 int ret;
3a93f2a9 262
e24a04c4
MB		 263 /* If this value is already set then do a GPIO update if we can */
264 if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
265 return wm831x_buckv_set_dvs(rdev, 0);
266
267 if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
268 return wm831x_buckv_set_dvs(rdev, 1);
269
270 /* Always set the ON status to the minimum voltage */
271 ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
272 if (ret < 0)
273 return ret;
274 dcdc->on_vsel = vsel;
275
276 if (!dcdc->dvs_gpio)
277 return ret;
278
279 /* Kick the voltage transition now */
280 ret = wm831x_buckv_set_dvs(rdev, 0);
281 if (ret < 0)
282 return ret;
283
88cda60e
MB		 284 /*
285 * If this VSEL is higher than the last one we've seen then
286 * remember it as the DVS VSEL. This is optimised for CPUfreq
287 * usage where we want to get to the highest voltage very
288 * quickly.
289 */
290 if (vsel > dcdc->dvs_vsel) {
291 ret = wm831x_set_bits(wm831x, dvs_reg,
292 WM831X_DC1_DVS_VSEL_MASK,
13ae633c 293 vsel);
88cda60e
MB		 294 if (ret == 0)
295 dcdc->dvs_vsel = vsel;
296 else
297 dev_warn(wm831x->dev,
298 "Failed to set DCDC DVS VSEL: %d\n", ret);
e24a04c4
MB		 299 }
300
e24a04c4 301 return 0;
e4ee831f
MB		 302}
303
304static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
e24a04c4 305 int uV)
e4ee831f
MB		 306{
307 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4 308 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 309 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
e24a04c4
MB		 310 int vsel;
311
b5fb77e0 312 vsel = wm831x_buckv_map_voltage(rdev, uV, uV);
e24a04c4
MB		 313 if (vsel < 0)
314 return vsel;
e4ee831f 315
e24a04c4 316 return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
e4ee831f
MB		 317}
318
afb8bb80 319static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
e4ee831f
MB		 320{
321 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e4ee831f 322
e24a04c4 323 if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
afb8bb80 324 return dcdc->dvs_vsel;
e24a04c4 325 else
afb8bb80 326 return dcdc->on_vsel;
e4ee831f
MB		 327}
328
329/* Current limit options */
330static u16 wm831x_dcdc_ilim[] = {
331 125, 250, 375, 500, 625, 750, 875, 1000
332};
333
334static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
335 int min_uA, int max_uA)
336{
337 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
338 struct wm831x *wm831x = dcdc->wm831x;
339 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
340 int i;
341
422294de 342 for (i = ARRAY_SIZE(wm831x_dcdc_ilim) - 1; i >= 0; i--) {
a171e782
AL		 343 if ((min_uA <= wm831x_dcdc_ilim[i]) &&
344 (wm831x_dcdc_ilim[i] <= max_uA))
422294de
AL		 345 return wm831x_set_bits(wm831x, reg,
346 WM831X_DC1_HC_THR_MASK,
347 i << WM831X_DC1_HC_THR_SHIFT);
e4ee831f 348 }
e4ee831f 349
422294de 350 return -EINVAL;
e4ee831f
MB		 351}
352
353static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
354{
355 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
356 struct wm831x *wm831x = dcdc->wm831x;
357 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
358 int val;
359
360 val = wm831x_reg_read(wm831x, reg);
361 if (val < 0)
362 return val;
363
09bf14b9
AL		 364 val = (val & WM831X_DC1_HC_THR_MASK) >> WM831X_DC1_HC_THR_SHIFT;
365 return wm831x_dcdc_ilim[val];
e4ee831f
MB		 366}
367
368static struct regulator_ops wm831x_buckv_ops = {
b5fb77e0 369 .set_voltage_sel = wm831x_buckv_set_voltage_sel,
afb8bb80 370 .get_voltage_sel = wm831x_buckv_get_voltage_sel,
e4ee831f 371 .list_voltage = wm831x_buckv_list_voltage,
b5fb77e0 372 .map_voltage = wm831x_buckv_map_voltage,
e4ee831f
MB		 373 .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
374 .set_current_limit = wm831x_buckv_set_current_limit,
375 .get_current_limit = wm831x_buckv_get_current_limit,
376
3d138fcc
MB		 377 .is_enabled = regulator_is_enabled_regmap,
378 .enable = regulator_enable_regmap,
379 .disable = regulator_disable_regmap,
e4ee831f
MB		 380 .get_status = wm831x_dcdc_get_status,
381 .get_mode = wm831x_dcdc_get_mode,
382 .set_mode = wm831x_dcdc_set_mode,
383 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
384};
385
e24a04c4
MB		 386/*
387 * Set up DVS control. We just log errors since we can still run
388 * (with reduced performance) if we fail.
389 */
1aa20d27
MB		 390static void wm831x_buckv_dvs_init(struct platform_device *pdev,
391 struct wm831x_dcdc *dcdc,
392 struct wm831x_buckv_pdata *pdata)
e24a04c4
MB		 393{
394 struct wm831x *wm831x = dcdc->wm831x;
395 int ret;
396 u16 ctrl;
397
398 if (!pdata || !pdata->dvs_gpio)
399 return;
400
e24a04c4
MB		 401 /* gpiolib won't let us read the GPIO status so pick the higher
402 * of the two existing voltages so we take it as platform data.
403 */
404 dcdc->dvs_gpio_state = pdata->dvs_init_state;
405
1aa20d27
MB		 406 ret = devm_gpio_request_one(&pdev->dev, pdata->dvs_gpio,
407 dcdc->dvs_gpio_state ? GPIOF_INIT_HIGH : 0,
408 "DCDC DVS");
e24a04c4 409 if (ret < 0) {
053fa1b7 410 dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
e24a04c4 411 dcdc->name, ret);
e24a04c4
MB		 412 return;
413 }
414
415 dcdc->dvs_gpio = pdata->dvs_gpio;
b47ba9fd
MB		 416
417 switch (pdata->dvs_control_src) {
418 case 1:
419 ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
420 break;
421 case 2:
422 ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
423 break;
424 default:
425 dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
426 pdata->dvs_control_src, dcdc->name);
427 return;
428 }
429
c439b8f4
MB		 430 /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
431 * to make bootstrapping a bit smoother.
432 */
433 if (!dcdc->dvs_vsel) {
434 ret = wm831x_set_bits(wm831x,
435 dcdc->base + WM831X_DCDC_DVS_CONTROL,
436 WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
437 if (ret == 0)
438 dcdc->dvs_vsel = dcdc->on_vsel;
439 else
440 dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
441 ret);
442 }
443
b47ba9fd
MB		 444 ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
445 WM831X_DC1_DVS_SRC_MASK, ctrl);
446 if (ret < 0) {
447 dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
448 dcdc->name, ret);
449 }
e24a04c4
MB		 450}
451
a5023574 452static int wm831x_buckv_probe(struct platform_device *pdev)
e4ee831f
MB		 453{
454 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 455 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 456 struct regulator_config config = { };
137a6354 457 int id;
e4ee831f
MB		 458 struct wm831x_dcdc *dcdc;
459 struct resource *res;
460 int ret, irq;
461
137a6354
MB		 462 if (pdata && pdata->wm831x_num)
463 id = (pdata->wm831x_num * 10) + 1;
464 else
465 id = 0;
466 id = pdev->id - id;
467
e4ee831f
MB		 468 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
469
fded2f4f
MB		 470 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
471 GFP_KERNEL);
5730aa57 472 if (!dcdc)
e4ee831f 473 return -ENOMEM;
e4ee831f
MB		 474
475 dcdc->wm831x = wm831x;
476
5656098e 477 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
e4ee831f 478 if (res == NULL) {
5656098e 479 dev_err(&pdev->dev, "No REG resource\n");
e4ee831f
MB		 480 ret = -EINVAL;
481 goto err;
482 }
483 dcdc->base = res->start;
484
485 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
486 dcdc->desc.name = dcdc->name;
82caa978
MB		 487
488 snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
489 "DC%dVDD", id + 1);
490 dcdc->desc.supply_name = dcdc->supply_name;
491
e4ee831f
MB		 492 dcdc->desc.id = id;
493 dcdc->desc.type = REGULATOR_VOLTAGE;
494 dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
495 dcdc->desc.ops = &wm831x_buckv_ops;
496 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 497 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
498 dcdc->desc.enable_mask = 1 << id;
e4ee831f 499
e24a04c4
MB		 500 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
501 if (ret < 0) {
502 dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
503 goto err;
504 }
505 dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
506
a1b81dd3 507 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
e24a04c4
MB		 508 if (ret < 0) {
509 dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
510 goto err;
511 }
512 dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
513
f0b067d9 514 if (pdata && pdata->dcdc[id])
1aa20d27
MB		 515 wm831x_buckv_dvs_init(pdev, dcdc,
516 pdata->dcdc[id]->driver_data);
e24a04c4 517
c172708d 518 config.dev = pdev->dev.parent;
b7ca8788
MB		 519 if (pdata)
520 config.init_data = pdata->dcdc[id];
c172708d 521 config.driver_data = dcdc;
3d138fcc 522 config.regmap = wm831x->regmap;
c172708d 523
d73b4cb7
MB		 524 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
525 &config);
e4ee831f
MB		 526 if (IS_ERR(dcdc->regulator)) {
527 ret = PTR_ERR(dcdc->regulator);
528 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
529 id + 1, ret);
530 goto err;
531 }
532
cd99758b 533 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB		 534 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
535 wm831x_dcdc_uv_irq,
536 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 537 if (ret != 0) {
538 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
539 irq, ret);
d73b4cb7 540 goto err;
e4ee831f
MB		 541 }
542
cd99758b 543 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC"));
b0c4c0c6
MB		 544 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
545 wm831x_dcdc_oc_irq,
546 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 547 if (ret != 0) {
548 dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
549 irq, ret);
d73b4cb7 550 goto err;
e4ee831f
MB		 551 }
552
553 platform_set_drvdata(pdev, dcdc);
554
555 return 0;
556
e4ee831f 557err:
e4ee831f
MB		 558 return ret;
559}
560
e4ee831f
MB		 561static struct platform_driver wm831x_buckv_driver = {
562 .probe = wm831x_buckv_probe,
e4ee831f
MB		 563 .driver = {
564 .name = "wm831x-buckv",
eb66d565 565 .owner = THIS_MODULE,
e4ee831f
MB		 566 },
567};
568
569/*
570 * BUCKP specifics
571 */
572
d580cb5e 573static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, int uV)
e4ee831f
MB		 574{
575 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
576 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 577 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
d580cb5e
AL		 578 int sel;
579
580 sel = regulator_map_voltage_linear(rdev, uV, uV);
581 if (sel < 0)
582 return sel;
e4ee831f 583
d580cb5e 584 return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, sel);
e4ee831f
MB		 585}
586
e4ee831f 587static struct regulator_ops wm831x_buckp_ops = {
d580cb5e 588 .set_voltage_sel = regulator_set_voltage_sel_regmap,
817436e7 589 .get_voltage_sel = regulator_get_voltage_sel_regmap,
c70ad9dc 590 .list_voltage = regulator_list_voltage_linear,
d580cb5e 591 .map_voltage = regulator_map_voltage_linear,
e4ee831f
MB		 592 .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
593
3d138fcc
MB		 594 .is_enabled = regulator_is_enabled_regmap,
595 .enable = regulator_enable_regmap,
596 .disable = regulator_disable_regmap,
e4ee831f
MB		 597 .get_status = wm831x_dcdc_get_status,
598 .get_mode = wm831x_dcdc_get_mode,
599 .set_mode = wm831x_dcdc_set_mode,
600 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
601};
602
a5023574 603static int wm831x_buckp_probe(struct platform_device *pdev)
e4ee831f
MB		 604{
605 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 606 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 607 struct regulator_config config = { };
137a6354 608 int id;
e4ee831f
MB		 609 struct wm831x_dcdc *dcdc;
610 struct resource *res;
611 int ret, irq;
612
137a6354
MB		 613 if (pdata && pdata->wm831x_num)
614 id = (pdata->wm831x_num * 10) + 1;
615 else
616 id = 0;
617 id = pdev->id - id;
618
e4ee831f
MB		 619 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
620
fded2f4f
MB		 621 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
622 GFP_KERNEL);
5730aa57 623 if (!dcdc)
e4ee831f 624 return -ENOMEM;
e4ee831f
MB		 625
626 dcdc->wm831x = wm831x;
627
5656098e 628 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
e4ee831f 629 if (res == NULL) {
5656098e 630 dev_err(&pdev->dev, "No REG resource\n");
e4ee831f
MB		 631 ret = -EINVAL;
632 goto err;
633 }
634 dcdc->base = res->start;
635
636 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
637 dcdc->desc.name = dcdc->name;
82caa978
MB		 638
639 snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
640 "DC%dVDD", id + 1);
641 dcdc->desc.supply_name = dcdc->supply_name;
642
e4ee831f
MB		 643 dcdc->desc.id = id;
644 dcdc->desc.type = REGULATOR_VOLTAGE;
645 dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
646 dcdc->desc.ops = &wm831x_buckp_ops;
647 dcdc->desc.owner = THIS_MODULE;
817436e7
MB		 648 dcdc->desc.vsel_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
649 dcdc->desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK;
3d138fcc
MB		 650 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
651 dcdc->desc.enable_mask = 1 << id;
c70ad9dc
AL		 652 dcdc->desc.min_uV = 850000;
653 dcdc->desc.uV_step = 25000;
e4ee831f 654
c172708d 655 config.dev = pdev->dev.parent;
b7ca8788
MB		 656 if (pdata)
657 config.init_data = pdata->dcdc[id];
c172708d 658 config.driver_data = dcdc;
817436e7 659 config.regmap = wm831x->regmap;
c172708d 660
d73b4cb7
MB		 661 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
662 &config);
e4ee831f
MB		 663 if (IS_ERR(dcdc->regulator)) {
664 ret = PTR_ERR(dcdc->regulator);
665 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
666 id + 1, ret);
667 goto err;
668 }
669
cd99758b 670 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB		 671 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
672 wm831x_dcdc_uv_irq,
673 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 674 if (ret != 0) {
675 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
676 irq, ret);
d73b4cb7 677 goto err;
e4ee831f
MB		 678 }
679
680 platform_set_drvdata(pdev, dcdc);
681
682 return 0;
683
e4ee831f 684err:
e4ee831f
MB		 685 return ret;
686}
687
e4ee831f
MB		 688static struct platform_driver wm831x_buckp_driver = {
689 .probe = wm831x_buckp_probe,
e4ee831f
MB		 690 .driver = {
691 .name = "wm831x-buckp",
eb66d565 692 .owner = THIS_MODULE,
e4ee831f
MB		 693 },
694};
695
1304850d
MB		 696/*
697 * DCDC boost convertors
698 */
699
700static int wm831x_boostp_get_status(struct regulator_dev *rdev)
701{
702 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
703 struct wm831x *wm831x = dcdc->wm831x;
704 int ret;
705
706 /* First, check for errors */
707 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
708 if (ret < 0)
709 return ret;
710
711 if (ret & (1 << rdev_get_id(rdev))) {
712 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
713 rdev_get_id(rdev) + 1);
714 return REGULATOR_STATUS_ERROR;
715 }
716
717 /* Is the regulator on? */
718 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
719 if (ret < 0)
720 return ret;
721 if (ret & (1 << rdev_get_id(rdev)))
722 return REGULATOR_STATUS_ON;
723 else
724 return REGULATOR_STATUS_OFF;
725}
726
727static struct regulator_ops wm831x_boostp_ops = {
728 .get_status = wm831x_boostp_get_status,
729
3d138fcc
MB		 730 .is_enabled = regulator_is_enabled_regmap,
731 .enable = regulator_enable_regmap,
732 .disable = regulator_disable_regmap,
1304850d
MB		 733};
734
a5023574 735static int wm831x_boostp_probe(struct platform_device *pdev)
1304850d
MB		 736{
737 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 738 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 739 struct regulator_config config = { };
1304850d
MB		 740 int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
741 struct wm831x_dcdc *dcdc;
742 struct resource *res;
743 int ret, irq;
744
745 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
746
747 if (pdata == NULL || pdata->dcdc[id] == NULL)
748 return -ENODEV;
749
4c60165d 750 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
5730aa57 751 if (!dcdc)
1304850d 752 return -ENOMEM;
1304850d
MB		 753
754 dcdc->wm831x = wm831x;
755
5656098e 756 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
1304850d 757 if (res == NULL) {
5656098e 758 dev_err(&pdev->dev, "No REG resource\n");
477b2bac 759 return -EINVAL;
1304850d
MB		 760 }
761 dcdc->base = res->start;
762
763 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
764 dcdc->desc.name = dcdc->name;
765 dcdc->desc.id = id;
766 dcdc->desc.type = REGULATOR_VOLTAGE;
767 dcdc->desc.ops = &wm831x_boostp_ops;
768 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 769 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
770 dcdc->desc.enable_mask = 1 << id;
1304850d 771
c172708d 772 config.dev = pdev->dev.parent;
f0b067d9
MB		 773 if (pdata)
774 config.init_data = pdata->dcdc[id];
c172708d 775 config.driver_data = dcdc;
3d138fcc 776 config.regmap = wm831x->regmap;
c172708d 777
d73b4cb7
MB		 778 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
779 &config);
1304850d
MB		 780 if (IS_ERR(dcdc->regulator)) {
781 ret = PTR_ERR(dcdc->regulator);
782 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
783 id + 1, ret);
477b2bac 784 return ret;
1304850d
MB		 785 }
786
cd99758b 787 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB		 788 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
789 wm831x_dcdc_uv_irq,
790 IRQF_TRIGGER_RISING, dcdc->name,
791 dcdc);
1304850d
MB		 792 if (ret != 0) {
793 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
794 irq, ret);
477b2bac 795 return ret;
1304850d
MB		 796 }
797
798 platform_set_drvdata(pdev, dcdc);
799
800 return 0;
1304850d
MB		 801}
802
1304850d
MB		 803static struct platform_driver wm831x_boostp_driver = {
804 .probe = wm831x_boostp_probe,
1304850d
MB		 805 .driver = {
806 .name = "wm831x-boostp",
eb66d565 807 .owner = THIS_MODULE,
1304850d
MB		 808 },
809};
810
8267a9ba
MB		 811/*
812 * External Power Enable
813 *
814 * These aren't actually DCDCs but look like them in hardware so share
815 * code.
816 */
817
818#define WM831X_EPE_BASE 6
819
820static struct regulator_ops wm831x_epe_ops = {
3d138fcc
MB		 821 .is_enabled = regulator_is_enabled_regmap,
822 .enable = regulator_enable_regmap,
823 .disable = regulator_disable_regmap,
8267a9ba
MB		 824 .get_status = wm831x_dcdc_get_status,
825};
826
a5023574 827static int wm831x_epe_probe(struct platform_device *pdev)
8267a9ba
MB		 828{
829 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 830 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 831 struct regulator_config config = { };
8267a9ba
MB		 832 int id = pdev->id % ARRAY_SIZE(pdata->epe);
833 struct wm831x_dcdc *dcdc;
834 int ret;
835
836 dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
837
4c60165d 838 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
5730aa57 839 if (!dcdc)
8267a9ba 840 return -ENOMEM;
8267a9ba
MB		 841
842 dcdc->wm831x = wm831x;
843
844 /* For current parts this is correct; probably need to revisit
845 * in future.
846 */
847 snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
848 dcdc->desc.name = dcdc->name;
849 dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
850 dcdc->desc.ops = &wm831x_epe_ops;
851 dcdc->desc.type = REGULATOR_VOLTAGE;
852 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 853 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
854 dcdc->desc.enable_mask = 1 << dcdc->desc.id;
8267a9ba 855
c172708d 856 config.dev = pdev->dev.parent;
b7ca8788
MB		 857 if (pdata)
858 config.init_data = pdata->epe[id];
c172708d 859 config.driver_data = dcdc;
3d138fcc 860 config.regmap = wm831x->regmap;
c172708d 861
d73b4cb7
MB		 862 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
863 &config);
8267a9ba
MB		 864 if (IS_ERR(dcdc->regulator)) {
865 ret = PTR_ERR(dcdc->regulator);
866 dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
867 id + 1, ret);
868 goto err;
869 }
870
871 platform_set_drvdata(pdev, dcdc);
872
873 return 0;
874
875err:
8267a9ba
MB		 876 return ret;
877}
878
8267a9ba
MB		 879static struct platform_driver wm831x_epe_driver = {
880 .probe = wm831x_epe_probe,
8267a9ba
MB		 881 .driver = {
882 .name = "wm831x-epe",
eb66d565 883 .owner = THIS_MODULE,
8267a9ba
MB		 884 },
885};
886
e4ee831f
MB		 887static int __init wm831x_dcdc_init(void)
888{
889 int ret;
890 ret = platform_driver_register(&wm831x_buckv_driver);
891 if (ret != 0)
892 pr_err("Failed to register WM831x BUCKV driver: %d\n", ret);
893
894 ret = platform_driver_register(&wm831x_buckp_driver);
895 if (ret != 0)
896 pr_err("Failed to register WM831x BUCKP driver: %d\n", ret);
897
1304850d
MB		 898 ret = platform_driver_register(&wm831x_boostp_driver);
899 if (ret != 0)
900 pr_err("Failed to register WM831x BOOST driver: %d\n", ret);
901
8267a9ba
MB		 902 ret = platform_driver_register(&wm831x_epe_driver);
903 if (ret != 0)
904 pr_err("Failed to register WM831x EPE driver: %d\n", ret);
905
e4ee831f
MB		 906 return 0;
907}
908subsys_initcall(wm831x_dcdc_init);
909
910static void __exit wm831x_dcdc_exit(void)
911{
8267a9ba 912 platform_driver_unregister(&wm831x_epe_driver);
1304850d 913 platform_driver_unregister(&wm831x_boostp_driver);
e4ee831f
MB		 914 platform_driver_unregister(&wm831x_buckp_driver);
915 platform_driver_unregister(&wm831x_buckv_driver);
916}
917module_exit(wm831x_dcdc_exit);
918
919/* Module information */
920MODULE_AUTHOR("Mark Brown");
921MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
922MODULE_LICENSE("GPL");
923MODULE_ALIAS("platform:wm831x-buckv");
924MODULE_ALIAS("platform:wm831x-buckp");
43f1f216 925MODULE_ALIAS("platform:wm831x-boostp");
24b43150 926MODULE_ALIAS("platform:wm831x-epe");
Linux 6.x block layer and io_uring tree(s)