regulator: gpio-regulator: Use core GPIO enable support
[linux-block.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB
3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
15#include <linux/platform_device.h>
2098e95c
RN
16#include <linux/of.h>
17#include <linux/of_device.h>
fa16a5c1
DB
18#include <linux/regulator/driver.h>
19#include <linux/regulator/machine.h>
2098e95c 20#include <linux/regulator/of_regulator.h>
b07682b6 21#include <linux/i2c/twl.h>
fa16a5c1
DB
22
23
24/*
c4aa6f31 25 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB
26 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
27 * include an audio codec, battery charger, and more voltage regulators.
28 * These chips are often used in OMAP-based systems.
29 *
30 * This driver implements software-based resource control for various
31 * voltage regulators. This is usually augmented with state machine
32 * based control.
33 */
34
35struct twlreg_info {
36 /* start of regulator's PM_RECEIVER control register bank */
37 u8 base;
38
c4aa6f31 39 /* twl resource ID, for resource control state machine */
fa16a5c1
DB
40 u8 id;
41
42 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
43 u8 table_len;
44 const u16 *table;
45
045f972f
JKS
46 /* regulator specific turn-on delay */
47 u16 delay;
48
49 /* State REMAP default configuration */
50 u8 remap;
51
fa16a5c1
DB
52 /* chip constraints on regulator behavior */
53 u16 min_mV;
3e3d3be7 54 u16 max_mV;
fa16a5c1 55
4d94aee5
GG
56 u8 flags;
57
fa16a5c1
DB
58 /* used by regulator core */
59 struct regulator_desc desc;
4d94aee5
GG
60
61 /* chip specific features */
62 unsigned long features;
63bfff4e
TK
63
64 /*
65 * optional override functions for voltage set/get
66 * these are currently only used for SMPS regulators
67 */
68 int (*get_voltage)(void *data);
69 int (*set_voltage)(void *data, int target_uV);
70
71 /* data passed from board for external get/set voltage */
72 void *data;
fa16a5c1
DB
73};
74
75
76/* LDO control registers ... offset is from the base of its register bank.
77 * The first three registers of all power resource banks help hardware to
78 * manage the various resource groups.
79 */
441a4505 80/* Common offset in TWL4030/6030 */
fa16a5c1 81#define VREG_GRP 0
441a4505 82/* TWL4030 register offsets */
fa16a5c1
DB
83#define VREG_TYPE 1
84#define VREG_REMAP 2
85#define VREG_DEDICATED 3 /* LDO control */
ba305e31 86#define VREG_VOLTAGE_SMPS_4030 9
441a4505
RN
87/* TWL6030 register offsets */
88#define VREG_TRANS 1
89#define VREG_STATE 2
90#define VREG_VOLTAGE 3
4d94aee5 91#define VREG_VOLTAGE_SMPS 4
441a4505
RN
92/* TWL6030 Misc register offsets */
93#define VREG_BC_ALL 1
94#define VREG_BC_REF 2
95#define VREG_BC_PROC 3
96#define VREG_BC_CLK_RST 4
fa16a5c1 97
21657ebf
SH
98/* TWL6030 LDO register values for CFG_STATE */
99#define TWL6030_CFG_STATE_OFF 0x00
100#define TWL6030_CFG_STATE_ON 0x01
9a0244ad
SH
101#define TWL6030_CFG_STATE_OFF2 0x02
102#define TWL6030_CFG_STATE_SLEEP 0x03
21657ebf 103#define TWL6030_CFG_STATE_GRP_SHIFT 5
b2456779
SH
104#define TWL6030_CFG_STATE_APP_SHIFT 2
105#define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT)
106#define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\
107 TWL6030_CFG_STATE_APP_SHIFT)
21657ebf 108
4d94aee5
GG
109/* Flags for SMPS Voltage reading */
110#define SMPS_OFFSET_EN BIT(0)
111#define SMPS_EXTENDED_EN BIT(1)
112
113/* twl6025 SMPS EPROM values */
114#define TWL6030_SMPS_OFFSET 0xB0
115#define TWL6030_SMPS_MULT 0xB3
116#define SMPS_MULTOFFSET_SMPS4 BIT(0)
117#define SMPS_MULTOFFSET_VIO BIT(1)
118#define SMPS_MULTOFFSET_SMPS3 BIT(6)
119
fa16a5c1 120static inline int
441a4505 121twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB
122{
123 u8 value;
124 int status;
125
441a4505 126 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB
127 &value, info->base + offset);
128 return (status < 0) ? status : value;
129}
130
131static inline int
441a4505
RN
132twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
133 u8 value)
fa16a5c1 134{
441a4505 135 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB
136 value, info->base + offset);
137}
138
139/*----------------------------------------------------------------------*/
140
141/* generic power resource operations, which work on all regulators */
142
c4aa6f31 143static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 144{
441a4505
RN
145 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
146 VREG_GRP);
fa16a5c1
DB
147}
148
149/*
150 * Enable/disable regulators by joining/leaving the P1 (processor) group.
151 * We assume nobody else is updating the DEV_GRP registers.
152 */
441a4505
RN
153/* definition for 4030 family */
154#define P3_GRP_4030 BIT(7) /* "peripherals" */
155#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
156#define P1_GRP_4030 BIT(5) /* CPU/Linux */
157/* definition for 6030 family */
158#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
159#define P2_GRP_6030 BIT(1) /* "peripherals" */
160#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 161
b2456779 162static int twl4030reg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 163{
c4aa6f31 164 int state = twlreg_grp(rdev);
fa16a5c1
DB
165
166 if (state < 0)
167 return state;
168
b2456779
SH
169 return state & P1_GRP_4030;
170}
171
172static int twl6030reg_is_enabled(struct regulator_dev *rdev)
173{
174 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 175 int grp = 0, val;
b2456779 176
b6f476c2
AL
177 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS))) {
178 grp = twlreg_grp(rdev);
179 if (grp < 0)
180 return grp;
4d94aee5 181 grp &= P1_GRP_6030;
b6f476c2 182 } else {
4d94aee5 183 grp = 1;
b6f476c2 184 }
b2456779
SH
185
186 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
187 val = TWL6030_CFG_STATE_APP(val);
188
189 return grp && (val == TWL6030_CFG_STATE_ON);
fa16a5c1
DB
190}
191
f8c2940b 192static int twl4030reg_enable(struct regulator_dev *rdev)
fa16a5c1
DB
193{
194 struct twlreg_info *info = rdev_get_drvdata(rdev);
195 int grp;
53b8a9d9 196 int ret;
fa16a5c1 197
b6f476c2 198 grp = twlreg_grp(rdev);
fa16a5c1
DB
199 if (grp < 0)
200 return grp;
201
f8c2940b 202 grp |= P1_GRP_4030;
441a4505 203
53b8a9d9
JKS
204 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
205
f8c2940b
B
206 return ret;
207}
208
209static int twl6030reg_enable(struct regulator_dev *rdev)
210{
211 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 212 int grp = 0;
f8c2940b
B
213 int ret;
214
4d94aee5 215 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
b6f476c2 216 grp = twlreg_grp(rdev);
f8c2940b
B
217 if (grp < 0)
218 return grp;
219
220 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
221 grp << TWL6030_CFG_STATE_GRP_SHIFT |
222 TWL6030_CFG_STATE_ON);
48c936d6
AL
223 return ret;
224}
21657ebf 225
48c936d6
AL
226static int twl4030reg_enable_time(struct regulator_dev *rdev)
227{
228 struct twlreg_info *info = rdev_get_drvdata(rdev);
53b8a9d9 229
48c936d6
AL
230 return info->delay;
231}
232
233static int twl6030reg_enable_time(struct regulator_dev *rdev)
234{
235 struct twlreg_info *info = rdev_get_drvdata(rdev);
236
237 return info->delay;
fa16a5c1
DB
238}
239
0ff3897d 240static int twl4030reg_disable(struct regulator_dev *rdev)
fa16a5c1
DB
241{
242 struct twlreg_info *info = rdev_get_drvdata(rdev);
243 int grp;
21657ebf 244 int ret;
fa16a5c1 245
b6f476c2 246 grp = twlreg_grp(rdev);
fa16a5c1
DB
247 if (grp < 0)
248 return grp;
249
0ff3897d 250 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 251
21657ebf
SH
252 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
253
0ff3897d
B
254 return ret;
255}
256
257static int twl6030reg_disable(struct regulator_dev *rdev)
258{
259 struct twlreg_info *info = rdev_get_drvdata(rdev);
260 int grp = 0;
261 int ret;
262
4d94aee5
GG
263 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
264 grp = P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030;
0ff3897d
B
265
266 /* For 6030, set the off state for all grps enabled */
267 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
268 (grp) << TWL6030_CFG_STATE_GRP_SHIFT |
269 TWL6030_CFG_STATE_OFF);
21657ebf
SH
270
271 return ret;
fa16a5c1
DB
272}
273
9a0244ad 274static int twl4030reg_get_status(struct regulator_dev *rdev)
fa16a5c1 275{
c4aa6f31 276 int state = twlreg_grp(rdev);
fa16a5c1
DB
277
278 if (state < 0)
279 return state;
280 state &= 0x0f;
281
282 /* assume state != WARM_RESET; we'd not be running... */
283 if (!state)
284 return REGULATOR_STATUS_OFF;
285 return (state & BIT(3))
286 ? REGULATOR_STATUS_NORMAL
287 : REGULATOR_STATUS_STANDBY;
288}
289
9a0244ad
SH
290static int twl6030reg_get_status(struct regulator_dev *rdev)
291{
292 struct twlreg_info *info = rdev_get_drvdata(rdev);
293 int val;
294
295 val = twlreg_grp(rdev);
296 if (val < 0)
297 return val;
298
299 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
300
301 switch (TWL6030_CFG_STATE_APP(val)) {
302 case TWL6030_CFG_STATE_ON:
303 return REGULATOR_STATUS_NORMAL;
304
305 case TWL6030_CFG_STATE_SLEEP:
306 return REGULATOR_STATUS_STANDBY;
307
308 case TWL6030_CFG_STATE_OFF:
309 case TWL6030_CFG_STATE_OFF2:
310 default:
311 break;
312 }
313
314 return REGULATOR_STATUS_OFF;
315}
316
1a39962f 317static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB
318{
319 struct twlreg_info *info = rdev_get_drvdata(rdev);
320 unsigned message;
321 int status;
322
323 /* We can only set the mode through state machine commands... */
324 switch (mode) {
325 case REGULATOR_MODE_NORMAL:
326 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
327 break;
328 case REGULATOR_MODE_STANDBY:
329 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
330 break;
331 default:
332 return -EINVAL;
333 }
334
335 /* Ensure the resource is associated with some group */
c4aa6f31 336 status = twlreg_grp(rdev);
fa16a5c1
DB
337 if (status < 0)
338 return status;
441a4505 339 if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
fa16a5c1
DB
340 return -EACCES;
341
c4aa6f31 342 status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8
AL
343 message >> 8, TWL4030_PM_MASTER_PB_WORD_MSB);
344 if (status < 0)
fa16a5c1
DB
345 return status;
346
c4aa6f31 347 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8 348 message & 0xff, TWL4030_PM_MASTER_PB_WORD_LSB);
fa16a5c1
DB
349}
350
1a39962f
SH
351static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
352{
353 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 354 int grp = 0;
1a39962f
SH
355 int val;
356
4d94aee5 357 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
b6f476c2 358 grp = twlreg_grp(rdev);
1a39962f
SH
359
360 if (grp < 0)
361 return grp;
362
363 /* Compose the state register settings */
364 val = grp << TWL6030_CFG_STATE_GRP_SHIFT;
365 /* We can only set the mode through state machine commands... */
366 switch (mode) {
367 case REGULATOR_MODE_NORMAL:
368 val |= TWL6030_CFG_STATE_ON;
369 break;
370 case REGULATOR_MODE_STANDBY:
371 val |= TWL6030_CFG_STATE_SLEEP;
372 break;
373
374 default:
375 return -EINVAL;
376 }
377
378 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, val);
379}
380
fa16a5c1
DB
381/*----------------------------------------------------------------------*/
382
383/*
384 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
385 * select field in its control register. We use tables indexed by VSEL
386 * to record voltages in milliVolts. (Accuracy is about three percent.)
387 *
388 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
389 * currently handled by listing two slightly different VAUX2 regulators,
390 * only one of which will be configured.
391 *
392 * VSEL values documented as "TI cannot support these values" are flagged
393 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH
394 *
395 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
396 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1 397 */
fa16a5c1 398#define UNSUP_MASK 0x8000
fa16a5c1
DB
399
400#define UNSUP(x) (UNSUP_MASK | (x))
411a2df5
N
401#define IS_UNSUP(info, x) \
402 ((UNSUP_MASK & (x)) && \
403 !((info)->features & TWL4030_ALLOW_UNSUPPORTED))
fa16a5c1
DB
404#define LDO_MV(x) (~UNSUP_MASK & (x))
405
406
407static const u16 VAUX1_VSEL_table[] = {
408 UNSUP(1500), UNSUP(1800), 2500, 2800,
409 3000, 3000, 3000, 3000,
410};
411static const u16 VAUX2_4030_VSEL_table[] = {
412 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
413 1500, 1800, UNSUP(1850), 2500,
414 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
415 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
416};
417static const u16 VAUX2_VSEL_table[] = {
418 1700, 1700, 1900, 1300,
419 1500, 1800, 2000, 2500,
420 2100, 2800, 2200, 2300,
421 2400, 2400, 2400, 2400,
422};
423static const u16 VAUX3_VSEL_table[] = {
424 1500, 1800, 2500, 2800,
d6bb69cf 425 3000, 3000, 3000, 3000,
fa16a5c1
DB
426};
427static const u16 VAUX4_VSEL_table[] = {
428 700, 1000, 1200, UNSUP(1300),
429 1500, 1800, UNSUP(1850), 2500,
1897e742
DB
430 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
431 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB
432};
433static const u16 VMMC1_VSEL_table[] = {
434 1850, 2850, 3000, 3150,
435};
436static const u16 VMMC2_VSEL_table[] = {
437 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
438 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
439 2600, 2800, 2850, 3000,
440 3150, 3150, 3150, 3150,
441};
442static const u16 VPLL1_VSEL_table[] = {
443 1000, 1200, 1300, 1800,
444 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
445};
446static const u16 VPLL2_VSEL_table[] = {
447 700, 1000, 1200, 1300,
448 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
449 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
450 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
451};
452static const u16 VSIM_VSEL_table[] = {
453 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
454 2800, 3000, 3000, 3000,
455};
456static const u16 VDAC_VSEL_table[] = {
457 1200, 1300, 1800, 1800,
458};
07fc493f
JKS
459static const u16 VDD1_VSEL_table[] = {
460 800, 1450,
461};
462static const u16 VDD2_VSEL_table[] = {
463 800, 1450, 1500,
464};
465static const u16 VIO_VSEL_table[] = {
466 1800, 1850,
467};
468static const u16 VINTANA2_VSEL_table[] = {
469 2500, 2750,
470};
fa16a5c1 471
3e3d3be7 472static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
473{
474 struct twlreg_info *info = rdev_get_drvdata(rdev);
475 int mV = info->table[index];
476
411a2df5 477 return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000);
66b659e6
DB
478}
479
fa16a5c1 480static int
dd16b1f8 481twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
fa16a5c1
DB
482{
483 struct twlreg_info *info = rdev_get_drvdata(rdev);
fa16a5c1 484
dd16b1f8
AL
485 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
486 selector);
fa16a5c1
DB
487}
488
3e3d3be7 489static int twl4030ldo_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
490{
491 struct twlreg_info *info = rdev_get_drvdata(rdev);
441a4505
RN
492 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
493 VREG_VOLTAGE);
fa16a5c1
DB
494
495 if (vsel < 0)
496 return vsel;
497
498 vsel &= info->table_len - 1;
499 return LDO_MV(info->table[vsel]) * 1000;
500}
501
3e3d3be7
RN
502static struct regulator_ops twl4030ldo_ops = {
503 .list_voltage = twl4030ldo_list_voltage,
66b659e6 504
dd16b1f8 505 .set_voltage_sel = twl4030ldo_set_voltage_sel,
3e3d3be7
RN
506 .get_voltage = twl4030ldo_get_voltage,
507
f8c2940b 508 .enable = twl4030reg_enable,
0ff3897d 509 .disable = twl4030reg_disable,
b2456779 510 .is_enabled = twl4030reg_is_enabled,
48c936d6 511 .enable_time = twl4030reg_enable_time,
3e3d3be7 512
1a39962f 513 .set_mode = twl4030reg_set_mode,
3e3d3be7 514
9a0244ad 515 .get_status = twl4030reg_get_status,
3e3d3be7
RN
516};
517
ba305e31
TK
518static int
519twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
520 unsigned *selector)
521{
522 struct twlreg_info *info = rdev_get_drvdata(rdev);
523 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
524
63bfff4e
TK
525 if (info->set_voltage) {
526 return info->set_voltage(info->data, min_uV);
527 } else {
528 twlreg_write(info, TWL_MODULE_PM_RECEIVER,
529 VREG_VOLTAGE_SMPS_4030, vsel);
530 }
531
ba305e31
TK
532 return 0;
533}
534
535static int twl4030smps_get_voltage(struct regulator_dev *rdev)
536{
537 struct twlreg_info *info = rdev_get_drvdata(rdev);
63bfff4e
TK
538 int vsel;
539
540 if (info->get_voltage)
541 return info->get_voltage(info->data);
542
543 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
ba305e31
TK
544 VREG_VOLTAGE_SMPS_4030);
545
546 return vsel * 12500 + 600000;
547}
548
549static struct regulator_ops twl4030smps_ops = {
550 .set_voltage = twl4030smps_set_voltage,
551 .get_voltage = twl4030smps_get_voltage,
552};
553
34a38440
TK
554static int twl6030coresmps_set_voltage(struct regulator_dev *rdev, int min_uV,
555 int max_uV, unsigned *selector)
556{
557 struct twlreg_info *info = rdev_get_drvdata(rdev);
558
559 if (info->set_voltage)
560 return info->set_voltage(info->data, min_uV);
561
562 return -ENODEV;
563}
564
565static int twl6030coresmps_get_voltage(struct regulator_dev *rdev)
566{
567 struct twlreg_info *info = rdev_get_drvdata(rdev);
568
569 if (info->get_voltage)
570 return info->get_voltage(info->data);
571
572 return -ENODEV;
573}
574
575static struct regulator_ops twl6030coresmps_ops = {
576 .set_voltage = twl6030coresmps_set_voltage,
577 .get_voltage = twl6030coresmps_get_voltage,
578};
579
3e3d3be7 580static int
3a93f2a9
MB
581twl6030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
582 unsigned *selector)
3e3d3be7
RN
583{
584 struct twlreg_info *info = rdev_get_drvdata(rdev);
585 int vsel;
586
587 if ((min_uV/1000 < info->min_mV) || (max_uV/1000 > info->max_mV))
588 return -EDOM;
589
590 /*
591 * Use the below formula to calculate vsel
592 * mV = 1000mv + 100mv * (vsel - 1)
593 */
594 vsel = (min_uV/1000 - 1000)/100 + 1;
3a93f2a9 595 *selector = vsel;
3e3d3be7
RN
596 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, vsel);
597
598}
599
600static int twl6030ldo_get_voltage(struct regulator_dev *rdev)
601{
602 struct twlreg_info *info = rdev_get_drvdata(rdev);
603 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
604 VREG_VOLTAGE);
605
606 if (vsel < 0)
607 return vsel;
608
609 /*
610 * Use the below formula to calculate vsel
611 * mV = 1000mv + 100mv * (vsel - 1)
612 */
613 return (1000 + (100 * (vsel - 1))) * 1000;
614}
615
616static struct regulator_ops twl6030ldo_ops = {
ea7e3304 617 .list_voltage = regulator_list_voltage_linear,
3e3d3be7
RN
618
619 .set_voltage = twl6030ldo_set_voltage,
620 .get_voltage = twl6030ldo_get_voltage,
fa16a5c1 621
f8c2940b 622 .enable = twl6030reg_enable,
0ff3897d 623 .disable = twl6030reg_disable,
b2456779 624 .is_enabled = twl6030reg_is_enabled,
48c936d6 625 .enable_time = twl6030reg_enable_time,
fa16a5c1 626
1a39962f 627 .set_mode = twl6030reg_set_mode,
fa16a5c1 628
9a0244ad 629 .get_status = twl6030reg_get_status,
fa16a5c1
DB
630};
631
632/*----------------------------------------------------------------------*/
633
634/*
635 * Fixed voltage LDOs don't have a VSEL field to update.
636 */
c4aa6f31 637static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
638{
639 struct twlreg_info *info = rdev_get_drvdata(rdev);
640
641 return info->min_mV * 1000;
642}
643
c4aa6f31 644static int twlfixed_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
645{
646 struct twlreg_info *info = rdev_get_drvdata(rdev);
647
648 return info->min_mV * 1000;
649}
650
b2456779
SH
651static struct regulator_ops twl4030fixed_ops = {
652 .list_voltage = twlfixed_list_voltage,
653
654 .get_voltage = twlfixed_get_voltage,
655
f8c2940b 656 .enable = twl4030reg_enable,
0ff3897d 657 .disable = twl4030reg_disable,
b2456779 658 .is_enabled = twl4030reg_is_enabled,
48c936d6 659 .enable_time = twl4030reg_enable_time,
b2456779 660
1a39962f 661 .set_mode = twl4030reg_set_mode,
b2456779 662
9a0244ad 663 .get_status = twl4030reg_get_status,
b2456779
SH
664};
665
666static struct regulator_ops twl6030fixed_ops = {
c4aa6f31 667 .list_voltage = twlfixed_list_voltage,
66b659e6 668
c4aa6f31 669 .get_voltage = twlfixed_get_voltage,
fa16a5c1 670
f8c2940b 671 .enable = twl6030reg_enable,
0ff3897d 672 .disable = twl6030reg_disable,
b2456779 673 .is_enabled = twl6030reg_is_enabled,
48c936d6 674 .enable_time = twl6030reg_enable_time,
fa16a5c1 675
1a39962f 676 .set_mode = twl6030reg_set_mode,
fa16a5c1 677
9a0244ad 678 .get_status = twl6030reg_get_status,
fa16a5c1
DB
679};
680
8e6de4a3 681static struct regulator_ops twl6030_fixed_resource = {
f8c2940b 682 .enable = twl6030reg_enable,
0ff3897d 683 .disable = twl6030reg_disable,
b2456779 684 .is_enabled = twl6030reg_is_enabled,
48c936d6 685 .enable_time = twl6030reg_enable_time,
9a0244ad 686 .get_status = twl6030reg_get_status,
8e6de4a3
B
687};
688
4d94aee5
GG
689/*
690 * SMPS status and control
691 */
692
693static int twl6030smps_list_voltage(struct regulator_dev *rdev, unsigned index)
694{
695 struct twlreg_info *info = rdev_get_drvdata(rdev);
696
697 int voltage = 0;
698
699 switch (info->flags) {
700 case SMPS_OFFSET_EN:
701 voltage = 100000;
702 /* fall through */
703 case 0:
704 switch (index) {
705 case 0:
706 voltage = 0;
707 break;
708 case 58:
709 voltage = 1350 * 1000;
710 break;
711 case 59:
712 voltage = 1500 * 1000;
713 break;
714 case 60:
715 voltage = 1800 * 1000;
716 break;
717 case 61:
718 voltage = 1900 * 1000;
719 break;
720 case 62:
721 voltage = 2100 * 1000;
722 break;
723 default:
724 voltage += (600000 + (12500 * (index - 1)));
725 }
726 break;
727 case SMPS_EXTENDED_EN:
728 switch (index) {
729 case 0:
730 voltage = 0;
731 break;
732 case 58:
733 voltage = 2084 * 1000;
734 break;
735 case 59:
736 voltage = 2315 * 1000;
737 break;
738 case 60:
739 voltage = 2778 * 1000;
740 break;
741 case 61:
742 voltage = 2932 * 1000;
743 break;
744 case 62:
745 voltage = 3241 * 1000;
746 break;
747 default:
748 voltage = (1852000 + (38600 * (index - 1)));
749 }
750 break;
751 case SMPS_OFFSET_EN | SMPS_EXTENDED_EN:
752 switch (index) {
753 case 0:
754 voltage = 0;
755 break;
756 case 58:
757 voltage = 4167 * 1000;
758 break;
759 case 59:
760 voltage = 2315 * 1000;
761 break;
762 case 60:
763 voltage = 2778 * 1000;
764 break;
765 case 61:
766 voltage = 2932 * 1000;
767 break;
768 case 62:
769 voltage = 3241 * 1000;
770 break;
771 default:
772 voltage = (2161000 + (38600 * (index - 1)));
773 }
774 break;
775 }
776
777 return voltage;
778}
779
780static int
781twl6030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
782 unsigned int *selector)
783{
784 struct twlreg_info *info = rdev_get_drvdata(rdev);
785 int vsel = 0;
786
787 switch (info->flags) {
788 case 0:
789 if (min_uV == 0)
790 vsel = 0;
a33b6e5a
LD
791 else if ((min_uV >= 600000) && (min_uV <= 1300000)) {
792 int calc_uV;
268a1641 793 vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
0cb2f123 794 vsel++;
a33b6e5a
LD
795 calc_uV = twl6030smps_list_voltage(rdev, vsel);
796 if (calc_uV > max_uV)
797 return -EINVAL;
4d94aee5
GG
798 }
799 /* Values 1..57 for vsel are linear and can be calculated
800 * values 58..62 are non linear.
801 */
802 else if ((min_uV > 1900000) && (max_uV >= 2100000))
803 vsel = 62;
804 else if ((min_uV > 1800000) && (max_uV >= 1900000))
805 vsel = 61;
806 else if ((min_uV > 1500000) && (max_uV >= 1800000))
807 vsel = 60;
808 else if ((min_uV > 1350000) && (max_uV >= 1500000))
809 vsel = 59;
810 else if ((min_uV > 1300000) && (max_uV >= 1350000))
811 vsel = 58;
812 else
813 return -EINVAL;
814 break;
815 case SMPS_OFFSET_EN:
816 if (min_uV == 0)
817 vsel = 0;
a33b6e5a
LD
818 else if ((min_uV >= 700000) && (min_uV <= 1420000)) {
819 int calc_uV;
268a1641 820 vsel = DIV_ROUND_UP(min_uV - 700000, 12500);
0cb2f123 821 vsel++;
a33b6e5a
LD
822 calc_uV = twl6030smps_list_voltage(rdev, vsel);
823 if (calc_uV > max_uV)
824 return -EINVAL;
4d94aee5
GG
825 }
826 /* Values 1..57 for vsel are linear and can be calculated
827 * values 58..62 are non linear.
828 */
829 else if ((min_uV > 1900000) && (max_uV >= 2100000))
830 vsel = 62;
831 else if ((min_uV > 1800000) && (max_uV >= 1900000))
832 vsel = 61;
833 else if ((min_uV > 1350000) && (max_uV >= 1800000))
834 vsel = 60;
835 else if ((min_uV > 1350000) && (max_uV >= 1500000))
836 vsel = 59;
837 else if ((min_uV > 1300000) && (max_uV >= 1350000))
838 vsel = 58;
839 else
840 return -EINVAL;
841 break;
842 case SMPS_EXTENDED_EN:
0cb2f123 843 if (min_uV == 0) {
4d94aee5 844 vsel = 0;
0cb2f123 845 } else if ((min_uV >= 1852000) && (max_uV <= 4013600)) {
268a1641 846 vsel = DIV_ROUND_UP(min_uV - 1852000, 38600);
0cb2f123
AL
847 vsel++;
848 }
4d94aee5
GG
849 break;
850 case SMPS_OFFSET_EN|SMPS_EXTENDED_EN:
0cb2f123 851 if (min_uV == 0) {
4d94aee5 852 vsel = 0;
0cb2f123 853 } else if ((min_uV >= 2161000) && (max_uV <= 4321000)) {
268a1641 854 vsel = DIV_ROUND_UP(min_uV - 2161000, 38600);
0cb2f123
AL
855 vsel++;
856 }
4d94aee5
GG
857 break;
858 }
859
860 *selector = vsel;
861
862 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS,
863 vsel);
864}
865
866static int twl6030smps_get_voltage_sel(struct regulator_dev *rdev)
867{
868 struct twlreg_info *info = rdev_get_drvdata(rdev);
869
870 return twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS);
871}
872
873static struct regulator_ops twlsmps_ops = {
874 .list_voltage = twl6030smps_list_voltage,
875
876 .set_voltage = twl6030smps_set_voltage,
877 .get_voltage_sel = twl6030smps_get_voltage_sel,
878
879 .enable = twl6030reg_enable,
880 .disable = twl6030reg_disable,
881 .is_enabled = twl6030reg_is_enabled,
48c936d6 882 .enable_time = twl6030reg_enable_time,
4d94aee5
GG
883
884 .set_mode = twl6030reg_set_mode,
885
886 .get_status = twl6030reg_get_status,
887};
888
fa16a5c1
DB
889/*----------------------------------------------------------------------*/
890
045f972f
JKS
891#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
892 remap_conf) \
893 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 894 remap_conf, TWL4030, twl4030fixed_ops)
af8b244f
A
895#define TWL6030_FIXED_LDO(label, offset, mVolts, turnon_delay) \
896 TWL_FIXED_LDO(label, offset, mVolts, 0x0, turnon_delay, \
b2456779 897 0x0, TWL6030, twl6030fixed_ops)
045f972f 898
2098e95c
RN
899#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
900static struct twlreg_info TWL4030_INFO_##label = { \
fa16a5c1
DB
901 .base = offset, \
902 .id = num, \
903 .table_len = ARRAY_SIZE(label##_VSEL_table), \
904 .table = label##_VSEL_table, \
045f972f
JKS
905 .delay = turnon_delay, \
906 .remap = remap_conf, \
fa16a5c1
DB
907 .desc = { \
908 .name = #label, \
3e3d3be7 909 .id = TWL4030_REG_##label, \
66b659e6 910 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN
911 .ops = &twl4030ldo_ops, \
912 .type = REGULATOR_VOLTAGE, \
913 .owner = THIS_MODULE, \
914 }, \
915 }
916
ba305e31 917#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
2098e95c 918static struct twlreg_info TWL4030_INFO_##label = { \
ba305e31
TK
919 .base = offset, \
920 .id = num, \
921 .delay = turnon_delay, \
922 .remap = remap_conf, \
923 .desc = { \
924 .name = #label, \
925 .id = TWL4030_REG_##label, \
926 .ops = &twl4030smps_ops, \
927 .type = REGULATOR_VOLTAGE, \
928 .owner = THIS_MODULE, \
929 }, \
930 }
931
2098e95c
RN
932#define TWL6030_ADJUSTABLE_SMPS(label) \
933static struct twlreg_info TWL6030_INFO_##label = { \
34a38440
TK
934 .desc = { \
935 .name = #label, \
936 .id = TWL6030_REG_##label, \
937 .ops = &twl6030coresmps_ops, \
938 .type = REGULATOR_VOLTAGE, \
939 .owner = THIS_MODULE, \
940 }, \
941 }
942
2098e95c
RN
943#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
944static struct twlreg_info TWL6030_INFO_##label = { \
3e3d3be7 945 .base = offset, \
3e3d3be7
RN
946 .min_mV = min_mVolts, \
947 .max_mV = max_mVolts, \
3e3d3be7
RN
948 .desc = { \
949 .name = #label, \
950 .id = TWL6030_REG_##label, \
7736f11d 951 .n_voltages = (max_mVolts - min_mVolts)/100 + 1, \
3e3d3be7 952 .ops = &twl6030ldo_ops, \
fa16a5c1
DB
953 .type = REGULATOR_VOLTAGE, \
954 .owner = THIS_MODULE, \
ea7e3304
AL
955 .min_uV = min_mVolts * 1000, \
956 .uV_step = 100 * 1000, \
fa16a5c1
DB
957 }, \
958 }
959
2098e95c
RN
960#define TWL6025_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
961static struct twlreg_info TWL6025_INFO_##label = { \
4d94aee5 962 .base = offset, \
4d94aee5
GG
963 .min_mV = min_mVolts, \
964 .max_mV = max_mVolts, \
965 .desc = { \
966 .name = #label, \
967 .id = TWL6025_REG_##label, \
968 .n_voltages = ((max_mVolts - min_mVolts)/100) + 1, \
969 .ops = &twl6030ldo_ops, \
970 .type = REGULATOR_VOLTAGE, \
971 .owner = THIS_MODULE, \
ea7e3304
AL
972 .min_uV = min_mVolts * 1000, \
973 .uV_step = 100 * 1000, \
4d94aee5
GG
974 }, \
975 }
3e3d3be7 976
045f972f 977#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
2098e95c
RN
978 family, operations) \
979static struct twlreg_info TWLFIXED_INFO_##label = { \
fa16a5c1
DB
980 .base = offset, \
981 .id = num, \
982 .min_mV = mVolts, \
045f972f
JKS
983 .delay = turnon_delay, \
984 .remap = remap_conf, \
fa16a5c1
DB
985 .desc = { \
986 .name = #label, \
c4aa6f31 987 .id = family##_REG_##label, \
66b659e6 988 .n_voltages = 1, \
b2456779 989 .ops = &operations, \
fa16a5c1
DB
990 .type = REGULATOR_VOLTAGE, \
991 .owner = THIS_MODULE, \
992 }, \
993 }
994
2098e95c
RN
995#define TWL6030_FIXED_RESOURCE(label, offset, turnon_delay) \
996static struct twlreg_info TWLRES_INFO_##label = { \
8e6de4a3 997 .base = offset, \
8e6de4a3 998 .delay = turnon_delay, \
8e6de4a3
B
999 .desc = { \
1000 .name = #label, \
1001 .id = TWL6030_REG_##label, \
1002 .ops = &twl6030_fixed_resource, \
1003 .type = REGULATOR_VOLTAGE, \
1004 .owner = THIS_MODULE, \
1005 }, \
1006 }
1007
2098e95c
RN
1008#define TWL6025_ADJUSTABLE_SMPS(label, offset) \
1009static struct twlreg_info TWLSMPS_INFO_##label = { \
4d94aee5 1010 .base = offset, \
4d94aee5
GG
1011 .min_mV = 600, \
1012 .max_mV = 2100, \
1013 .desc = { \
1014 .name = #label, \
1015 .id = TWL6025_REG_##label, \
1016 .n_voltages = 63, \
1017 .ops = &twlsmps_ops, \
1018 .type = REGULATOR_VOLTAGE, \
1019 .owner = THIS_MODULE, \
1020 }, \
1021 }
1022
fa16a5c1
DB
1023/*
1024 * We list regulators here if systems need some level of
1025 * software control over them after boot.
1026 */
2098e95c
RN
1027TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08);
1028TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08);
1029TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08);
1030TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08);
1031TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08);
1032TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08);
1033TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08);
1034TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
1035TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08);
1036TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00);
1037TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08);
1038TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08);
1039TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08);
1040TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08);
1041TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08);
1042/* VUSBCP is managed *only* by the USB subchip */
1043/* 6030 REG with base as PMC Slave Misc : 0x0030 */
1044/* Turnon-delay and remap configuration values for 6030 are not
1045 verified since the specification is not public */
1046TWL6030_ADJUSTABLE_SMPS(VDD1);
1047TWL6030_ADJUSTABLE_SMPS(VDD2);
1048TWL6030_ADJUSTABLE_SMPS(VDD3);
1049TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300);
1050TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300);
1051TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300);
1052TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300);
1053TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300);
1054TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300);
1055/* 6025 are renamed compared to 6030 versions */
1056TWL6025_ADJUSTABLE_LDO(LDO2, 0x54, 1000, 3300);
1057TWL6025_ADJUSTABLE_LDO(LDO4, 0x58, 1000, 3300);
1058TWL6025_ADJUSTABLE_LDO(LDO3, 0x5c, 1000, 3300);
1059TWL6025_ADJUSTABLE_LDO(LDO5, 0x68, 1000, 3300);
1060TWL6025_ADJUSTABLE_LDO(LDO1, 0x6c, 1000, 3300);
1061TWL6025_ADJUSTABLE_LDO(LDO7, 0x74, 1000, 3300);
1062TWL6025_ADJUSTABLE_LDO(LDO6, 0x60, 1000, 3300);
1063TWL6025_ADJUSTABLE_LDO(LDOLN, 0x64, 1000, 3300);
1064TWL6025_ADJUSTABLE_LDO(LDOUSB, 0x70, 1000, 3300);
1065TWL4030_FIXED_LDO(VINTANA2, 0x3f, 1500, 11, 100, 0x08);
1066TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08);
1067TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08);
1068TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08);
1069TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08);
1070TWL6030_FIXED_LDO(VANA, 0x50, 2100, 0);
1071TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 0);
1072TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 0);
1073TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 0);
e9d47fa4
PU
1074TWL6030_FIXED_LDO(V1V8, 0x16, 1800, 0);
1075TWL6030_FIXED_LDO(V2V1, 0x1c, 2100, 0);
2098e95c
RN
1076TWL6030_FIXED_RESOURCE(CLK32KG, 0x8C, 0);
1077TWL6025_ADJUSTABLE_SMPS(SMPS3, 0x34);
1078TWL6025_ADJUSTABLE_SMPS(SMPS4, 0x10);
1079TWL6025_ADJUSTABLE_SMPS(VIO, 0x16);
fa16a5c1 1080
4d94aee5
GG
1081static u8 twl_get_smps_offset(void)
1082{
1083 u8 value;
1084
1085 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1086 TWL6030_SMPS_OFFSET);
1087 return value;
1088}
1089
1090static u8 twl_get_smps_mult(void)
1091{
1092 u8 value;
1093
1094 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1095 TWL6030_SMPS_MULT);
1096 return value;
1097}
1098
2098e95c
RN
1099#define TWL_OF_MATCH(comp, family, label) \
1100 { \
1101 .compatible = comp, \
1102 .data = &family##_INFO_##label, \
1103 }
1104
1105#define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
1106#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
1107#define TWL6025_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6025, label)
1108#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
2098e95c
RN
1109#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
1110
1111static const struct of_device_id twl_of_match[] __devinitconst = {
1112 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1),
1113 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030),
1114 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2),
1115 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3),
1116 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4),
1117 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1),
1118 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2),
1119 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
1120 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2),
1121 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM),
1122 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC),
1123 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1124 TWL4030_OF_MATCH("ti,twl4030-vio", VIO),
1125 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1),
1126 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2),
1127 TWL6030_OF_MATCH("ti,twl6030-vdd1", VDD1),
1128 TWL6030_OF_MATCH("ti,twl6030-vdd2", VDD2),
1129 TWL6030_OF_MATCH("ti,twl6030-vdd3", VDD3),
1130 TWL6030_OF_MATCH("ti,twl6030-vaux1", VAUX1_6030),
1131 TWL6030_OF_MATCH("ti,twl6030-vaux2", VAUX2_6030),
1132 TWL6030_OF_MATCH("ti,twl6030-vaux3", VAUX3_6030),
1133 TWL6030_OF_MATCH("ti,twl6030-vmmc", VMMC),
1134 TWL6030_OF_MATCH("ti,twl6030-vpp", VPP),
1135 TWL6030_OF_MATCH("ti,twl6030-vusim", VUSIM),
1136 TWL6025_OF_MATCH("ti,twl6025-ldo2", LDO2),
1137 TWL6025_OF_MATCH("ti,twl6025-ldo4", LDO4),
1138 TWL6025_OF_MATCH("ti,twl6025-ldo3", LDO3),
1139 TWL6025_OF_MATCH("ti,twl6025-ldo5", LDO5),
1140 TWL6025_OF_MATCH("ti,twl6025-ldo1", LDO1),
1141 TWL6025_OF_MATCH("ti,twl6025-ldo7", LDO7),
1142 TWL6025_OF_MATCH("ti,twl6025-ldo6", LDO6),
1143 TWL6025_OF_MATCH("ti,twl6025-ldoln", LDOLN),
1144 TWL6025_OF_MATCH("ti,twl6025-ldousb", LDOUSB),
1145 TWLFIXED_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1146 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG),
1147 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5),
1148 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8),
1149 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1),
1150 TWLFIXED_OF_MATCH("ti,twl6030-vana", VANA),
1151 TWLFIXED_OF_MATCH("ti,twl6030-vcxio", VCXIO),
1152 TWLFIXED_OF_MATCH("ti,twl6030-vdac", VDAC),
1153 TWLFIXED_OF_MATCH("ti,twl6030-vusb", VUSB),
e9d47fa4
PU
1154 TWLFIXED_OF_MATCH("ti,twl6030-v1v8", V1V8),
1155 TWLFIXED_OF_MATCH("ti,twl6030-v2v1", V2V1),
2098e95c
RN
1156 TWLSMPS_OF_MATCH("ti,twl6025-smps3", SMPS3),
1157 TWLSMPS_OF_MATCH("ti,twl6025-smps4", SMPS4),
1158 TWLSMPS_OF_MATCH("ti,twl6025-vio", VIO),
1159 {},
1160};
1161MODULE_DEVICE_TABLE(of, twl_of_match);
1162
24c29020 1163static int __devinit twlreg_probe(struct platform_device *pdev)
fa16a5c1 1164{
2098e95c 1165 int i, id;
fa16a5c1
DB
1166 struct twlreg_info *info;
1167 struct regulator_init_data *initdata;
1168 struct regulation_constraints *c;
1169 struct regulator_dev *rdev;
63bfff4e 1170 struct twl_regulator_driver_data *drvdata;
2098e95c 1171 const struct of_device_id *match;
c172708d 1172 struct regulator_config config = { };
2098e95c
RN
1173
1174 match = of_match_device(twl_of_match, &pdev->dev);
1175 if (match) {
1176 info = match->data;
1177 id = info->desc.id;
1178 initdata = of_get_regulator_init_data(&pdev->dev,
1179 pdev->dev.of_node);
1180 drvdata = NULL;
1181 } else {
1182 id = pdev->id;
1183 initdata = pdev->dev.platform_data;
1184 for (i = 0, info = NULL; i < ARRAY_SIZE(twl_of_match); i++) {
1185 info = twl_of_match[i].data;
5ade3935
AL
1186 if (info && info->desc.id == id)
1187 break;
2098e95c 1188 }
5ade3935
AL
1189 if (i == ARRAY_SIZE(twl_of_match))
1190 return -ENODEV;
1191
2098e95c
RN
1192 drvdata = initdata->driver_data;
1193 if (!drvdata)
1194 return -EINVAL;
fa16a5c1 1195 }
2098e95c 1196
fa16a5c1
DB
1197 if (!info)
1198 return -ENODEV;
1199
fa16a5c1
DB
1200 if (!initdata)
1201 return -EINVAL;
1202
2098e95c
RN
1203 if (drvdata) {
1204 /* copy the driver data into regulator data */
1205 info->features = drvdata->features;
1206 info->data = drvdata->data;
1207 info->set_voltage = drvdata->set_voltage;
1208 info->get_voltage = drvdata->get_voltage;
1209 }
4d94aee5 1210
fa16a5c1
DB
1211 /* Constrain board-specific capabilities according to what
1212 * this driver and the chip itself can actually do.
1213 */
1214 c = &initdata->constraints;
fa16a5c1
DB
1215 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
1216 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
1217 | REGULATOR_CHANGE_MODE
1218 | REGULATOR_CHANGE_STATUS;
2098e95c 1219 switch (id) {
205e5cd3
JKS
1220 case TWL4030_REG_VIO:
1221 case TWL4030_REG_VDD1:
1222 case TWL4030_REG_VDD2:
1223 case TWL4030_REG_VPLL1:
1224 case TWL4030_REG_VINTANA1:
1225 case TWL4030_REG_VINTANA2:
1226 case TWL4030_REG_VINTDIG:
1227 c->always_on = true;
1228 break;
1229 default:
1230 break;
1231 }
fa16a5c1 1232
2098e95c 1233 switch (id) {
4d94aee5
GG
1234 case TWL6025_REG_SMPS3:
1235 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS3)
1236 info->flags |= SMPS_EXTENDED_EN;
1237 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS3)
1238 info->flags |= SMPS_OFFSET_EN;
1239 break;
1240 case TWL6025_REG_SMPS4:
1241 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS4)
1242 info->flags |= SMPS_EXTENDED_EN;
1243 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS4)
1244 info->flags |= SMPS_OFFSET_EN;
1245 break;
1246 case TWL6025_REG_VIO:
1247 if (twl_get_smps_mult() & SMPS_MULTOFFSET_VIO)
1248 info->flags |= SMPS_EXTENDED_EN;
1249 if (twl_get_smps_offset() & SMPS_MULTOFFSET_VIO)
1250 info->flags |= SMPS_OFFSET_EN;
1251 break;
1252 }
1253
c172708d
MB
1254 config.dev = &pdev->dev;
1255 config.init_data = initdata;
1256 config.driver_data = info;
1257 config.of_node = pdev->dev.of_node;
1258
1259 rdev = regulator_register(&info->desc, &config);
fa16a5c1
DB
1260 if (IS_ERR(rdev)) {
1261 dev_err(&pdev->dev, "can't register %s, %ld\n",
1262 info->desc.name, PTR_ERR(rdev));
1263 return PTR_ERR(rdev);
1264 }
1265 platform_set_drvdata(pdev, rdev);
1266
776dc923
SH
1267 if (twl_class_is_4030())
1268 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
30010fa5
JKS
1269 info->remap);
1270
fa16a5c1
DB
1271 /* NOTE: many regulators support short-circuit IRQs (presentable
1272 * as REGULATOR_OVER_CURRENT notifications?) configured via:
1273 * - SC_CONFIG
1274 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
1275 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
1276 * - IT_CONFIG
1277 */
1278
1279 return 0;
1280}
1281
c4aa6f31 1282static int __devexit twlreg_remove(struct platform_device *pdev)
fa16a5c1
DB
1283{
1284 regulator_unregister(platform_get_drvdata(pdev));
1285 return 0;
1286}
1287
c4aa6f31 1288MODULE_ALIAS("platform:twl_reg");
fa16a5c1 1289
c4aa6f31
RN
1290static struct platform_driver twlreg_driver = {
1291 .probe = twlreg_probe,
1292 .remove = __devexit_p(twlreg_remove),
fa16a5c1 1293 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 1294 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 1295 */
2098e95c
RN
1296 .driver = {
1297 .name = "twl_reg",
1298 .owner = THIS_MODULE,
1299 .of_match_table = of_match_ptr(twl_of_match),
1300 },
fa16a5c1
DB
1301};
1302
c4aa6f31 1303static int __init twlreg_init(void)
fa16a5c1 1304{
c4aa6f31 1305 return platform_driver_register(&twlreg_driver);
fa16a5c1 1306}
c4aa6f31 1307subsys_initcall(twlreg_init);
fa16a5c1 1308
c4aa6f31 1309static void __exit twlreg_exit(void)
fa16a5c1 1310{
c4aa6f31 1311 platform_driver_unregister(&twlreg_driver);
fa16a5c1 1312}
c4aa6f31 1313module_exit(twlreg_exit)
fa16a5c1 1314
c4aa6f31 1315MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 1316MODULE_LICENSE("GPL");