regulator: twl: fix twl6030 enable/disable
[linux-2.6-block.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB
3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
53b8a9d9 15#include <linux/delay.h>
fa16a5c1
DB
16#include <linux/platform_device.h>
17#include <linux/regulator/driver.h>
18#include <linux/regulator/machine.h>
b07682b6 19#include <linux/i2c/twl.h>
fa16a5c1
DB
20
21
22/*
c4aa6f31 23 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB
24 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
25 * include an audio codec, battery charger, and more voltage regulators.
26 * These chips are often used in OMAP-based systems.
27 *
28 * This driver implements software-based resource control for various
29 * voltage regulators. This is usually augmented with state machine
30 * based control.
31 */
32
33struct twlreg_info {
34 /* start of regulator's PM_RECEIVER control register bank */
35 u8 base;
36
c4aa6f31 37 /* twl resource ID, for resource control state machine */
fa16a5c1
DB
38 u8 id;
39
40 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
41 u8 table_len;
42 const u16 *table;
43
045f972f
JKS
44 /* regulator specific turn-on delay */
45 u16 delay;
46
47 /* State REMAP default configuration */
48 u8 remap;
49
fa16a5c1
DB
50 /* chip constraints on regulator behavior */
51 u16 min_mV;
3e3d3be7 52 u16 max_mV;
fa16a5c1
DB
53
54 /* used by regulator core */
55 struct regulator_desc desc;
56};
57
58
59/* LDO control registers ... offset is from the base of its register bank.
60 * The first three registers of all power resource banks help hardware to
61 * manage the various resource groups.
62 */
441a4505 63/* Common offset in TWL4030/6030 */
fa16a5c1 64#define VREG_GRP 0
441a4505 65/* TWL4030 register offsets */
fa16a5c1
DB
66#define VREG_TYPE 1
67#define VREG_REMAP 2
68#define VREG_DEDICATED 3 /* LDO control */
441a4505
RN
69/* TWL6030 register offsets */
70#define VREG_TRANS 1
71#define VREG_STATE 2
72#define VREG_VOLTAGE 3
73/* TWL6030 Misc register offsets */
74#define VREG_BC_ALL 1
75#define VREG_BC_REF 2
76#define VREG_BC_PROC 3
77#define VREG_BC_CLK_RST 4
fa16a5c1 78
21657ebf
SH
79/* TWL6030 LDO register values for CFG_STATE */
80#define TWL6030_CFG_STATE_OFF 0x00
81#define TWL6030_CFG_STATE_ON 0x01
82#define TWL6030_CFG_STATE_GRP_SHIFT 5
83
fa16a5c1 84static inline int
441a4505 85twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB
86{
87 u8 value;
88 int status;
89
441a4505 90 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB
91 &value, info->base + offset);
92 return (status < 0) ? status : value;
93}
94
95static inline int
441a4505
RN
96twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
97 u8 value)
fa16a5c1 98{
441a4505 99 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB
100 value, info->base + offset);
101}
102
103/*----------------------------------------------------------------------*/
104
105/* generic power resource operations, which work on all regulators */
106
c4aa6f31 107static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 108{
441a4505
RN
109 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
110 VREG_GRP);
fa16a5c1
DB
111}
112
113/*
114 * Enable/disable regulators by joining/leaving the P1 (processor) group.
115 * We assume nobody else is updating the DEV_GRP registers.
116 */
441a4505
RN
117/* definition for 4030 family */
118#define P3_GRP_4030 BIT(7) /* "peripherals" */
119#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
120#define P1_GRP_4030 BIT(5) /* CPU/Linux */
121/* definition for 6030 family */
122#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
123#define P2_GRP_6030 BIT(1) /* "peripherals" */
124#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 125
c4aa6f31 126static int twlreg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 127{
c4aa6f31 128 int state = twlreg_grp(rdev);
fa16a5c1
DB
129
130 if (state < 0)
131 return state;
132
441a4505
RN
133 if (twl_class_is_4030())
134 state &= P1_GRP_4030;
135 else
136 state &= P1_GRP_6030;
137 return state;
fa16a5c1
DB
138}
139
c4aa6f31 140static int twlreg_enable(struct regulator_dev *rdev)
fa16a5c1
DB
141{
142 struct twlreg_info *info = rdev_get_drvdata(rdev);
143 int grp;
53b8a9d9 144 int ret;
fa16a5c1 145
441a4505 146 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB
147 if (grp < 0)
148 return grp;
149
441a4505
RN
150 if (twl_class_is_4030())
151 grp |= P1_GRP_4030;
152 else
153 grp |= P1_GRP_6030;
154
53b8a9d9
JKS
155 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
156
21657ebf
SH
157 if (!ret && twl_class_is_6030())
158 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
159 grp << TWL6030_CFG_STATE_GRP_SHIFT |
160 TWL6030_CFG_STATE_ON);
161
53b8a9d9
JKS
162 udelay(info->delay);
163
164 return ret;
fa16a5c1
DB
165}
166
c4aa6f31 167static int twlreg_disable(struct regulator_dev *rdev)
fa16a5c1
DB
168{
169 struct twlreg_info *info = rdev_get_drvdata(rdev);
170 int grp;
21657ebf 171 int ret;
fa16a5c1 172
441a4505 173 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB
174 if (grp < 0)
175 return grp;
176
21657ebf
SH
177 /* For 6030, set the off state for all grps enabled */
178 if (twl_class_is_6030()) {
179 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
180 (grp & (P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030)) <<
181 TWL6030_CFG_STATE_GRP_SHIFT |
182 TWL6030_CFG_STATE_OFF);
183 if (ret)
184 return ret;
185 }
186
441a4505 187 if (twl_class_is_4030())
cf9836f4 188 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 189 else
cf9836f4 190 grp &= ~(P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030);
441a4505 191
21657ebf
SH
192 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
193
194 /* Next, associate cleared grp in state register */
195 if (!ret && twl_class_is_6030())
196 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
197 grp << TWL6030_CFG_STATE_GRP_SHIFT |
198 TWL6030_CFG_STATE_OFF);
199
200 return ret;
fa16a5c1
DB
201}
202
c4aa6f31 203static int twlreg_get_status(struct regulator_dev *rdev)
fa16a5c1 204{
c4aa6f31 205 int state = twlreg_grp(rdev);
fa16a5c1 206
441a4505
RN
207 if (twl_class_is_6030())
208 return 0; /* FIXME return for 6030 regulator */
209
fa16a5c1
DB
210 if (state < 0)
211 return state;
212 state &= 0x0f;
213
214 /* assume state != WARM_RESET; we'd not be running... */
215 if (!state)
216 return REGULATOR_STATUS_OFF;
217 return (state & BIT(3))
218 ? REGULATOR_STATUS_NORMAL
219 : REGULATOR_STATUS_STANDBY;
220}
221
c4aa6f31 222static int twlreg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB
223{
224 struct twlreg_info *info = rdev_get_drvdata(rdev);
225 unsigned message;
226 int status;
227
441a4505
RN
228 if (twl_class_is_6030())
229 return 0; /* FIXME return for 6030 regulator */
230
fa16a5c1
DB
231 /* We can only set the mode through state machine commands... */
232 switch (mode) {
233 case REGULATOR_MODE_NORMAL:
234 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
235 break;
236 case REGULATOR_MODE_STANDBY:
237 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
238 break;
239 default:
240 return -EINVAL;
241 }
242
243 /* Ensure the resource is associated with some group */
c4aa6f31 244 status = twlreg_grp(rdev);
fa16a5c1
DB
245 if (status < 0)
246 return status;
441a4505 247 if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
fa16a5c1
DB
248 return -EACCES;
249
c4aa6f31 250 status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8
AL
251 message >> 8, TWL4030_PM_MASTER_PB_WORD_MSB);
252 if (status < 0)
fa16a5c1
DB
253 return status;
254
c4aa6f31 255 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8 256 message & 0xff, TWL4030_PM_MASTER_PB_WORD_LSB);
fa16a5c1
DB
257}
258
259/*----------------------------------------------------------------------*/
260
261/*
262 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
263 * select field in its control register. We use tables indexed by VSEL
264 * to record voltages in milliVolts. (Accuracy is about three percent.)
265 *
266 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
267 * currently handled by listing two slightly different VAUX2 regulators,
268 * only one of which will be configured.
269 *
270 * VSEL values documented as "TI cannot support these values" are flagged
271 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH
272 *
273 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
274 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1
DB
275 */
276#ifdef CONFIG_TWL4030_ALLOW_UNSUPPORTED
277#define UNSUP_MASK 0x0000
278#else
279#define UNSUP_MASK 0x8000
280#endif
281
282#define UNSUP(x) (UNSUP_MASK | (x))
283#define IS_UNSUP(x) (UNSUP_MASK & (x))
284#define LDO_MV(x) (~UNSUP_MASK & (x))
285
286
287static const u16 VAUX1_VSEL_table[] = {
288 UNSUP(1500), UNSUP(1800), 2500, 2800,
289 3000, 3000, 3000, 3000,
290};
291static const u16 VAUX2_4030_VSEL_table[] = {
292 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
293 1500, 1800, UNSUP(1850), 2500,
294 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
295 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
296};
297static const u16 VAUX2_VSEL_table[] = {
298 1700, 1700, 1900, 1300,
299 1500, 1800, 2000, 2500,
300 2100, 2800, 2200, 2300,
301 2400, 2400, 2400, 2400,
302};
303static const u16 VAUX3_VSEL_table[] = {
304 1500, 1800, 2500, 2800,
d6bb69cf 305 3000, 3000, 3000, 3000,
fa16a5c1
DB
306};
307static const u16 VAUX4_VSEL_table[] = {
308 700, 1000, 1200, UNSUP(1300),
309 1500, 1800, UNSUP(1850), 2500,
1897e742
DB
310 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
311 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB
312};
313static const u16 VMMC1_VSEL_table[] = {
314 1850, 2850, 3000, 3150,
315};
316static const u16 VMMC2_VSEL_table[] = {
317 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
318 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
319 2600, 2800, 2850, 3000,
320 3150, 3150, 3150, 3150,
321};
322static const u16 VPLL1_VSEL_table[] = {
323 1000, 1200, 1300, 1800,
324 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
325};
326static const u16 VPLL2_VSEL_table[] = {
327 700, 1000, 1200, 1300,
328 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
329 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
330 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
331};
332static const u16 VSIM_VSEL_table[] = {
333 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
334 2800, 3000, 3000, 3000,
335};
336static const u16 VDAC_VSEL_table[] = {
337 1200, 1300, 1800, 1800,
338};
07fc493f
JKS
339static const u16 VDD1_VSEL_table[] = {
340 800, 1450,
341};
342static const u16 VDD2_VSEL_table[] = {
343 800, 1450, 1500,
344};
345static const u16 VIO_VSEL_table[] = {
346 1800, 1850,
347};
348static const u16 VINTANA2_VSEL_table[] = {
349 2500, 2750,
350};
fa16a5c1 351
3e3d3be7 352static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
353{
354 struct twlreg_info *info = rdev_get_drvdata(rdev);
355 int mV = info->table[index];
356
357 return IS_UNSUP(mV) ? 0 : (LDO_MV(mV) * 1000);
358}
359
fa16a5c1 360static int
3a93f2a9
MB
361twl4030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
362 unsigned *selector)
fa16a5c1
DB
363{
364 struct twlreg_info *info = rdev_get_drvdata(rdev);
365 int vsel;
366
367 for (vsel = 0; vsel < info->table_len; vsel++) {
368 int mV = info->table[vsel];
369 int uV;
370
371 if (IS_UNSUP(mV))
372 continue;
373 uV = LDO_MV(mV) * 1000;
374
66b659e6
DB
375 /* REVISIT for VAUX2, first match may not be best/lowest */
376
fa16a5c1 377 /* use the first in-range value */
3a93f2a9
MB
378 if (min_uV <= uV && uV <= max_uV) {
379 *selector = vsel;
441a4505
RN
380 return twlreg_write(info, TWL_MODULE_PM_RECEIVER,
381 VREG_VOLTAGE, vsel);
3a93f2a9 382 }
fa16a5c1
DB
383 }
384
385 return -EDOM;
386}
387
3e3d3be7 388static int twl4030ldo_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
389{
390 struct twlreg_info *info = rdev_get_drvdata(rdev);
441a4505
RN
391 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
392 VREG_VOLTAGE);
fa16a5c1
DB
393
394 if (vsel < 0)
395 return vsel;
396
397 vsel &= info->table_len - 1;
398 return LDO_MV(info->table[vsel]) * 1000;
399}
400
3e3d3be7
RN
401static struct regulator_ops twl4030ldo_ops = {
402 .list_voltage = twl4030ldo_list_voltage,
66b659e6 403
3e3d3be7
RN
404 .set_voltage = twl4030ldo_set_voltage,
405 .get_voltage = twl4030ldo_get_voltage,
406
407 .enable = twlreg_enable,
408 .disable = twlreg_disable,
409 .is_enabled = twlreg_is_enabled,
410
411 .set_mode = twlreg_set_mode,
412
413 .get_status = twlreg_get_status,
414};
415
416static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
417{
418 struct twlreg_info *info = rdev_get_drvdata(rdev);
419
420 return ((info->min_mV + (index * 100)) * 1000);
421}
422
423static int
3a93f2a9
MB
424twl6030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
425 unsigned *selector)
3e3d3be7
RN
426{
427 struct twlreg_info *info = rdev_get_drvdata(rdev);
428 int vsel;
429
430 if ((min_uV/1000 < info->min_mV) || (max_uV/1000 > info->max_mV))
431 return -EDOM;
432
433 /*
434 * Use the below formula to calculate vsel
435 * mV = 1000mv + 100mv * (vsel - 1)
436 */
437 vsel = (min_uV/1000 - 1000)/100 + 1;
3a93f2a9 438 *selector = vsel;
3e3d3be7
RN
439 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, vsel);
440
441}
442
443static int twl6030ldo_get_voltage(struct regulator_dev *rdev)
444{
445 struct twlreg_info *info = rdev_get_drvdata(rdev);
446 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
447 VREG_VOLTAGE);
448
449 if (vsel < 0)
450 return vsel;
451
452 /*
453 * Use the below formula to calculate vsel
454 * mV = 1000mv + 100mv * (vsel - 1)
455 */
456 return (1000 + (100 * (vsel - 1))) * 1000;
457}
458
459static struct regulator_ops twl6030ldo_ops = {
460 .list_voltage = twl6030ldo_list_voltage,
461
462 .set_voltage = twl6030ldo_set_voltage,
463 .get_voltage = twl6030ldo_get_voltage,
fa16a5c1 464
c4aa6f31
RN
465 .enable = twlreg_enable,
466 .disable = twlreg_disable,
467 .is_enabled = twlreg_is_enabled,
fa16a5c1 468
c4aa6f31 469 .set_mode = twlreg_set_mode,
fa16a5c1 470
c4aa6f31 471 .get_status = twlreg_get_status,
fa16a5c1
DB
472};
473
474/*----------------------------------------------------------------------*/
475
476/*
477 * Fixed voltage LDOs don't have a VSEL field to update.
478 */
c4aa6f31 479static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
480{
481 struct twlreg_info *info = rdev_get_drvdata(rdev);
482
483 return info->min_mV * 1000;
484}
485
c4aa6f31 486static int twlfixed_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
487{
488 struct twlreg_info *info = rdev_get_drvdata(rdev);
489
490 return info->min_mV * 1000;
491}
492
c4aa6f31
RN
493static struct regulator_ops twlfixed_ops = {
494 .list_voltage = twlfixed_list_voltage,
66b659e6 495
c4aa6f31 496 .get_voltage = twlfixed_get_voltage,
fa16a5c1 497
c4aa6f31
RN
498 .enable = twlreg_enable,
499 .disable = twlreg_disable,
500 .is_enabled = twlreg_is_enabled,
fa16a5c1 501
c4aa6f31 502 .set_mode = twlreg_set_mode,
fa16a5c1 503
c4aa6f31 504 .get_status = twlreg_get_status,
fa16a5c1
DB
505};
506
8e6de4a3
B
507static struct regulator_ops twl6030_fixed_resource = {
508 .enable = twlreg_enable,
509 .disable = twlreg_disable,
510 .is_enabled = twlreg_is_enabled,
511 .get_status = twlreg_get_status,
512};
513
fa16a5c1
DB
514/*----------------------------------------------------------------------*/
515
045f972f
JKS
516#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
517 remap_conf) \
518 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
519 remap_conf, TWL4030)
045f972f
JKS
520#define TWL6030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
521 remap_conf) \
522 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
523 remap_conf, TWL6030)
524
3e3d3be7 525#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) { \
fa16a5c1
DB
526 .base = offset, \
527 .id = num, \
528 .table_len = ARRAY_SIZE(label##_VSEL_table), \
529 .table = label##_VSEL_table, \
045f972f
JKS
530 .delay = turnon_delay, \
531 .remap = remap_conf, \
fa16a5c1
DB
532 .desc = { \
533 .name = #label, \
3e3d3be7 534 .id = TWL4030_REG_##label, \
66b659e6 535 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN
536 .ops = &twl4030ldo_ops, \
537 .type = REGULATOR_VOLTAGE, \
538 .owner = THIS_MODULE, \
539 }, \
540 }
541
542#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts, num, \
543 remap_conf) { \
544 .base = offset, \
545 .id = num, \
546 .min_mV = min_mVolts, \
547 .max_mV = max_mVolts, \
548 .remap = remap_conf, \
549 .desc = { \
550 .name = #label, \
551 .id = TWL6030_REG_##label, \
552 .n_voltages = (max_mVolts - min_mVolts)/100, \
553 .ops = &twl6030ldo_ops, \
fa16a5c1
DB
554 .type = REGULATOR_VOLTAGE, \
555 .owner = THIS_MODULE, \
556 }, \
557 }
558
3e3d3be7 559
045f972f
JKS
560#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
561 family) { \
fa16a5c1
DB
562 .base = offset, \
563 .id = num, \
564 .min_mV = mVolts, \
045f972f
JKS
565 .delay = turnon_delay, \
566 .remap = remap_conf, \
fa16a5c1
DB
567 .desc = { \
568 .name = #label, \
c4aa6f31 569 .id = family##_REG_##label, \
66b659e6 570 .n_voltages = 1, \
c4aa6f31 571 .ops = &twlfixed_ops, \
fa16a5c1
DB
572 .type = REGULATOR_VOLTAGE, \
573 .owner = THIS_MODULE, \
574 }, \
575 }
576
8e6de4a3
B
577#define TWL6030_FIXED_RESOURCE(label, offset, num, turnon_delay, remap_conf) { \
578 .base = offset, \
579 .id = num, \
580 .delay = turnon_delay, \
581 .remap = remap_conf, \
582 .desc = { \
583 .name = #label, \
584 .id = TWL6030_REG_##label, \
585 .ops = &twl6030_fixed_resource, \
586 .type = REGULATOR_VOLTAGE, \
587 .owner = THIS_MODULE, \
588 }, \
589 }
590
fa16a5c1
DB
591/*
592 * We list regulators here if systems need some level of
593 * software control over them after boot.
594 */
c4aa6f31 595static struct twlreg_info twl_regs[] = {
045f972f
JKS
596 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08),
597 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08),
598 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08),
599 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08),
600 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08),
601 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08),
602 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08),
603 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00),
604 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08),
605 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00),
606 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08),
607 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08),
608 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08),
609 TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08),
610 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08),
611 TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15, 1000, 0x08),
612 TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16, 1000, 0x08),
613 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08),
614 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08),
615 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08),
fa16a5c1 616 /* VUSBCP is managed *only* by the USB subchip */
441a4505
RN
617
618 /* 6030 REG with base as PMC Slave Misc : 0x0030 */
045f972f
JKS
619 /* Turnon-delay and remap configuration values for 6030 are not
620 verified since the specification is not public */
3e3d3be7
RN
621 TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300, 1, 0x21),
622 TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300, 2, 0x21),
623 TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300, 3, 0x21),
624 TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300, 4, 0x21),
625 TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300, 5, 0x21),
626 TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300, 7, 0x21),
2ebcf632
RN
627 TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15, 0, 0x21),
628 TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16, 0, 0x21),
629 TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17, 0, 0x21),
8e6de4a3
B
630 TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18, 0, 0x21),
631 TWL6030_FIXED_RESOURCE(CLK32KG, 0x8C, 48, 0, 0x21),
fa16a5c1
DB
632};
633
24c29020 634static int __devinit twlreg_probe(struct platform_device *pdev)
fa16a5c1
DB
635{
636 int i;
637 struct twlreg_info *info;
638 struct regulator_init_data *initdata;
639 struct regulation_constraints *c;
640 struct regulator_dev *rdev;
fa16a5c1 641
c4aa6f31
RN
642 for (i = 0, info = NULL; i < ARRAY_SIZE(twl_regs); i++) {
643 if (twl_regs[i].desc.id != pdev->id)
fa16a5c1 644 continue;
c4aa6f31 645 info = twl_regs + i;
fa16a5c1
DB
646 break;
647 }
648 if (!info)
649 return -ENODEV;
650
651 initdata = pdev->dev.platform_data;
652 if (!initdata)
653 return -EINVAL;
654
655 /* Constrain board-specific capabilities according to what
656 * this driver and the chip itself can actually do.
657 */
658 c = &initdata->constraints;
fa16a5c1
DB
659 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
660 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
661 | REGULATOR_CHANGE_MODE
662 | REGULATOR_CHANGE_STATUS;
205e5cd3
JKS
663 switch (pdev->id) {
664 case TWL4030_REG_VIO:
665 case TWL4030_REG_VDD1:
666 case TWL4030_REG_VDD2:
667 case TWL4030_REG_VPLL1:
668 case TWL4030_REG_VINTANA1:
669 case TWL4030_REG_VINTANA2:
670 case TWL4030_REG_VINTDIG:
671 c->always_on = true;
672 break;
673 default:
674 break;
675 }
fa16a5c1
DB
676
677 rdev = regulator_register(&info->desc, &pdev->dev, initdata, info);
678 if (IS_ERR(rdev)) {
679 dev_err(&pdev->dev, "can't register %s, %ld\n",
680 info->desc.name, PTR_ERR(rdev));
681 return PTR_ERR(rdev);
682 }
683 platform_set_drvdata(pdev, rdev);
684
30010fa5
JKS
685 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
686 info->remap);
687
fa16a5c1
DB
688 /* NOTE: many regulators support short-circuit IRQs (presentable
689 * as REGULATOR_OVER_CURRENT notifications?) configured via:
690 * - SC_CONFIG
691 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
692 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
693 * - IT_CONFIG
694 */
695
696 return 0;
697}
698
c4aa6f31 699static int __devexit twlreg_remove(struct platform_device *pdev)
fa16a5c1
DB
700{
701 regulator_unregister(platform_get_drvdata(pdev));
702 return 0;
703}
704
c4aa6f31 705MODULE_ALIAS("platform:twl_reg");
fa16a5c1 706
c4aa6f31
RN
707static struct platform_driver twlreg_driver = {
708 .probe = twlreg_probe,
709 .remove = __devexit_p(twlreg_remove),
fa16a5c1 710 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 711 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 712 */
c4aa6f31 713 .driver.name = "twl_reg",
fa16a5c1
DB
714 .driver.owner = THIS_MODULE,
715};
716
c4aa6f31 717static int __init twlreg_init(void)
fa16a5c1 718{
c4aa6f31 719 return platform_driver_register(&twlreg_driver);
fa16a5c1 720}
c4aa6f31 721subsys_initcall(twlreg_init);
fa16a5c1 722
c4aa6f31 723static void __exit twlreg_exit(void)
fa16a5c1 724{
c4aa6f31 725 platform_driver_unregister(&twlreg_driver);
fa16a5c1 726}
c4aa6f31 727module_exit(twlreg_exit)
fa16a5c1 728
c4aa6f31 729MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 730MODULE_LICENSE("GPL");