twl-regulator: Add all twl4030 regulators to twlreg_info
[linux-block.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB
3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
15#include <linux/platform_device.h>
16#include <linux/regulator/driver.h>
17#include <linux/regulator/machine.h>
b07682b6 18#include <linux/i2c/twl.h>
fa16a5c1
DB
19
20
21/*
c4aa6f31 22 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB
23 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
24 * include an audio codec, battery charger, and more voltage regulators.
25 * These chips are often used in OMAP-based systems.
26 *
27 * This driver implements software-based resource control for various
28 * voltage regulators. This is usually augmented with state machine
29 * based control.
30 */
31
32struct twlreg_info {
33 /* start of regulator's PM_RECEIVER control register bank */
34 u8 base;
35
c4aa6f31 36 /* twl resource ID, for resource control state machine */
fa16a5c1
DB
37 u8 id;
38
39 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
40 u8 table_len;
41 const u16 *table;
42
43 /* chip constraints on regulator behavior */
44 u16 min_mV;
fa16a5c1
DB
45
46 /* used by regulator core */
47 struct regulator_desc desc;
48};
49
50
51/* LDO control registers ... offset is from the base of its register bank.
52 * The first three registers of all power resource banks help hardware to
53 * manage the various resource groups.
54 */
441a4505 55/* Common offset in TWL4030/6030 */
fa16a5c1 56#define VREG_GRP 0
441a4505 57/* TWL4030 register offsets */
fa16a5c1
DB
58#define VREG_TYPE 1
59#define VREG_REMAP 2
60#define VREG_DEDICATED 3 /* LDO control */
441a4505
RN
61/* TWL6030 register offsets */
62#define VREG_TRANS 1
63#define VREG_STATE 2
64#define VREG_VOLTAGE 3
65/* TWL6030 Misc register offsets */
66#define VREG_BC_ALL 1
67#define VREG_BC_REF 2
68#define VREG_BC_PROC 3
69#define VREG_BC_CLK_RST 4
fa16a5c1
DB
70
71static inline int
441a4505 72twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB
73{
74 u8 value;
75 int status;
76
441a4505 77 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB
78 &value, info->base + offset);
79 return (status < 0) ? status : value;
80}
81
82static inline int
441a4505
RN
83twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
84 u8 value)
fa16a5c1 85{
441a4505 86 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB
87 value, info->base + offset);
88}
89
90/*----------------------------------------------------------------------*/
91
92/* generic power resource operations, which work on all regulators */
93
c4aa6f31 94static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 95{
441a4505
RN
96 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
97 VREG_GRP);
fa16a5c1
DB
98}
99
100/*
101 * Enable/disable regulators by joining/leaving the P1 (processor) group.
102 * We assume nobody else is updating the DEV_GRP registers.
103 */
441a4505
RN
104/* definition for 4030 family */
105#define P3_GRP_4030 BIT(7) /* "peripherals" */
106#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
107#define P1_GRP_4030 BIT(5) /* CPU/Linux */
108/* definition for 6030 family */
109#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
110#define P2_GRP_6030 BIT(1) /* "peripherals" */
111#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 112
c4aa6f31 113static int twlreg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 114{
c4aa6f31 115 int state = twlreg_grp(rdev);
fa16a5c1
DB
116
117 if (state < 0)
118 return state;
119
441a4505
RN
120 if (twl_class_is_4030())
121 state &= P1_GRP_4030;
122 else
123 state &= P1_GRP_6030;
124 return state;
fa16a5c1
DB
125}
126
c4aa6f31 127static int twlreg_enable(struct regulator_dev *rdev)
fa16a5c1
DB
128{
129 struct twlreg_info *info = rdev_get_drvdata(rdev);
130 int grp;
131
441a4505 132 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB
133 if (grp < 0)
134 return grp;
135
441a4505
RN
136 if (twl_class_is_4030())
137 grp |= P1_GRP_4030;
138 else
139 grp |= P1_GRP_6030;
140
141 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
fa16a5c1
DB
142}
143
c4aa6f31 144static int twlreg_disable(struct regulator_dev *rdev)
fa16a5c1
DB
145{
146 struct twlreg_info *info = rdev_get_drvdata(rdev);
147 int grp;
148
441a4505 149 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB
150 if (grp < 0)
151 return grp;
152
441a4505
RN
153 if (twl_class_is_4030())
154 grp &= ~P1_GRP_4030;
155 else
156 grp &= ~P1_GRP_6030;
157
158 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
fa16a5c1
DB
159}
160
c4aa6f31 161static int twlreg_get_status(struct regulator_dev *rdev)
fa16a5c1 162{
c4aa6f31 163 int state = twlreg_grp(rdev);
fa16a5c1 164
441a4505
RN
165 if (twl_class_is_6030())
166 return 0; /* FIXME return for 6030 regulator */
167
fa16a5c1
DB
168 if (state < 0)
169 return state;
170 state &= 0x0f;
171
172 /* assume state != WARM_RESET; we'd not be running... */
173 if (!state)
174 return REGULATOR_STATUS_OFF;
175 return (state & BIT(3))
176 ? REGULATOR_STATUS_NORMAL
177 : REGULATOR_STATUS_STANDBY;
178}
179
c4aa6f31 180static int twlreg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB
181{
182 struct twlreg_info *info = rdev_get_drvdata(rdev);
183 unsigned message;
184 int status;
185
441a4505
RN
186 if (twl_class_is_6030())
187 return 0; /* FIXME return for 6030 regulator */
188
fa16a5c1
DB
189 /* We can only set the mode through state machine commands... */
190 switch (mode) {
191 case REGULATOR_MODE_NORMAL:
192 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
193 break;
194 case REGULATOR_MODE_STANDBY:
195 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
196 break;
197 default:
198 return -EINVAL;
199 }
200
201 /* Ensure the resource is associated with some group */
c4aa6f31 202 status = twlreg_grp(rdev);
fa16a5c1
DB
203 if (status < 0)
204 return status;
441a4505 205 if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
fa16a5c1
DB
206 return -EACCES;
207
c4aa6f31 208 status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
fa16a5c1
DB
209 message >> 8, 0x15 /* PB_WORD_MSB */ );
210 if (status >= 0)
211 return status;
212
c4aa6f31 213 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
fa16a5c1
DB
214 message, 0x16 /* PB_WORD_LSB */ );
215}
216
217/*----------------------------------------------------------------------*/
218
219/*
220 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
221 * select field in its control register. We use tables indexed by VSEL
222 * to record voltages in milliVolts. (Accuracy is about three percent.)
223 *
224 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
225 * currently handled by listing two slightly different VAUX2 regulators,
226 * only one of which will be configured.
227 *
228 * VSEL values documented as "TI cannot support these values" are flagged
229 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH
230 *
231 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
232 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1
DB
233 */
234#ifdef CONFIG_TWL4030_ALLOW_UNSUPPORTED
235#define UNSUP_MASK 0x0000
236#else
237#define UNSUP_MASK 0x8000
238#endif
239
240#define UNSUP(x) (UNSUP_MASK | (x))
241#define IS_UNSUP(x) (UNSUP_MASK & (x))
242#define LDO_MV(x) (~UNSUP_MASK & (x))
243
244
245static const u16 VAUX1_VSEL_table[] = {
246 UNSUP(1500), UNSUP(1800), 2500, 2800,
247 3000, 3000, 3000, 3000,
248};
249static const u16 VAUX2_4030_VSEL_table[] = {
250 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
251 1500, 1800, UNSUP(1850), 2500,
252 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
253 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
254};
255static const u16 VAUX2_VSEL_table[] = {
256 1700, 1700, 1900, 1300,
257 1500, 1800, 2000, 2500,
258 2100, 2800, 2200, 2300,
259 2400, 2400, 2400, 2400,
260};
261static const u16 VAUX3_VSEL_table[] = {
262 1500, 1800, 2500, 2800,
d6bb69cf 263 3000, 3000, 3000, 3000,
fa16a5c1
DB
264};
265static const u16 VAUX4_VSEL_table[] = {
266 700, 1000, 1200, UNSUP(1300),
267 1500, 1800, UNSUP(1850), 2500,
1897e742
DB
268 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
269 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB
270};
271static const u16 VMMC1_VSEL_table[] = {
272 1850, 2850, 3000, 3150,
273};
274static const u16 VMMC2_VSEL_table[] = {
275 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
276 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
277 2600, 2800, 2850, 3000,
278 3150, 3150, 3150, 3150,
279};
280static const u16 VPLL1_VSEL_table[] = {
281 1000, 1200, 1300, 1800,
282 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
283};
284static const u16 VPLL2_VSEL_table[] = {
285 700, 1000, 1200, 1300,
286 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
287 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
288 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
289};
290static const u16 VSIM_VSEL_table[] = {
291 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
292 2800, 3000, 3000, 3000,
293};
294static const u16 VDAC_VSEL_table[] = {
295 1200, 1300, 1800, 1800,
296};
07fc493f
JKS
297static const u16 VDD1_VSEL_table[] = {
298 800, 1450,
299};
300static const u16 VDD2_VSEL_table[] = {
301 800, 1450, 1500,
302};
303static const u16 VIO_VSEL_table[] = {
304 1800, 1850,
305};
306static const u16 VINTANA2_VSEL_table[] = {
307 2500, 2750,
308};
441a4505
RN
309static const u16 VAUX1_6030_VSEL_table[] = {
310 1000, 1300, 1800, 2500,
311 2800, 2900, 3000, 3000,
312};
313static const u16 VAUX2_6030_VSEL_table[] = {
314 1200, 1800, 2500, 2750,
315 2800, 2800, 2800, 2800,
316};
317static const u16 VAUX3_6030_VSEL_table[] = {
318 1000, 1200, 1300, 1800,
319 2500, 2800, 3000, 3000,
320};
321static const u16 VMMC_VSEL_table[] = {
322 1200, 1800, 2800, 2900,
323 3000, 3000, 3000, 3000,
324};
325static const u16 VPP_VSEL_table[] = {
326 1800, 1900, 2000, 2100,
327 2200, 2300, 2400, 2500,
328};
329static const u16 VUSIM_VSEL_table[] = {
330 1200, 1800, 2500, 2900,
331};
fa16a5c1 332
c4aa6f31 333static int twlldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
334{
335 struct twlreg_info *info = rdev_get_drvdata(rdev);
336 int mV = info->table[index];
337
338 return IS_UNSUP(mV) ? 0 : (LDO_MV(mV) * 1000);
339}
340
fa16a5c1 341static int
c4aa6f31 342twlldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV)
fa16a5c1
DB
343{
344 struct twlreg_info *info = rdev_get_drvdata(rdev);
345 int vsel;
346
347 for (vsel = 0; vsel < info->table_len; vsel++) {
348 int mV = info->table[vsel];
349 int uV;
350
351 if (IS_UNSUP(mV))
352 continue;
353 uV = LDO_MV(mV) * 1000;
354
66b659e6
DB
355 /* REVISIT for VAUX2, first match may not be best/lowest */
356
fa16a5c1
DB
357 /* use the first in-range value */
358 if (min_uV <= uV && uV <= max_uV)
441a4505
RN
359 return twlreg_write(info, TWL_MODULE_PM_RECEIVER,
360 VREG_VOLTAGE, vsel);
fa16a5c1
DB
361 }
362
363 return -EDOM;
364}
365
c4aa6f31 366static int twlldo_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
367{
368 struct twlreg_info *info = rdev_get_drvdata(rdev);
441a4505
RN
369 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
370 VREG_VOLTAGE);
fa16a5c1
DB
371
372 if (vsel < 0)
373 return vsel;
374
375 vsel &= info->table_len - 1;
376 return LDO_MV(info->table[vsel]) * 1000;
377}
378
c4aa6f31
RN
379static struct regulator_ops twlldo_ops = {
380 .list_voltage = twlldo_list_voltage,
66b659e6 381
c4aa6f31
RN
382 .set_voltage = twlldo_set_voltage,
383 .get_voltage = twlldo_get_voltage,
fa16a5c1 384
c4aa6f31
RN
385 .enable = twlreg_enable,
386 .disable = twlreg_disable,
387 .is_enabled = twlreg_is_enabled,
fa16a5c1 388
c4aa6f31 389 .set_mode = twlreg_set_mode,
fa16a5c1 390
c4aa6f31 391 .get_status = twlreg_get_status,
fa16a5c1
DB
392};
393
394/*----------------------------------------------------------------------*/
395
396/*
397 * Fixed voltage LDOs don't have a VSEL field to update.
398 */
c4aa6f31 399static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
400{
401 struct twlreg_info *info = rdev_get_drvdata(rdev);
402
403 return info->min_mV * 1000;
404}
405
c4aa6f31 406static int twlfixed_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
407{
408 struct twlreg_info *info = rdev_get_drvdata(rdev);
409
410 return info->min_mV * 1000;
411}
412
c4aa6f31
RN
413static struct regulator_ops twlfixed_ops = {
414 .list_voltage = twlfixed_list_voltage,
66b659e6 415
c4aa6f31 416 .get_voltage = twlfixed_get_voltage,
fa16a5c1 417
c4aa6f31
RN
418 .enable = twlreg_enable,
419 .disable = twlreg_disable,
420 .is_enabled = twlreg_is_enabled,
fa16a5c1 421
c4aa6f31 422 .set_mode = twlreg_set_mode,
fa16a5c1 423
c4aa6f31 424 .get_status = twlreg_get_status,
fa16a5c1
DB
425};
426
427/*----------------------------------------------------------------------*/
428
c4aa6f31
RN
429#define TWL4030_ADJUSTABLE_LDO(label, offset, num) \
430 TWL_ADJUSTABLE_LDO(label, offset, num, TWL4030)
431#define TWL4030_FIXED_LDO(label, offset, mVolts, num) \
432 TWL_FIXED_LDO(label, offset, mVolts, num, TWL4030)
441a4505
RN
433#define TWL6030_ADJUSTABLE_LDO(label, offset, num) \
434 TWL_ADJUSTABLE_LDO(label, offset, num, TWL6030)
435#define TWL6030_FIXED_LDO(label, offset, mVolts, num) \
436 TWL_FIXED_LDO(label, offset, mVolts, num, TWL6030)
c4aa6f31
RN
437
438#define TWL_ADJUSTABLE_LDO(label, offset, num, family) { \
fa16a5c1
DB
439 .base = offset, \
440 .id = num, \
441 .table_len = ARRAY_SIZE(label##_VSEL_table), \
442 .table = label##_VSEL_table, \
443 .desc = { \
444 .name = #label, \
c4aa6f31 445 .id = family##_REG_##label, \
66b659e6 446 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
c4aa6f31 447 .ops = &twlldo_ops, \
fa16a5c1
DB
448 .type = REGULATOR_VOLTAGE, \
449 .owner = THIS_MODULE, \
450 }, \
451 }
452
c4aa6f31 453#define TWL_FIXED_LDO(label, offset, mVolts, num, family) { \
fa16a5c1
DB
454 .base = offset, \
455 .id = num, \
456 .min_mV = mVolts, \
fa16a5c1
DB
457 .desc = { \
458 .name = #label, \
c4aa6f31 459 .id = family##_REG_##label, \
66b659e6 460 .n_voltages = 1, \
c4aa6f31 461 .ops = &twlfixed_ops, \
fa16a5c1
DB
462 .type = REGULATOR_VOLTAGE, \
463 .owner = THIS_MODULE, \
464 }, \
465 }
466
467/*
468 * We list regulators here if systems need some level of
469 * software control over them after boot.
470 */
c4aa6f31
RN
471static struct twlreg_info twl_regs[] = {
472 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1),
473 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2),
474 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2),
475 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3),
476 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4),
477 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5),
478 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6),
c4aa6f31 479 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7),
c4aa6f31
RN
480 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8),
481 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9),
482 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10),
07fc493f 483 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 11),
c4aa6f31 484 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12),
07fc493f
JKS
485 TWL4030_FIXED_LDO(VINTDIG, 0x47, 13),
486 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14),
487 TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15),
488 TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16),
c4aa6f31
RN
489 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17),
490 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18),
491 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19),
fa16a5c1 492 /* VUSBCP is managed *only* by the USB subchip */
441a4505
RN
493
494 /* 6030 REG with base as PMC Slave Misc : 0x0030 */
495 TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1),
496 TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2),
497 TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3),
498 TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4),
499 TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5),
500 TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7),
501 TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15),
502 TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16),
503 TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17),
504 TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18)
fa16a5c1
DB
505};
506
c4aa6f31 507static int twlreg_probe(struct platform_device *pdev)
fa16a5c1
DB
508{
509 int i;
510 struct twlreg_info *info;
511 struct regulator_init_data *initdata;
512 struct regulation_constraints *c;
513 struct regulator_dev *rdev;
fa16a5c1 514
c4aa6f31
RN
515 for (i = 0, info = NULL; i < ARRAY_SIZE(twl_regs); i++) {
516 if (twl_regs[i].desc.id != pdev->id)
fa16a5c1 517 continue;
c4aa6f31 518 info = twl_regs + i;
fa16a5c1
DB
519 break;
520 }
521 if (!info)
522 return -ENODEV;
523
524 initdata = pdev->dev.platform_data;
525 if (!initdata)
526 return -EINVAL;
527
528 /* Constrain board-specific capabilities according to what
529 * this driver and the chip itself can actually do.
530 */
531 c = &initdata->constraints;
fa16a5c1
DB
532 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
533 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
534 | REGULATOR_CHANGE_MODE
535 | REGULATOR_CHANGE_STATUS;
536
537 rdev = regulator_register(&info->desc, &pdev->dev, initdata, info);
538 if (IS_ERR(rdev)) {
539 dev_err(&pdev->dev, "can't register %s, %ld\n",
540 info->desc.name, PTR_ERR(rdev));
541 return PTR_ERR(rdev);
542 }
543 platform_set_drvdata(pdev, rdev);
544
545 /* NOTE: many regulators support short-circuit IRQs (presentable
546 * as REGULATOR_OVER_CURRENT notifications?) configured via:
547 * - SC_CONFIG
548 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
549 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
550 * - IT_CONFIG
551 */
552
553 return 0;
554}
555
c4aa6f31 556static int __devexit twlreg_remove(struct platform_device *pdev)
fa16a5c1
DB
557{
558 regulator_unregister(platform_get_drvdata(pdev));
559 return 0;
560}
561
c4aa6f31 562MODULE_ALIAS("platform:twl_reg");
fa16a5c1 563
c4aa6f31
RN
564static struct platform_driver twlreg_driver = {
565 .probe = twlreg_probe,
566 .remove = __devexit_p(twlreg_remove),
fa16a5c1 567 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 568 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 569 */
c4aa6f31 570 .driver.name = "twl_reg",
fa16a5c1
DB
571 .driver.owner = THIS_MODULE,
572};
573
c4aa6f31 574static int __init twlreg_init(void)
fa16a5c1 575{
c4aa6f31 576 return platform_driver_register(&twlreg_driver);
fa16a5c1 577}
c4aa6f31 578subsys_initcall(twlreg_init);
fa16a5c1 579
c4aa6f31 580static void __exit twlreg_exit(void)
fa16a5c1 581{
c4aa6f31 582 platform_driver_unregister(&twlreg_driver);
fa16a5c1 583}
c4aa6f31 584module_exit(twlreg_exit)
fa16a5c1 585
c4aa6f31 586MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 587MODULE_LICENSE("GPL");