Commit | Line | Data |
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fa16a5c1 | 1 | /* |
c4aa6f31 | 2 | * twl-regulator.c -- support regulators in twl4030/twl6030 family chips |
fa16a5c1 DB |
3 | * |
4 | * Copyright (C) 2008 David Brownell | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/err.h> | |
53b8a9d9 | 15 | #include <linux/delay.h> |
fa16a5c1 DB |
16 | #include <linux/platform_device.h> |
17 | #include <linux/regulator/driver.h> | |
18 | #include <linux/regulator/machine.h> | |
b07682b6 | 19 | #include <linux/i2c/twl.h> |
fa16a5c1 DB |
20 | |
21 | ||
22 | /* | |
c4aa6f31 | 23 | * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a |
fa16a5c1 DB |
24 | * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions |
25 | * include an audio codec, battery charger, and more voltage regulators. | |
26 | * These chips are often used in OMAP-based systems. | |
27 | * | |
28 | * This driver implements software-based resource control for various | |
29 | * voltage regulators. This is usually augmented with state machine | |
30 | * based control. | |
31 | */ | |
32 | ||
33 | struct twlreg_info { | |
34 | /* start of regulator's PM_RECEIVER control register bank */ | |
35 | u8 base; | |
36 | ||
c4aa6f31 | 37 | /* twl resource ID, for resource control state machine */ |
fa16a5c1 DB |
38 | u8 id; |
39 | ||
40 | /* voltage in mV = table[VSEL]; table_len must be a power-of-two */ | |
41 | u8 table_len; | |
42 | const u16 *table; | |
43 | ||
045f972f JKS |
44 | /* regulator specific turn-on delay */ |
45 | u16 delay; | |
46 | ||
47 | /* State REMAP default configuration */ | |
48 | u8 remap; | |
49 | ||
fa16a5c1 DB |
50 | /* chip constraints on regulator behavior */ |
51 | u16 min_mV; | |
fa16a5c1 DB |
52 | |
53 | /* used by regulator core */ | |
54 | struct regulator_desc desc; | |
55 | }; | |
56 | ||
57 | ||
58 | /* LDO control registers ... offset is from the base of its register bank. | |
59 | * The first three registers of all power resource banks help hardware to | |
60 | * manage the various resource groups. | |
61 | */ | |
441a4505 | 62 | /* Common offset in TWL4030/6030 */ |
fa16a5c1 | 63 | #define VREG_GRP 0 |
441a4505 | 64 | /* TWL4030 register offsets */ |
fa16a5c1 DB |
65 | #define VREG_TYPE 1 |
66 | #define VREG_REMAP 2 | |
67 | #define VREG_DEDICATED 3 /* LDO control */ | |
441a4505 RN |
68 | /* TWL6030 register offsets */ |
69 | #define VREG_TRANS 1 | |
70 | #define VREG_STATE 2 | |
71 | #define VREG_VOLTAGE 3 | |
72 | /* TWL6030 Misc register offsets */ | |
73 | #define VREG_BC_ALL 1 | |
74 | #define VREG_BC_REF 2 | |
75 | #define VREG_BC_PROC 3 | |
76 | #define VREG_BC_CLK_RST 4 | |
fa16a5c1 DB |
77 | |
78 | static inline int | |
441a4505 | 79 | twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset) |
fa16a5c1 DB |
80 | { |
81 | u8 value; | |
82 | int status; | |
83 | ||
441a4505 | 84 | status = twl_i2c_read_u8(slave_subgp, |
fa16a5c1 DB |
85 | &value, info->base + offset); |
86 | return (status < 0) ? status : value; | |
87 | } | |
88 | ||
89 | static inline int | |
441a4505 RN |
90 | twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset, |
91 | u8 value) | |
fa16a5c1 | 92 | { |
441a4505 | 93 | return twl_i2c_write_u8(slave_subgp, |
fa16a5c1 DB |
94 | value, info->base + offset); |
95 | } | |
96 | ||
97 | /*----------------------------------------------------------------------*/ | |
98 | ||
99 | /* generic power resource operations, which work on all regulators */ | |
100 | ||
c4aa6f31 | 101 | static int twlreg_grp(struct regulator_dev *rdev) |
fa16a5c1 | 102 | { |
441a4505 RN |
103 | return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER, |
104 | VREG_GRP); | |
fa16a5c1 DB |
105 | } |
106 | ||
107 | /* | |
108 | * Enable/disable regulators by joining/leaving the P1 (processor) group. | |
109 | * We assume nobody else is updating the DEV_GRP registers. | |
110 | */ | |
441a4505 RN |
111 | /* definition for 4030 family */ |
112 | #define P3_GRP_4030 BIT(7) /* "peripherals" */ | |
113 | #define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */ | |
114 | #define P1_GRP_4030 BIT(5) /* CPU/Linux */ | |
115 | /* definition for 6030 family */ | |
116 | #define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */ | |
117 | #define P2_GRP_6030 BIT(1) /* "peripherals" */ | |
118 | #define P1_GRP_6030 BIT(0) /* CPU/Linux */ | |
fa16a5c1 | 119 | |
c4aa6f31 | 120 | static int twlreg_is_enabled(struct regulator_dev *rdev) |
fa16a5c1 | 121 | { |
c4aa6f31 | 122 | int state = twlreg_grp(rdev); |
fa16a5c1 DB |
123 | |
124 | if (state < 0) | |
125 | return state; | |
126 | ||
441a4505 RN |
127 | if (twl_class_is_4030()) |
128 | state &= P1_GRP_4030; | |
129 | else | |
130 | state &= P1_GRP_6030; | |
131 | return state; | |
fa16a5c1 DB |
132 | } |
133 | ||
c4aa6f31 | 134 | static int twlreg_enable(struct regulator_dev *rdev) |
fa16a5c1 DB |
135 | { |
136 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
137 | int grp; | |
53b8a9d9 | 138 | int ret; |
fa16a5c1 | 139 | |
441a4505 | 140 | grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP); |
fa16a5c1 DB |
141 | if (grp < 0) |
142 | return grp; | |
143 | ||
441a4505 RN |
144 | if (twl_class_is_4030()) |
145 | grp |= P1_GRP_4030; | |
146 | else | |
147 | grp |= P1_GRP_6030; | |
148 | ||
53b8a9d9 JKS |
149 | ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); |
150 | ||
151 | udelay(info->delay); | |
152 | ||
153 | return ret; | |
fa16a5c1 DB |
154 | } |
155 | ||
c4aa6f31 | 156 | static int twlreg_disable(struct regulator_dev *rdev) |
fa16a5c1 DB |
157 | { |
158 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
159 | int grp; | |
160 | ||
441a4505 | 161 | grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP); |
fa16a5c1 DB |
162 | if (grp < 0) |
163 | return grp; | |
164 | ||
441a4505 | 165 | if (twl_class_is_4030()) |
cf9836f4 | 166 | grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030); |
441a4505 | 167 | else |
cf9836f4 | 168 | grp &= ~(P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030); |
441a4505 RN |
169 | |
170 | return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); | |
fa16a5c1 DB |
171 | } |
172 | ||
c4aa6f31 | 173 | static int twlreg_get_status(struct regulator_dev *rdev) |
fa16a5c1 | 174 | { |
c4aa6f31 | 175 | int state = twlreg_grp(rdev); |
fa16a5c1 | 176 | |
441a4505 RN |
177 | if (twl_class_is_6030()) |
178 | return 0; /* FIXME return for 6030 regulator */ | |
179 | ||
fa16a5c1 DB |
180 | if (state < 0) |
181 | return state; | |
182 | state &= 0x0f; | |
183 | ||
184 | /* assume state != WARM_RESET; we'd not be running... */ | |
185 | if (!state) | |
186 | return REGULATOR_STATUS_OFF; | |
187 | return (state & BIT(3)) | |
188 | ? REGULATOR_STATUS_NORMAL | |
189 | : REGULATOR_STATUS_STANDBY; | |
190 | } | |
191 | ||
c4aa6f31 | 192 | static int twlreg_set_mode(struct regulator_dev *rdev, unsigned mode) |
fa16a5c1 DB |
193 | { |
194 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
195 | unsigned message; | |
196 | int status; | |
197 | ||
441a4505 RN |
198 | if (twl_class_is_6030()) |
199 | return 0; /* FIXME return for 6030 regulator */ | |
200 | ||
fa16a5c1 DB |
201 | /* We can only set the mode through state machine commands... */ |
202 | switch (mode) { | |
203 | case REGULATOR_MODE_NORMAL: | |
204 | message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE); | |
205 | break; | |
206 | case REGULATOR_MODE_STANDBY: | |
207 | message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP); | |
208 | break; | |
209 | default: | |
210 | return -EINVAL; | |
211 | } | |
212 | ||
213 | /* Ensure the resource is associated with some group */ | |
c4aa6f31 | 214 | status = twlreg_grp(rdev); |
fa16a5c1 DB |
215 | if (status < 0) |
216 | return status; | |
441a4505 | 217 | if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030))) |
fa16a5c1 DB |
218 | return -EACCES; |
219 | ||
c4aa6f31 | 220 | status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, |
fa16a5c1 DB |
221 | message >> 8, 0x15 /* PB_WORD_MSB */ ); |
222 | if (status >= 0) | |
223 | return status; | |
224 | ||
c4aa6f31 | 225 | return twl_i2c_write_u8(TWL_MODULE_PM_MASTER, |
fa16a5c1 DB |
226 | message, 0x16 /* PB_WORD_LSB */ ); |
227 | } | |
228 | ||
229 | /*----------------------------------------------------------------------*/ | |
230 | ||
231 | /* | |
232 | * Support for adjustable-voltage LDOs uses a four bit (or less) voltage | |
233 | * select field in its control register. We use tables indexed by VSEL | |
234 | * to record voltages in milliVolts. (Accuracy is about three percent.) | |
235 | * | |
236 | * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon; | |
237 | * currently handled by listing two slightly different VAUX2 regulators, | |
238 | * only one of which will be configured. | |
239 | * | |
240 | * VSEL values documented as "TI cannot support these values" are flagged | |
241 | * in these tables as UNSUP() values; we normally won't assign them. | |
d6bb69cf AH |
242 | * |
243 | * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported. | |
244 | * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting. | |
fa16a5c1 DB |
245 | */ |
246 | #ifdef CONFIG_TWL4030_ALLOW_UNSUPPORTED | |
247 | #define UNSUP_MASK 0x0000 | |
248 | #else | |
249 | #define UNSUP_MASK 0x8000 | |
250 | #endif | |
251 | ||
252 | #define UNSUP(x) (UNSUP_MASK | (x)) | |
253 | #define IS_UNSUP(x) (UNSUP_MASK & (x)) | |
254 | #define LDO_MV(x) (~UNSUP_MASK & (x)) | |
255 | ||
256 | ||
257 | static const u16 VAUX1_VSEL_table[] = { | |
258 | UNSUP(1500), UNSUP(1800), 2500, 2800, | |
259 | 3000, 3000, 3000, 3000, | |
260 | }; | |
261 | static const u16 VAUX2_4030_VSEL_table[] = { | |
262 | UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300, | |
263 | 1500, 1800, UNSUP(1850), 2500, | |
264 | UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000), | |
265 | UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), | |
266 | }; | |
267 | static const u16 VAUX2_VSEL_table[] = { | |
268 | 1700, 1700, 1900, 1300, | |
269 | 1500, 1800, 2000, 2500, | |
270 | 2100, 2800, 2200, 2300, | |
271 | 2400, 2400, 2400, 2400, | |
272 | }; | |
273 | static const u16 VAUX3_VSEL_table[] = { | |
274 | 1500, 1800, 2500, 2800, | |
d6bb69cf | 275 | 3000, 3000, 3000, 3000, |
fa16a5c1 DB |
276 | }; |
277 | static const u16 VAUX4_VSEL_table[] = { | |
278 | 700, 1000, 1200, UNSUP(1300), | |
279 | 1500, 1800, UNSUP(1850), 2500, | |
1897e742 DB |
280 | UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000), |
281 | UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), | |
fa16a5c1 DB |
282 | }; |
283 | static const u16 VMMC1_VSEL_table[] = { | |
284 | 1850, 2850, 3000, 3150, | |
285 | }; | |
286 | static const u16 VMMC2_VSEL_table[] = { | |
287 | UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300), | |
288 | UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500), | |
289 | 2600, 2800, 2850, 3000, | |
290 | 3150, 3150, 3150, 3150, | |
291 | }; | |
292 | static const u16 VPLL1_VSEL_table[] = { | |
293 | 1000, 1200, 1300, 1800, | |
294 | UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000), | |
295 | }; | |
296 | static const u16 VPLL2_VSEL_table[] = { | |
297 | 700, 1000, 1200, 1300, | |
298 | UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500), | |
299 | UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000), | |
300 | UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), | |
301 | }; | |
302 | static const u16 VSIM_VSEL_table[] = { | |
303 | UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800, | |
304 | 2800, 3000, 3000, 3000, | |
305 | }; | |
306 | static const u16 VDAC_VSEL_table[] = { | |
307 | 1200, 1300, 1800, 1800, | |
308 | }; | |
07fc493f JKS |
309 | static const u16 VDD1_VSEL_table[] = { |
310 | 800, 1450, | |
311 | }; | |
312 | static const u16 VDD2_VSEL_table[] = { | |
313 | 800, 1450, 1500, | |
314 | }; | |
315 | static const u16 VIO_VSEL_table[] = { | |
316 | 1800, 1850, | |
317 | }; | |
318 | static const u16 VINTANA2_VSEL_table[] = { | |
319 | 2500, 2750, | |
320 | }; | |
441a4505 RN |
321 | static const u16 VAUX1_6030_VSEL_table[] = { |
322 | 1000, 1300, 1800, 2500, | |
323 | 2800, 2900, 3000, 3000, | |
324 | }; | |
325 | static const u16 VAUX2_6030_VSEL_table[] = { | |
326 | 1200, 1800, 2500, 2750, | |
327 | 2800, 2800, 2800, 2800, | |
328 | }; | |
329 | static const u16 VAUX3_6030_VSEL_table[] = { | |
330 | 1000, 1200, 1300, 1800, | |
331 | 2500, 2800, 3000, 3000, | |
332 | }; | |
333 | static const u16 VMMC_VSEL_table[] = { | |
334 | 1200, 1800, 2800, 2900, | |
335 | 3000, 3000, 3000, 3000, | |
336 | }; | |
337 | static const u16 VPP_VSEL_table[] = { | |
338 | 1800, 1900, 2000, 2100, | |
339 | 2200, 2300, 2400, 2500, | |
340 | }; | |
341 | static const u16 VUSIM_VSEL_table[] = { | |
342 | 1200, 1800, 2500, 2900, | |
343 | }; | |
fa16a5c1 | 344 | |
c4aa6f31 | 345 | static int twlldo_list_voltage(struct regulator_dev *rdev, unsigned index) |
66b659e6 DB |
346 | { |
347 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
348 | int mV = info->table[index]; | |
349 | ||
350 | return IS_UNSUP(mV) ? 0 : (LDO_MV(mV) * 1000); | |
351 | } | |
352 | ||
fa16a5c1 | 353 | static int |
c4aa6f31 | 354 | twlldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV) |
fa16a5c1 DB |
355 | { |
356 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
357 | int vsel; | |
358 | ||
359 | for (vsel = 0; vsel < info->table_len; vsel++) { | |
360 | int mV = info->table[vsel]; | |
361 | int uV; | |
362 | ||
363 | if (IS_UNSUP(mV)) | |
364 | continue; | |
365 | uV = LDO_MV(mV) * 1000; | |
366 | ||
66b659e6 DB |
367 | /* REVISIT for VAUX2, first match may not be best/lowest */ |
368 | ||
fa16a5c1 DB |
369 | /* use the first in-range value */ |
370 | if (min_uV <= uV && uV <= max_uV) | |
441a4505 RN |
371 | return twlreg_write(info, TWL_MODULE_PM_RECEIVER, |
372 | VREG_VOLTAGE, vsel); | |
fa16a5c1 DB |
373 | } |
374 | ||
375 | return -EDOM; | |
376 | } | |
377 | ||
c4aa6f31 | 378 | static int twlldo_get_voltage(struct regulator_dev *rdev) |
fa16a5c1 DB |
379 | { |
380 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
441a4505 RN |
381 | int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, |
382 | VREG_VOLTAGE); | |
fa16a5c1 DB |
383 | |
384 | if (vsel < 0) | |
385 | return vsel; | |
386 | ||
387 | vsel &= info->table_len - 1; | |
388 | return LDO_MV(info->table[vsel]) * 1000; | |
389 | } | |
390 | ||
c4aa6f31 RN |
391 | static struct regulator_ops twlldo_ops = { |
392 | .list_voltage = twlldo_list_voltage, | |
66b659e6 | 393 | |
c4aa6f31 RN |
394 | .set_voltage = twlldo_set_voltage, |
395 | .get_voltage = twlldo_get_voltage, | |
fa16a5c1 | 396 | |
c4aa6f31 RN |
397 | .enable = twlreg_enable, |
398 | .disable = twlreg_disable, | |
399 | .is_enabled = twlreg_is_enabled, | |
fa16a5c1 | 400 | |
c4aa6f31 | 401 | .set_mode = twlreg_set_mode, |
fa16a5c1 | 402 | |
c4aa6f31 | 403 | .get_status = twlreg_get_status, |
fa16a5c1 DB |
404 | }; |
405 | ||
406 | /*----------------------------------------------------------------------*/ | |
407 | ||
408 | /* | |
409 | * Fixed voltage LDOs don't have a VSEL field to update. | |
410 | */ | |
c4aa6f31 | 411 | static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index) |
66b659e6 DB |
412 | { |
413 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
414 | ||
415 | return info->min_mV * 1000; | |
416 | } | |
417 | ||
c4aa6f31 | 418 | static int twlfixed_get_voltage(struct regulator_dev *rdev) |
fa16a5c1 DB |
419 | { |
420 | struct twlreg_info *info = rdev_get_drvdata(rdev); | |
421 | ||
422 | return info->min_mV * 1000; | |
423 | } | |
424 | ||
c4aa6f31 RN |
425 | static struct regulator_ops twlfixed_ops = { |
426 | .list_voltage = twlfixed_list_voltage, | |
66b659e6 | 427 | |
c4aa6f31 | 428 | .get_voltage = twlfixed_get_voltage, |
fa16a5c1 | 429 | |
c4aa6f31 RN |
430 | .enable = twlreg_enable, |
431 | .disable = twlreg_disable, | |
432 | .is_enabled = twlreg_is_enabled, | |
fa16a5c1 | 433 | |
c4aa6f31 | 434 | .set_mode = twlreg_set_mode, |
fa16a5c1 | 435 | |
c4aa6f31 | 436 | .get_status = twlreg_get_status, |
fa16a5c1 DB |
437 | }; |
438 | ||
439 | /*----------------------------------------------------------------------*/ | |
440 | ||
045f972f JKS |
441 | #define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \ |
442 | TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \ | |
443 | remap_conf, TWL4030) | |
444 | #define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ | |
445 | remap_conf) \ | |
446 | TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ | |
447 | remap_conf, TWL4030) | |
448 | #define TWL6030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \ | |
449 | remap_conf) \ | |
450 | TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \ | |
451 | remap_conf, TWL6030) | |
452 | #define TWL6030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ | |
453 | remap_conf) \ | |
454 | TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ | |
455 | remap_conf, TWL6030) | |
456 | ||
457 | #define TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf, \ | |
458 | family) { \ | |
fa16a5c1 DB |
459 | .base = offset, \ |
460 | .id = num, \ | |
461 | .table_len = ARRAY_SIZE(label##_VSEL_table), \ | |
462 | .table = label##_VSEL_table, \ | |
045f972f JKS |
463 | .delay = turnon_delay, \ |
464 | .remap = remap_conf, \ | |
fa16a5c1 DB |
465 | .desc = { \ |
466 | .name = #label, \ | |
c4aa6f31 | 467 | .id = family##_REG_##label, \ |
66b659e6 | 468 | .n_voltages = ARRAY_SIZE(label##_VSEL_table), \ |
c4aa6f31 | 469 | .ops = &twlldo_ops, \ |
fa16a5c1 DB |
470 | .type = REGULATOR_VOLTAGE, \ |
471 | .owner = THIS_MODULE, \ | |
472 | }, \ | |
473 | } | |
474 | ||
045f972f JKS |
475 | #define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \ |
476 | family) { \ | |
fa16a5c1 DB |
477 | .base = offset, \ |
478 | .id = num, \ | |
479 | .min_mV = mVolts, \ | |
045f972f JKS |
480 | .delay = turnon_delay, \ |
481 | .remap = remap_conf, \ | |
fa16a5c1 DB |
482 | .desc = { \ |
483 | .name = #label, \ | |
c4aa6f31 | 484 | .id = family##_REG_##label, \ |
66b659e6 | 485 | .n_voltages = 1, \ |
c4aa6f31 | 486 | .ops = &twlfixed_ops, \ |
fa16a5c1 DB |
487 | .type = REGULATOR_VOLTAGE, \ |
488 | .owner = THIS_MODULE, \ | |
489 | }, \ | |
490 | } | |
491 | ||
492 | /* | |
493 | * We list regulators here if systems need some level of | |
494 | * software control over them after boot. | |
495 | */ | |
c4aa6f31 | 496 | static struct twlreg_info twl_regs[] = { |
045f972f JKS |
497 | TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08), |
498 | TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08), | |
499 | TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08), | |
500 | TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08), | |
501 | TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08), | |
502 | TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08), | |
503 | TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08), | |
504 | TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00), | |
505 | TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08), | |
506 | TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00), | |
507 | TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08), | |
508 | TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08), | |
509 | TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08), | |
510 | TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08), | |
511 | TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08), | |
512 | TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15, 1000, 0x08), | |
513 | TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16, 1000, 0x08), | |
514 | TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08), | |
515 | TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08), | |
516 | TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08), | |
fa16a5c1 | 517 | /* VUSBCP is managed *only* by the USB subchip */ |
441a4505 RN |
518 | |
519 | /* 6030 REG with base as PMC Slave Misc : 0x0030 */ | |
045f972f JKS |
520 | /* Turnon-delay and remap configuration values for 6030 are not |
521 | verified since the specification is not public */ | |
2ebcf632 RN |
522 | TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1, 0, 0x21), |
523 | TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2, 0, 0x21), | |
524 | TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3, 0, 0x21), | |
525 | TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4, 0, 0x21), | |
526 | TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5, 0, 0x21), | |
527 | TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7, 0, 0x21), | |
528 | TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15, 0, 0x21), | |
529 | TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16, 0, 0x21), | |
530 | TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17, 0, 0x21), | |
531 | TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18, 0, 0x21) | |
fa16a5c1 DB |
532 | }; |
533 | ||
24c29020 | 534 | static int __devinit twlreg_probe(struct platform_device *pdev) |
fa16a5c1 DB |
535 | { |
536 | int i; | |
537 | struct twlreg_info *info; | |
538 | struct regulator_init_data *initdata; | |
539 | struct regulation_constraints *c; | |
540 | struct regulator_dev *rdev; | |
fa16a5c1 | 541 | |
c4aa6f31 RN |
542 | for (i = 0, info = NULL; i < ARRAY_SIZE(twl_regs); i++) { |
543 | if (twl_regs[i].desc.id != pdev->id) | |
fa16a5c1 | 544 | continue; |
c4aa6f31 | 545 | info = twl_regs + i; |
fa16a5c1 DB |
546 | break; |
547 | } | |
548 | if (!info) | |
549 | return -ENODEV; | |
550 | ||
551 | initdata = pdev->dev.platform_data; | |
552 | if (!initdata) | |
553 | return -EINVAL; | |
554 | ||
555 | /* Constrain board-specific capabilities according to what | |
556 | * this driver and the chip itself can actually do. | |
557 | */ | |
558 | c = &initdata->constraints; | |
fa16a5c1 DB |
559 | c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY; |
560 | c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE | |
561 | | REGULATOR_CHANGE_MODE | |
562 | | REGULATOR_CHANGE_STATUS; | |
205e5cd3 JKS |
563 | switch (pdev->id) { |
564 | case TWL4030_REG_VIO: | |
565 | case TWL4030_REG_VDD1: | |
566 | case TWL4030_REG_VDD2: | |
567 | case TWL4030_REG_VPLL1: | |
568 | case TWL4030_REG_VINTANA1: | |
569 | case TWL4030_REG_VINTANA2: | |
570 | case TWL4030_REG_VINTDIG: | |
571 | c->always_on = true; | |
572 | break; | |
573 | default: | |
574 | break; | |
575 | } | |
fa16a5c1 DB |
576 | |
577 | rdev = regulator_register(&info->desc, &pdev->dev, initdata, info); | |
578 | if (IS_ERR(rdev)) { | |
579 | dev_err(&pdev->dev, "can't register %s, %ld\n", | |
580 | info->desc.name, PTR_ERR(rdev)); | |
581 | return PTR_ERR(rdev); | |
582 | } | |
583 | platform_set_drvdata(pdev, rdev); | |
584 | ||
30010fa5 JKS |
585 | twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP, |
586 | info->remap); | |
587 | ||
fa16a5c1 DB |
588 | /* NOTE: many regulators support short-circuit IRQs (presentable |
589 | * as REGULATOR_OVER_CURRENT notifications?) configured via: | |
590 | * - SC_CONFIG | |
591 | * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4) | |
592 | * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2) | |
593 | * - IT_CONFIG | |
594 | */ | |
595 | ||
596 | return 0; | |
597 | } | |
598 | ||
c4aa6f31 | 599 | static int __devexit twlreg_remove(struct platform_device *pdev) |
fa16a5c1 DB |
600 | { |
601 | regulator_unregister(platform_get_drvdata(pdev)); | |
602 | return 0; | |
603 | } | |
604 | ||
c4aa6f31 | 605 | MODULE_ALIAS("platform:twl_reg"); |
fa16a5c1 | 606 | |
c4aa6f31 RN |
607 | static struct platform_driver twlreg_driver = { |
608 | .probe = twlreg_probe, | |
609 | .remove = __devexit_p(twlreg_remove), | |
fa16a5c1 | 610 | /* NOTE: short name, to work around driver model truncation of |
c4aa6f31 | 611 | * "twl_regulator.12" (and friends) to "twl_regulator.1". |
fa16a5c1 | 612 | */ |
c4aa6f31 | 613 | .driver.name = "twl_reg", |
fa16a5c1 DB |
614 | .driver.owner = THIS_MODULE, |
615 | }; | |
616 | ||
c4aa6f31 | 617 | static int __init twlreg_init(void) |
fa16a5c1 | 618 | { |
c4aa6f31 | 619 | return platform_driver_register(&twlreg_driver); |
fa16a5c1 | 620 | } |
c4aa6f31 | 621 | subsys_initcall(twlreg_init); |
fa16a5c1 | 622 | |
c4aa6f31 | 623 | static void __exit twlreg_exit(void) |
fa16a5c1 | 624 | { |
c4aa6f31 | 625 | platform_driver_unregister(&twlreg_driver); |
fa16a5c1 | 626 | } |
c4aa6f31 | 627 | module_exit(twlreg_exit) |
fa16a5c1 | 628 | |
c4aa6f31 | 629 | MODULE_DESCRIPTION("TWL regulator driver"); |
fa16a5c1 | 630 | MODULE_LICENSE("GPL"); |