dmaengine: dw: balance PM runtime calls
[linux-2.6-block.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB
3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
8f52a580
SR
13#include <linux/string.h>
14#include <linux/slab.h>
fa16a5c1
DB
15#include <linux/init.h>
16#include <linux/err.h>
17#include <linux/platform_device.h>
2098e95c
RN
18#include <linux/of.h>
19#include <linux/of_device.h>
fa16a5c1
DB
20#include <linux/regulator/driver.h>
21#include <linux/regulator/machine.h>
2098e95c 22#include <linux/regulator/of_regulator.h>
b07682b6 23#include <linux/i2c/twl.h>
fa16a5c1
DB
24
25
26/*
c4aa6f31 27 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB
28 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
29 * include an audio codec, battery charger, and more voltage regulators.
30 * These chips are often used in OMAP-based systems.
31 *
32 * This driver implements software-based resource control for various
33 * voltage regulators. This is usually augmented with state machine
34 * based control.
35 */
36
37struct twlreg_info {
38 /* start of regulator's PM_RECEIVER control register bank */
39 u8 base;
40
c4aa6f31 41 /* twl resource ID, for resource control state machine */
fa16a5c1
DB
42 u8 id;
43
44 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
45 u8 table_len;
46 const u16 *table;
47
045f972f
JKS
48 /* State REMAP default configuration */
49 u8 remap;
50
fa16a5c1
DB
51 /* chip constraints on regulator behavior */
52 u16 min_mV;
3e3d3be7 53 u16 max_mV;
fa16a5c1 54
4d94aee5
GG
55 u8 flags;
56
fa16a5c1
DB
57 /* used by regulator core */
58 struct regulator_desc desc;
4d94aee5
GG
59
60 /* chip specific features */
3db39885 61 unsigned long features;
63bfff4e
TK
62
63 /*
64 * optional override functions for voltage set/get
65 * these are currently only used for SMPS regulators
66 */
67 int (*get_voltage)(void *data);
68 int (*set_voltage)(void *data, int target_uV);
69
70 /* data passed from board for external get/set voltage */
71 void *data;
fa16a5c1
DB
72};
73
74
75/* LDO control registers ... offset is from the base of its register bank.
76 * The first three registers of all power resource banks help hardware to
77 * manage the various resource groups.
78 */
441a4505 79/* Common offset in TWL4030/6030 */
fa16a5c1 80#define VREG_GRP 0
441a4505 81/* TWL4030 register offsets */
fa16a5c1
DB
82#define VREG_TYPE 1
83#define VREG_REMAP 2
84#define VREG_DEDICATED 3 /* LDO control */
ba305e31 85#define VREG_VOLTAGE_SMPS_4030 9
441a4505
RN
86/* TWL6030 register offsets */
87#define VREG_TRANS 1
88#define VREG_STATE 2
89#define VREG_VOLTAGE 3
4d94aee5 90#define VREG_VOLTAGE_SMPS 4
441a4505
RN
91/* TWL6030 Misc register offsets */
92#define VREG_BC_ALL 1
93#define VREG_BC_REF 2
94#define VREG_BC_PROC 3
95#define VREG_BC_CLK_RST 4
fa16a5c1 96
21657ebf
SH
97/* TWL6030 LDO register values for CFG_STATE */
98#define TWL6030_CFG_STATE_OFF 0x00
99#define TWL6030_CFG_STATE_ON 0x01
9a0244ad
SH
100#define TWL6030_CFG_STATE_OFF2 0x02
101#define TWL6030_CFG_STATE_SLEEP 0x03
21657ebf 102#define TWL6030_CFG_STATE_GRP_SHIFT 5
b2456779
SH
103#define TWL6030_CFG_STATE_APP_SHIFT 2
104#define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT)
105#define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\
106 TWL6030_CFG_STATE_APP_SHIFT)
21657ebf 107
4d94aee5
GG
108/* Flags for SMPS Voltage reading */
109#define SMPS_OFFSET_EN BIT(0)
110#define SMPS_EXTENDED_EN BIT(1)
111
89ce43fb 112/* twl6032 SMPS EPROM values */
4d94aee5
GG
113#define TWL6030_SMPS_OFFSET 0xB0
114#define TWL6030_SMPS_MULT 0xB3
115#define SMPS_MULTOFFSET_SMPS4 BIT(0)
116#define SMPS_MULTOFFSET_VIO BIT(1)
117#define SMPS_MULTOFFSET_SMPS3 BIT(6)
118
fa16a5c1 119static inline int
441a4505 120twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB
121{
122 u8 value;
123 int status;
124
441a4505 125 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB
126 &value, info->base + offset);
127 return (status < 0) ? status : value;
128}
129
130static inline int
441a4505
RN
131twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
132 u8 value)
fa16a5c1 133{
441a4505 134 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB
135 value, info->base + offset);
136}
137
138/*----------------------------------------------------------------------*/
139
140/* generic power resource operations, which work on all regulators */
141
c4aa6f31 142static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 143{
441a4505
RN
144 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
145 VREG_GRP);
fa16a5c1
DB
146}
147
148/*
149 * Enable/disable regulators by joining/leaving the P1 (processor) group.
150 * We assume nobody else is updating the DEV_GRP registers.
151 */
441a4505
RN
152/* definition for 4030 family */
153#define P3_GRP_4030 BIT(7) /* "peripherals" */
154#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
155#define P1_GRP_4030 BIT(5) /* CPU/Linux */
156/* definition for 6030 family */
157#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
158#define P2_GRP_6030 BIT(1) /* "peripherals" */
159#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 160
b2456779 161static int twl4030reg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 162{
c4aa6f31 163 int state = twlreg_grp(rdev);
fa16a5c1
DB
164
165 if (state < 0)
166 return state;
167
b2456779
SH
168 return state & P1_GRP_4030;
169}
170
171static int twl6030reg_is_enabled(struct regulator_dev *rdev)
172{
173 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 174 int grp = 0, val;
b2456779 175
89ce43fb 176 if (!(twl_class_is_6030() && (info->features & TWL6032_SUBCLASS))) {
b6f476c2
AL
177 grp = twlreg_grp(rdev);
178 if (grp < 0)
179 return grp;
4d94aee5 180 grp &= P1_GRP_6030;
b6f476c2 181 } else {
4d94aee5 182 grp = 1;
b6f476c2 183 }
b2456779
SH
184
185 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
186 val = TWL6030_CFG_STATE_APP(val);
187
188 return grp && (val == TWL6030_CFG_STATE_ON);
fa16a5c1
DB
189}
190
f8c2940b 191static int twl4030reg_enable(struct regulator_dev *rdev)
fa16a5c1
DB
192{
193 struct twlreg_info *info = rdev_get_drvdata(rdev);
194 int grp;
53b8a9d9 195 int ret;
fa16a5c1 196
b6f476c2 197 grp = twlreg_grp(rdev);
fa16a5c1
DB
198 if (grp < 0)
199 return grp;
200
f8c2940b 201 grp |= P1_GRP_4030;
441a4505 202
53b8a9d9
JKS
203 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
204
f8c2940b
B
205 return ret;
206}
207
208static int twl6030reg_enable(struct regulator_dev *rdev)
209{
210 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 211 int grp = 0;
f8c2940b
B
212 int ret;
213
89ce43fb 214 if (!(twl_class_is_6030() && (info->features & TWL6032_SUBCLASS)))
b6f476c2 215 grp = twlreg_grp(rdev);
f8c2940b
B
216 if (grp < 0)
217 return grp;
218
219 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
220 grp << TWL6030_CFG_STATE_GRP_SHIFT |
221 TWL6030_CFG_STATE_ON);
48c936d6
AL
222 return ret;
223}
21657ebf 224
0ff3897d 225static int twl4030reg_disable(struct regulator_dev *rdev)
fa16a5c1
DB
226{
227 struct twlreg_info *info = rdev_get_drvdata(rdev);
228 int grp;
21657ebf 229 int ret;
fa16a5c1 230
b6f476c2 231 grp = twlreg_grp(rdev);
fa16a5c1
DB
232 if (grp < 0)
233 return grp;
234
0ff3897d 235 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 236
21657ebf
SH
237 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
238
0ff3897d
B
239 return ret;
240}
241
242static int twl6030reg_disable(struct regulator_dev *rdev)
243{
244 struct twlreg_info *info = rdev_get_drvdata(rdev);
245 int grp = 0;
246 int ret;
247
89ce43fb 248 if (!(twl_class_is_6030() && (info->features & TWL6032_SUBCLASS)))
4d94aee5 249 grp = P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030;
0ff3897d
B
250
251 /* For 6030, set the off state for all grps enabled */
252 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
253 (grp) << TWL6030_CFG_STATE_GRP_SHIFT |
254 TWL6030_CFG_STATE_OFF);
21657ebf
SH
255
256 return ret;
fa16a5c1
DB
257}
258
9a0244ad 259static int twl4030reg_get_status(struct regulator_dev *rdev)
fa16a5c1 260{
c4aa6f31 261 int state = twlreg_grp(rdev);
fa16a5c1
DB
262
263 if (state < 0)
264 return state;
265 state &= 0x0f;
266
267 /* assume state != WARM_RESET; we'd not be running... */
268 if (!state)
269 return REGULATOR_STATUS_OFF;
270 return (state & BIT(3))
271 ? REGULATOR_STATUS_NORMAL
272 : REGULATOR_STATUS_STANDBY;
273}
274
9a0244ad
SH
275static int twl6030reg_get_status(struct regulator_dev *rdev)
276{
277 struct twlreg_info *info = rdev_get_drvdata(rdev);
278 int val;
279
280 val = twlreg_grp(rdev);
281 if (val < 0)
282 return val;
283
284 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
285
286 switch (TWL6030_CFG_STATE_APP(val)) {
287 case TWL6030_CFG_STATE_ON:
288 return REGULATOR_STATUS_NORMAL;
289
290 case TWL6030_CFG_STATE_SLEEP:
291 return REGULATOR_STATUS_STANDBY;
292
293 case TWL6030_CFG_STATE_OFF:
294 case TWL6030_CFG_STATE_OFF2:
295 default:
296 break;
297 }
298
299 return REGULATOR_STATUS_OFF;
300}
301
1a39962f 302static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB
303{
304 struct twlreg_info *info = rdev_get_drvdata(rdev);
305 unsigned message;
306 int status;
307
308 /* We can only set the mode through state machine commands... */
309 switch (mode) {
310 case REGULATOR_MODE_NORMAL:
311 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
312 break;
313 case REGULATOR_MODE_STANDBY:
314 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
315 break;
316 default:
317 return -EINVAL;
318 }
319
320 /* Ensure the resource is associated with some group */
c4aa6f31 321 status = twlreg_grp(rdev);
fa16a5c1
DB
322 if (status < 0)
323 return status;
441a4505 324 if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
fa16a5c1
DB
325 return -EACCES;
326
c4aa6f31 327 status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8
AL
328 message >> 8, TWL4030_PM_MASTER_PB_WORD_MSB);
329 if (status < 0)
fa16a5c1
DB
330 return status;
331
c4aa6f31 332 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8 333 message & 0xff, TWL4030_PM_MASTER_PB_WORD_LSB);
fa16a5c1
DB
334}
335
1a39962f
SH
336static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
337{
338 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 339 int grp = 0;
1a39962f
SH
340 int val;
341
89ce43fb 342 if (!(twl_class_is_6030() && (info->features & TWL6032_SUBCLASS)))
b6f476c2 343 grp = twlreg_grp(rdev);
1a39962f
SH
344
345 if (grp < 0)
346 return grp;
347
348 /* Compose the state register settings */
349 val = grp << TWL6030_CFG_STATE_GRP_SHIFT;
350 /* We can only set the mode through state machine commands... */
351 switch (mode) {
352 case REGULATOR_MODE_NORMAL:
353 val |= TWL6030_CFG_STATE_ON;
354 break;
355 case REGULATOR_MODE_STANDBY:
356 val |= TWL6030_CFG_STATE_SLEEP;
357 break;
358
359 default:
360 return -EINVAL;
361 }
362
363 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, val);
364}
365
fa16a5c1
DB
366/*----------------------------------------------------------------------*/
367
368/*
369 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
370 * select field in its control register. We use tables indexed by VSEL
371 * to record voltages in milliVolts. (Accuracy is about three percent.)
372 *
373 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
374 * currently handled by listing two slightly different VAUX2 regulators,
375 * only one of which will be configured.
376 *
377 * VSEL values documented as "TI cannot support these values" are flagged
378 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH
379 *
380 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
381 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1 382 */
fa16a5c1 383#define UNSUP_MASK 0x8000
fa16a5c1
DB
384
385#define UNSUP(x) (UNSUP_MASK | (x))
411a2df5
N
386#define IS_UNSUP(info, x) \
387 ((UNSUP_MASK & (x)) && \
388 !((info)->features & TWL4030_ALLOW_UNSUPPORTED))
fa16a5c1
DB
389#define LDO_MV(x) (~UNSUP_MASK & (x))
390
391
392static const u16 VAUX1_VSEL_table[] = {
393 UNSUP(1500), UNSUP(1800), 2500, 2800,
394 3000, 3000, 3000, 3000,
395};
396static const u16 VAUX2_4030_VSEL_table[] = {
397 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
398 1500, 1800, UNSUP(1850), 2500,
399 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
400 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
401};
402static const u16 VAUX2_VSEL_table[] = {
403 1700, 1700, 1900, 1300,
404 1500, 1800, 2000, 2500,
405 2100, 2800, 2200, 2300,
406 2400, 2400, 2400, 2400,
407};
408static const u16 VAUX3_VSEL_table[] = {
409 1500, 1800, 2500, 2800,
d6bb69cf 410 3000, 3000, 3000, 3000,
fa16a5c1
DB
411};
412static const u16 VAUX4_VSEL_table[] = {
413 700, 1000, 1200, UNSUP(1300),
414 1500, 1800, UNSUP(1850), 2500,
1897e742
DB
415 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
416 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB
417};
418static const u16 VMMC1_VSEL_table[] = {
419 1850, 2850, 3000, 3150,
420};
421static const u16 VMMC2_VSEL_table[] = {
422 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
423 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
424 2600, 2800, 2850, 3000,
425 3150, 3150, 3150, 3150,
426};
427static const u16 VPLL1_VSEL_table[] = {
428 1000, 1200, 1300, 1800,
429 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
430};
431static const u16 VPLL2_VSEL_table[] = {
432 700, 1000, 1200, 1300,
433 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
434 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
435 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
436};
437static const u16 VSIM_VSEL_table[] = {
438 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
439 2800, 3000, 3000, 3000,
440};
441static const u16 VDAC_VSEL_table[] = {
442 1200, 1300, 1800, 1800,
443};
07fc493f
JKS
444static const u16 VIO_VSEL_table[] = {
445 1800, 1850,
446};
447static const u16 VINTANA2_VSEL_table[] = {
448 2500, 2750,
449};
fa16a5c1 450
3e3d3be7 451static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
452{
453 struct twlreg_info *info = rdev_get_drvdata(rdev);
454 int mV = info->table[index];
455
411a2df5 456 return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000);
66b659e6
DB
457}
458
fa16a5c1 459static int
dd16b1f8 460twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
fa16a5c1
DB
461{
462 struct twlreg_info *info = rdev_get_drvdata(rdev);
fa16a5c1 463
dd16b1f8
AL
464 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
465 selector);
fa16a5c1
DB
466}
467
6949fbe5 468static int twl4030ldo_get_voltage_sel(struct regulator_dev *rdev)
fa16a5c1
DB
469{
470 struct twlreg_info *info = rdev_get_drvdata(rdev);
6949fbe5 471 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE);
fa16a5c1
DB
472
473 if (vsel < 0)
474 return vsel;
475
476 vsel &= info->table_len - 1;
6949fbe5 477 return vsel;
fa16a5c1
DB
478}
479
3e3d3be7
RN
480static struct regulator_ops twl4030ldo_ops = {
481 .list_voltage = twl4030ldo_list_voltage,
66b659e6 482
dd16b1f8 483 .set_voltage_sel = twl4030ldo_set_voltage_sel,
6949fbe5 484 .get_voltage_sel = twl4030ldo_get_voltage_sel,
3e3d3be7 485
f8c2940b 486 .enable = twl4030reg_enable,
0ff3897d 487 .disable = twl4030reg_disable,
b2456779 488 .is_enabled = twl4030reg_is_enabled,
3e3d3be7 489
1a39962f 490 .set_mode = twl4030reg_set_mode,
3e3d3be7 491
9a0244ad 492 .get_status = twl4030reg_get_status,
3e3d3be7
RN
493};
494
ba305e31
TK
495static int
496twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
497 unsigned *selector)
498{
499 struct twlreg_info *info = rdev_get_drvdata(rdev);
500 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
501
63bfff4e
TK
502 if (info->set_voltage) {
503 return info->set_voltage(info->data, min_uV);
504 } else {
505 twlreg_write(info, TWL_MODULE_PM_RECEIVER,
506 VREG_VOLTAGE_SMPS_4030, vsel);
507 }
508
ba305e31
TK
509 return 0;
510}
511
512static int twl4030smps_get_voltage(struct regulator_dev *rdev)
513{
514 struct twlreg_info *info = rdev_get_drvdata(rdev);
63bfff4e
TK
515 int vsel;
516
517 if (info->get_voltage)
518 return info->get_voltage(info->data);
519
520 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
ba305e31
TK
521 VREG_VOLTAGE_SMPS_4030);
522
523 return vsel * 12500 + 600000;
524}
525
526static struct regulator_ops twl4030smps_ops = {
527 .set_voltage = twl4030smps_set_voltage,
528 .get_voltage = twl4030smps_get_voltage,
529};
530
34a38440
TK
531static int twl6030coresmps_set_voltage(struct regulator_dev *rdev, int min_uV,
532 int max_uV, unsigned *selector)
533{
534 struct twlreg_info *info = rdev_get_drvdata(rdev);
535
536 if (info->set_voltage)
537 return info->set_voltage(info->data, min_uV);
538
539 return -ENODEV;
540}
541
542static int twl6030coresmps_get_voltage(struct regulator_dev *rdev)
543{
544 struct twlreg_info *info = rdev_get_drvdata(rdev);
545
546 if (info->get_voltage)
547 return info->get_voltage(info->data);
548
549 return -ENODEV;
550}
551
552static struct regulator_ops twl6030coresmps_ops = {
553 .set_voltage = twl6030coresmps_set_voltage,
554 .get_voltage = twl6030coresmps_get_voltage,
555};
556
c6a717c9
AL
557static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned sel)
558{
559 struct twlreg_info *info = rdev_get_drvdata(rdev);
560
561 switch (sel) {
562 case 0:
563 return 0;
564 case 1 ... 24:
565 /* Linear mapping from 00000001 to 00011000:
566 * Absolute voltage value = 1.0 V + 0.1 V × (sel – 00000001)
567 */
568 return (info->min_mV + 100 * (sel - 1)) * 1000;
569 case 25 ... 30:
570 return -EINVAL;
571 case 31:
572 return 2750000;
573 default:
574 return -EINVAL;
575 }
576}
577
3e3d3be7 578static int
4bcb9f43 579twl6030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
3e3d3be7
RN
580{
581 struct twlreg_info *info = rdev_get_drvdata(rdev);
3e3d3be7 582
4bcb9f43
AL
583 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
584 selector);
3e3d3be7
RN
585}
586
4bcb9f43 587static int twl6030ldo_get_voltage_sel(struct regulator_dev *rdev)
3e3d3be7
RN
588{
589 struct twlreg_info *info = rdev_get_drvdata(rdev);
a3cb80f4 590 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE);
3e3d3be7 591
4bcb9f43 592 return vsel;
3e3d3be7
RN
593}
594
595static struct regulator_ops twl6030ldo_ops = {
c6a717c9 596 .list_voltage = twl6030ldo_list_voltage,
3e3d3be7 597
4bcb9f43
AL
598 .set_voltage_sel = twl6030ldo_set_voltage_sel,
599 .get_voltage_sel = twl6030ldo_get_voltage_sel,
fa16a5c1 600
f8c2940b 601 .enable = twl6030reg_enable,
0ff3897d 602 .disable = twl6030reg_disable,
b2456779 603 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 604
1a39962f 605 .set_mode = twl6030reg_set_mode,
fa16a5c1 606
9a0244ad 607 .get_status = twl6030reg_get_status,
fa16a5c1
DB
608};
609
610/*----------------------------------------------------------------------*/
611
b2456779 612static struct regulator_ops twl4030fixed_ops = {
b3816d50 613 .list_voltage = regulator_list_voltage_linear,
b2456779 614
f8c2940b 615 .enable = twl4030reg_enable,
0ff3897d 616 .disable = twl4030reg_disable,
b2456779
SH
617 .is_enabled = twl4030reg_is_enabled,
618
1a39962f 619 .set_mode = twl4030reg_set_mode,
b2456779 620
9a0244ad 621 .get_status = twl4030reg_get_status,
b2456779
SH
622};
623
624static struct regulator_ops twl6030fixed_ops = {
b3816d50 625 .list_voltage = regulator_list_voltage_linear,
66b659e6 626
f8c2940b 627 .enable = twl6030reg_enable,
0ff3897d 628 .disable = twl6030reg_disable,
b2456779 629 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 630
1a39962f 631 .set_mode = twl6030reg_set_mode,
fa16a5c1 632
9a0244ad 633 .get_status = twl6030reg_get_status,
fa16a5c1
DB
634};
635
4d94aee5
GG
636/*
637 * SMPS status and control
638 */
639
640static int twl6030smps_list_voltage(struct regulator_dev *rdev, unsigned index)
641{
642 struct twlreg_info *info = rdev_get_drvdata(rdev);
643
644 int voltage = 0;
645
646 switch (info->flags) {
647 case SMPS_OFFSET_EN:
648 voltage = 100000;
649 /* fall through */
650 case 0:
651 switch (index) {
652 case 0:
653 voltage = 0;
654 break;
655 case 58:
656 voltage = 1350 * 1000;
657 break;
658 case 59:
659 voltage = 1500 * 1000;
660 break;
661 case 60:
662 voltage = 1800 * 1000;
663 break;
664 case 61:
665 voltage = 1900 * 1000;
666 break;
667 case 62:
668 voltage = 2100 * 1000;
669 break;
670 default:
671 voltage += (600000 + (12500 * (index - 1)));
672 }
673 break;
674 case SMPS_EXTENDED_EN:
675 switch (index) {
676 case 0:
677 voltage = 0;
678 break;
679 case 58:
680 voltage = 2084 * 1000;
681 break;
682 case 59:
683 voltage = 2315 * 1000;
684 break;
685 case 60:
686 voltage = 2778 * 1000;
687 break;
688 case 61:
689 voltage = 2932 * 1000;
690 break;
691 case 62:
692 voltage = 3241 * 1000;
693 break;
694 default:
695 voltage = (1852000 + (38600 * (index - 1)));
696 }
697 break;
698 case SMPS_OFFSET_EN | SMPS_EXTENDED_EN:
699 switch (index) {
700 case 0:
701 voltage = 0;
702 break;
703 case 58:
704 voltage = 4167 * 1000;
705 break;
706 case 59:
707 voltage = 2315 * 1000;
708 break;
709 case 60:
710 voltage = 2778 * 1000;
711 break;
712 case 61:
713 voltage = 2932 * 1000;
714 break;
715 case 62:
716 voltage = 3241 * 1000;
717 break;
718 default:
719 voltage = (2161000 + (38600 * (index - 1)));
720 }
721 break;
722 }
723
724 return voltage;
725}
726
38f8f43c
AL
727static int twl6030smps_map_voltage(struct regulator_dev *rdev, int min_uV,
728 int max_uV)
4d94aee5 729{
38f8f43c
AL
730 struct twlreg_info *info = rdev_get_drvdata(rdev);
731 int vsel = 0;
4d94aee5
GG
732
733 switch (info->flags) {
734 case 0:
735 if (min_uV == 0)
736 vsel = 0;
a33b6e5a 737 else if ((min_uV >= 600000) && (min_uV <= 1300000)) {
268a1641 738 vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
0cb2f123 739 vsel++;
4d94aee5
GG
740 }
741 /* Values 1..57 for vsel are linear and can be calculated
742 * values 58..62 are non linear.
743 */
78292f4e 744 else if ((min_uV > 1900000) && (min_uV <= 2100000))
4d94aee5 745 vsel = 62;
78292f4e 746 else if ((min_uV > 1800000) && (min_uV <= 1900000))
4d94aee5 747 vsel = 61;
78292f4e 748 else if ((min_uV > 1500000) && (min_uV <= 1800000))
4d94aee5 749 vsel = 60;
78292f4e 750 else if ((min_uV > 1350000) && (min_uV <= 1500000))
4d94aee5 751 vsel = 59;
78292f4e 752 else if ((min_uV > 1300000) && (min_uV <= 1350000))
4d94aee5
GG
753 vsel = 58;
754 else
755 return -EINVAL;
756 break;
757 case SMPS_OFFSET_EN:
758 if (min_uV == 0)
759 vsel = 0;
a33b6e5a 760 else if ((min_uV >= 700000) && (min_uV <= 1420000)) {
268a1641 761 vsel = DIV_ROUND_UP(min_uV - 700000, 12500);
0cb2f123 762 vsel++;
4d94aee5
GG
763 }
764 /* Values 1..57 for vsel are linear and can be calculated
765 * values 58..62 are non linear.
766 */
78292f4e 767 else if ((min_uV > 1900000) && (min_uV <= 2100000))
4d94aee5 768 vsel = 62;
78292f4e 769 else if ((min_uV > 1800000) && (min_uV <= 1900000))
4d94aee5 770 vsel = 61;
78292f4e 771 else if ((min_uV > 1350000) && (min_uV <= 1800000))
4d94aee5 772 vsel = 60;
78292f4e 773 else if ((min_uV > 1350000) && (min_uV <= 1500000))
4d94aee5 774 vsel = 59;
78292f4e 775 else if ((min_uV > 1300000) && (min_uV <= 1350000))
4d94aee5
GG
776 vsel = 58;
777 else
778 return -EINVAL;
779 break;
780 case SMPS_EXTENDED_EN:
0cb2f123 781 if (min_uV == 0) {
4d94aee5 782 vsel = 0;
0cb2f123 783 } else if ((min_uV >= 1852000) && (max_uV <= 4013600)) {
268a1641 784 vsel = DIV_ROUND_UP(min_uV - 1852000, 38600);
0cb2f123
AL
785 vsel++;
786 }
4d94aee5
GG
787 break;
788 case SMPS_OFFSET_EN|SMPS_EXTENDED_EN:
0cb2f123 789 if (min_uV == 0) {
4d94aee5 790 vsel = 0;
78292f4e 791 } else if ((min_uV >= 2161000) && (min_uV <= 4321000)) {
268a1641 792 vsel = DIV_ROUND_UP(min_uV - 2161000, 38600);
0cb2f123
AL
793 vsel++;
794 }
4d94aee5
GG
795 break;
796 }
797
38f8f43c
AL
798 return vsel;
799}
78292f4e 800
38f8f43c
AL
801static int twl6030smps_set_voltage_sel(struct regulator_dev *rdev,
802 unsigned int selector)
803{
804 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5
GG
805
806 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS,
38f8f43c 807 selector);
4d94aee5
GG
808}
809
810static int twl6030smps_get_voltage_sel(struct regulator_dev *rdev)
811{
812 struct twlreg_info *info = rdev_get_drvdata(rdev);
813
814 return twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS);
815}
816
817static struct regulator_ops twlsmps_ops = {
818 .list_voltage = twl6030smps_list_voltage,
38f8f43c 819 .map_voltage = twl6030smps_map_voltage,
4d94aee5 820
38f8f43c 821 .set_voltage_sel = twl6030smps_set_voltage_sel,
4d94aee5
GG
822 .get_voltage_sel = twl6030smps_get_voltage_sel,
823
824 .enable = twl6030reg_enable,
825 .disable = twl6030reg_disable,
826 .is_enabled = twl6030reg_is_enabled,
827
828 .set_mode = twl6030reg_set_mode,
829
830 .get_status = twl6030reg_get_status,
831};
832
fa16a5c1
DB
833/*----------------------------------------------------------------------*/
834
045f972f
JKS
835#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
836 remap_conf) \
837 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 838 remap_conf, TWL4030, twl4030fixed_ops)
af8b244f
A
839#define TWL6030_FIXED_LDO(label, offset, mVolts, turnon_delay) \
840 TWL_FIXED_LDO(label, offset, mVolts, 0x0, turnon_delay, \
b2456779 841 0x0, TWL6030, twl6030fixed_ops)
045f972f 842
2098e95c 843#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
0ffff5a6 844static const struct twlreg_info TWL4030_INFO_##label = { \
fa16a5c1
DB
845 .base = offset, \
846 .id = num, \
847 .table_len = ARRAY_SIZE(label##_VSEL_table), \
848 .table = label##_VSEL_table, \
045f972f 849 .remap = remap_conf, \
fa16a5c1
DB
850 .desc = { \
851 .name = #label, \
3e3d3be7 852 .id = TWL4030_REG_##label, \
66b659e6 853 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN
854 .ops = &twl4030ldo_ops, \
855 .type = REGULATOR_VOLTAGE, \
856 .owner = THIS_MODULE, \
fca53d86 857 .enable_time = turnon_delay, \
3e3d3be7
RN
858 }, \
859 }
860
ba305e31 861#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
0ffff5a6 862static const struct twlreg_info TWL4030_INFO_##label = { \
ba305e31
TK
863 .base = offset, \
864 .id = num, \
ba305e31
TK
865 .remap = remap_conf, \
866 .desc = { \
867 .name = #label, \
868 .id = TWL4030_REG_##label, \
869 .ops = &twl4030smps_ops, \
870 .type = REGULATOR_VOLTAGE, \
871 .owner = THIS_MODULE, \
fca53d86 872 .enable_time = turnon_delay, \
ba305e31
TK
873 }, \
874 }
875
2098e95c 876#define TWL6030_ADJUSTABLE_SMPS(label) \
0ffff5a6 877static const struct twlreg_info TWL6030_INFO_##label = { \
34a38440
TK
878 .desc = { \
879 .name = #label, \
880 .id = TWL6030_REG_##label, \
881 .ops = &twl6030coresmps_ops, \
882 .type = REGULATOR_VOLTAGE, \
883 .owner = THIS_MODULE, \
884 }, \
885 }
886
2098e95c 887#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
0ffff5a6 888static const struct twlreg_info TWL6030_INFO_##label = { \
3e3d3be7 889 .base = offset, \
3e3d3be7
RN
890 .min_mV = min_mVolts, \
891 .max_mV = max_mVolts, \
3e3d3be7
RN
892 .desc = { \
893 .name = #label, \
894 .id = TWL6030_REG_##label, \
c6a717c9 895 .n_voltages = 32, \
3e3d3be7 896 .ops = &twl6030ldo_ops, \
fa16a5c1
DB
897 .type = REGULATOR_VOLTAGE, \
898 .owner = THIS_MODULE, \
899 }, \
900 }
901
89ce43fb
GG
902#define TWL6032_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
903static const struct twlreg_info TWL6032_INFO_##label = { \
4d94aee5 904 .base = offset, \
4d94aee5
GG
905 .min_mV = min_mVolts, \
906 .max_mV = max_mVolts, \
907 .desc = { \
908 .name = #label, \
89ce43fb 909 .id = TWL6032_REG_##label, \
c6a717c9 910 .n_voltages = 32, \
4d94aee5
GG
911 .ops = &twl6030ldo_ops, \
912 .type = REGULATOR_VOLTAGE, \
913 .owner = THIS_MODULE, \
914 }, \
915 }
3e3d3be7 916
045f972f 917#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
2098e95c 918 family, operations) \
0ffff5a6 919static const struct twlreg_info TWLFIXED_INFO_##label = { \
fa16a5c1
DB
920 .base = offset, \
921 .id = num, \
922 .min_mV = mVolts, \
045f972f 923 .remap = remap_conf, \
fa16a5c1
DB
924 .desc = { \
925 .name = #label, \
c4aa6f31 926 .id = family##_REG_##label, \
66b659e6 927 .n_voltages = 1, \
b2456779 928 .ops = &operations, \
fa16a5c1
DB
929 .type = REGULATOR_VOLTAGE, \
930 .owner = THIS_MODULE, \
b3816d50 931 .min_uV = mVolts * 1000, \
fca53d86 932 .enable_time = turnon_delay, \
8e6de4a3
B
933 }, \
934 }
935
89ce43fb 936#define TWL6032_ADJUSTABLE_SMPS(label, offset) \
0ffff5a6 937static const struct twlreg_info TWLSMPS_INFO_##label = { \
4d94aee5 938 .base = offset, \
4d94aee5
GG
939 .min_mV = 600, \
940 .max_mV = 2100, \
941 .desc = { \
942 .name = #label, \
89ce43fb 943 .id = TWL6032_REG_##label, \
4d94aee5
GG
944 .n_voltages = 63, \
945 .ops = &twlsmps_ops, \
946 .type = REGULATOR_VOLTAGE, \
947 .owner = THIS_MODULE, \
948 }, \
949 }
950
fa16a5c1
DB
951/*
952 * We list regulators here if systems need some level of
953 * software control over them after boot.
954 */
2098e95c
RN
955TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08);
956TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08);
957TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08);
958TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08);
959TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08);
960TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08);
961TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08);
962TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
963TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08);
964TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00);
965TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08);
966TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08);
967TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08);
968TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08);
969TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08);
970/* VUSBCP is managed *only* by the USB subchip */
971/* 6030 REG with base as PMC Slave Misc : 0x0030 */
972/* Turnon-delay and remap configuration values for 6030 are not
973 verified since the specification is not public */
974TWL6030_ADJUSTABLE_SMPS(VDD1);
975TWL6030_ADJUSTABLE_SMPS(VDD2);
976TWL6030_ADJUSTABLE_SMPS(VDD3);
977TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300);
978TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300);
979TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300);
980TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300);
981TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300);
982TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300);
983/* 6025 are renamed compared to 6030 versions */
89ce43fb
GG
984TWL6032_ADJUSTABLE_LDO(LDO2, 0x54, 1000, 3300);
985TWL6032_ADJUSTABLE_LDO(LDO4, 0x58, 1000, 3300);
986TWL6032_ADJUSTABLE_LDO(LDO3, 0x5c, 1000, 3300);
987TWL6032_ADJUSTABLE_LDO(LDO5, 0x68, 1000, 3300);
988TWL6032_ADJUSTABLE_LDO(LDO1, 0x6c, 1000, 3300);
989TWL6032_ADJUSTABLE_LDO(LDO7, 0x74, 1000, 3300);
990TWL6032_ADJUSTABLE_LDO(LDO6, 0x60, 1000, 3300);
991TWL6032_ADJUSTABLE_LDO(LDOLN, 0x64, 1000, 3300);
992TWL6032_ADJUSTABLE_LDO(LDOUSB, 0x70, 1000, 3300);
908d6d52 993TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08);
2098e95c
RN
994TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08);
995TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08);
996TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08);
997TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08);
998TWL6030_FIXED_LDO(VANA, 0x50, 2100, 0);
999TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 0);
1000TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 0);
1001TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 0);
e9d47fa4
PU
1002TWL6030_FIXED_LDO(V1V8, 0x16, 1800, 0);
1003TWL6030_FIXED_LDO(V2V1, 0x1c, 2100, 0);
89ce43fb
GG
1004TWL6032_ADJUSTABLE_SMPS(SMPS3, 0x34);
1005TWL6032_ADJUSTABLE_SMPS(SMPS4, 0x10);
1006TWL6032_ADJUSTABLE_SMPS(VIO, 0x16);
fa16a5c1 1007
4d94aee5
GG
1008static u8 twl_get_smps_offset(void)
1009{
1010 u8 value;
1011
1012 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1013 TWL6030_SMPS_OFFSET);
1014 return value;
1015}
1016
1017static u8 twl_get_smps_mult(void)
1018{
1019 u8 value;
1020
1021 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1022 TWL6030_SMPS_MULT);
1023 return value;
1024}
1025
2098e95c
RN
1026#define TWL_OF_MATCH(comp, family, label) \
1027 { \
1028 .compatible = comp, \
1029 .data = &family##_INFO_##label, \
1030 }
1031
1032#define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
1033#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
89ce43fb 1034#define TWL6032_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6032, label)
2098e95c 1035#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
2098e95c
RN
1036#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
1037
3d68dfe3 1038static const struct of_device_id twl_of_match[] = {
2098e95c
RN
1039 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1),
1040 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030),
1041 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2),
1042 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3),
1043 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4),
1044 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1),
1045 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2),
1046 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
1047 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2),
1048 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM),
1049 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC),
1050 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1051 TWL4030_OF_MATCH("ti,twl4030-vio", VIO),
1052 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1),
1053 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2),
1054 TWL6030_OF_MATCH("ti,twl6030-vdd1", VDD1),
1055 TWL6030_OF_MATCH("ti,twl6030-vdd2", VDD2),
1056 TWL6030_OF_MATCH("ti,twl6030-vdd3", VDD3),
1057 TWL6030_OF_MATCH("ti,twl6030-vaux1", VAUX1_6030),
1058 TWL6030_OF_MATCH("ti,twl6030-vaux2", VAUX2_6030),
1059 TWL6030_OF_MATCH("ti,twl6030-vaux3", VAUX3_6030),
1060 TWL6030_OF_MATCH("ti,twl6030-vmmc", VMMC),
1061 TWL6030_OF_MATCH("ti,twl6030-vpp", VPP),
1062 TWL6030_OF_MATCH("ti,twl6030-vusim", VUSIM),
89ce43fb
GG
1063 TWL6032_OF_MATCH("ti,twl6032-ldo2", LDO2),
1064 TWL6032_OF_MATCH("ti,twl6032-ldo4", LDO4),
1065 TWL6032_OF_MATCH("ti,twl6032-ldo3", LDO3),
1066 TWL6032_OF_MATCH("ti,twl6032-ldo5", LDO5),
1067 TWL6032_OF_MATCH("ti,twl6032-ldo1", LDO1),
1068 TWL6032_OF_MATCH("ti,twl6032-ldo7", LDO7),
1069 TWL6032_OF_MATCH("ti,twl6032-ldo6", LDO6),
1070 TWL6032_OF_MATCH("ti,twl6032-ldoln", LDOLN),
1071 TWL6032_OF_MATCH("ti,twl6032-ldousb", LDOUSB),
908d6d52 1072 TWLFIXED_OF_MATCH("ti,twl4030-vintana1", VINTANA1),
2098e95c
RN
1073 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG),
1074 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5),
1075 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8),
1076 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1),
1077 TWLFIXED_OF_MATCH("ti,twl6030-vana", VANA),
1078 TWLFIXED_OF_MATCH("ti,twl6030-vcxio", VCXIO),
1079 TWLFIXED_OF_MATCH("ti,twl6030-vdac", VDAC),
1080 TWLFIXED_OF_MATCH("ti,twl6030-vusb", VUSB),
e9d47fa4
PU
1081 TWLFIXED_OF_MATCH("ti,twl6030-v1v8", V1V8),
1082 TWLFIXED_OF_MATCH("ti,twl6030-v2v1", V2V1),
89ce43fb
GG
1083 TWLSMPS_OF_MATCH("ti,twl6032-smps3", SMPS3),
1084 TWLSMPS_OF_MATCH("ti,twl6032-smps4", SMPS4),
1085 TWLSMPS_OF_MATCH("ti,twl6032-vio", VIO),
2098e95c
RN
1086 {},
1087};
1088MODULE_DEVICE_TABLE(of, twl_of_match);
1089
a5023574 1090static int twlreg_probe(struct platform_device *pdev)
fa16a5c1 1091{
2098e95c 1092 int i, id;
fa16a5c1 1093 struct twlreg_info *info;
0ffff5a6 1094 const struct twlreg_info *template;
fa16a5c1
DB
1095 struct regulator_init_data *initdata;
1096 struct regulation_constraints *c;
1097 struct regulator_dev *rdev;
63bfff4e 1098 struct twl_regulator_driver_data *drvdata;
2098e95c 1099 const struct of_device_id *match;
c172708d 1100 struct regulator_config config = { };
2098e95c
RN
1101
1102 match = of_match_device(twl_of_match, &pdev->dev);
1103 if (match) {
0ffff5a6
AB
1104 template = match->data;
1105 id = template->desc.id;
2098e95c 1106 initdata = of_get_regulator_init_data(&pdev->dev,
072e78b1
JMC
1107 pdev->dev.of_node,
1108 &template->desc);
2098e95c
RN
1109 drvdata = NULL;
1110 } else {
1111 id = pdev->id;
dff91d0b 1112 initdata = dev_get_platdata(&pdev->dev);
0ffff5a6
AB
1113 for (i = 0, template = NULL; i < ARRAY_SIZE(twl_of_match); i++) {
1114 template = twl_of_match[i].data;
1115 if (template && template->desc.id == id)
5ade3935 1116 break;
2098e95c 1117 }
5ade3935
AL
1118 if (i == ARRAY_SIZE(twl_of_match))
1119 return -ENODEV;
1120
2098e95c
RN
1121 drvdata = initdata->driver_data;
1122 if (!drvdata)
1123 return -EINVAL;
fa16a5c1 1124 }
2098e95c 1125
0ffff5a6 1126 if (!template)
fa16a5c1
DB
1127 return -ENODEV;
1128
fa16a5c1
DB
1129 if (!initdata)
1130 return -EINVAL;
1131
cd01e32d 1132 info = devm_kmemdup(&pdev->dev, template, sizeof(*info), GFP_KERNEL);
0ffff5a6
AB
1133 if (!info)
1134 return -ENOMEM;
1135
2098e95c
RN
1136 if (drvdata) {
1137 /* copy the driver data into regulator data */
1138 info->features = drvdata->features;
1139 info->data = drvdata->data;
1140 info->set_voltage = drvdata->set_voltage;
1141 info->get_voltage = drvdata->get_voltage;
1142 }
4d94aee5 1143
fa16a5c1
DB
1144 /* Constrain board-specific capabilities according to what
1145 * this driver and the chip itself can actually do.
1146 */
1147 c = &initdata->constraints;
fa16a5c1
DB
1148 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
1149 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
1150 | REGULATOR_CHANGE_MODE
1151 | REGULATOR_CHANGE_STATUS;
2098e95c 1152 switch (id) {
205e5cd3
JKS
1153 case TWL4030_REG_VIO:
1154 case TWL4030_REG_VDD1:
1155 case TWL4030_REG_VDD2:
1156 case TWL4030_REG_VPLL1:
1157 case TWL4030_REG_VINTANA1:
1158 case TWL4030_REG_VINTANA2:
1159 case TWL4030_REG_VINTDIG:
1160 c->always_on = true;
1161 break;
1162 default:
1163 break;
1164 }
fa16a5c1 1165
2098e95c 1166 switch (id) {
89ce43fb 1167 case TWL6032_REG_SMPS3:
4d94aee5
GG
1168 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS3)
1169 info->flags |= SMPS_EXTENDED_EN;
1170 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS3)
1171 info->flags |= SMPS_OFFSET_EN;
1172 break;
89ce43fb 1173 case TWL6032_REG_SMPS4:
4d94aee5
GG
1174 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS4)
1175 info->flags |= SMPS_EXTENDED_EN;
1176 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS4)
1177 info->flags |= SMPS_OFFSET_EN;
1178 break;
89ce43fb 1179 case TWL6032_REG_VIO:
4d94aee5
GG
1180 if (twl_get_smps_mult() & SMPS_MULTOFFSET_VIO)
1181 info->flags |= SMPS_EXTENDED_EN;
1182 if (twl_get_smps_offset() & SMPS_MULTOFFSET_VIO)
1183 info->flags |= SMPS_OFFSET_EN;
1184 break;
1185 }
1186
c172708d
MB
1187 config.dev = &pdev->dev;
1188 config.init_data = initdata;
1189 config.driver_data = info;
1190 config.of_node = pdev->dev.of_node;
1191
00ce070e 1192 rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
fa16a5c1
DB
1193 if (IS_ERR(rdev)) {
1194 dev_err(&pdev->dev, "can't register %s, %ld\n",
1195 info->desc.name, PTR_ERR(rdev));
1196 return PTR_ERR(rdev);
1197 }
1198 platform_set_drvdata(pdev, rdev);
1199
776dc923
SH
1200 if (twl_class_is_4030())
1201 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
30010fa5
JKS
1202 info->remap);
1203
fa16a5c1
DB
1204 /* NOTE: many regulators support short-circuit IRQs (presentable
1205 * as REGULATOR_OVER_CURRENT notifications?) configured via:
1206 * - SC_CONFIG
1207 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
1208 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
1209 * - IT_CONFIG
1210 */
1211
1212 return 0;
1213}
1214
c4aa6f31 1215MODULE_ALIAS("platform:twl_reg");
fa16a5c1 1216
c4aa6f31
RN
1217static struct platform_driver twlreg_driver = {
1218 .probe = twlreg_probe,
fa16a5c1 1219 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 1220 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 1221 */
2098e95c
RN
1222 .driver = {
1223 .name = "twl_reg",
2098e95c
RN
1224 .of_match_table = of_match_ptr(twl_of_match),
1225 },
fa16a5c1
DB
1226};
1227
c4aa6f31 1228static int __init twlreg_init(void)
fa16a5c1 1229{
c4aa6f31 1230 return platform_driver_register(&twlreg_driver);
fa16a5c1 1231}
c4aa6f31 1232subsys_initcall(twlreg_init);
fa16a5c1 1233
c4aa6f31 1234static void __exit twlreg_exit(void)
fa16a5c1 1235{
c4aa6f31 1236 platform_driver_unregister(&twlreg_driver);
fa16a5c1 1237}
c4aa6f31 1238module_exit(twlreg_exit)
fa16a5c1 1239
c4aa6f31 1240MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 1241MODULE_LICENSE("GPL");